drivers/vdpa/mlx5/mlx5_vdpa_virtq.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2019 Mellanox Technologies, Ltd
   3  */
   4 #include <string.h>
   5 #include <unistd.h>
   6 #include <sys/mman.h>
   7
   8 #include <rte_malloc.h>
   9 #include <rte_errno.h>
  10 #include <rte_io.h>
  11
  12 #include <mlx5_common.h>
  13
  14 #include "mlx5_vdpa_utils.h"
  15 #include "mlx5_vdpa.h"
  16
  17
  18 static void
  19 mlx5_vdpa_virtq_handler(void *cb_arg)
  20 {
  21         struct mlx5_vdpa_virtq *virtq = cb_arg;
  22         struct mlx5_vdpa_priv *priv = virtq->priv;
  23         uint64_t buf;
  24         int nbytes;
  25
  26         do {
  27                 nbytes = read(virtq->intr_handle.fd, &buf, 8);
  28                 if (nbytes < 0) {
  29                         if (errno == EINTR ||
  30                             errno == EWOULDBLOCK ||
  31                             errno == EAGAIN)
  32                                 continue;
  33                         DRV_LOG(ERR,  "Failed to read kickfd of virtq %d: %s",
  34                                 virtq->index, strerror(errno));
  35                 }
  36                 break;
  37         } while (1);
  38         rte_write32(virtq->index, priv->virtq_db_addr);
  39         DRV_LOG(DEBUG, "Ring virtq %u doorbell.", virtq->index);
  40 }
  41
  42 static int
  43 mlx5_vdpa_virtq_unset(struct mlx5_vdpa_virtq *virtq)
  44 {
  45         unsigned int i;
  46         int retries = MLX5_VDPA_INTR_RETRIES;
  47         int ret = -EAGAIN;
  48
  49         if (virtq->intr_handle.fd != -1) {
  50                 while (retries-- && ret == -EAGAIN) {
  51                         ret = rte_intr_callback_unregister(&virtq->intr_handle,
  52                                                         mlx5_vdpa_virtq_handler,
  53                                                         virtq);
  54                         if (ret == -EAGAIN) {
  55                                 DRV_LOG(DEBUG, "Try again to unregister fd %d "
  56                                         "of virtq %d interrupt, retries = %d.",
  57                                         virtq->intr_handle.fd,
  58                                         (int)virtq->index, retries);
  59                                 usleep(MLX5_VDPA_INTR_RETRIES_USEC);
  60                         }
  61                 }
  62                 virtq->intr_handle.fd = -1;
  63         }
  64         if (virtq->virtq)
  65                 claim_zero(mlx5_devx_cmd_destroy(virtq->virtq));
  66         virtq->virtq = NULL;
  67         for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
  68                 if (virtq->umems[i].obj)
  69                         claim_zero(mlx5_glue->devx_umem_dereg
  70                                                          (virtq->umems[i].obj));
  71                 if (virtq->umems[i].buf)
  72                         rte_free(virtq->umems[i].buf);
  73         }
  74         memset(&virtq->umems, 0, sizeof(virtq->umems));
  75         if (virtq->counters) {
  76                 claim_zero(mlx5_devx_cmd_destroy(virtq->counters));
  77                 virtq->counters = NULL;
  78         }
  79         memset(&virtq->reset, 0, sizeof(virtq->reset));
  80         if (virtq->eqp.fw_qp)
  81                 mlx5_vdpa_event_qp_destroy(&virtq->eqp);
  82         return 0;
  83 }
  84
  85 void
  86 mlx5_vdpa_virtqs_release(struct mlx5_vdpa_priv *priv)
  87 {
  88         int i;
  89
  90         for (i = 0; i < priv->nr_virtqs; i++) {
  91                 mlx5_vdpa_virtq_unset(&priv->virtqs[i]);
  92                 priv->virtqs[i].enable = 0;
  93         }
  94         if (priv->tis) {
  95                 claim_zero(mlx5_devx_cmd_destroy(priv->tis));
  96                 priv->tis = NULL;
  97         }
  98         if (priv->td) {
  99                 claim_zero(mlx5_devx_cmd_destroy(priv->td));
 100                 priv->td = NULL;
 101         }
 102         if (priv->virtq_db_addr) {
 103                 claim_zero(munmap(priv->virtq_db_addr, priv->var->length));
 104                 priv->virtq_db_addr = NULL;
 105         }
 106         priv->features = 0;
 107         priv->nr_virtqs = 0;
 108 }
 109
 110 int
 111 mlx5_vdpa_virtq_modify(struct mlx5_vdpa_virtq *virtq, int state)
 112 {
 113         struct mlx5_devx_virtq_attr attr = {
 114                         .type = MLX5_VIRTQ_MODIFY_TYPE_STATE,
 115                         .state = state ? MLX5_VIRTQ_STATE_RDY :
 116                                          MLX5_VIRTQ_STATE_SUSPEND,
 117                         .queue_index = virtq->index,
 118         };
 119
 120         return mlx5_devx_cmd_modify_virtq(virtq->virtq, &attr);
 121 }
 122
 123 int
 124 mlx5_vdpa_virtq_stop(struct mlx5_vdpa_priv *priv, int index)
 125 {
 126         struct mlx5_devx_virtq_attr attr = {0};
 127         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 128         int ret = mlx5_vdpa_virtq_modify(virtq, 0);
 129
 130         if (ret)
 131                 return -1;
 132         if (mlx5_devx_cmd_query_virtq(virtq->virtq, &attr)) {
 133                 DRV_LOG(ERR, "Failed to query virtq %d.", index);
 134                 return -1;
 135         }
 136         DRV_LOG(INFO, "Query vid %d vring %d: hw_available_idx=%d, "
 137                 "hw_used_index=%d", priv->vid, index,
 138                 attr.hw_available_index, attr.hw_used_index);
 139         ret = rte_vhost_set_vring_base(priv->vid, index,
 140                                        attr.hw_available_index,
 141                                        attr.hw_used_index);
 142         if (ret) {
 143                 DRV_LOG(ERR, "Failed to set virtq %d base.", index);
 144                 return -1;
 145         }
 146         return 0;
 147 }
 148
 149 static uint64_t
 150 mlx5_vdpa_hva_to_gpa(struct rte_vhost_memory *mem, uint64_t hva)
 151 {
 152         struct rte_vhost_mem_region *reg;
 153         uint32_t i;
 154         uint64_t gpa = 0;
 155
 156         for (i = 0; i < mem->nregions; i++) {
 157                 reg = &mem->regions[i];
 158                 if (hva >= reg->host_user_addr &&
 159                     hva < reg->host_user_addr + reg->size) {
 160                         gpa = hva - reg->host_user_addr + reg->guest_phys_addr;
 161                         break;
 162                 }
 163         }
 164         return gpa;
 165 }
 166
 167 static int
 168 mlx5_vdpa_virtq_setup(struct mlx5_vdpa_priv *priv, int index)
 169 {
 170         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 171         struct rte_vhost_vring vq;
 172         struct mlx5_devx_virtq_attr attr = {0};
 173         uint64_t gpa;
 174         int ret;
 175         unsigned int i;
 176         uint16_t last_avail_idx;
 177         uint16_t last_used_idx;
 178
 179         ret = rte_vhost_get_vhost_vring(priv->vid, index, &vq);
 180         if (ret)
 181                 return -1;
 182         virtq->index = index;
 183         virtq->vq_size = vq.size;
 184         attr.tso_ipv4 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4));
 185         attr.tso_ipv6 = !!(priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6));
 186         attr.tx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_CSUM));
 187         attr.rx_csum = !!(priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM));
 188         attr.virtio_version_1_0 = !!(priv->features & (1ULL <<
 189                                                         VIRTIO_F_VERSION_1));
 190         attr.type = (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) ?
 191                         MLX5_VIRTQ_TYPE_PACKED : MLX5_VIRTQ_TYPE_SPLIT;
 192         /*
 193          * No need event QPs creation when the guest in poll mode or when the
 194          * capability allows it.
 195          */
 196         attr.event_mode = vq.callfd != -1 || !(priv->caps.event_mode & (1 <<
 197                                                MLX5_VIRTQ_EVENT_MODE_NO_MSIX)) ?
 198                                                       MLX5_VIRTQ_EVENT_MODE_QP :
 199                                                   MLX5_VIRTQ_EVENT_MODE_NO_MSIX;
 200         if (attr.event_mode == MLX5_VIRTQ_EVENT_MODE_QP) {
 201                 ret = mlx5_vdpa_event_qp_create(priv, vq.size, vq.callfd,
 202                                                 &virtq->eqp);
 203                 if (ret) {
 204                         DRV_LOG(ERR, "Failed to create event QPs for virtq %d.",
 205                                 index);
 206                         return -1;
 207                 }
 208                 attr.qp_id = virtq->eqp.fw_qp->id;
 209         } else {
 210                 DRV_LOG(INFO, "Virtq %d is, for sure, working by poll mode, no"
 211                         " need event QPs and event mechanism.", index);
 212         }
 213         if (priv->caps.queue_counters_valid) {
 214                 virtq->counters = mlx5_devx_cmd_create_virtio_q_counters
 215                                                                     (priv->ctx);
 216                 if (!virtq->counters) {
 217                         DRV_LOG(ERR, "Failed to create virtq couners for virtq"
 218                                 " %d.", index);
 219                         goto error;
 220                 }
 221                 attr.counters_obj_id = virtq->counters->id;
 222         }
 223         /* Setup 3 UMEMs for each virtq. */
 224         for (i = 0; i < RTE_DIM(virtq->umems); ++i) {
 225                 virtq->umems[i].size = priv->caps.umems[i].a * vq.size +
 226                                                           priv->caps.umems[i].b;
 227                 virtq->umems[i].buf = rte_zmalloc(__func__,
 228                                                   virtq->umems[i].size, 4096);
 229                 if (!virtq->umems[i].buf) {
 230                         DRV_LOG(ERR, "Cannot allocate umem %d memory for virtq"
 231                                 " %u.", i, index);
 232                         goto error;
 233                 }
 234                 virtq->umems[i].obj = mlx5_glue->devx_umem_reg(priv->ctx,
 235                                                         virtq->umems[i].buf,
 236                                                         virtq->umems[i].size,
 237                                                         IBV_ACCESS_LOCAL_WRITE);
 238                 if (!virtq->umems[i].obj) {
 239                         DRV_LOG(ERR, "Failed to register umem %d for virtq %u.",
 240                                 i, index);
 241                         goto error;
 242                 }
 243                 attr.umems[i].id = virtq->umems[i].obj->umem_id;
 244                 attr.umems[i].offset = 0;
 245                 attr.umems[i].size = virtq->umems[i].size;
 246         }
 247         if (attr.type == MLX5_VIRTQ_TYPE_SPLIT) {
 248                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 249                                            (uint64_t)(uintptr_t)vq.desc);
 250                 if (!gpa) {
 251                         DRV_LOG(ERR, "Failed to get descriptor ring GPA.");
 252                         goto error;
 253                 }
 254                 attr.desc_addr = gpa;
 255                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 256                                            (uint64_t)(uintptr_t)vq.used);
 257                 if (!gpa) {
 258                         DRV_LOG(ERR, "Failed to get GPA for used ring.");
 259                         goto error;
 260                 }
 261                 attr.used_addr = gpa;
 262                 gpa = mlx5_vdpa_hva_to_gpa(priv->vmem,
 263                                            (uint64_t)(uintptr_t)vq.avail);
 264                 if (!gpa) {
 265                         DRV_LOG(ERR, "Failed to get GPA for available ring.");
 266                         goto error;
 267                 }
 268                 attr.available_addr = gpa;
 269         }
 270         ret = rte_vhost_get_vring_base(priv->vid, index, &last_avail_idx,
 271                                  &last_used_idx);
 272         if (ret) {
 273                 last_avail_idx = 0;
 274                 last_used_idx = 0;
 275                 DRV_LOG(WARNING, "Couldn't get vring base, idx are set to 0");
 276         } else {
 277                 DRV_LOG(INFO, "vid %d: Init last_avail_idx=%d, last_used_idx=%d for "
 278                                 "virtq %d.", priv->vid, last_avail_idx,
 279                                 last_used_idx, index);
 280         }
 281         attr.hw_available_index = last_avail_idx;
 282         attr.hw_used_index = last_used_idx;
 283         attr.q_size = vq.size;
 284         attr.mkey = priv->gpa_mkey_index;
 285         attr.tis_id = priv->tis->id;
 286         attr.queue_index = index;
 287         attr.pd = priv->pdn;
 288         virtq->virtq = mlx5_devx_cmd_create_virtq(priv->ctx, &attr);
 289         virtq->priv = priv;
 290         if (!virtq->virtq)
 291                 goto error;
 292         if (mlx5_vdpa_virtq_modify(virtq, 1))
 293                 goto error;
 294         virtq->priv = priv;
 295         rte_write32(virtq->index, priv->virtq_db_addr);
 296         /* Setup doorbell mapping. */
 297         virtq->intr_handle.fd = vq.kickfd;
 298         if (virtq->intr_handle.fd == -1) {
 299                 DRV_LOG(WARNING, "Virtq %d kickfd is invalid.", index);
 300                 if (!priv->direct_notifier) {
 301                         DRV_LOG(ERR, "Virtq %d cannot be notified.", index);
 302                         goto error;
 303                 }
 304         } else {
 305                 virtq->intr_handle.type = RTE_INTR_HANDLE_EXT;
 306                 if (rte_intr_callback_register(&virtq->intr_handle,
 307                                                mlx5_vdpa_virtq_handler,
 308                                                virtq)) {
 309                         virtq->intr_handle.fd = -1;
 310                         DRV_LOG(ERR, "Failed to register virtq %d interrupt.",
 311                                 index);
 312                         goto error;
 313                 } else {
 314                         DRV_LOG(DEBUG, "Register fd %d interrupt for virtq %d.",
 315                                 virtq->intr_handle.fd, index);
 316                 }
 317         }
 318         return 0;
 319 error:
 320         mlx5_vdpa_virtq_unset(virtq);
 321         return -1;
 322 }
 323
 324 static int
 325 mlx5_vdpa_features_validate(struct mlx5_vdpa_priv *priv)
 326 {
 327         if (priv->features & (1ULL << VIRTIO_F_RING_PACKED)) {
 328                 if (!(priv->caps.virtio_queue_type & (1 <<
 329                                                      MLX5_VIRTQ_TYPE_PACKED))) {
 330                         DRV_LOG(ERR, "Failed to configur PACKED mode for vdev "
 331                                 "%d - it was not reported by HW/driver"
 332                                 " capability.", priv->vid);
 333                         return -ENOTSUP;
 334                 }
 335         }
 336         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO4)) {
 337                 if (!priv->caps.tso_ipv4) {
 338                         DRV_LOG(ERR, "Failed to enable TSO4 for vdev %d - TSO4"
 339                                 " was not reported by HW/driver capability.",
 340                                 priv->vid);
 341                         return -ENOTSUP;
 342                 }
 343         }
 344         if (priv->features & (1ULL << VIRTIO_NET_F_HOST_TSO6)) {
 345                 if (!priv->caps.tso_ipv6) {
 346                         DRV_LOG(ERR, "Failed to enable TSO6 for vdev %d - TSO6"
 347                                 " was not reported by HW/driver capability.",
 348                                 priv->vid);
 349                         return -ENOTSUP;
 350                 }
 351         }
 352         if (priv->features & (1ULL << VIRTIO_NET_F_CSUM)) {
 353                 if (!priv->caps.tx_csum) {
 354                         DRV_LOG(ERR, "Failed to enable CSUM for vdev %d - CSUM"
 355                                 " was not reported by HW/driver capability.",
 356                                 priv->vid);
 357                         return -ENOTSUP;
 358                 }
 359         }
 360         if (priv->features & (1ULL << VIRTIO_NET_F_GUEST_CSUM)) {
 361                 if (!priv->caps.rx_csum) {
 362                         DRV_LOG(ERR, "Failed to enable GUEST CSUM for vdev %d"
 363                                 " GUEST CSUM was not reported by HW/driver "
 364                                 "capability.", priv->vid);
 365                         return -ENOTSUP;
 366                 }
 367         }
 368         if (priv->features & (1ULL << VIRTIO_F_VERSION_1)) {
 369                 if (!priv->caps.virtio_version_1_0) {
 370                         DRV_LOG(ERR, "Failed to enable version 1 for vdev %d "
 371                                 "version 1 was not reported by HW/driver"
 372                                 " capability.", priv->vid);
 373                         return -ENOTSUP;
 374                 }
 375         }
 376         return 0;
 377 }
 378
 379 int
 380 mlx5_vdpa_virtqs_prepare(struct mlx5_vdpa_priv *priv)
 381 {
 382         struct mlx5_devx_tis_attr tis_attr = {0};
 383         uint32_t i;
 384         uint16_t nr_vring = rte_vhost_get_vring_num(priv->vid);
 385         int ret = rte_vhost_get_negotiated_features(priv->vid, &priv->features);
 386
 387         if (ret || mlx5_vdpa_features_validate(priv)) {
 388                 DRV_LOG(ERR, "Failed to configure negotiated features.");
 389                 return -1;
 390         }
 391         if (nr_vring > priv->caps.max_num_virtio_queues * 2) {
 392                 DRV_LOG(ERR, "Do not support more than %d virtqs(%d).",
 393                         (int)priv->caps.max_num_virtio_queues * 2,
 394                         (int)nr_vring);
 395                 return -1;
 396         }
 397         /* Always map the entire page. */
 398         priv->virtq_db_addr = mmap(NULL, priv->var->length, PROT_READ |
 399                                    PROT_WRITE, MAP_SHARED, priv->ctx->cmd_fd,
 400                                    priv->var->mmap_off);
 401         if (priv->virtq_db_addr == MAP_FAILED) {
 402                 DRV_LOG(ERR, "Failed to map doorbell page %u.", errno);
 403                 priv->virtq_db_addr = NULL;
 404                 goto error;
 405         } else {
 406                 DRV_LOG(DEBUG, "VAR address of doorbell mapping is %p.",
 407                         priv->virtq_db_addr);
 408         }
 409         priv->td = mlx5_devx_cmd_create_td(priv->ctx);
 410         if (!priv->td) {
 411                 DRV_LOG(ERR, "Failed to create transport domain.");
 412                 return -rte_errno;
 413         }
 414         tis_attr.transport_domain = priv->td->id;
 415         priv->tis = mlx5_devx_cmd_create_tis(priv->ctx, &tis_attr);
 416         if (!priv->tis) {
 417                 DRV_LOG(ERR, "Failed to create TIS.");
 418                 goto error;
 419         }
 420         priv->nr_virtqs = nr_vring;
 421         for (i = 0; i < nr_vring; i++) {
 422                 claim_zero(rte_vhost_enable_guest_notification(priv->vid, i,
 423                                                                1));
 424                 if (mlx5_vdpa_virtq_setup(priv, i))
 425                         goto error;
 426         }
 427         return 0;
 428 error:
 429         mlx5_vdpa_virtqs_release(priv);
 430         return -1;
 431 }
 432
 433 int
 434 mlx5_vdpa_virtq_enable(struct mlx5_vdpa_priv *priv, int index, int enable)
 435 {
 436         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[index];
 437         int ret;
 438
 439         DRV_LOG(INFO, "Update virtq %d status %sable -> %sable.", index,
 440                 virtq->enable ? "en" : "dis", enable ? "en" : "dis");
 441         if (virtq->enable == !!enable)
 442                 return 0;
 443         if (!priv->configured) {
 444                 virtq->enable = !!enable;
 445                 return 0;
 446         }
 447         if (enable) {
 448                 /* Configuration might have been updated - reconfigure virtq. */
 449                 if (virtq->virtq) {
 450                         ret = mlx5_vdpa_virtq_stop(priv, index);
 451                         if (ret)
 452                                 DRV_LOG(WARNING, "Failed to stop virtq %d.",
 453                                         index);
 454                         mlx5_vdpa_virtq_unset(virtq);
 455                 }
 456                 ret = mlx5_vdpa_virtq_setup(priv, index);
 457                 if (ret) {
 458                         DRV_LOG(ERR, "Failed to setup virtq %d.", index);
 459                         return ret;
 460                         /* The only case virtq can stay invalid. */
 461                 }
 462         }
 463         virtq->enable = !!enable;
 464         if (is_virtq_recvq(virtq->index, priv->nr_virtqs)) {
 465                 /* Need to add received virtq to the RQT table of the TIRs. */
 466                 ret = mlx5_vdpa_steer_update(priv);
 467                 if (ret) {
 468                         virtq->enable = !enable;
 469                         return ret;
 470                 }
 471         }
 472         return 0;
 473 }
 474
 475 int
 476 mlx5_vdpa_virtq_stats_get(struct mlx5_vdpa_priv *priv, int qid,
 477                           struct rte_vdpa_stat *stats, unsigned int n)
 478 {
 479         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
 480         struct mlx5_devx_virtio_q_couners_attr attr = {0};
 481         int ret;
 482
 483         if (!virtq->virtq || !virtq->enable) {
 484                 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
 485                         "is invalid.", qid);
 486                 return -EINVAL;
 487         }
 488         MLX5_ASSERT(virtq->counters);
 489         ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters, &attr);
 490         if (ret) {
 491                 DRV_LOG(ERR, "Failed to read virtq %d stats from HW.", qid);
 492                 return ret;
 493         }
 494         ret = (int)RTE_MIN(n, (unsigned int)MLX5_VDPA_STATS_MAX);
 495         if (ret == MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS)
 496                 return ret;
 497         stats[MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS] = (struct rte_vdpa_stat) {
 498                 .id = MLX5_VDPA_STATS_RECEIVED_DESCRIPTORS,
 499                 .value = attr.received_desc - virtq->reset.received_desc,
 500         };
 501         if (ret == MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS)
 502                 return ret;
 503         stats[MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS] = (struct rte_vdpa_stat) {
 504                 .id = MLX5_VDPA_STATS_COMPLETED_DESCRIPTORS,
 505                 .value = attr.completed_desc - virtq->reset.completed_desc,
 506         };
 507         if (ret == MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS)
 508                 return ret;
 509         stats[MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS] = (struct rte_vdpa_stat) {
 510                 .id = MLX5_VDPA_STATS_BAD_DESCRIPTOR_ERRORS,
 511                 .value = attr.bad_desc_errors - virtq->reset.bad_desc_errors,
 512         };
 513         if (ret == MLX5_VDPA_STATS_EXCEED_MAX_CHAIN)
 514                 return ret;
 515         stats[MLX5_VDPA_STATS_EXCEED_MAX_CHAIN] = (struct rte_vdpa_stat) {
 516                 .id = MLX5_VDPA_STATS_EXCEED_MAX_CHAIN,
 517                 .value = attr.exceed_max_chain - virtq->reset.exceed_max_chain,
 518         };
 519         if (ret == MLX5_VDPA_STATS_INVALID_BUFFER)
 520                 return ret;
 521         stats[MLX5_VDPA_STATS_INVALID_BUFFER] = (struct rte_vdpa_stat) {
 522                 .id = MLX5_VDPA_STATS_INVALID_BUFFER,
 523                 .value = attr.invalid_buffer - virtq->reset.invalid_buffer,
 524         };
 525         if (ret == MLX5_VDPA_STATS_COMPLETION_ERRORS)
 526                 return ret;
 527         stats[MLX5_VDPA_STATS_COMPLETION_ERRORS] = (struct rte_vdpa_stat) {
 528                 .id = MLX5_VDPA_STATS_COMPLETION_ERRORS,
 529                 .value = attr.error_cqes - virtq->reset.error_cqes,
 530         };
 531         return ret;
 532 }
 533
 534 int
 535 mlx5_vdpa_virtq_stats_reset(struct mlx5_vdpa_priv *priv, int qid)
 536 {
 537         struct mlx5_vdpa_virtq *virtq = &priv->virtqs[qid];
 538         int ret;
 539
 540         if (!virtq->virtq || !virtq->enable) {
 541                 DRV_LOG(ERR, "Failed to read virtq %d statistics - virtq "
 542                         "is invalid.", qid);
 543                 return -EINVAL;
 544         }
 545         MLX5_ASSERT(virtq->counters);
 546         ret = mlx5_devx_cmd_query_virtio_q_counters(virtq->counters,
 547                                                     &virtq->reset);
 548         if (ret)
 549                 DRV_LOG(ERR, "Failed to read virtq %d reset stats from HW.",
 550                         qid);
 551         return ret;
 552 }