2 * Copyright Droids Corporation, Microb Technology, Eirbot (2009)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 /* WARNING : this file is automatically generated by scripts.
23 * You should not edit it. If you find something wrong in it,
24 * write to zer0@droids-corp.org */
27 /* prescalers timer 0 */
28 #define TIMER0_PRESCALER_DIV_0 0
29 #define TIMER0_PRESCALER_DIV_1 1
30 #define TIMER0_PRESCALER_DIV_8 2
31 #define TIMER0_PRESCALER_DIV_64 3
32 #define TIMER0_PRESCALER_DIV_256 4
33 #define TIMER0_PRESCALER_DIV_1024 5
34 #define TIMER0_PRESCALER_DIV_FALL 6
35 #define TIMER0_PRESCALER_DIV_RISE 7
37 #define TIMER0_PRESCALER_REG_0 0
38 #define TIMER0_PRESCALER_REG_1 1
39 #define TIMER0_PRESCALER_REG_2 8
40 #define TIMER0_PRESCALER_REG_3 64
41 #define TIMER0_PRESCALER_REG_4 256
42 #define TIMER0_PRESCALER_REG_5 1024
43 #define TIMER0_PRESCALER_REG_6 -1
44 #define TIMER0_PRESCALER_REG_7 -2
47 /* available timers */
48 #define TIMER0_AVAILABLE
50 /* overflow interrupt number */
51 #define SIG_OVERFLOW0_NUM 0
52 #define SIG_OVERFLOW_TOTAL_NUM 1
54 /* output compare interrupt number */
55 #define SIG_OUTPUT_COMPARE_TOTAL_NUM 0
58 #define PWM_TOTAL_NUM 0
60 /* input capture interrupt number */
61 #define SIG_INPUT_CAPTURE_TOTAL_NUM 0
65 #define TOIE0_REG TIMSK
68 #define WDP0_REG WDTCR
69 #define WDP1_REG WDTCR
70 #define WDP2_REG WDTCR
74 #define INT0_REG GIMSK
81 #define PINB0_REG PINB
82 #define PINB1_REG PINB
83 #define PINB2_REG PINB
84 #define PINB3_REG PINB
85 #define PINB4_REG PINB
86 #define PINB5_REG PINB
87 #define PINB6_REG PINB
88 #define PINB7_REG PINB
91 #define PORTD0_REG PORTD
92 #define PORTD1_REG PORTD
93 #define PORTD2_REG PORTD
94 #define PORTD3_REG PORTD
95 #define PORTD4_REG PORTD
96 #define PORTD5_REG PORTD
97 #define PORTD6_REG PORTD
100 #define EEAR0_REG EEAR
101 #define EEAR1_REG EEAR
102 #define EEAR2_REG EEAR
103 #define EEAR3_REG EEAR
104 #define EEAR4_REG EEAR
105 #define EEAR5_REG EEAR
106 #define EEAR6_REG EEAR
109 #define PORTB0_REG PORTB
110 #define PORTB1_REG PORTB
111 #define PORTB2_REG PORTB
112 #define PORTB3_REG PORTB
113 #define PORTB4_REG PORTB
114 #define PORTB5_REG PORTB
115 #define PORTB6_REG PORTB
116 #define PORTB7_REG PORTB
119 #define CS00_REG TCCR0
120 #define CS01_REG TCCR0
121 #define CS02_REG TCCR0
124 #define ISC00_REG MCUCR
125 #define ISC01_REG MCUCR
130 #define DDB0_REG DDRB
131 #define DDB1_REG DDRB
132 #define DDB2_REG DDRB
133 #define DDB3_REG DDRB
134 #define DDB4_REG DDRB
135 #define DDB5_REG DDRB
136 #define DDB6_REG DDRB
137 #define DDB7_REG DDRB
140 #define TCNT00_REG TCNT0
141 #define TCNT01_REG TCNT0
142 #define TCNT02_REG TCNT0
143 #define TCNT03_REG TCNT0
144 #define TCNT04_REG TCNT0
145 #define TCNT05_REG TCNT0
146 #define TCNT06_REG TCNT0
147 #define TCNT07_REG TCNT0
150 #define ACIS0_REG ACSR
151 #define ACIS1_REG ACSR
152 #define ACIE_REG ACSR
158 #define PIND0_REG PIND
159 #define PIND1_REG PIND
160 #define PIND2_REG PIND
161 #define PIND3_REG PIND
162 #define PIND4_REG PIND
163 #define PIND5_REG PIND
164 #define PIND6_REG PIND
167 #define EEDR0_REG EEDR
168 #define EEDR1_REG EEDR
169 #define EEDR2_REG EEDR
170 #define EEDR3_REG EEDR
171 #define EEDR4_REG EEDR
172 #define EEDR5_REG EEDR
173 #define EEDR6_REG EEDR
174 #define EEDR7_REG EEDR
187 #define TOV0_REG TIFR
190 #define DDD0_REG DDRD
191 #define DDD1_REG DDRD
192 #define DDD2_REG DDRD
193 #define DDD3_REG DDRD
194 #define DDD4_REG DDRD
195 #define DDD5_REG DDRD
196 #define DDD6_REG DDRD
199 #define AIN0_PORT PORTB
202 #define AIN1_PORT PORTB
208 #define MOSI_PORT PORTB
211 #define MISO_PORT PORTB
214 #define SCK_PORT PORTB
219 #define INT0_PORT PORTD
223 #define T0_PORT PORTD