2 * Copyright Droids Corporation, Microb Technology, Eirbot (2009)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
22 /* WARNING : this file is automatically generated by scripts.
23 * You should not edit it. If you find something wrong in it,
24 * write to zer0@droids-corp.org */
27 /* prescalers timer 0 */
28 #define TIMER0_PRESCALER_DIV_0 0
29 #define TIMER0_PRESCALER_DIV_1 1
30 #define TIMER0_PRESCALER_DIV_8 2
31 #define TIMER0_PRESCALER_DIV_64 3
32 #define TIMER0_PRESCALER_DIV_256 4
33 #define TIMER0_PRESCALER_DIV_1024 5
34 #define TIMER0_PRESCALER_DIV_FALL 6
35 #define TIMER0_PRESCALER_DIV_RISE 7
37 #define TIMER0_PRESCALER_REG_0 0
38 #define TIMER0_PRESCALER_REG_1 1
39 #define TIMER0_PRESCALER_REG_2 8
40 #define TIMER0_PRESCALER_REG_3 64
41 #define TIMER0_PRESCALER_REG_4 256
42 #define TIMER0_PRESCALER_REG_5 1024
43 #define TIMER0_PRESCALER_REG_6 -1
44 #define TIMER0_PRESCALER_REG_7 -2
46 /* prescalers timer 1 */
47 #define TIMER1_PRESCALER_DIV_0 0
48 #define TIMER1_PRESCALER_DIV_1 1
49 #define TIMER1_PRESCALER_DIV_8 2
50 #define TIMER1_PRESCALER_DIV_64 3
51 #define TIMER1_PRESCALER_DIV_256 4
52 #define TIMER1_PRESCALER_DIV_1024 5
53 #define TIMER1_PRESCALER_DIV_FALL 6
54 #define TIMER1_PRESCALER_DIV_RISE 7
56 #define TIMER1_PRESCALER_REG_0 0
57 #define TIMER1_PRESCALER_REG_1 1
58 #define TIMER1_PRESCALER_REG_2 8
59 #define TIMER1_PRESCALER_REG_3 64
60 #define TIMER1_PRESCALER_REG_4 256
61 #define TIMER1_PRESCALER_REG_5 1024
62 #define TIMER1_PRESCALER_REG_6 -1
63 #define TIMER1_PRESCALER_REG_7 -2
66 /* available timers */
67 #define TIMER0_AVAILABLE
68 #define TIMER0A_AVAILABLE
69 #define TIMER0B_AVAILABLE
70 #define TIMER1_AVAILABLE
71 #define TIMER1A_AVAILABLE
72 #define TIMER1B_AVAILABLE
74 /* overflow interrupt number */
75 #define SIG_OVERFLOW0_NUM 0
76 #define SIG_OVERFLOW1_NUM 1
77 #define SIG_OVERFLOW_TOTAL_NUM 2
79 /* output compare interrupt number */
80 #define SIG_OUTPUT_COMPARE0A_NUM 0
81 #define SIG_OUTPUT_COMPARE0B_NUM 1
82 #define SIG_OUTPUT_COMPARE1A_NUM 2
83 #define SIG_OUTPUT_COMPARE1B_NUM 3
84 #define SIG_OUTPUT_COMPARE_TOTAL_NUM 4
91 #define PWM_TOTAL_NUM 4
93 /* input capture interrupt number */
94 #define SIG_INPUT_CAPTURE1_NUM 0
95 #define SIG_INPUT_CAPTURE_TOTAL_NUM 1
99 #define PORTB0_REG PORTB
100 #define PORTB1_REG PORTB
101 #define PORTB2_REG PORTB
102 #define PORTB3_REG PORTB
103 #define PORTB4_REG PORTB
104 #define PORTB5_REG PORTB
105 #define PORTB6_REG PORTB
106 #define PORTB7_REG PORTB
109 #define LBT0_REG LINBTR
110 #define LBT1_REG LINBTR
111 #define LBT2_REG LINBTR
112 #define LBT3_REG LINBTR
113 #define LBT4_REG LINBTR
114 #define LBT5_REG LINBTR
115 #define LDISR_REG LINBTR
118 #define POCR1RA_0_REG POCR1RAL
119 #define POCR1RA_1_REG POCR1RAL
120 #define POCR1RA_2_REG POCR1RAL
121 #define POCR1RA_3_REG POCR1RAL
122 #define POCR1RA_4_REG POCR1RAL
123 #define POCR1RA_5_REG POCR1RAL
124 #define POCR1RA_6_REG POCR1RAL
125 #define POCR1RA_7_REG POCR1RAL
128 #define LID0_REG LINIDR
129 #define LID1_REG LINIDR
130 #define LID2_REG LINIDR
131 #define LID3_REG LINIDR
132 #define LID4_REG LINIDR
133 #define LID5_REG LINIDR
134 #define LP0_REG LINIDR
135 #define LP1_REG LINIDR
138 #define POCR1RA_8_REG POCR1RAH
139 #define POCR1RA_9_REG POCR1RAH
140 #define POCR1RA_00_REG POCR1RAH
141 #define POCR1RA_01_REG POCR1RAH
144 #define WDP0_REG WDTCSR
145 #define WDP1_REG WDTCSR
146 #define WDP2_REG WDTCSR
147 #define WDE_REG WDTCSR
148 #define WDCE_REG WDTCSR
149 #define WDP3_REG WDTCSR
150 #define WDIE_REG WDTCSR
151 #define WDIF_REG WDTCSR
154 #define EEDR0_REG EEDR
155 #define EEDR1_REG EEDR
156 #define EEDR2_REG EEDR
157 #define EEDR3_REG EEDR
158 #define EEDR4_REG EEDR
159 #define EEDR5_REG EEDR
160 #define EEDR6_REG EEDR
161 #define EEDR7_REG EEDR
164 /* #define OCR0_0_REG OCR0B */ /* dup in OCR0A */
165 /* #define OCR0_1_REG OCR0B */ /* dup in OCR0A */
166 /* #define OCR0_2_REG OCR0B */ /* dup in OCR0A */
167 /* #define OCR0_3_REG OCR0B */ /* dup in OCR0A */
168 /* #define OCR0_4_REG OCR0B */ /* dup in OCR0A */
169 /* #define OCR0_5_REG OCR0B */ /* dup in OCR0A */
170 /* #define OCR0_6_REG OCR0B */ /* dup in OCR0A */
171 /* #define OCR0_7_REG OCR0B */ /* dup in OCR0A */
174 #define LINDX0_REG LINSEL
175 #define LINDX1_REG LINSEL
176 #define LINDX2_REG LINSEL
177 #define LAINC_REG LINSEL
180 #define LCMD0_REG LINCR
181 #define LCMD1_REG LINCR
182 #define LCMD2_REG LINCR
183 #define LENA_REG LINCR
184 #define LCONF0_REG LINCR
185 #define LCONF1_REG LINCR
186 #define LIN13_REG LINCR
187 #define LSWRES_REG LINCR
190 #define PEOPE_REG PIM
191 #define PEVE0_REG PIM
192 #define PEVE1_REG PIM
193 #define PEVE2_REG PIM
196 #define POCR2SB_0_REG POCR2SBL
197 #define POCR2SB_1_REG POCR2SBL
198 #define POCR2SB_2_REG POCR2SBL
199 #define POCR2SB_3_REG POCR2SBL
200 #define POCR2SB_4_REG POCR2SBL
201 #define POCR2SB_5_REG POCR2SBL
202 #define POCR2SB_6_REG POCR2SBL
203 #define POCR2SB_7_REG POCR2SBL
206 #define SPI2X_REG SPSR
207 #define WCOL_REG SPSR
208 #define SPIF_REG SPSR
211 #define POCR2SB_8_REG POCR2SBH
212 #define POCR2SB_9_REG POCR2SBH
213 #define POCR2SB_00_REG POCR2SBH
214 #define POCR2SB_01_REG POCR2SBH
217 #define ICR1H0_REG ICR1H
218 #define ICR1H1_REG ICR1H
219 #define ICR1H2_REG ICR1H
220 #define ICR1H3_REG ICR1H
221 #define ICR1H4_REG ICR1H
222 #define ICR1H5_REG ICR1H
223 #define ICR1H6_REG ICR1H
224 #define ICR1H7_REG ICR1H
227 #define ICR1L0_REG ICR1L
228 #define ICR1L1_REG ICR1L
229 #define ICR1L2_REG ICR1L
230 #define ICR1L3_REG ICR1L
231 #define ICR1L4_REG ICR1L
232 #define ICR1L5_REG ICR1L
233 #define ICR1L6_REG ICR1L
234 #define ICR1L7_REG ICR1L
237 #define AC1M0_REG AC1CON
238 #define AC1M1_REG AC1CON
239 #define AC1M2_REG AC1CON
240 #define AC1ICE_REG AC1CON
241 #define AC1IS0_REG AC1CON
242 #define AC1IS1_REG AC1CON
243 #define AC1IE_REG AC1CON
244 #define AC1EN_REG AC1CON
247 #define PRADC_REG PRR
248 #define PRLIN_REG PRR
249 #define PRSPI_REG PRR
250 #define PRTIM0_REG PRR
251 #define PRTIM1_REG PRR
252 #define PRPSC_REG PRR
253 #define PRCAN_REG PRR
256 #define MUX0_REG ADMUX
257 #define MUX1_REG ADMUX
258 #define MUX2_REG ADMUX
259 #define MUX3_REG ADMUX
260 #define MUX4_REG ADMUX
261 #define ADLAR_REG ADMUX
262 #define REFS0_REG ADMUX
263 #define REFS1_REG ADMUX
266 #define LDIV0_REG LINBRRL
267 #define LDIV1_REG LINBRRL
268 #define LDIV2_REG LINBRRL
269 #define LDIV3_REG LINBRRL
270 #define LDIV4_REG LINBRRL
271 #define LDIV5_REG LINBRRL
272 #define LDIV6_REG LINBRRL
273 #define LDIV7_REG LINBRRL
276 #define EEAR8_REG EEARH
277 #define EEAR9_REG EEARH
280 #define LDIV8_REG LINBRRH
281 #define LDIV9_REG LINBRRH
282 #define LDIV10_REG LINBRRH
283 #define LDIV11_REG LINBRRH
286 #define ERRP_REG CANGSTA
287 #define BOFF_REG CANGSTA
288 #define ENFG_REG CANGSTA
289 #define RXBSY_REG CANGSTA
290 #define TXBSY_REG CANGSTA
291 #define OVFG_REG CANGSTA
294 #define SWRES_REG CANGCON
295 #define ENASTB_REG CANGCON
296 #define TEST_REG CANGCON
297 #define LISTEN_REG CANGCON
298 #define SYNTTC_REG CANGCON
299 #define TTC_REG CANGCON
300 #define OVRQ_REG CANGCON
301 #define ABRQ_REG CANGCON
304 #define PORTD0_REG PORTD
305 #define PORTD1_REG PORTD
306 #define PORTD2_REG PORTD
307 #define PORTD3_REG PORTD
308 #define PORTD4_REG PORTD
309 #define PORTD5_REG PORTD
310 #define PORTD6_REG PORTD
311 #define PORTD7_REG PORTD
314 #define PORTE0_REG PORTE
315 #define PORTE1_REG PORTE
316 #define PORTE2_REG PORTE
319 #define TCNT1H0_REG TCNT1H
320 #define TCNT1H1_REG TCNT1H
321 #define TCNT1H2_REG TCNT1H
322 #define TCNT1H3_REG TCNT1H
323 #define TCNT1H4_REG TCNT1H
324 #define TCNT1H5_REG TCNT1H
325 #define TCNT1H6_REG TCNT1H
326 #define TCNT1H7_REG TCNT1H
329 #define PORTC0_REG PORTC
330 #define PORTC1_REG PORTC
331 #define PORTC2_REG PORTC
332 #define PORTC3_REG PORTC
333 #define PORTC4_REG PORTC
334 #define PORTC5_REG PORTC
335 #define PORTC6_REG PORTC
336 #define PORTC7_REG PORTC
339 #define AMP1TS0_REG AMP1CSR
340 #define AMP1TS1_REG AMP1CSR
341 #define AMP1TS2_REG AMP1CSR
342 #define AMPCMP1_REG AMP1CSR
343 #define AMP1G0_REG AMP1CSR
344 #define AMP1G1_REG AMP1CSR
345 #define AMP1IS_REG AMP1CSR
346 #define AMP1EN_REG AMP1CSR
349 #define AC2M0_REG AC2CON
350 #define AC2M1_REG AC2CON
351 #define AC2M2_REG AC2CON
352 #define AC2IS0_REG AC2CON
353 #define AC2IS1_REG AC2CON
354 #define AC2IE_REG AC2CON
355 #define AC2EN_REG AC2CON
358 #define INDX0_REG CANPAGE
359 #define INDX1_REG CANPAGE
360 #define INDX2_REG CANPAGE
361 #define AINC_REG CANPAGE
362 #define MOBNB0_REG CANPAGE
363 #define MOBNB1_REG CANPAGE
364 #define MOBNB2_REG CANPAGE
365 #define MOBNB3_REG CANPAGE
368 #define INT0_REG EIMSK
369 #define INT1_REG EIMSK
370 #define INT2_REG EIMSK
371 #define INT3_REG EIMSK
374 #define LENRXOK_REG LINENIR
375 #define LENTXOK_REG LINENIR
376 #define LENIDOK_REG LINENIR
377 #define LENERR_REG LINENIR
380 #define ISC00_REG EICRA
381 #define ISC01_REG EICRA
382 #define ISC10_REG EICRA
383 #define ISC11_REG EICRA
384 #define ISC20_REG EICRA
385 #define ISC21_REG EICRA
386 #define ISC30_REG EICRA
387 #define ISC31_REG EICRA
390 #define POCR2RA_0_REG POCR2RAL
391 #define POCR2RA_1_REG POCR2RAL
392 #define POCR2RA_2_REG POCR2RAL
393 #define POCR2RA_3_REG POCR2RAL
394 #define POCR2RA_4_REG POCR2RAL
395 #define POCR2RA_5_REG POCR2RAL
396 #define POCR2RA_6_REG POCR2RAL
397 #define POCR2RA_7_REG POCR2RAL
400 #define ADC0D_REG DIDR0
401 #define ADC1D_REG DIDR0
402 #define ADC2D_REG DIDR0
403 #define ADC3D_REG DIDR0
404 #define ADC4D_REG DIDR0
405 #define ADC5D_REG DIDR0
406 #define ADC6D_REG DIDR0
407 #define ADC7D_REG DIDR0
410 #define ADC8D_REG DIDR1
411 #define ADC9D_REG DIDR1
412 #define ADC10D_REG DIDR1
413 #define AMP0ND_REG DIDR1
414 #define AMP0PD_REG DIDR1
415 #define ACMP0D_REG DIDR1
416 #define AMP2PD_REG DIDR1
419 #define POCR2RA_8_REG POCR2RAH
420 #define POCR2RA_9_REG POCR2RAH
421 #define POCR2RA_00_REG POCR2RAH
422 #define POCR2RA_01_REG POCR2RAH
425 #define CLKPS0_REG CLKPR
426 #define CLKPS1_REG CLKPR
427 #define CLKPS2_REG CLKPR
428 #define CLKPS3_REG CLKPR
429 #define CLKPCE_REG CLKPR
432 #define POCR1SA_8_REG POCR1SAH
433 #define POCR1SA_9_REG POCR1SAH
434 #define POCR1SA_00_REG POCR1SAH
435 #define POCR1SA_01_REG POCR1SAH
438 #define POCR1SA_0_REG POCR1SAL
439 #define POCR1SA_1_REG POCR1SAL
440 #define POCR1SA_2_REG POCR1SAL
441 #define POCR1SA_3_REG POCR1SAL
442 #define POCR1SA_4_REG POCR1SAL
443 #define POCR1SA_5_REG POCR1SAL
444 #define POCR1SA_6_REG POCR1SAL
445 #define POCR1SA_7_REG POCR1SAL
448 #define IDMSK21_REG CANIDM1
449 #define IDMSK22_REG CANIDM1
450 #define IDMSK23_REG CANIDM1
451 #define IDMSK24_REG CANIDM1
452 #define IDMSK25_REG CANIDM1
453 #define IDMSK26_REG CANIDM1
454 #define IDMSK27_REG CANIDM1
455 #define IDMSK28_REG CANIDM1
458 #define IDMSK5_REG CANIDM3
459 #define IDMSK6_REG CANIDM3
460 #define IDMSK7_REG CANIDM3
461 #define IDMSK8_REG CANIDM3
462 #define IDMSK9_REG CANIDM3
463 #define IDMSK10_REG CANIDM3
464 #define IDMSK11_REG CANIDM3
465 #define IDMSK12_REG CANIDM3
468 #define IDMSK13_REG CANIDM2
469 #define IDMSK14_REG CANIDM2
470 #define IDMSK15_REG CANIDM2
471 #define IDMSK16_REG CANIDM2
472 #define IDMSK17_REG CANIDM2
473 #define IDMSK18_REG CANIDM2
474 #define IDMSK19_REG CANIDM2
475 #define IDMSK20_REG CANIDM2
478 #define IDEMSK_REG CANIDM4
479 #define RTRMSK_REG CANIDM4
480 #define IDMSK0_REG CANIDM4
481 #define IDMSK1_REG CANIDM4
482 #define IDMSK2_REG CANIDM4
483 #define IDMSK3_REG CANIDM4
484 #define IDMSK4_REG CANIDM4
487 #define DDB0_REG DDRB
488 #define DDB1_REG DDRB
489 #define DDB2_REG DDRB
490 #define DDB3_REG DDRB
491 #define DDB4_REG DDRB
492 #define DDB5_REG DDRB
493 #define DDB6_REG DDRB
494 #define DDB7_REG DDRB
497 #define DDC0_REG DDRC
498 #define DDC1_REG DDRC
499 #define DDC2_REG DDRC
500 #define DDC3_REG DDRC
501 #define DDC4_REG DDRC
502 #define DDC5_REG DDRC
503 #define DDC6_REG DDRC
504 #define DDC7_REG DDRC
507 #define PRFM20_REG PMIC2
508 #define PRFM21_REG PMIC2
509 #define PRFM22_REG PMIC2
510 #define PAOC2_REG PMIC2
511 #define PFLTE2_REG PMIC2
512 #define PELEV2_REG PMIC2
513 #define PISEL2_REG PMIC2
514 #define POVEN2_REG PMIC2
517 #define FOC1B_REG TCCR1C
518 #define FOC1A_REG TCCR1C
521 #define PRFM10_REG PMIC1
522 #define PRFM11_REG PMIC1
523 #define PRFM12_REG PMIC1
524 #define PAOC1_REG PMIC1
525 #define PFLTE1_REG PMIC1
526 #define PELEV1_REG PMIC1
527 #define PISEL1_REG PMIC1
528 #define POVEN1_REG PMIC1
531 #define CAL0_REG OSCCAL
532 #define CAL1_REG OSCCAL
533 #define CAL2_REG OSCCAL
534 #define CAL3_REG OSCCAL
535 #define CAL4_REG OSCCAL
536 #define CAL5_REG OSCCAL
537 #define CAL6_REG OSCCAL
540 #define DDD0_REG DDRD
541 #define DDD1_REG DDRD
542 #define DDD2_REG DDRD
543 #define DDD3_REG DDRD
544 #define DDD4_REG DDRD
545 #define DDD5_REG DDRD
546 #define DDD6_REG DDRD
547 #define DDD7_REG DDRD
550 #define PRUN_REG PCTL
551 #define PCCYC_REG PCTL
552 #define PCLKSEL_REG PCTL
553 #define PPRE0_REG PCTL
554 #define PPRE1_REG PCTL
557 #define GPIOR10_REG GPIOR1
558 #define GPIOR11_REG GPIOR1
559 #define GPIOR12_REG GPIOR1
560 #define GPIOR13_REG GPIOR1
561 #define GPIOR14_REG GPIOR1
562 #define GPIOR15_REG GPIOR1
563 #define GPIOR16_REG GPIOR1
564 #define GPIOR17_REG GPIOR1
567 #define GPIOR00_REG GPIOR0
568 #define GPIOR01_REG GPIOR0
569 #define GPIOR02_REG GPIOR0
570 #define GPIOR03_REG GPIOR0
571 #define GPIOR04_REG GPIOR0
572 #define GPIOR05_REG GPIOR0
573 #define GPIOR06_REG GPIOR0
574 #define GPIOR07_REG GPIOR0
577 #define GPIOR20_REG GPIOR2
578 #define GPIOR21_REG GPIOR2
579 #define GPIOR22_REG GPIOR2
580 #define GPIOR23_REG GPIOR2
581 #define GPIOR24_REG GPIOR2
582 #define GPIOR25_REG GPIOR2
583 #define GPIOR26_REG GPIOR2
584 #define GPIOR27_REG GPIOR2
587 #define AERG_REG CANGIT
588 #define FERG_REG CANGIT
589 #define CERG_REG CANGIT
590 #define SERG_REG CANGIT
591 #define BXOK_REG CANGIT
592 #define OVRTIM_REG CANGIT
593 #define BOFFIT_REG CANGIT
594 #define CANIT_REG CANGIT
597 #define AC3M0_REG AC3CON
598 #define AC3M1_REG AC3CON
599 #define AC3M2_REG AC3CON
600 #define AC3IS0_REG AC3CON
601 #define AC3IS1_REG AC3CON
602 #define AC3IE_REG AC3CON
603 #define AC3EN_REG AC3CON
606 #define LBERR_REG LINERR
607 #define LCERR_REG LINERR
608 #define LPERR_REG LINERR
609 #define LSERR_REG LINERR
610 #define LFERR_REG LINERR
611 #define LOVERR_REG LINERR
612 #define LTOERR_REG LINERR
613 #define LABORT_REG LINERR
616 #define PCIE0_REG PCICR
617 #define PCIE1_REG PCICR
618 #define PCIE2_REG PCICR
619 #define PCIE3_REG PCICR
622 #define ENOVRT_REG CANGIE
623 #define ENERG_REG CANGIE
624 #define ENBX_REG CANGIE
625 #define ENERR_REG CANGIE
626 #define ENTX_REG CANGIE
627 #define ENRX_REG CANGIE
628 #define ENBOFF_REG CANGIE
629 #define ENIT_REG CANGIE
632 #define TCNT0_0_REG TCNT0
633 #define TCNT0_1_REG TCNT0
634 #define TCNT0_2_REG TCNT0
635 #define TCNT0_3_REG TCNT0
636 #define TCNT0_4_REG TCNT0
637 #define TCNT0_5_REG TCNT0
638 #define TCNT0_6_REG TCNT0
639 #define TCNT0_7_REG TCNT0
642 #define IEMOB0_REG CANIE2
643 #define IEMOB1_REG CANIE2
644 #define IEMOB2_REG CANIE2
645 #define IEMOB3_REG CANIE2
646 #define IEMOB4_REG CANIE2
647 #define IEMOB5_REG CANIE2
650 #define POCR0RA_0_REG POCR0RAL
651 #define POCR0RA_1_REG POCR0RAL
652 #define POCR0RA_2_REG POCR0RAL
653 #define POCR0RA_3_REG POCR0RAL
654 #define POCR0RA_4_REG POCR0RAL
655 #define POCR0RA_5_REG POCR0RAL
656 #define POCR0RA_6_REG POCR0RAL
657 #define POCR0RA_7_REG POCR0RAL
660 #define SIT0_REG CANSIT2
661 #define SIT1_REG CANSIT2
662 #define SIT2_REG CANSIT2
663 #define SIT3_REG CANSIT2
664 #define SIT4_REG CANSIT2
665 #define SIT5_REG CANSIT2
668 #define CS00_REG TCCR0B
669 #define CS01_REG TCCR0B
670 #define CS02_REG TCCR0B
671 #define WGM02_REG TCCR0B
672 #define FOC0B_REG TCCR0B
673 #define FOC0A_REG TCCR0B
676 #define POCR0RA_8_REG POCR0RAH
677 #define POCR0RA_9_REG POCR0RAH
678 #define POCR0RA_00_REG POCR0RAH
679 #define POCR0RA_01_REG POCR0RAH
682 #define WGM00_REG TCCR0A
683 #define WGM01_REG TCCR0A
684 #define COM0B0_REG TCCR0A
685 #define COM0B1_REG TCCR0A
686 #define COM0A0_REG TCCR0A
687 #define COM0A1_REG TCCR0A
690 #define POCR2SA_8_REG POCR2SAH
691 #define POCR2SA_9_REG POCR2SAH
692 #define POCR2SA_00_REG POCR2SAH
693 #define POCR2SA_01_REG POCR2SAH
696 #define POCR2SA_0_REG POCR2SAL
697 #define POCR2SA_1_REG POCR2SAL
698 #define POCR2SA_2_REG POCR2SAL
699 #define POCR2SA_3_REG POCR2SAL
700 #define POCR2SA_4_REG POCR2SAL
701 #define POCR2SA_5_REG POCR2SAL
702 #define POCR2SA_6_REG POCR2SAL
703 #define POCR2SA_7_REG POCR2SAL
706 #define DDE0_REG DDRE
707 #define DDE1_REG DDRE
708 #define DDE2_REG DDRE
711 #define SPR0_REG SPCR
712 #define SPR1_REG SPCR
713 #define CPHA_REG SPCR
714 #define CPOL_REG SPCR
715 #define MSTR_REG SPCR
716 #define DORD_REG SPCR
718 #define SPIE_REG SPCR
721 #define TOV1_REG TIFR1
722 #define OCF1A_REG TIFR1
723 #define OCF1B_REG TIFR1
724 #define ICF1_REG TIFR1
727 #define RB0TAG_REG CANIDT4
728 #define RB1TAG_REG CANIDT4
729 #define RTRTAG_REG CANIDT4
730 #define IDT0_REG CANIDT4
731 #define IDT1_REG CANIDT4
732 #define IDT2_REG CANIDT4
733 #define IDT3_REG CANIDT4
734 #define IDT4_REG CANIDT4
737 #define SPDR0_REG SPDR
738 #define SPDR1_REG SPDR
739 #define SPDR2_REG SPDR
740 #define SPDR3_REG SPDR
741 #define SPDR4_REG SPDR
742 #define SPDR5_REG SPDR
743 #define SPDR6_REG SPDR
744 #define SPDR7_REG SPDR
747 #define IDT13_REG CANIDT2
748 #define IDT14_REG CANIDT2
749 #define IDT15_REG CANIDT2
750 #define IDT16_REG CANIDT2
751 #define IDT17_REG CANIDT2
752 #define IDT18_REG CANIDT2
753 #define IDT19_REG CANIDT2
754 #define IDT20_REG CANIDT2
757 #define IDT5_REG CANIDT3
758 #define IDT6_REG CANIDT3
759 #define IDT7_REG CANIDT3
760 #define IDT8_REG CANIDT3
761 #define IDT9_REG CANIDT3
762 #define IDT10_REG CANIDT3
763 #define IDT11_REG CANIDT3
764 #define IDT12_REG CANIDT3
767 #define IDT21_REG CANIDT1
768 #define IDT22_REG CANIDT1
769 #define IDT23_REG CANIDT1
770 #define IDT24_REG CANIDT1
771 #define IDT25_REG CANIDT1
772 #define IDT26_REG CANIDT1
773 #define IDT27_REG CANIDT1
774 #define IDT28_REG CANIDT1
777 #define PSYNC00_REG PSYNC
778 #define PSYNC01_REG PSYNC
779 #define PSYNC10_REG PSYNC
780 #define PSYNC11_REG PSYNC
781 #define PSYNC20_REG PSYNC
782 #define PSYNC21_REG PSYNC
785 #define PSR10_REG GTCCR
786 #define ICPSEL1_REG GTCCR
787 #define TSM_REG GTCCR
788 #define PSRSYNC_REG GTCCR
791 #define DLC0_REG CANCDMOB
792 #define DLC1_REG CANCDMOB
793 #define DLC2_REG CANCDMOB
794 #define DLC3_REG CANCDMOB
795 #define IDE_REG CANCDMOB
796 #define RPLV_REG CANCDMOB
797 #define CONMOB0_REG CANCDMOB
798 #define CONMOB1_REG CANCDMOB
811 #define CGP0_REG CANHPMOB
812 #define CGP1_REG CANHPMOB
813 #define CGP2_REG CANHPMOB
814 #define CGP3_REG CANHPMOB
815 #define HPMOB0_REG CANHPMOB
816 #define HPMOB1_REG CANHPMOB
817 #define HPMOB2_REG CANHPMOB
818 #define HPMOB3_REG CANHPMOB
821 #define OCR1BL0_REG OCR1BL
822 #define OCR1BL1_REG OCR1BL
823 #define OCR1BL2_REG OCR1BL
824 #define OCR1BL3_REG OCR1BL
825 #define OCR1BL4_REG OCR1BL
826 #define OCR1BL5_REG OCR1BL
827 #define OCR1BL6_REG OCR1BL
828 #define OCR1BL7_REG OCR1BL
831 #define OCR1BH0_REG OCR1BH
832 #define OCR1BH1_REG OCR1BH
833 #define OCR1BH2_REG OCR1BH
834 #define OCR1BH3_REG OCR1BH
835 #define OCR1BH4_REG OCR1BH
836 #define OCR1BH5_REG OCR1BH
837 #define OCR1BH6_REG OCR1BH
838 #define OCR1BH7_REG OCR1BH
851 #define PORF_REG MCUSR
852 #define EXTRF_REG MCUSR
853 #define BORF_REG MCUSR
854 #define WDRF_REG MCUSR
857 #define EERE_REG EECR
858 #define EEWE_REG EECR
859 #define EEMWE_REG EECR
860 #define EERIE_REG EECR
861 #define EEPM0_REG EECR
862 #define EEPM1_REG EECR
865 #define POCR1SB_0_REG POCR1SBL
866 #define POCR1SB_1_REG POCR1SBL
867 #define POCR1SB_2_REG POCR1SBL
868 #define POCR1SB_3_REG POCR1SBL
869 #define POCR1SB_4_REG POCR1SBL
870 #define POCR1SB_5_REG POCR1SBL
871 #define POCR1SB_6_REG POCR1SBL
872 #define POCR1SB_7_REG POCR1SBL
881 #define PLOCK_REG PLLCSR
882 #define PLLE_REG PLLCSR
883 #define PLLF_REG PLLCSR
886 #define POCR1SB_8_REG POCR1SBH
887 #define POCR1SB_9_REG POCR1SBH
888 #define POCR1SB_00_REG POCR1SBH
889 #define POCR1SB_01_REG POCR1SBH
892 #define PCIF0_REG PCIFR
893 #define PCIF1_REG PCIFR
894 #define PCIF2_REG PCIFR
895 #define PCIF3_REG PCIFR
898 #define AMP2TS0_REG AMP2CSR
899 #define AMP2TS1_REG AMP2CSR
900 #define AMP2TS2_REG AMP2CSR
901 #define AMPCMP2_REG AMP2CSR
902 #define AMP2G0_REG AMP2CSR
903 #define AMP2G1_REG AMP2CSR
904 #define AMP2IS_REG AMP2CSR
905 #define AMP2EN_REG AMP2CSR
918 #define LDATA0_REG LINDAT
919 #define LDATA1_REG LINDAT
920 #define LDATA2_REG LINDAT
921 #define LDATA3_REG LINDAT
922 #define LDATA4_REG LINDAT
923 #define LDATA5_REG LINDAT
924 #define LDATA6_REG LINDAT
925 #define LDATA7_REG LINDAT
928 #define POCR0SA_8_REG POCR0SAH
929 #define POCR0SA_9_REG POCR0SAH
930 #define POCR0SA_00_REG POCR0SAH
931 #define POCR0SA_01_REG POCR0SAH
934 #define POCR_RB_0_REG POCR_RBL
935 #define POCR_RB_1_REG POCR_RBL
936 #define POCR_RB_2_REG POCR_RBL
937 #define POCR_RB_3_REG POCR_RBL
938 #define POCR_RB_4_REG POCR_RBL
939 #define POCR_RB_5_REG POCR_RBL
940 #define POCR_RB_6_REG POCR_RBL
941 #define POCR_RB_7_REG POCR_RBL
944 #define POCR0SA_0_REG POCR0SAL
945 #define POCR0SA_1_REG POCR0SAL
946 #define POCR0SA_2_REG POCR0SAL
947 #define POCR0SA_3_REG POCR0SAL
948 #define POCR0SA_4_REG POCR0SAL
949 #define POCR0SA_5_REG POCR0SAL
950 #define POCR0SA_6_REG POCR0SAL
951 #define POCR0SA_7_REG POCR0SAL
954 #define POCR_RB_8_REG POCR_RBH
955 #define POCR_RB_9_REG POCR_RBH
956 #define POCR_RB_00_REG POCR_RBH
957 #define POCR_RB_01_REG POCR_RBH
960 #define LRXDL0_REG LINDLR
961 #define LRXDL1_REG LINDLR
962 #define LRXDL2_REG LINDLR
963 #define LRXDL3_REG LINDLR
964 #define LTXDL0_REG LINDLR
965 #define LTXDL1_REG LINDLR
966 #define LTXDL2_REG LINDLR
967 #define LTXDL3_REG LINDLR
970 #define IVCE_REG MCUCR
971 #define IVSEL_REG MCUCR
972 #define PUD_REG MCUCR
973 #define SPIPS_REG MCUCR
976 #define EEAR0_REG EEARL
977 #define EEAR1_REG EEARL
978 #define EEAR2_REG EEARL
979 #define EEAR3_REG EEARL
980 #define EEAR4_REG EEARL
981 #define EEAR5_REG EEARL
982 #define EEAR6_REG EEARL
983 #define EEAR7_REG EEARL
986 #define INTF0_REG EIFR
987 #define INTF1_REG EIFR
988 #define INTF2_REG EIFR
989 #define INTF3_REG EIFR
992 #define AERR_REG CANSTMOB
993 #define FERR_REG CANSTMOB
994 #define CERR_REG CANSTMOB
995 #define SERR_REG CANSTMOB
996 #define BERR_REG CANSTMOB
997 #define RXOK_REG CANSTMOB
998 #define TXOK_REG CANSTMOB
999 #define DLCW_REG CANSTMOB
1002 #define PEOP_REG PIFR
1003 #define PEV0_REG PIFR
1004 #define PEV1_REG PIFR
1005 #define PEV2_REG PIFR
1008 #define LRXOK_REG LINSIR
1009 #define LTXOK_REG LINSIR
1010 #define LIDOK_REG LINSIR
1011 #define LERR_REG LINSIR
1012 #define LBUSY_REG LINSIR
1013 #define LIDST0_REG LINSIR
1014 #define LIDST1_REG LINSIR
1015 #define LIDST2_REG LINSIR
1018 #define DACH0_REG DACH
1019 #define DACH1_REG DACH
1020 #define DACH2_REG DACH
1021 #define DACH3_REG DACH
1022 #define DACH4_REG DACH
1023 #define DACH5_REG DACH
1024 #define DACH6_REG DACH
1025 #define DACH7_REG DACH
1028 #define DACL0_REG DACL
1029 #define DACL1_REG DACL
1030 #define DACL2_REG DACL
1031 #define DACL3_REG DACL
1032 #define DACL4_REG DACL
1033 #define DACL5_REG DACL
1034 #define DACL6_REG DACL
1035 #define DACL7_REG DACL
1038 #define ENMOB0_REG CANEN2
1039 #define ENMOB1_REG CANEN2
1040 #define ENMOB2_REG CANEN2
1041 #define ENMOB3_REG CANEN2
1042 #define ENMOB4_REG CANEN2
1043 #define ENMOB5_REG CANEN2
1046 #define ADTS0_REG ADCSRB
1047 #define ADTS1_REG ADCSRB
1048 #define ADTS2_REG ADCSRB
1049 #define ADTS3_REG ADCSRB
1050 #define AREFEN_REG ADCSRB
1051 #define ISRCEN_REG ADCSRB
1052 #define ADHSM_REG ADCSRB
1055 #define WGM10_REG TCCR1A
1056 #define WGM11_REG TCCR1A
1057 #define COM1B0_REG TCCR1A
1058 #define COM1B1_REG TCCR1A
1059 #define COM1A0_REG TCCR1A
1060 #define COM1A1_REG TCCR1A
1063 /* #define OCR0_0_REG OCR0A */ /* dup in OCR0B */
1064 /* #define OCR0_1_REG OCR0A */ /* dup in OCR0B */
1065 /* #define OCR0_2_REG OCR0A */ /* dup in OCR0B */
1066 /* #define OCR0_3_REG OCR0A */ /* dup in OCR0B */
1067 /* #define OCR0_4_REG OCR0A */ /* dup in OCR0B */
1068 /* #define OCR0_5_REG OCR0A */ /* dup in OCR0B */
1069 /* #define OCR0_6_REG OCR0A */ /* dup in OCR0B */
1070 /* #define OCR0_7_REG OCR0A */ /* dup in OCR0B */
1073 #define POCR0SB_0_REG POCR0SBL
1074 #define POCR0SB_1_REG POCR0SBL
1075 #define POCR0SB_2_REG POCR0SBL
1076 #define POCR0SB_3_REG POCR0SBL
1077 #define POCR0SB_4_REG POCR0SBL
1078 #define POCR0SB_5_REG POCR0SBL
1079 #define POCR0SB_6_REG POCR0SBL
1080 #define POCR0SB_7_REG POCR0SBL
1083 #define AC0O_REG ACSR
1084 #define AC1O_REG ACSR
1085 #define AC2O_REG ACSR
1086 #define AC3O_REG ACSR
1087 #define AC0IF_REG ACSR
1088 #define AC1IF_REG ACSR
1089 #define AC2IF_REG ACSR
1090 #define AC3IF_REG ACSR
1093 #define TCNT1L0_REG TCNT1L
1094 #define TCNT1L1_REG TCNT1L
1095 #define TCNT1L2_REG TCNT1L
1096 #define TCNT1L3_REG TCNT1L
1097 #define TCNT1L4_REG TCNT1L
1098 #define TCNT1L5_REG TCNT1L
1099 #define TCNT1L6_REG TCNT1L
1100 #define TCNT1L7_REG TCNT1L
1103 #define PRFM00_REG PMIC0
1104 #define PRFM01_REG PMIC0
1105 #define PRFM02_REG PMIC0
1106 #define PAOC0_REG PMIC0
1107 #define PFLTE0_REG PMIC0
1108 #define PELEV0_REG PMIC0
1109 #define PISEL0_REG PMIC0
1110 #define POVEN0_REG PMIC0
1113 #define CS10_REG TCCR1B
1114 #define CS11_REG TCCR1B
1115 #define CS12_REG TCCR1B
1116 #define WGM12_REG TCCR1B
1117 #define WGM13_REG TCCR1B
1118 #define ICES1_REG TCCR1B
1119 #define ICNC1_REG TCCR1B
1122 #define POEN0A_REG POC
1123 #define POEN0B_REG POC
1124 #define POEN1A_REG POC
1125 #define POEN1B_REG POC
1126 #define POEN2A_REG POC
1127 #define POEN2B_REG POC
1130 #define SPMEN_REG SPMCSR
1131 #define PGERS_REG SPMCSR
1132 #define PGWRT_REG SPMCSR
1133 #define BLBSET_REG SPMCSR
1134 #define RWWSRE_REG SPMCSR
1135 #define SIGRD_REG SPMCSR
1136 #define RWWSB_REG SPMCSR
1137 #define SPMIE_REG SPMCSR
1140 #define POPA_REG PCNF
1141 #define POPB_REG PCNF
1142 #define PMODE_REG PCNF
1143 #define PULOCK_REG PCNF
1146 #define PRS0_REG CANBT2
1147 #define PRS1_REG CANBT2
1148 #define PRS2_REG CANBT2
1149 #define SJW0_REG CANBT2
1150 #define SJW1_REG CANBT2
1153 #define SMP_REG CANBT3
1154 #define PHS10_REG CANBT3
1155 #define PHS11_REG CANBT3
1156 #define PHS12_REG CANBT3
1157 #define PHS20_REG CANBT3
1158 #define PHS21_REG CANBT3
1159 #define PHS22_REG CANBT3
1162 #define ADCL0_REG ADCL
1163 #define ADCL1_REG ADCL
1164 #define ADCL2_REG ADCL
1165 #define ADCL3_REG ADCL
1166 #define ADCL4_REG ADCL
1167 #define ADCL5_REG ADCL
1168 #define ADCL6_REG ADCL
1169 #define ADCL7_REG ADCL
1172 #define BRP0_REG CANBT1
1173 #define BRP1_REG CANBT1
1174 #define BRP2_REG CANBT1
1175 #define BRP3_REG CANBT1
1176 #define BRP4_REG CANBT1
1177 #define BRP5_REG CANBT1
1180 #define ADCH0_REG ADCH
1181 #define ADCH1_REG ADCH
1182 #define ADCH2_REG ADCH
1183 #define ADCH3_REG ADCH
1184 #define ADCH4_REG ADCH
1185 #define ADCH5_REG ADCH
1186 #define ADCH6_REG ADCH
1187 #define ADCH7_REG ADCH
1190 #define ADPS0_REG ADCSRA
1191 #define ADPS1_REG ADCSRA
1192 #define ADPS2_REG ADCSRA
1193 #define ADIE_REG ADCSRA
1194 #define ADIF_REG ADCSRA
1195 #define ADATE_REG ADCSRA
1196 #define ADSC_REG ADCSRA
1197 #define ADEN_REG ADCSRA
1200 #define TOIE0_REG TIMSK0
1201 #define OCIE0A_REG TIMSK0
1202 #define OCIE0B_REG TIMSK0
1205 #define TOIE1_REG TIMSK1
1206 #define OCIE1A_REG TIMSK1
1207 #define OCIE1B_REG TIMSK1
1208 #define ICIE1_REG TIMSK1
1211 #define AMP0TS0_REG AMP0CSR
1212 #define AMP0TS1_REG AMP0CSR
1213 #define AMP0TS2_REG AMP0CSR
1214 #define AMPCMP0_REG AMP0CSR
1215 #define AMP0G0_REG AMP0CSR
1216 #define AMP0G1_REG AMP0CSR
1217 #define AMP0IS_REG AMP0CSR
1218 #define AMP0EN_REG AMP0CSR
1221 #define DAEN_REG DACON
1222 #define DALA_REG DACON
1223 #define DATS0_REG DACON
1224 #define DATS1_REG DACON
1225 #define DATS2_REG DACON
1226 #define DAATE_REG DACON
1229 #define PCINT0_REG PCMSK0
1230 #define PCINT1_REG PCMSK0
1231 #define PCINT2_REG PCMSK0
1232 #define PCINT3_REG PCMSK0
1233 #define PCINT4_REG PCMSK0
1234 #define PCINT5_REG PCMSK0
1235 #define PCINT6_REG PCMSK0
1236 #define PCINT7_REG PCMSK0
1239 #define PCINT8_REG PCMSK1
1240 #define PCINT9_REG PCMSK1
1241 #define PCINT10_REG PCMSK1
1242 #define PCINT11_REG PCMSK1
1243 #define PCINT12_REG PCMSK1
1244 #define PCINT13_REG PCMSK1
1245 #define PCINT14_REG PCMSK1
1246 #define PCINT15_REG PCMSK1
1249 #define PCINT16_REG PCMSK2
1250 #define PCINT17_REG PCMSK2
1251 #define PCINT18_REG PCMSK2
1252 #define PCINT19_REG PCMSK2
1253 #define PCINT20_REG PCMSK2
1254 #define PCINT21_REG PCMSK2
1255 #define PCINT22_REG PCMSK2
1256 #define PCINT23_REG PCMSK2
1259 #define PCINT24_REG PCMSK3
1260 #define PCINT25_REG PCMSK3
1261 #define PCINT26_REG PCMSK3
1264 #define PINC0_REG PINC
1265 #define PINC1_REG PINC
1266 #define PINC2_REG PINC
1267 #define PINC3_REG PINC
1268 #define PINC4_REG PINC
1269 #define PINC5_REG PINC
1270 #define PINC6_REG PINC
1271 #define PINC7_REG PINC
1274 #define PINB0_REG PINB
1275 #define PINB1_REG PINB
1276 #define PINB2_REG PINB
1277 #define PINB3_REG PINB
1278 #define PINB4_REG PINB
1279 #define PINB5_REG PINB
1280 #define PINB6_REG PINB
1281 #define PINB7_REG PINB
1284 #define AC0M0_REG AC0CON
1285 #define AC0M1_REG AC0CON
1286 #define AC0M2_REG AC0CON
1287 #define ACCKSEL_REG AC0CON
1288 #define AC0IS0_REG AC0CON
1289 #define AC0IS1_REG AC0CON
1290 #define AC0IE_REG AC0CON
1291 #define AC0EN_REG AC0CON
1294 #define PINE0_REG PINE
1295 #define PINE1_REG PINE
1296 #define PINE2_REG PINE
1299 #define PIND0_REG PIND
1300 #define PIND1_REG PIND
1301 #define PIND2_REG PIND
1302 #define PIND3_REG PIND
1303 #define PIND4_REG PIND
1304 #define PIND5_REG PIND
1305 #define PIND6_REG PIND
1306 #define PIND7_REG PIND
1309 #define OCR1AH0_REG OCR1AH
1310 #define OCR1AH1_REG OCR1AH
1311 #define OCR1AH2_REG OCR1AH
1312 #define OCR1AH3_REG OCR1AH
1313 #define OCR1AH4_REG OCR1AH
1314 #define OCR1AH5_REG OCR1AH
1315 #define OCR1AH6_REG OCR1AH
1316 #define OCR1AH7_REG OCR1AH
1319 #define OCR1AL0_REG OCR1AL
1320 #define OCR1AL1_REG OCR1AL
1321 #define OCR1AL2_REG OCR1AL
1322 #define OCR1AL3_REG OCR1AL
1323 #define OCR1AL4_REG OCR1AL
1324 #define OCR1AL5_REG OCR1AL
1325 #define OCR1AL6_REG OCR1AL
1326 #define OCR1AL7_REG OCR1AL
1329 #define TOV0_REG TIFR0
1330 #define OCF0A_REG TIFR0
1331 #define OCF0B_REG TIFR0
1334 #define POCR0SB_8_REG POCR0SBH
1335 #define POCR0SB_9_REG POCR0SBH
1336 #define POCR0SB_00_REG POCR0SBH
1337 #define POCR0SB_01_REG POCR0SBH
1340 #define MISO_PORT PORTB
1342 #define PSCOUT2A_PORT PORTB
1343 #define PSCOUT2A_BIT 0
1344 #define PCINT0_PORT PORTB
1345 #define PCINT0_BIT 0
1347 #define MOSI_PORT PORTB
1349 #define PSCOUT2B_PORT PORTB
1350 #define PSCOUT2B_BIT 1
1351 #define PCINT1_PORT PORTB
1352 #define PCINT1_BIT 1
1354 #define ADC5_PORT PORTB
1356 #define INT1_PORT PORTB
1358 #define ACMPN0_PORT PORTB
1359 #define ACMPN0_BIT 2
1360 #define PCINT2_PORT PORTB
1361 #define PCINT2_BIT 2
1363 #define AMP0-_PORT PORTB
1365 #define PCINT3_PORT PORTB
1366 #define PCINT3_BIT 3
1368 #define AMP0+_PORT PORTB
1370 #define PCINT4_PORT PORTB
1371 #define PCINT4_BIT 4
1373 #define ADC6_PORT PORTB
1375 #define INT2_PORT PORTB
1377 #define ACMPN1_PORT PORTB
1378 #define ACMPN1_BIT 5
1379 #define AMP2-_PORT PORTB
1381 #define PCINT5_PORT PORTB
1382 #define PCINT5_BIT 5
1384 #define ADC7_PORT PORTB
1386 #define PSCOUT1B_PORT PORTB
1387 #define PSCOUT1B_BIT 6
1388 #define PCINT6_PORT PORTB
1389 #define PCINT6_BIT 6
1391 #define ADC4_PORT PORTB
1393 #define PSCOUT0B_PORT PORTB
1394 #define PSCOUT0B_BIT 7
1395 #define SCK_PORT PORTB
1397 #define PCINT7_PORT PORTB
1398 #define PCINT7_BIT 7
1400 #define INT3_PORT PORTC
1402 #define PSCOUT1A_PORT PORTC
1403 #define PSCOUT1A_BIT 0
1404 #define PCINT8_PORT PORTC
1405 #define PCINT8_BIT 0
1407 #define PSCIN1_PORT PORTC
1408 #define PSCIN1_BIT 1
1409 #define OC1B_PORT PORTC
1411 #define SS_A_PORT PORTC
1413 #define PCINT9_PORT PORTC
1414 #define PCINT9_BIT 1
1416 #define T0_PORT PORTC
1418 #define TXCAN_PORT PORTC
1420 #define PCINT10_PORT PORTC
1421 #define PCINT10_BIT 2
1423 #define T1_PORT PORTC
1425 #define RXCAN_PORT PORTC
1427 #define ICP1B_PORT PORTC
1429 #define PCINT11_PORT PORTC
1430 #define PCINT11_BIT 3
1432 #define ADC8_PORT PORTC
1434 #define AMP1-_PORT PORTC
1436 #define ACMPN3_PORT PORTC
1437 #define ACMPN3_BIT 4
1438 #define PCINT12_PORT PORTC
1439 #define PCINT12_BIT 4
1441 #define ADC9_PORT PORTC
1443 #define AMP1+_PORT PORTC
1445 #define ACMP3_PORT PORTC
1447 #define PCINT13_PORT PORTC
1448 #define PCINT13_BIT 5
1450 #define ADC10_PORT PORTC
1452 #define ACMP1_PORT PORTC
1454 #define PCINT14_PORT PORTC
1455 #define PCINT14_BIT 6
1457 #define D2A_PORT PORTC
1459 #define AMP2+_PORT PORTC
1461 #define PCINT15_PORT PORTC
1462 #define PCINT15_BIT 7
1464 #define PSCOUT0A_PORT PORTD
1465 #define PSCOUT0A_BIT 0
1466 #define PCINT16_PORT PORTD
1467 #define PCINT16_BIT 0
1469 #define PSCIN0_PORT PORTD
1470 #define PSCIN0_BIT 1
1471 #define CLK0_PORT PORTD
1473 #define PCINT17_PORT PORTD
1474 #define PCINT17_BIT 1
1476 #define PSCIN2_PORT PORTD
1477 #define PSCIN2_BIT 2
1478 #define OC1A_PORT PORTD
1480 #define MISO_A_PORT PORTD
1481 #define MISO_A_BIT 2
1482 #define PCINT18_PORT PORTD
1483 #define PCINT18_BIT 2
1485 #define TXD_PORT PORTD
1487 #define TXLIN_PORT PORTD
1489 #define OC0A_PORT PORTD
1491 #define SS_PORT PORTD
1493 #define MOSI_A_PORT PORTD
1494 #define MOSI_A_BIT 3
1495 #define PCINT19_PORT PORTD
1496 #define PCINT19_BIT 3
1498 #define ADC1_PORT PORTD
1500 #define RXD_PORT PORTD
1502 #define RXLIN_PORT PORTD
1504 #define ICP1A_PORT PORTD
1506 #define SCK_A_PORT PORTD
1508 #define PCINT20_PORT PORTD
1509 #define PCINT20_BIT 4
1511 #define ADC2_PORT PORTD
1513 #define ACMP2_PORT PORTD
1515 #define PCINT21_PORT PORTD
1516 #define PCINT21_BIT 5
1518 #define ADC3_PORT PORTD
1520 #define ACMPN2_PORT PORTD
1521 #define ACMPN2_BIT 6
1522 #define INT0_PORT PORTD
1524 #define PCINT22_PORT PORTD
1525 #define PCINT22_BIT 6
1527 #define ACMP0_PORT PORTD
1529 #define PCINT23_PORT PORTD
1530 #define PCINT23_BIT 7
1532 #define RESET_PORT PORTE
1534 #define OCD_PORT PORTE
1536 #define PCINT24_PORT PORTE
1537 #define PCINT24_BIT 0
1539 #define OC0B_PORT PORTE
1541 #define XTAL1_PORT PORTE
1543 #define PCINT25_PORT PORTE
1544 #define PCINT25_BIT 1
1546 #define ADC0_PORT PORTE
1548 #define XTAL2_PORT PORTE
1550 #define PCINT26_PORT PORTE
1551 #define PCINT26_BIT 2