4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
5 * Copyright(c) 2014 6WIND S.A.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43 #include <sys/types.h>
49 #include <rte_lcore.h>
50 #include <rte_tailq.h>
51 #include <rte_version.h>
52 #include <rte_devargs.h>
53 #include <rte_memcpy.h>
55 #include "eal_internal_cfg.h"
56 #include "eal_options.h"
57 #include "eal_filesystem.h"
59 #define BITS_PER_HEX 4
63 "b:" /* pci-blacklist */
65 "s:" /* service coremask */
69 "S:" /* service corelist */
70 "m:" /* memory size */
71 "n:" /* memory channels */
72 "r:" /* memory ranks */
74 "w:" /* pci-whitelist */
78 eal_long_options[] = {
79 {OPT_BASE_VIRTADDR, 1, NULL, OPT_BASE_VIRTADDR_NUM },
80 {OPT_CREATE_UIO_DEV, 0, NULL, OPT_CREATE_UIO_DEV_NUM },
81 {OPT_FILE_PREFIX, 1, NULL, OPT_FILE_PREFIX_NUM },
82 {OPT_HELP, 0, NULL, OPT_HELP_NUM },
83 {OPT_HUGE_DIR, 1, NULL, OPT_HUGE_DIR_NUM },
84 {OPT_HUGE_UNLINK, 0, NULL, OPT_HUGE_UNLINK_NUM },
85 {OPT_LCORES, 1, NULL, OPT_LCORES_NUM },
86 {OPT_LOG_LEVEL, 1, NULL, OPT_LOG_LEVEL_NUM },
87 {OPT_MASTER_LCORE, 1, NULL, OPT_MASTER_LCORE_NUM },
88 {OPT_MBUF_POOL_OPS_NAME, 1, NULL, OPT_MBUF_POOL_OPS_NAME_NUM},
89 {OPT_NO_HPET, 0, NULL, OPT_NO_HPET_NUM },
90 {OPT_NO_HUGE, 0, NULL, OPT_NO_HUGE_NUM },
91 {OPT_NO_PCI, 0, NULL, OPT_NO_PCI_NUM },
92 {OPT_NO_SHCONF, 0, NULL, OPT_NO_SHCONF_NUM },
93 {OPT_PCI_BLACKLIST, 1, NULL, OPT_PCI_BLACKLIST_NUM },
94 {OPT_PCI_WHITELIST, 1, NULL, OPT_PCI_WHITELIST_NUM },
95 {OPT_PROC_TYPE, 1, NULL, OPT_PROC_TYPE_NUM },
96 {OPT_SOCKET_MEM, 1, NULL, OPT_SOCKET_MEM_NUM },
97 {OPT_SYSLOG, 1, NULL, OPT_SYSLOG_NUM },
98 {OPT_VDEV, 1, NULL, OPT_VDEV_NUM },
99 {OPT_VFIO_INTR, 1, NULL, OPT_VFIO_INTR_NUM },
100 {OPT_VMWARE_TSC_MAP, 0, NULL, OPT_VMWARE_TSC_MAP_NUM },
101 {OPT_XEN_DOM0, 0, NULL, OPT_XEN_DOM0_NUM },
105 TAILQ_HEAD(shared_driver_list, shared_driver);
107 /* Definition for shared object drivers. */
108 struct shared_driver {
109 TAILQ_ENTRY(shared_driver) next;
115 /* List of external loadable drivers */
116 static struct shared_driver_list solib_list =
117 TAILQ_HEAD_INITIALIZER(solib_list);
119 /* Default path of external loadable drivers */
120 static const char *default_solib_dir = RTE_EAL_PMD_PATH;
123 * Stringified version of solib path used by dpdk-pmdinfo.py
124 * Note: PLEASE DO NOT ALTER THIS without making a corresponding
125 * change to usertools/dpdk-pmdinfo.py
127 static const char dpdk_solib_path[] __attribute__((used)) =
128 "DPDK_PLUGIN_PATH=" RTE_EAL_PMD_PATH;
130 TAILQ_HEAD(device_option_list, device_option);
132 struct device_option {
133 TAILQ_ENTRY(device_option) next;
135 enum rte_devtype type;
139 static struct device_option_list devopt_list =
140 TAILQ_HEAD_INITIALIZER(devopt_list);
142 static int master_lcore_parsed;
143 static int mem_parsed;
144 static int core_parsed;
147 eal_option_device_add(enum rte_devtype type, const char *optarg)
149 struct device_option *devopt;
153 optlen = strlen(optarg) + 1;
154 devopt = calloc(1, sizeof(*devopt) + optlen);
155 if (devopt == NULL) {
156 RTE_LOG(ERR, EAL, "Unable to allocate device option\n");
161 ret = snprintf(devopt->arg, optlen, "%s", optarg);
163 RTE_LOG(ERR, EAL, "Unable to copy device option\n");
167 TAILQ_INSERT_TAIL(&devopt_list, devopt, next);
172 eal_option_device_parse(void)
174 struct device_option *devopt;
178 TAILQ_FOREACH_SAFE(devopt, &devopt_list, next, tmp) {
180 ret = rte_eal_devargs_add(devopt->type, devopt->arg);
182 RTE_LOG(ERR, EAL, "Unable to parse device '%s'\n",
185 TAILQ_REMOVE(&devopt_list, devopt, next);
192 eal_reset_internal_config(struct internal_config *internal_cfg)
196 internal_cfg->memory = 0;
197 internal_cfg->force_nrank = 0;
198 internal_cfg->force_nchannel = 0;
199 internal_cfg->hugefile_prefix = HUGEFILE_PREFIX_DEFAULT;
200 internal_cfg->hugepage_dir = NULL;
201 internal_cfg->force_sockets = 0;
202 /* zero out the NUMA config */
203 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
204 internal_cfg->socket_mem[i] = 0;
205 /* zero out hugedir descriptors */
206 for (i = 0; i < MAX_HUGEPAGE_SIZES; i++)
207 internal_cfg->hugepage_info[i].lock_descriptor = -1;
208 internal_cfg->base_virtaddr = 0;
210 internal_cfg->syslog_facility = LOG_DAEMON;
212 internal_cfg->xen_dom0_support = 0;
214 /* if set to NONE, interrupt mode is determined automatically */
215 internal_cfg->vfio_intr_mode = RTE_INTR_MODE_NONE;
217 #ifdef RTE_LIBEAL_USE_HPET
218 internal_cfg->no_hpet = 0;
220 internal_cfg->no_hpet = 1;
222 internal_cfg->vmware_tsc_map = 0;
223 internal_cfg->create_uio_dev = 0;
224 internal_cfg->mbuf_pool_ops_name = RTE_MBUF_DEFAULT_MEMPOOL_OPS;
228 eal_plugin_add(const char *path)
230 struct shared_driver *solib;
232 solib = malloc(sizeof(*solib));
234 RTE_LOG(ERR, EAL, "malloc(solib) failed\n");
237 memset(solib, 0, sizeof(*solib));
238 strncpy(solib->name, path, PATH_MAX-1);
239 solib->name[PATH_MAX-1] = 0;
240 TAILQ_INSERT_TAIL(&solib_list, solib, next);
246 eal_plugindir_init(const char *path)
249 struct dirent *dent = NULL;
250 char sopath[PATH_MAX];
252 if (path == NULL || *path == '\0')
257 RTE_LOG(ERR, EAL, "failed to open directory %s: %s\n",
258 path, strerror(errno));
262 while ((dent = readdir(d)) != NULL) {
265 snprintf(sopath, PATH_MAX-1, "%s/%s", path, dent->d_name);
266 sopath[PATH_MAX-1] = 0;
268 if (!(stat(sopath, &sb) == 0 && S_ISREG(sb.st_mode)))
271 if (eal_plugin_add(sopath) == -1)
276 /* XXX this ignores failures from readdir() itself */
277 return (dent == NULL) ? 0 : -1;
281 eal_plugins_init(void)
283 struct shared_driver *solib = NULL;
285 if (*default_solib_dir != '\0')
286 eal_plugin_add(default_solib_dir);
288 TAILQ_FOREACH(solib, &solib_list, next) {
291 if (stat(solib->name, &sb) == 0 && S_ISDIR(sb.st_mode)) {
292 if (eal_plugindir_init(solib->name) == -1) {
294 "Cannot init plugin directory %s\n",
299 RTE_LOG(DEBUG, EAL, "open shared lib %s\n",
301 solib->lib_handle = dlopen(solib->name, RTLD_NOW);
302 if (solib->lib_handle == NULL) {
303 RTE_LOG(ERR, EAL, "%s\n", dlerror());
313 * Parse the coremask given as argument (hexadecimal string) and fill
314 * the global configuration (core role and core count) with the parsed
317 static int xdigit2val(unsigned char c)
331 eal_parse_service_coremask(const char *coremask)
333 struct rte_config *cfg = rte_eal_get_configuration();
335 unsigned int count = 0;
339 if (coremask == NULL)
341 /* Remove all blank characters ahead and after .
342 * Remove 0x/0X if exists.
344 while (isblank(*coremask))
346 if (coremask[0] == '0' && ((coremask[1] == 'x')
347 || (coremask[1] == 'X')))
349 i = strlen(coremask);
350 while ((i > 0) && isblank(coremask[i - 1]))
356 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
358 if (isxdigit(c) == 0) {
359 /* invalid characters */
363 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE;
365 if ((1 << j) & val) {
366 /* handle master lcore already parsed */
367 uint32_t lcore = idx;
368 if (master_lcore_parsed &&
369 cfg->master_lcore == lcore) {
371 "Error: lcore %u is master lcore, cannot use as service core\n",
376 if (!lcore_config[idx].detected) {
378 "lcore %u unavailable\n", idx);
381 lcore_config[idx].core_role = ROLE_SERVICE;
388 if (coremask[i] != '0')
391 for (; idx < RTE_MAX_LCORE; idx++)
392 lcore_config[idx].core_index = -1;
397 cfg->service_lcore_count = count;
402 eal_parse_coremask(const char *coremask)
404 struct rte_config *cfg = rte_eal_get_configuration();
410 if (coremask == NULL)
412 /* Remove all blank characters ahead and after .
413 * Remove 0x/0X if exists.
415 while (isblank(*coremask))
417 if (coremask[0] == '0' && ((coremask[1] == 'x')
418 || (coremask[1] == 'X')))
420 i = strlen(coremask);
421 while ((i > 0) && isblank(coremask[i - 1]))
426 for (i = i - 1; i >= 0 && idx < RTE_MAX_LCORE; i--) {
428 if (isxdigit(c) == 0) {
429 /* invalid characters */
433 for (j = 0; j < BITS_PER_HEX && idx < RTE_MAX_LCORE; j++, idx++)
435 if ((1 << j) & val) {
436 if (!lcore_config[idx].detected) {
437 RTE_LOG(ERR, EAL, "lcore %u "
438 "unavailable\n", idx);
441 cfg->lcore_role[idx] = ROLE_RTE;
442 lcore_config[idx].core_index = count;
445 cfg->lcore_role[idx] = ROLE_OFF;
446 lcore_config[idx].core_index = -1;
451 if (coremask[i] != '0')
453 for (; idx < RTE_MAX_LCORE; idx++) {
454 cfg->lcore_role[idx] = ROLE_OFF;
455 lcore_config[idx].core_index = -1;
459 /* Update the count of enabled logical cores of the EAL configuration */
460 cfg->lcore_count = count;
465 eal_parse_service_corelist(const char *corelist)
467 struct rte_config *cfg = rte_eal_get_configuration();
473 if (corelist == NULL)
476 /* Remove all blank characters ahead and after */
477 while (isblank(*corelist))
479 i = strlen(corelist);
480 while ((i > 0) && isblank(corelist[i - 1]))
483 /* Get list of cores */
486 while (isblank(*corelist))
488 if (*corelist == '\0')
491 idx = strtoul(corelist, &end, 10);
492 if (errno || end == NULL)
494 while (isblank(*end))
498 } else if ((*end == ',') || (*end == '\0')) {
500 if (min == RTE_MAX_LCORE)
502 for (idx = min; idx <= max; idx++) {
503 if (cfg->lcore_role[idx] != ROLE_SERVICE) {
504 /* handle master lcore already parsed */
505 uint32_t lcore = idx;
506 if (cfg->master_lcore == lcore &&
507 master_lcore_parsed) {
509 "Error: lcore %u is master lcore, cannot use as service core\n",
513 lcore_config[idx].core_role =
522 } while (*end != '\0');
531 eal_parse_corelist(const char *corelist)
533 struct rte_config *cfg = rte_eal_get_configuration();
539 if (corelist == NULL)
542 /* Remove all blank characters ahead and after */
543 while (isblank(*corelist))
545 i = strlen(corelist);
546 while ((i > 0) && isblank(corelist[i - 1]))
550 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
551 cfg->lcore_role[idx] = ROLE_OFF;
552 lcore_config[idx].core_index = -1;
555 /* Get list of cores */
558 while (isblank(*corelist))
560 if (*corelist == '\0')
563 idx = strtoul(corelist, &end, 10);
564 if (errno || end == NULL)
566 while (isblank(*end))
570 } else if ((*end == ',') || (*end == '\0')) {
572 if (min == RTE_MAX_LCORE)
574 for (idx = min; idx <= max; idx++) {
575 if (cfg->lcore_role[idx] != ROLE_RTE) {
576 cfg->lcore_role[idx] = ROLE_RTE;
577 lcore_config[idx].core_index = count;
585 } while (*end != '\0');
590 /* Update the count of enabled logical cores of the EAL configuration */
591 cfg->lcore_count = count;
596 /* Changes the lcore id of the master thread */
598 eal_parse_master_lcore(const char *arg)
601 struct rte_config *cfg = rte_eal_get_configuration();
604 cfg->master_lcore = (uint32_t) strtol(arg, &parsing_end, 0);
605 if (errno || parsing_end[0] != 0)
607 if (cfg->master_lcore >= RTE_MAX_LCORE)
609 master_lcore_parsed = 1;
611 /* ensure master core is not used as service core */
612 if (lcore_config[cfg->master_lcore].core_role == ROLE_SERVICE) {
613 RTE_LOG(ERR, EAL, "Error: Master lcore is used as a service core.\n");
621 * Parse elem, the elem could be single number/range or '(' ')' group
622 * 1) A single number elem, it's just a simple digit. e.g. 9
623 * 2) A single range elem, two digits with a '-' between. e.g. 2-6
624 * 3) A group elem, combines multiple 1) or 2) with '( )'. e.g (0,2-4,6)
625 * Within group elem, '-' used for a range separator;
626 * ',' used for a single number.
629 eal_parse_set(const char *input, uint16_t set[], unsigned num)
632 const char *str = input;
636 memset(set, 0, num * sizeof(uint16_t));
638 while (isblank(*str))
641 /* only digit or left bracket is qualify for start point */
642 if ((!isdigit(*str) && *str != '(') || *str == '\0')
645 /* process single number or single range of number */
648 idx = strtoul(str, &end, 10);
649 if (errno || end == NULL || idx >= num)
652 while (isblank(*end))
658 /* process single <number>-<number> */
660 while (isblank(*end))
666 idx = strtoul(end, &end, 10);
667 if (errno || end == NULL || idx >= num)
670 while (isblank(*end))
672 if (*end != ',' && *end != '\0')
676 if (*end != ',' && *end != '\0' &&
680 for (idx = RTE_MIN(min, max);
681 idx <= RTE_MAX(min, max); idx++)
688 /* process set within bracket */
690 while (isblank(*str))
698 /* go ahead to the first digit */
699 while (isblank(*str))
704 /* get the digit value */
706 idx = strtoul(str, &end, 10);
707 if (errno || end == NULL || idx >= num)
710 /* go ahead to separator '-',',' and ')' */
711 while (isblank(*end))
714 if (min == RTE_MAX_LCORE)
716 else /* avoid continuous '-' */
718 } else if ((*end == ',') || (*end == ')')) {
720 if (min == RTE_MAX_LCORE)
722 for (idx = RTE_MIN(min, max);
723 idx <= RTE_MAX(min, max); idx++)
731 } while (*end != '\0' && *end != ')');
734 * to avoid failure that tail blank makes end character check fail
735 * in eal_parse_lcores( )
737 while (isblank(*str))
743 /* convert from set array to cpuset bitmap */
745 convert_to_cpuset(rte_cpuset_t *cpusetp,
746 uint16_t *set, unsigned num)
752 for (idx = 0; idx < num; idx++) {
756 if (!lcore_config[idx].detected) {
757 RTE_LOG(ERR, EAL, "core %u "
758 "unavailable\n", idx);
762 CPU_SET(idx, cpusetp);
769 * The format pattern: --lcores='<lcores[@cpus]>[<,lcores[@cpus]>...]'
770 * lcores, cpus could be a single digit/range or a group.
771 * '(' and ')' are necessary if it's a group.
772 * If not supply '@cpus', the value of cpus uses the same as lcores.
773 * e.g. '1,2@(5-7),(3-5)@(0,2),(0,6),7-8' means start 9 EAL thread as below
774 * lcore 0 runs on cpuset 0x41 (cpu 0,6)
775 * lcore 1 runs on cpuset 0x2 (cpu 1)
776 * lcore 2 runs on cpuset 0xe0 (cpu 5,6,7)
777 * lcore 3,4,5 runs on cpuset 0x5 (cpu 0,2)
778 * lcore 6 runs on cpuset 0x41 (cpu 0,6)
779 * lcore 7 runs on cpuset 0x80 (cpu 7)
780 * lcore 8 runs on cpuset 0x100 (cpu 8)
783 eal_parse_lcores(const char *lcores)
785 struct rte_config *cfg = rte_eal_get_configuration();
786 static uint16_t set[RTE_MAX_LCORE];
789 const char *lcore_start = NULL;
790 const char *end = NULL;
799 /* Remove all blank characters ahead and after */
800 while (isblank(*lcores))
805 /* Reset lcore config */
806 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
807 cfg->lcore_role[idx] = ROLE_OFF;
808 lcore_config[idx].core_index = -1;
809 CPU_ZERO(&lcore_config[idx].cpuset);
812 /* Get list of cores */
814 while (isblank(*lcores))
821 /* record lcore_set start point */
822 lcore_start = lcores;
824 /* go across a complete bracket */
825 if (*lcore_start == '(') {
826 lcores += strcspn(lcores, ")");
827 if (*lcores++ == '\0')
831 /* scan the separator '@', ','(next) or '\0'(finish) */
832 lcores += strcspn(lcores, "@,");
834 if (*lcores == '@') {
835 /* explicit assign cpu_set */
836 offset = eal_parse_set(lcores + 1, set, RTE_DIM(set));
840 /* prepare cpu_set and update the end cursor */
841 if (0 > convert_to_cpuset(&cpuset,
844 end = lcores + 1 + offset;
845 } else { /* ',' or '\0' */
846 /* haven't given cpu_set, current loop done */
849 /* go back to check <number>-<number> */
850 offset = strcspn(lcore_start, "(-");
851 if (offset < (end - lcore_start) &&
852 *(lcore_start + offset) != '(')
856 if (*end != ',' && *end != '\0')
859 /* parse lcore_set from start point */
860 if (0 > eal_parse_set(lcore_start, set, RTE_DIM(set)))
863 /* without '@', by default using lcore_set as cpu_set */
864 if (*lcores != '@' &&
865 0 > convert_to_cpuset(&cpuset, set, RTE_DIM(set)))
868 /* start to update lcore_set */
869 for (idx = 0; idx < RTE_MAX_LCORE; idx++) {
873 if (cfg->lcore_role[idx] != ROLE_RTE) {
874 lcore_config[idx].core_index = count;
875 cfg->lcore_role[idx] = ROLE_RTE;
881 CPU_SET(idx, &cpuset);
883 rte_memcpy(&lcore_config[idx].cpuset, &cpuset,
884 sizeof(rte_cpuset_t));
888 } while (*end != '\0');
893 cfg->lcore_count = count;
902 eal_parse_syslog(const char *facility, struct internal_config *conf)
909 { "auth", LOG_AUTH },
910 { "cron", LOG_CRON },
911 { "daemon", LOG_DAEMON },
913 { "kern", LOG_KERN },
915 { "mail", LOG_MAIL },
916 { "news", LOG_NEWS },
917 { "syslog", LOG_SYSLOG },
918 { "user", LOG_USER },
919 { "uucp", LOG_UUCP },
920 { "local0", LOG_LOCAL0 },
921 { "local1", LOG_LOCAL1 },
922 { "local2", LOG_LOCAL2 },
923 { "local3", LOG_LOCAL3 },
924 { "local4", LOG_LOCAL4 },
925 { "local5", LOG_LOCAL5 },
926 { "local6", LOG_LOCAL6 },
927 { "local7", LOG_LOCAL7 },
931 for (i = 0; map[i].name; i++) {
932 if (!strcmp(facility, map[i].name)) {
933 conf->syslog_facility = map[i].value;
941 eal_parse_log_level(const char *arg)
943 char *end, *str, *type, *level;
950 if (strchr(str, ',') == NULL) {
954 type = strsep(&str, ",");
955 level = strsep(&str, ",");
959 tmp = strtoul(level, &end, 0);
961 /* check for errors */
962 if ((errno != 0) || (level[0] == '\0') ||
963 end == NULL || (*end != '\0'))
966 /* log_level is a uint32_t */
967 if (tmp >= UINT32_MAX)
971 rte_log_set_global_level(tmp);
972 } else if (rte_log_set_level_regexp(type, tmp) < 0) {
973 printf("cannot set log level %s,%lu\n",
986 static enum rte_proc_type_t
987 eal_parse_proc_type(const char *arg)
989 if (strncasecmp(arg, "primary", sizeof("primary")) == 0)
990 return RTE_PROC_PRIMARY;
991 if (strncasecmp(arg, "secondary", sizeof("secondary")) == 0)
992 return RTE_PROC_SECONDARY;
993 if (strncasecmp(arg, "auto", sizeof("auto")) == 0)
994 return RTE_PROC_AUTO;
996 return RTE_PROC_INVALID;
1000 eal_parse_common_option(int opt, const char *optarg,
1001 struct internal_config *conf)
1011 if (eal_option_device_add(RTE_DEVTYPE_BLACKLISTED_PCI,
1021 if (eal_option_device_add(RTE_DEVTYPE_WHITELISTED_PCI,
1029 if (eal_parse_coremask(optarg) < 0) {
1030 RTE_LOG(ERR, EAL, "invalid coremask\n");
1037 if (eal_parse_corelist(optarg) < 0) {
1038 RTE_LOG(ERR, EAL, "invalid core list\n");
1043 /* service coremask */
1045 if (eal_parse_service_coremask(optarg) < 0) {
1046 RTE_LOG(ERR, EAL, "invalid service coremask\n");
1050 /* service corelist */
1052 if (eal_parse_service_corelist(optarg) < 0) {
1053 RTE_LOG(ERR, EAL, "invalid service core list\n");
1057 /* size of memory */
1059 conf->memory = atoi(optarg);
1060 conf->memory *= 1024ULL;
1061 conf->memory *= 1024ULL;
1064 /* force number of channels */
1066 conf->force_nchannel = atoi(optarg);
1067 if (conf->force_nchannel == 0) {
1068 RTE_LOG(ERR, EAL, "invalid channel number\n");
1072 /* force number of ranks */
1074 conf->force_nrank = atoi(optarg);
1075 if (conf->force_nrank == 0 ||
1076 conf->force_nrank > 16) {
1077 RTE_LOG(ERR, EAL, "invalid rank number\n");
1081 /* force loading of external driver */
1083 if (eal_plugin_add(optarg) == -1)
1087 /* since message is explicitly requested by user, we
1088 * write message at highest log level so it can always
1090 * even if info or warning messages are disabled */
1091 RTE_LOG(CRIT, EAL, "RTE Version: '%s'\n", rte_version());
1095 case OPT_HUGE_UNLINK_NUM:
1096 conf->hugepage_unlink = 1;
1099 case OPT_NO_HUGE_NUM:
1100 conf->no_hugetlbfs = 1;
1103 case OPT_NO_PCI_NUM:
1107 case OPT_NO_HPET_NUM:
1111 case OPT_VMWARE_TSC_MAP_NUM:
1112 conf->vmware_tsc_map = 1;
1115 case OPT_NO_SHCONF_NUM:
1116 conf->no_shconf = 1;
1119 case OPT_PROC_TYPE_NUM:
1120 conf->process_type = eal_parse_proc_type(optarg);
1123 case OPT_MASTER_LCORE_NUM:
1124 if (eal_parse_master_lcore(optarg) < 0) {
1125 RTE_LOG(ERR, EAL, "invalid parameter for --"
1126 OPT_MASTER_LCORE "\n");
1132 if (eal_option_device_add(RTE_DEVTYPE_VIRTUAL,
1138 case OPT_SYSLOG_NUM:
1139 if (eal_parse_syslog(optarg, conf) < 0) {
1140 RTE_LOG(ERR, EAL, "invalid parameters for --"
1146 case OPT_LOG_LEVEL_NUM: {
1147 if (eal_parse_log_level(optarg) < 0) {
1149 "invalid parameters for --"
1150 OPT_LOG_LEVEL "\n");
1155 case OPT_LCORES_NUM:
1156 if (eal_parse_lcores(optarg) < 0) {
1157 RTE_LOG(ERR, EAL, "invalid parameter for --"
1164 /* don't know what to do, leave this to caller */
1172 RTE_LOG(ERR, EAL, "Options blacklist (-b) and whitelist (-w) "
1173 "cannot be used at the same time\n");
1178 eal_auto_detect_cores(struct rte_config *cfg)
1180 unsigned int lcore_id;
1181 unsigned int removed = 0;
1182 rte_cpuset_t affinity_set;
1183 pthread_t tid = pthread_self();
1185 if (pthread_getaffinity_np(tid, sizeof(rte_cpuset_t),
1187 CPU_ZERO(&affinity_set);
1189 for (lcore_id = 0; lcore_id < RTE_MAX_LCORE; lcore_id++) {
1190 if (cfg->lcore_role[lcore_id] == ROLE_RTE &&
1191 !CPU_ISSET(lcore_id, &affinity_set)) {
1192 cfg->lcore_role[lcore_id] = ROLE_OFF;
1197 cfg->lcore_count -= removed;
1201 eal_adjust_config(struct internal_config *internal_cfg)
1204 struct rte_config *cfg = rte_eal_get_configuration();
1207 eal_auto_detect_cores(cfg);
1209 if (internal_config.process_type == RTE_PROC_AUTO)
1210 internal_config.process_type = eal_proc_type_detect();
1212 /* default master lcore is the first one */
1213 if (!master_lcore_parsed) {
1214 cfg->master_lcore = rte_get_next_lcore(-1, 0, 0);
1215 lcore_config[cfg->master_lcore].core_role = ROLE_RTE;
1218 /* if no memory amounts were requested, this will result in 0 and
1219 * will be overridden later, right after eal_hugepage_info_init() */
1220 for (i = 0; i < RTE_MAX_NUMA_NODES; i++)
1221 internal_cfg->memory += internal_cfg->socket_mem[i];
1227 eal_check_common_options(struct internal_config *internal_cfg)
1229 struct rte_config *cfg = rte_eal_get_configuration();
1231 if (cfg->lcore_role[cfg->master_lcore] != ROLE_RTE) {
1232 RTE_LOG(ERR, EAL, "Master lcore is not enabled for DPDK\n");
1236 if (internal_cfg->process_type == RTE_PROC_INVALID) {
1237 RTE_LOG(ERR, EAL, "Invalid process type specified\n");
1240 if (index(internal_cfg->hugefile_prefix, '%') != NULL) {
1241 RTE_LOG(ERR, EAL, "Invalid char, '%%', in --"OPT_FILE_PREFIX" "
1245 if (mem_parsed && internal_cfg->force_sockets == 1) {
1246 RTE_LOG(ERR, EAL, "Options -m and --"OPT_SOCKET_MEM" cannot "
1247 "be specified at the same time\n");
1250 if (internal_cfg->no_hugetlbfs && internal_cfg->force_sockets == 1) {
1251 RTE_LOG(ERR, EAL, "Option --"OPT_SOCKET_MEM" cannot "
1252 "be specified together with --"OPT_NO_HUGE"\n");
1256 if (internal_cfg->no_hugetlbfs && internal_cfg->hugepage_unlink) {
1257 RTE_LOG(ERR, EAL, "Option --"OPT_HUGE_UNLINK" cannot "
1258 "be specified together with --"OPT_NO_HUGE"\n");
1266 eal_common_usage(void)
1268 printf("[options]\n\n"
1269 "EAL common options:\n"
1270 " -c COREMASK Hexadecimal bitmask of cores to run on\n"
1271 " -l CORELIST List of cores to run on\n"
1272 " The argument format is <c1>[-c2][,c3[-c4],...]\n"
1273 " where c1, c2, etc are core indexes between 0 and %d\n"
1274 " --"OPT_LCORES" COREMAP Map lcore set to physical cpu set\n"
1275 " The argument format is\n"
1276 " '<lcores[@cpus]>[<,lcores[@cpus]>...]'\n"
1277 " lcores and cpus list are grouped by '(' and ')'\n"
1278 " Within the group, '-' is used for range separator,\n"
1279 " ',' is used for single number separator.\n"
1280 " '( )' can be omitted for single element group,\n"
1281 " '@' can be omitted if cpus and lcores have the same value\n"
1282 " -s SERVICE COREMASK Hexadecimal bitmask of cores to be used as service cores\n"
1283 " --"OPT_MASTER_LCORE" ID Core ID that is used as master\n"
1284 " --"OPT_MBUF_POOL_OPS_NAME" Pool ops name for mbuf to use\n"
1285 " -n CHANNELS Number of memory channels\n"
1286 " -m MB Memory to allocate (see also --"OPT_SOCKET_MEM")\n"
1287 " -r RANKS Force number of memory ranks (don't detect)\n"
1288 " -b, --"OPT_PCI_BLACKLIST" Add a PCI device in black list.\n"
1289 " Prevent EAL from using this PCI device. The argument\n"
1290 " format is <domain:bus:devid.func>.\n"
1291 " -w, --"OPT_PCI_WHITELIST" Add a PCI device in white list.\n"
1292 " Only use the specified PCI devices. The argument format\n"
1293 " is <[domain:]bus:devid.func>. This option can be present\n"
1294 " several times (once per device).\n"
1295 " [NOTE: PCI whitelist cannot be used with -b option]\n"
1296 " --"OPT_VDEV" Add a virtual device.\n"
1297 " The argument format is <driver><id>[,key=val,...]\n"
1298 " (ex: --vdev=net_pcap0,iface=eth2).\n"
1299 " -d LIB.so|DIR Add a driver or driver directory\n"
1300 " (can be used multiple times)\n"
1301 " --"OPT_VMWARE_TSC_MAP" Use VMware TSC map instead of native RDTSC\n"
1302 " --"OPT_PROC_TYPE" Type of this process (primary|secondary|auto)\n"
1303 " --"OPT_SYSLOG" Set syslog facility\n"
1304 " --"OPT_LOG_LEVEL"=<int> Set global log level\n"
1305 " --"OPT_LOG_LEVEL"=<type-regexp>,<int>\n"
1306 " Set specific log level\n"
1307 " -v Display version information on startup\n"
1308 " -h, --help This help\n"
1309 "\nEAL options for DEBUG use only:\n"
1310 " --"OPT_HUGE_UNLINK" Unlink hugepage files after init\n"
1311 " --"OPT_NO_HUGE" Use malloc instead of hugetlbfs\n"
1312 " --"OPT_NO_PCI" Disable PCI\n"
1313 " --"OPT_NO_HPET" Disable HPET\n"
1314 " --"OPT_NO_SHCONF" No shared config (mmap'd files)\n"
1315 "\n", RTE_MAX_LCORE);