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34 #ifndef _RTE_MEMORY_H_
35 #define _RTE_MEMORY_H_
40 * Memory-related RTE API.
51 #include <rte_common.h>
55 RTE_PGSIZE_4K = 1ULL << 12,
56 RTE_PGSIZE_64K = 1ULL << 16,
57 RTE_PGSIZE_256K = 1ULL << 18,
58 RTE_PGSIZE_2M = 1ULL << 21,
59 RTE_PGSIZE_16M = 1ULL << 24,
60 RTE_PGSIZE_256M = 1ULL << 28,
61 RTE_PGSIZE_512M = 1ULL << 29,
62 RTE_PGSIZE_1G = 1ULL << 30,
63 RTE_PGSIZE_4G = 1ULL << 32,
64 RTE_PGSIZE_16G = 1ULL << 34,
67 #define SOCKET_ID_ANY -1 /**< Any NUMA socket. */
68 #define RTE_CACHE_LINE_MASK (RTE_CACHE_LINE_SIZE-1) /**< Cache line mask. */
70 #define RTE_CACHE_LINE_ROUNDUP(size) \
71 (RTE_CACHE_LINE_SIZE * ((size + RTE_CACHE_LINE_SIZE - 1) / RTE_CACHE_LINE_SIZE))
72 /**< Return the first cache-aligned value greater or equal to size. */
74 /**< Cache line size in terms of log2 */
75 #if RTE_CACHE_LINE_SIZE == 64
76 #define RTE_CACHE_LINE_SIZE_LOG2 6
77 #elif RTE_CACHE_LINE_SIZE == 128
78 #define RTE_CACHE_LINE_SIZE_LOG2 7
80 #error "Unsupported cache line size"
83 #define RTE_CACHE_LINE_MIN_SIZE 64 /**< Minimum Cache line size. */
86 * Force alignment to cache line.
88 #define __rte_cache_aligned __rte_aligned(RTE_CACHE_LINE_SIZE)
91 * Force minimum cache line alignment.
93 #define __rte_cache_min_aligned __rte_aligned(RTE_CACHE_LINE_MIN_SIZE)
95 typedef uint64_t phys_addr_t; /**< Physical address. */
96 #define RTE_BAD_PHYS_ADDR ((phys_addr_t)-1)
98 * IO virtual address type.
99 * When the physical addressing mode (IOVA as PA) is in use,
100 * the translation from an IO virtual address (IOVA) to a physical address
101 * is a direct mapping, i.e. the same value.
102 * Otherwise, in virtual mode (IOVA as VA), an IOMMU may do the translation.
104 typedef uint64_t rte_iova_t;
105 #define RTE_BAD_IOVA ((rte_iova_t)-1)
108 * Physical memory segment descriptor.
111 phys_addr_t phys_addr; /**< Start physical address. */
114 void *addr; /**< Start virtual address. */
115 uint64_t addr_64; /**< Makes sure addr is always 64 bits */
117 size_t len; /**< Length of the segment. */
118 uint64_t hugepage_sz; /**< The pagesize of underlying memory */
119 int32_t socket_id; /**< NUMA socket ID. */
120 uint32_t nchannel; /**< Number of channels. */
121 uint32_t nrank; /**< Number of ranks. */
125 * Lock page in physical memory and prevent from swapping.
128 * The virtual address.
130 * 0 on success, negative on error.
132 int rte_mem_lock_page(const void *virt);
135 * Get physical address of any mapped virtual address in the current process.
136 * It is found by browsing the /proc/self/pagemap special file.
137 * The page must be locked.
140 * The virtual address.
142 * The physical address or RTE_BAD_PHYS_ADDR on error.
144 phys_addr_t rte_mem_virt2phy(const void *virt);
147 * Get the layout of the available physical memory.
149 * It can be useful for an application to have the full physical
150 * memory layout to decide the size of a memory zone to reserve. This
151 * table is stored in rte_config (see rte_eal_get_configuration()).
154 * - On success, return a pointer to a read-only table of struct
155 * rte_physmem_desc elements, containing the layout of all
156 * addressable physical memory. The last element of the table
157 * contains a NULL address.
158 * - On error, return NULL. This should not happen since it is a fatal
159 * error that will probably cause the entire system to panic.
161 const struct rte_memseg *rte_eal_get_physmem_layout(void);
164 * Dump the physical memory layout to a file.
167 * A pointer to a file for output
169 void rte_dump_physmem_layout(FILE *f);
172 * Get the total amount of available physical memory.
175 * The total amount of available physical memory in bytes.
177 uint64_t rte_eal_get_physmem_size(void);
180 * Get the number of memory channels.
183 * The number of memory channels on the system. The value is 0 if unknown
184 * or not the same on all devices.
186 unsigned rte_memory_get_nchannel(void);
189 * Get the number of memory ranks.
192 * The number of memory ranks on the system. The value is 0 if unknown or
193 * not the same on all devices.
195 unsigned rte_memory_get_nrank(void);
198 * Drivers based on uio will not load unless physical
199 * addresses are obtainable. It is only possible to get
200 * physical addresses when running as a privileged user.
203 * 1 if the system is able to obtain physical addresses.
204 * 0 if using DMA addresses through an IOMMU.
206 int rte_eal_using_phys_addrs(void);
212 #endif /* _RTE_MEMORY_H_ */