eal: update i40e supported devices
[dpdk.git] / lib / librte_eal / common / include / rte_pci_dev_ids.h
1 /*-
2  * This file is provided under a dual BSD/GPLv2 license.  When using or
3  *   redistributing this file, you may do so under either license.
4  *
5  *   GPL LICENSE SUMMARY
6  *
7  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
8  *
9  *   This program is free software; you can redistribute it and/or modify
10  *   it under the terms of version 2 of the GNU General Public License as
11  *   published by the Free Software Foundation.
12  *
13  *   This program is distributed in the hope that it will be useful, but
14  *   WITHOUT ANY WARRANTY; without even the implied warranty of
15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16  *   General Public License for more details.
17  *
18  *   You should have received a copy of the GNU General Public License
19  *   along with this program; if not, write to the Free Software
20  *   Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
21  *   The full GNU General Public License is included in this distribution
22  *   in the file called LICENSE.GPL.
23  *
24  *   Contact Information:
25  *   Intel Corporation
26  *
27  *   BSD LICENSE
28  *
29  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
30  *   All rights reserved.
31  *
32  *   Redistribution and use in source and binary forms, with or without
33  *   modification, are permitted provided that the following conditions
34  *   are met:
35  *
36  *     * Redistributions of source code must retain the above copyright
37  *       notice, this list of conditions and the following disclaimer.
38  *     * Redistributions in binary form must reproduce the above copyright
39  *       notice, this list of conditions and the following disclaimer in
40  *       the documentation and/or other materials provided with the
41  *       distribution.
42  *     * Neither the name of Intel Corporation nor the names of its
43  *       contributors may be used to endorse or promote products derived
44  *       from this software without specific prior written permission.
45  *
46  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
47  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
48  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
49  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
50  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
51  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
52  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
53  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
54  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
55  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
56  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
57  *
58  */
59
60 /**
61  * @file
62  *
63  * This file contains a list of the PCI device IDs recognised by DPDK, which
64  * can be used to fill out an array of structures describing the devices.
65  *
66  * Currently four families of devices are recognised: those supported by the
67  * IGB driver, by EM driver, those supported by the IXGBE driver, and by virtio
68  * driver which is a para virtualization driver running in guest virtual machine.
69  * The inclusion of these in an array built using this file depends on the
70  * definition of
71  * RTE_PCI_DEV_ID_DECL_EM
72  * RTE_PCI_DEV_ID_DECL_IGB
73  * RTE_PCI_DEV_ID_DECL_IGBVF
74  * RTE_PCI_DEV_ID_DECL_IXGBE
75  * RTE_PCI_DEV_ID_DECL_IXGBEVF
76  * RTE_PCI_DEV_ID_DECL_I40E
77  * RTE_PCI_DEV_ID_DECL_I40EVF
78  * RTE_PCI_DEV_ID_DECL_VIRTIO
79  * at the time when this file is included.
80  *
81  * In order to populate an array, the user of this file must define this macro:
82  * RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID). For example:
83  *
84  * @code
85  * struct device {
86  *     int vend;
87  *     int dev;
88  * };
89  *
90  * struct device devices[] = {
91  * #define RTE_PCI_DEV_ID_DECL_IXGBE(vendorID, deviceID) {vend, dev},
92  * #include <rte_pci_dev_ids.h>
93  * };
94  * @endcode
95  *
96  * Note that this file can be included multiple times within the same file.
97  */
98
99 #ifndef RTE_PCI_DEV_ID_DECL_EM
100 #define RTE_PCI_DEV_ID_DECL_EM(vend, dev)
101 #endif
102
103 #ifndef RTE_PCI_DEV_ID_DECL_IGB
104 #define RTE_PCI_DEV_ID_DECL_IGB(vend, dev)
105 #endif
106
107 #ifndef RTE_PCI_DEV_ID_DECL_IGBVF
108 #define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
109 #endif
110
111 #ifndef RTE_PCI_DEV_ID_DECL_IXGBE
112 #define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
113 #endif
114
115 #ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
116 #define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
117 #endif
118
119 #ifndef RTE_PCI_DEV_ID_DECL_I40E
120 #define RTE_PCI_DEV_ID_DECL_I40E(vend, dev)
121 #endif
122
123 #ifndef RTE_PCI_DEV_ID_DECL_I40EVF
124 #define RTE_PCI_DEV_ID_DECL_I40EVF(vend, dev)
125 #endif
126
127 #ifndef RTE_PCI_DEV_ID_DECL_VIRTIO
128 #define RTE_PCI_DEV_ID_DECL_VIRTIO(vend, dev)
129 #endif
130
131 #ifndef RTE_PCI_DEV_ID_DECL_VMXNET3
132 #define RTE_PCI_DEV_ID_DECL_VMXNET3(vend, dev)
133 #endif
134
135 #ifndef PCI_VENDOR_ID_INTEL
136 /** Vendor ID used by Intel devices */
137 #define PCI_VENDOR_ID_INTEL 0x8086
138 #endif
139
140 #ifndef PCI_VENDOR_ID_QUMRANET
141 /** Vendor ID used by virtio devices */
142 #define PCI_VENDOR_ID_QUMRANET 0x1AF4
143 #endif
144
145 #ifndef PCI_VENDOR_ID_VMWARE
146 /** Vendor ID used by VMware devices */
147 #define PCI_VENDOR_ID_VMWARE 0x15AD
148 #endif
149
150 /******************** Physical EM devices from e1000_hw.h ********************/
151
152 #define E1000_DEV_ID_82542                    0x1000
153 #define E1000_DEV_ID_82543GC_FIBER            0x1001
154 #define E1000_DEV_ID_82543GC_COPPER           0x1004
155 #define E1000_DEV_ID_82544EI_COPPER           0x1008
156 #define E1000_DEV_ID_82544EI_FIBER            0x1009
157 #define E1000_DEV_ID_82544GC_COPPER           0x100C
158 #define E1000_DEV_ID_82544GC_LOM              0x100D
159 #define E1000_DEV_ID_82540EM                  0x100E
160 #define E1000_DEV_ID_82540EM_LOM              0x1015
161 #define E1000_DEV_ID_82540EP_LOM              0x1016
162 #define E1000_DEV_ID_82540EP                  0x1017
163 #define E1000_DEV_ID_82540EP_LP               0x101E
164 #define E1000_DEV_ID_82545EM_COPPER           0x100F
165 #define E1000_DEV_ID_82545EM_FIBER            0x1011
166 #define E1000_DEV_ID_82545GM_COPPER           0x1026
167 #define E1000_DEV_ID_82545GM_FIBER            0x1027
168 #define E1000_DEV_ID_82545GM_SERDES           0x1028
169 #define E1000_DEV_ID_82546EB_COPPER           0x1010
170 #define E1000_DEV_ID_82546EB_FIBER            0x1012
171 #define E1000_DEV_ID_82546EB_QUAD_COPPER      0x101D
172 #define E1000_DEV_ID_82546GB_COPPER           0x1079
173 #define E1000_DEV_ID_82546GB_FIBER            0x107A
174 #define E1000_DEV_ID_82546GB_SERDES           0x107B
175 #define E1000_DEV_ID_82546GB_PCIE             0x108A
176 #define E1000_DEV_ID_82546GB_QUAD_COPPER      0x1099
177 #define E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 0x10B5
178 #define E1000_DEV_ID_82541EI                  0x1013
179 #define E1000_DEV_ID_82541EI_MOBILE           0x1018
180 #define E1000_DEV_ID_82541ER_LOM              0x1014
181 #define E1000_DEV_ID_82541ER                  0x1078
182 #define E1000_DEV_ID_82541GI                  0x1076
183 #define E1000_DEV_ID_82541GI_LF               0x107C
184 #define E1000_DEV_ID_82541GI_MOBILE           0x1077
185 #define E1000_DEV_ID_82547EI                  0x1019
186 #define E1000_DEV_ID_82547EI_MOBILE           0x101A
187 #define E1000_DEV_ID_82547GI                  0x1075
188 #define E1000_DEV_ID_82571EB_COPPER           0x105E
189 #define E1000_DEV_ID_82571EB_FIBER            0x105F
190 #define E1000_DEV_ID_82571EB_SERDES           0x1060
191 #define E1000_DEV_ID_82571EB_SERDES_DUAL      0x10D9
192 #define E1000_DEV_ID_82571EB_SERDES_QUAD      0x10DA
193 #define E1000_DEV_ID_82571EB_QUAD_COPPER      0x10A4
194 #define E1000_DEV_ID_82571PT_QUAD_COPPER      0x10D5
195 #define E1000_DEV_ID_82571EB_QUAD_FIBER       0x10A5
196 #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP   0x10BC
197 #define E1000_DEV_ID_82572EI_COPPER           0x107D
198 #define E1000_DEV_ID_82572EI_FIBER            0x107E
199 #define E1000_DEV_ID_82572EI_SERDES           0x107F
200 #define E1000_DEV_ID_82572EI                  0x10B9
201 #define E1000_DEV_ID_82573E                   0x108B
202 #define E1000_DEV_ID_82573E_IAMT              0x108C
203 #define E1000_DEV_ID_82573L                   0x109A
204 #define E1000_DEV_ID_82574L                   0x10D3
205 #define E1000_DEV_ID_82574LA                  0x10F6
206 #define E1000_DEV_ID_82583V                   0x150C
207 #define E1000_DEV_ID_80003ES2LAN_COPPER_DPT   0x1096
208 #define E1000_DEV_ID_80003ES2LAN_SERDES_DPT   0x1098
209 #define E1000_DEV_ID_80003ES2LAN_COPPER_SPT   0x10BA
210 #define E1000_DEV_ID_80003ES2LAN_SERDES_SPT   0x10BB
211 #define E1000_DEV_ID_ICH8_82567V_3            0x1501
212 #define E1000_DEV_ID_ICH8_IGP_M_AMT           0x1049
213 #define E1000_DEV_ID_ICH8_IGP_AMT             0x104A
214 #define E1000_DEV_ID_ICH8_IGP_C               0x104B
215 #define E1000_DEV_ID_ICH8_IFE                 0x104C
216 #define E1000_DEV_ID_ICH8_IFE_GT              0x10C4
217 #define E1000_DEV_ID_ICH8_IFE_G               0x10C5
218 #define E1000_DEV_ID_ICH8_IGP_M               0x104D
219 #define E1000_DEV_ID_ICH9_IGP_M               0x10BF
220 #define E1000_DEV_ID_ICH9_IGP_M_AMT           0x10F5
221 #define E1000_DEV_ID_ICH9_IGP_M_V             0x10CB
222 #define E1000_DEV_ID_ICH9_IGP_AMT             0x10BD
223 #define E1000_DEV_ID_ICH9_BM                  0x10E5
224 #define E1000_DEV_ID_ICH9_IGP_C               0x294C
225 #define E1000_DEV_ID_ICH9_IFE                 0x10C0
226 #define E1000_DEV_ID_ICH9_IFE_GT              0x10C3
227 #define E1000_DEV_ID_ICH9_IFE_G               0x10C2
228 #define E1000_DEV_ID_ICH10_R_BM_LM            0x10CC
229 #define E1000_DEV_ID_ICH10_R_BM_LF            0x10CD
230 #define E1000_DEV_ID_ICH10_R_BM_V             0x10CE
231 #define E1000_DEV_ID_ICH10_D_BM_LM            0x10DE
232 #define E1000_DEV_ID_ICH10_D_BM_LF            0x10DF
233 #define E1000_DEV_ID_ICH10_D_BM_V             0x1525
234
235 #define E1000_DEV_ID_PCH_M_HV_LM              0x10EA
236 #define E1000_DEV_ID_PCH_M_HV_LC              0x10EB
237 #define E1000_DEV_ID_PCH_D_HV_DM              0x10EF
238 #define E1000_DEV_ID_PCH_D_HV_DC              0x10F0
239 #define E1000_DEV_ID_PCH2_LV_LM               0x1502
240 #define E1000_DEV_ID_PCH2_LV_V                0x1503
241 #define E1000_DEV_ID_PCH_LPT_I217_LM          0x153A
242 #define E1000_DEV_ID_PCH_LPT_I217_V           0x153B
243 #define E1000_DEV_ID_PCH_LPTLP_I218_LM        0x155A
244 #define E1000_DEV_ID_PCH_LPTLP_I218_V         0x1559
245
246 /*
247  * Tested (supported) on VM emulated HW.
248  */
249
250 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82540EM)
251 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_COPPER)
252 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82545EM_FIBER)
253
254 /*
255  * Tested (supported) on real HW.
256  */
257
258 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82546EB_COPPER)
259 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82546EB_FIBER)
260 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82546EB_QUAD_COPPER)
261 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_COPPER)
262 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_FIBER)
263 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES)
264 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL)
265 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD)
266 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER)
267 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER)
268 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER)
269 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP)
270 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_COPPER)
271 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_FIBER)
272 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI_SERDES)
273 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82572EI)
274 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82573L)
275 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574L)
276 RTE_PCI_DEV_ID_DECL_EM(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82574LA)
277
278 /******************** Physical IGB devices from e1000_hw.h ********************/
279
280 #define E1000_DEV_ID_82576                      0x10C9
281 #define E1000_DEV_ID_82576_FIBER                0x10E6
282 #define E1000_DEV_ID_82576_SERDES               0x10E7
283 #define E1000_DEV_ID_82576_QUAD_COPPER          0x10E8
284 #define E1000_DEV_ID_82576_QUAD_COPPER_ET2      0x1526
285 #define E1000_DEV_ID_82576_NS                   0x150A
286 #define E1000_DEV_ID_82576_NS_SERDES            0x1518
287 #define E1000_DEV_ID_82576_SERDES_QUAD          0x150D
288 #define E1000_DEV_ID_82575EB_COPPER             0x10A7
289 #define E1000_DEV_ID_82575EB_FIBER_SERDES       0x10A9
290 #define E1000_DEV_ID_82575GB_QUAD_COPPER        0x10D6
291 #define E1000_DEV_ID_82580_COPPER               0x150E
292 #define E1000_DEV_ID_82580_FIBER                0x150F
293 #define E1000_DEV_ID_82580_SERDES               0x1510
294 #define E1000_DEV_ID_82580_SGMII                0x1511
295 #define E1000_DEV_ID_82580_COPPER_DUAL          0x1516
296 #define E1000_DEV_ID_82580_QUAD_FIBER           0x1527
297 #define E1000_DEV_ID_I350_COPPER                0x1521
298 #define E1000_DEV_ID_I350_FIBER                 0x1522
299 #define E1000_DEV_ID_I350_SERDES                0x1523
300 #define E1000_DEV_ID_I350_SGMII                 0x1524
301 #define E1000_DEV_ID_I350_DA4                   0x1546
302 #define E1000_DEV_ID_I210_COPPER                0x1533
303 #define E1000_DEV_ID_I210_COPPER_OEM1           0x1534
304 #define E1000_DEV_ID_I210_COPPER_IT             0x1535
305 #define E1000_DEV_ID_I210_FIBER                 0x1536
306 #define E1000_DEV_ID_I210_SERDES                0x1537
307 #define E1000_DEV_ID_I210_SGMII                 0x1538
308 #define E1000_DEV_ID_I210_COPPER_FLASHLESS      0x157B
309 #define E1000_DEV_ID_I210_SERDES_FLASHLESS      0x157C
310 #define E1000_DEV_ID_I211_COPPER                0x1539
311 #define E1000_DEV_ID_I354_BACKPLANE_1GBPS       0x1F40
312 #define E1000_DEV_ID_I354_SGMII                 0x1F41
313 #define E1000_DEV_ID_I354_BACKPLANE_2_5GBPS     0x1F45
314 #define E1000_DEV_ID_DH89XXCC_SGMII             0x0438
315 #define E1000_DEV_ID_DH89XXCC_SERDES            0x043A
316 #define E1000_DEV_ID_DH89XXCC_BACKPLANE         0x043C
317 #define E1000_DEV_ID_DH89XXCC_SFP               0x0440
318
319 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576)
320 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_FIBER)
321 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES)
322 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER)
323 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2)
324 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS)
325 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_NS_SERDES)
326 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_SERDES_QUAD)
327
328 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_COPPER)
329 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES)
330 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER)
331
332 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER)
333 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_FIBER)
334 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SERDES)
335 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_SGMII)
336 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_COPPER_DUAL)
337 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82580_QUAD_FIBER)
338
339 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_COPPER)
340 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_FIBER)
341 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SERDES)
342 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_SGMII)
343 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_DA4)
344 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER)
345 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_OEM1)
346 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_COPPER_IT)
347 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_FIBER)
348 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SERDES)
349 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I210_SGMII)
350 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I211_COPPER)
351 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS)
352 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_SGMII)
353 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS)
354 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SGMII)
355 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
356 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
357 RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
358
359 /****************** Physical IXGBE devices from ixgbe_type.h ******************/
360
361 #define IXGBE_DEV_ID_82598                      0x10B6
362 #define IXGBE_DEV_ID_82598_BX                   0x1508
363 #define IXGBE_DEV_ID_82598AF_DUAL_PORT          0x10C6
364 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT        0x10C7
365 #define IXGBE_DEV_ID_82598AT                    0x10C8
366 #define IXGBE_DEV_ID_82598AT2                   0x150B
367 #define IXGBE_DEV_ID_82598EB_SFP_LOM            0x10DB
368 #define IXGBE_DEV_ID_82598EB_CX4                0x10DD
369 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT        0x10EC
370 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT         0x10F1
371 #define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM      0x10E1
372 #define IXGBE_DEV_ID_82598EB_XF_LR              0x10F4
373 #define IXGBE_DEV_ID_82599_KX4                  0x10F7
374 #define IXGBE_DEV_ID_82599_KX4_MEZZ             0x1514
375 #define IXGBE_DEV_ID_82599_KR                   0x1517
376 #define IXGBE_DEV_ID_82599_COMBO_BACKPLANE      0x10F8
377 #define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ       0x000C
378 #define IXGBE_DEV_ID_82599_CX4                  0x10F9
379 #define IXGBE_DEV_ID_82599_SFP                  0x10FB
380 #define IXGBE_SUBDEV_ID_82599_SFP               0x11A9
381 #define IXGBE_SUBDEV_ID_82599_RNDC              0x1F72
382 #define IXGBE_SUBDEV_ID_82599_560FLR            0x17D0
383 #define IXGBE_SUBDEV_ID_82599_ECNA_DP           0x0470
384 #define IXGBE_DEV_ID_82599_BACKPLANE_FCOE       0x152A
385 #define IXGBE_DEV_ID_82599_SFP_FCOE             0x1529
386 #define IXGBE_DEV_ID_82599_SFP_EM               0x1507
387 #define IXGBE_DEV_ID_82599_SFP_SF2              0x154D
388 #define IXGBE_DEV_ID_82599_SFP_SF_QP            0x154A
389 #define IXGBE_DEV_ID_82599EN_SFP                0x1557
390 #define IXGBE_DEV_ID_82599_XAUI_LOM             0x10FC
391 #define IXGBE_DEV_ID_82599_T3_LOM               0x151C
392 #define IXGBE_DEV_ID_X540T                      0x1528
393 #define IXGBE_DEV_ID_X540T1                     0x1560
394 #define IXGBE_DEV_ID_X550T                      0x1563
395 #define IXGBE_DEV_ID_X550EM_X_KX4               0x15AA
396 #define IXGBE_DEV_ID_X550EM_X_KR                0x15AB
397
398 #ifdef RTE_NIC_BYPASS
399 #define IXGBE_DEV_ID_82599_BYPASS               0x155D
400 #endif
401
402 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
403 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
404 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
405 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
406         IXGBE_DEV_ID_82598AF_SINGLE_PORT)
407 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
408 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
409 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
410 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
411 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
412 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
413 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
414         IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
415 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
416 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
417 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
418 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
419 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
420         IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
421 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
422         IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
423 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
424 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
425 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
426 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
427 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
428 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
429 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
430 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
431 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
432 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
433 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
434 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
435 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
436 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
437 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
438 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
439 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T)
440 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KX4)
441 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)
442
443 #ifdef RTE_NIC_BYPASS
444 RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
445 #endif
446
447 /*************** Physical I40E devices from i40e_type.h *****************/
448
449 #define I40E_DEV_ID_SFP_XL710           0x1572
450 #define I40E_DEV_ID_QEMU                0x1574
451 #define I40E_DEV_ID_KX_A                0x157F
452 #define I40E_DEV_ID_KX_B                0x1580
453 #define I40E_DEV_ID_KX_C                0x1581
454 #define I40E_DEV_ID_QSFP_A              0x1583
455 #define I40E_DEV_ID_QSFP_B              0x1584
456 #define I40E_DEV_ID_QSFP_C              0x1585
457 #define I40E_DEV_ID_10G_BASE_T          0x1586
458
459 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_SFP_XL710)
460 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QEMU)
461 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_A)
462 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_B)
463 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_KX_C)
464 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_A)
465 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_B)
466 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_QSFP_C)
467 RTE_PCI_DEV_ID_DECL_I40E(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_10G_BASE_T)
468
469 /****************** Virtual IGB devices from e1000_hw.h ******************/
470
471 #define E1000_DEV_ID_82576_VF                   0x10CA
472 #define E1000_DEV_ID_82576_VF_HV                0x152D
473 #define E1000_DEV_ID_I350_VF                    0x1520
474 #define E1000_DEV_ID_I350_VF_HV                 0x152F
475
476 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF)
477 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
478 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
479 RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
480
481 /****************** Virtual IXGBE devices from ixgbe_type.h ******************/
482
483 #define IXGBE_DEV_ID_82599_VF                   0x10ED
484 #define IXGBE_DEV_ID_82599_VF_HV                0x152E
485 #define IXGBE_DEV_ID_X540_VF                    0x1515
486 #define IXGBE_DEV_ID_X540_VF_HV                 0x1530
487 #define IXGBE_DEV_ID_X550_VF_HV                 0x1564
488 #define IXGBE_DEV_ID_X550_VF                    0x1565
489 #define IXGBE_DEV_ID_X550EM_X_VF                0x15A8
490 #define IXGBE_DEV_ID_X550EM_X_VF_HV             0x15A9
491
492 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
493 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
494 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
495 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
496 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF_HV)
497 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF)
498 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)
499 RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)
500
501 /****************** Virtual I40E devices from i40e_type.h ********************/
502
503 #define I40E_DEV_ID_VF                  0x154C
504 #define I40E_DEV_ID_VF_HV               0x1571
505
506 RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF)
507 RTE_PCI_DEV_ID_DECL_I40EVF(PCI_VENDOR_ID_INTEL, I40E_DEV_ID_VF_HV)
508
509 /****************** Virtio devices from virtio.h ******************/
510
511 #define QUMRANET_DEV_ID_VIRTIO                  0x1000
512
513 RTE_PCI_DEV_ID_DECL_VIRTIO(PCI_VENDOR_ID_QUMRANET, QUMRANET_DEV_ID_VIRTIO)
514
515 /****************** VMware VMXNET3 devices ******************/
516
517 #define VMWARE_DEV_ID_VMXNET3                   0x07B0
518
519 RTE_PCI_DEV_ID_DECL_VMXNET3(PCI_VENDOR_ID_VMWARE, VMWARE_DEV_ID_VMXNET3)
520
521 /*
522  * Undef all RTE_PCI_DEV_ID_DECL_* here.
523  */
524 #undef RTE_PCI_DEV_ID_DECL_EM
525 #undef RTE_PCI_DEV_ID_DECL_IGB
526 #undef RTE_PCI_DEV_ID_DECL_IGBVF
527 #undef RTE_PCI_DEV_ID_DECL_IXGBE
528 #undef RTE_PCI_DEV_ID_DECL_IXGBEVF
529 #undef RTE_PCI_DEV_ID_DECL_I40E
530 #undef RTE_PCI_DEV_ID_DECL_I40EVF
531 #undef RTE_PCI_DEV_ID_DECL_VIRTIO
532 #undef RTE_PCI_DEV_ID_DECL_VMXNET3