4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution
19 * in the file called LICENSE.GPL.
21 * Contact Information:
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/uio_driver.h>
32 #include <linux/irq.h>
33 #include <linux/msi.h>
34 #include <linux/version.h>
35 #include <linux/slab.h>
37 #include <rte_pci_dev_features.h>
42 * A structure describing the private information for a uio device.
44 struct rte_uio_pci_dev {
47 enum rte_intr_mode mode;
50 static char *intr_mode;
51 static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
55 show_max_vfs(struct device *dev, struct device_attribute *attr,
58 return snprintf(buf, 10, "%u\n", dev_num_vf(dev));
62 store_max_vfs(struct device *dev, struct device_attribute *attr,
63 const char *buf, size_t count)
66 unsigned long max_vfs;
67 struct pci_dev *pdev = to_pci_dev(dev);
69 if (0 != kstrtoul(buf, 0, &max_vfs))
73 pci_disable_sriov(pdev);
74 else if (0 == pci_num_vf(pdev))
75 err = pci_enable_sriov(pdev, max_vfs);
76 else /* do nothing if change max_vfs number */
79 return err ? err : count;
82 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
84 static struct attribute *dev_attrs[] = {
85 &dev_attr_max_vfs.attr,
89 static const struct attribute_group dev_attr_grp = {
94 * This is the irqcontrol callback to be registered to uio_info.
95 * It can be used to disable/enable interrupt from user space processes.
98 * pointer to uio_info.
100 * state value. 1 to enable interrupt, 0 to disable interrupt.
104 * - On failure, a negative value.
107 igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state)
109 struct rte_uio_pci_dev *udev = info->priv;
110 struct pci_dev *pdev = udev->pdev;
113 struct irq_data *irq = irq_get_irq_data(udev->info.irq);
115 unsigned int irq = udev->info.irq;
118 pci_cfg_access_lock(pdev);
120 if (udev->mode == RTE_INTR_MODE_MSIX || udev->mode == RTE_INTR_MODE_MSI) {
121 #ifdef HAVE_PCI_MSI_MASK_IRQ
123 pci_msi_unmask_irq(irq);
125 pci_msi_mask_irq(irq);
134 if (udev->mode == RTE_INTR_MODE_LEGACY)
135 pci_intx(pdev, !!irq_state);
137 pci_cfg_access_unlock(pdev);
143 * This is interrupt handler which will check if the interrupt is for the right device.
144 * If yes, disable it here and will be enable later.
147 igbuio_pci_irqhandler(int irq, struct uio_info *info)
149 struct rte_uio_pci_dev *udev = info->priv;
151 /* Legacy mode need to mask in hardware */
152 if (udev->mode == RTE_INTR_MODE_LEGACY &&
153 !pci_check_and_mask_intx(udev->pdev))
156 /* Message signal mode, no share IRQ and automasked */
161 * This gets called while opening uio device file.
164 igbuio_pci_open(struct uio_info *info, struct inode *inode)
166 struct rte_uio_pci_dev *udev = info->priv;
167 struct pci_dev *dev = udev->pdev;
169 pci_reset_function(dev);
171 /* set bus master, which was cleared by the reset function */
178 igbuio_pci_release(struct uio_info *info, struct inode *inode)
180 struct rte_uio_pci_dev *udev = info->priv;
181 struct pci_dev *dev = udev->pdev;
183 /* stop the device from further DMA */
184 pci_clear_master(dev);
186 pci_reset_function(dev);
191 /* Remap pci resources described by bar #pci_bar in uio resource n. */
193 igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info,
194 int n, int pci_bar, const char *name)
196 unsigned long addr, len;
199 if (n >= ARRAY_SIZE(info->mem))
202 addr = pci_resource_start(dev, pci_bar);
203 len = pci_resource_len(dev, pci_bar);
204 if (addr == 0 || len == 0)
206 internal_addr = ioremap(addr, len);
207 if (internal_addr == NULL)
209 info->mem[n].name = name;
210 info->mem[n].addr = addr;
211 info->mem[n].internal_addr = internal_addr;
212 info->mem[n].size = len;
213 info->mem[n].memtype = UIO_MEM_PHYS;
217 /* Get pci port io resources described by bar #pci_bar in uio resource n. */
219 igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info,
220 int n, int pci_bar, const char *name)
222 unsigned long addr, len;
224 if (n >= ARRAY_SIZE(info->port))
227 addr = pci_resource_start(dev, pci_bar);
228 len = pci_resource_len(dev, pci_bar);
229 if (addr == 0 || len == 0)
232 info->port[n].name = name;
233 info->port[n].start = addr;
234 info->port[n].size = len;
235 info->port[n].porttype = UIO_PORT_X86;
240 /* Unmap previously ioremap'd resources */
242 igbuio_pci_release_iomem(struct uio_info *info)
246 for (i = 0; i < MAX_UIO_MAPS; i++) {
247 if (info->mem[i].internal_addr)
248 iounmap(info->mem[i].internal_addr);
253 igbuio_pci_enable_interrupts(struct rte_uio_pci_dev *udev)
256 #ifndef HAVE_ALLOC_IRQ_VECTORS
257 struct msix_entry msix_entry;
260 switch (igbuio_intr_mode_preferred) {
261 case RTE_INTR_MODE_MSIX:
262 /* Only 1 msi-x vector needed */
263 #ifndef HAVE_ALLOC_IRQ_VECTORS
264 msix_entry.entry = 0;
265 if (pci_enable_msix(udev->pdev, &msix_entry, 1) == 0) {
266 dev_dbg(&udev->pdev->dev, "using MSI-X");
267 udev->info.irq_flags = IRQF_NO_THREAD;
268 udev->info.irq = msix_entry.vector;
269 udev->mode = RTE_INTR_MODE_MSIX;
273 if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSIX) == 1) {
274 dev_dbg(&udev->pdev->dev, "using MSI-X");
275 udev->info.irq_flags = IRQF_NO_THREAD;
276 udev->info.irq = pci_irq_vector(udev->pdev, 0);
277 udev->mode = RTE_INTR_MODE_MSIX;
281 /* fall back to MSI */
282 case RTE_INTR_MODE_MSI:
283 #ifndef HAVE_ALLOC_IRQ_VECTORS
284 if (pci_enable_msi(udev->pdev) == 0) {
285 dev_dbg(&udev->pdev->dev, "using MSI");
286 udev->info.irq_flags = IRQF_NO_THREAD;
287 udev->info.irq = udev->pdev->irq;
288 udev->mode = RTE_INTR_MODE_MSI;
292 if (pci_alloc_irq_vectors(udev->pdev, 1, 1, PCI_IRQ_MSI) == 1) {
293 dev_dbg(&udev->pdev->dev, "using MSI");
294 udev->info.irq_flags = IRQF_NO_THREAD;
295 udev->info.irq = pci_irq_vector(udev->pdev, 0);
296 udev->mode = RTE_INTR_MODE_MSI;
300 /* fall back to INTX */
301 case RTE_INTR_MODE_LEGACY:
302 if (pci_intx_mask_supported(udev->pdev)) {
303 dev_dbg(&udev->pdev->dev, "using INTX");
304 udev->info.irq_flags = IRQF_SHARED | IRQF_NO_THREAD;
305 udev->info.irq = udev->pdev->irq;
306 udev->mode = RTE_INTR_MODE_LEGACY;
309 dev_notice(&udev->pdev->dev, "PCI INTX mask not supported\n");
310 /* fall back to no IRQ */
311 case RTE_INTR_MODE_NONE:
312 udev->mode = RTE_INTR_MODE_NONE;
313 udev->info.irq = UIO_IRQ_NONE;
317 dev_err(&udev->pdev->dev, "invalid IRQ mode %u",
318 igbuio_intr_mode_preferred);
326 igbuio_pci_disable_interrupts(struct rte_uio_pci_dev *udev)
328 #ifndef HAVE_ALLOC_IRQ_VECTORS
329 if (udev->mode == RTE_INTR_MODE_MSIX)
330 pci_disable_msix(udev->pdev);
331 if (udev->mode == RTE_INTR_MODE_MSI)
332 pci_disable_msi(udev->pdev);
334 if (udev->mode == RTE_INTR_MODE_MSIX ||
335 udev->mode == RTE_INTR_MODE_MSI)
336 pci_free_irq_vectors(udev->pdev);
341 igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info)
343 int i, iom, iop, ret;
345 static const char *bar_names[PCI_STD_RESOURCE_END + 1] = {
357 for (i = 0; i < ARRAY_SIZE(bar_names); i++) {
358 if (pci_resource_len(dev, i) != 0 &&
359 pci_resource_start(dev, i) != 0) {
360 flags = pci_resource_flags(dev, i);
361 if (flags & IORESOURCE_MEM) {
362 ret = igbuio_pci_setup_iomem(dev, info, iom,
367 } else if (flags & IORESOURCE_IO) {
368 ret = igbuio_pci_setup_ioport(dev, info, iop,
377 return (iom != 0 || iop != 0) ? ret : -ENOENT;
380 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)
385 igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
387 struct rte_uio_pci_dev *udev;
388 dma_addr_t map_dma_addr;
392 udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL);
397 * enable device: ask low-level code to enable I/O and
400 err = pci_enable_device(dev);
402 dev_err(&dev->dev, "Cannot enable PCI device\n");
406 /* enable bus mastering on the device */
409 /* remap IO memory */
410 err = igbuio_setup_bars(dev, &udev->info);
412 goto fail_release_iomem;
414 /* set 64-bit DMA mask */
415 err = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
417 dev_err(&dev->dev, "Cannot set DMA mask\n");
418 goto fail_release_iomem;
421 err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64));
423 dev_err(&dev->dev, "Cannot set consistent DMA mask\n");
424 goto fail_release_iomem;
428 udev->info.name = "igb_uio";
429 udev->info.version = "0.1";
430 udev->info.handler = igbuio_pci_irqhandler;
431 udev->info.irqcontrol = igbuio_pci_irqcontrol;
432 udev->info.open = igbuio_pci_open;
433 udev->info.release = igbuio_pci_release;
434 udev->info.priv = udev;
437 err = igbuio_pci_enable_interrupts(udev);
439 goto fail_release_iomem;
441 err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp);
443 goto fail_disable_interrupts;
445 /* register uio driver */
446 err = uio_register_device(&dev->dev, &udev->info);
448 goto fail_remove_group;
450 pci_set_drvdata(dev, udev);
452 dev_info(&dev->dev, "uio device registered with irq %lx\n",
456 * Doing a harmless dma mapping for attaching the device to
457 * the iommu identity mapping if kernel boots with iommu=pt.
458 * Note this is not a problem if no IOMMU at all.
460 map_addr = dma_alloc_coherent(&dev->dev, 1024, &map_dma_addr,
463 memset(map_addr, 0, 1024);
466 dev_info(&dev->dev, "dma mapping failed\n");
468 dev_info(&dev->dev, "mapping 1K dma=%#llx host=%p\n",
469 (unsigned long long)map_dma_addr, map_addr);
471 dma_free_coherent(&dev->dev, 1024, map_addr, map_dma_addr);
472 dev_info(&dev->dev, "unmapping 1K dma=%#llx host=%p\n",
473 (unsigned long long)map_dma_addr, map_addr);
479 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
480 fail_disable_interrupts:
481 igbuio_pci_disable_interrupts(udev);
483 igbuio_pci_release_iomem(&udev->info);
484 pci_disable_device(dev);
492 igbuio_pci_remove(struct pci_dev *dev)
494 struct rte_uio_pci_dev *udev = pci_get_drvdata(dev);
496 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
497 uio_unregister_device(&udev->info);
498 igbuio_pci_disable_interrupts(udev);
499 igbuio_pci_release_iomem(&udev->info);
500 pci_disable_device(dev);
501 pci_set_drvdata(dev, NULL);
506 igbuio_config_intr_mode(char *intr_str)
509 pr_info("Use MSIX interrupt by default\n");
513 if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) {
514 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
515 pr_info("Use MSIX interrupt\n");
516 } else if (!strcmp(intr_str, RTE_INTR_MODE_MSI_NAME)) {
517 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSI;
518 pr_info("Use MSI interrupt\n");
519 } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) {
520 igbuio_intr_mode_preferred = RTE_INTR_MODE_LEGACY;
521 pr_info("Use legacy interrupt\n");
523 pr_info("Error: bad parameter - %s\n", intr_str);
530 static struct pci_driver igbuio_pci_driver = {
533 .probe = igbuio_pci_probe,
534 .remove = igbuio_pci_remove,
538 igbuio_pci_init_module(void)
542 ret = igbuio_config_intr_mode(intr_mode);
546 return pci_register_driver(&igbuio_pci_driver);
550 igbuio_pci_exit_module(void)
552 pci_unregister_driver(&igbuio_pci_driver);
555 module_init(igbuio_pci_init_module);
556 module_exit(igbuio_pci_exit_module);
558 module_param(intr_mode, charp, S_IRUGO);
559 MODULE_PARM_DESC(intr_mode,
560 "igb_uio interrupt mode (default=msix):\n"
561 " " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n"
562 " " RTE_INTR_MODE_MSI_NAME " Use MSI interrupt\n"
563 " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n"
566 MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards");
567 MODULE_LICENSE("GPL");
568 MODULE_AUTHOR("Intel Corporation");