lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198                                 int vf, u16 vlan, u8 qos);
 199 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 200 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 201                                 bool setting);
 202 #endif
 203 #ifdef HAVE_VF_MIN_MAX_TXRATE
 204 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 205 #else /* HAVE_VF_MIN_MAX_TXRATE */
 206 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 207 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 208 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 209                                  struct ifla_vf_info *ivi);
 210 static void igb_check_vf_rate_limit(struct igb_adapter *);
 211 #endif
 212 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 213 #ifdef CONFIG_PM
 214 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 215 static int igb_suspend(struct device *dev);
 216 static int igb_resume(struct device *dev);
 217 #ifdef CONFIG_PM_RUNTIME
 218 static int igb_runtime_suspend(struct device *dev);
 219 static int igb_runtime_resume(struct device *dev);
 220 static int igb_runtime_idle(struct device *dev);
 221 #endif /* CONFIG_PM_RUNTIME */
 222 static const struct dev_pm_ops igb_pm_ops = {
 223 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 224         .suspend = igb_suspend,
 225         .resume = igb_resume,
 226         .freeze = igb_suspend,
 227         .thaw = igb_resume,
 228         .poweroff = igb_suspend,
 229         .restore = igb_resume,
 230 #ifdef CONFIG_PM_RUNTIME
 231         .runtime_suspend = igb_runtime_suspend,
 232         .runtime_resume = igb_runtime_resume,
 233         .runtime_idle = igb_runtime_idle,
 234 #endif
 235 #else /* Linux >= 2.6.34 */
 236         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 237 #ifdef CONFIG_PM_RUNTIME
 238         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 239                         igb_runtime_idle)
 240 #endif /* CONFIG_PM_RUNTIME */
 241 #endif /* Linux version */
 242 };
 243 #else
 244 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 245 static int igb_resume(struct pci_dev *pdev);
 246 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 247 #endif /* CONFIG_PM */
 248 #ifndef USE_REBOOT_NOTIFIER
 249 static void igb_shutdown(struct pci_dev *);
 250 #else
 251 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 252 static struct notifier_block igb_notifier_reboot = {
 253         .notifier_call  = igb_notify_reboot,
 254         .next           = NULL,
 255         .priority       = 0
 256 };
 257 #endif
 258 #ifdef IGB_DCA
 259 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 260 static struct notifier_block dca_notifier = {
 261         .notifier_call  = igb_notify_dca,
 262         .next           = NULL,
 263         .priority       = 0
 264 };
 265 #endif
 266 #ifdef CONFIG_NET_POLL_CONTROLLER
 267 /* for netdump / net console */
 268 static void igb_netpoll(struct net_device *);
 269 #endif
 270
 271 #ifdef HAVE_PCI_ERS
 272 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 273                      pci_channel_state_t);
 274 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 275 static void igb_io_resume(struct pci_dev *);
 276
 277 static struct pci_error_handlers igb_err_handler = {
 278         .error_detected = igb_io_error_detected,
 279         .slot_reset = igb_io_slot_reset,
 280         .resume = igb_io_resume,
 281 };
 282 #endif
 283
 284 static void igb_init_fw(struct igb_adapter *adapter);
 285 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 286
 287 static struct pci_driver igb_driver = {
 288         .name     = igb_driver_name,
 289         .id_table = igb_pci_tbl,
 290         .probe    = igb_probe,
 291         .remove   = __devexit_p(igb_remove),
 292 #ifdef CONFIG_PM
 293 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 294         .driver.pm = &igb_pm_ops,
 295 #else
 296         .suspend  = igb_suspend,
 297         .resume   = igb_resume,
 298 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 299 #endif /* CONFIG_PM */
 300 #ifndef USE_REBOOT_NOTIFIER
 301         .shutdown = igb_shutdown,
 302 #endif
 303 #ifdef HAVE_PCI_ERS
 304         .err_handler = &igb_err_handler
 305 #endif
 306 };
 307
 308 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 309 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 310 //MODULE_LICENSE("GPL");
 311 //MODULE_VERSION(DRV_VERSION);
 312
 313 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 314 {
 315         struct e1000_hw *hw = &adapter->hw;
 316         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 317         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 318         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 319         u32 vfta;
 320
 321         /*
 322          * if this is the management vlan the only option is to add it in so
 323          * that the management pass through will continue to work
 324          */
 325         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 326             (vid == mng_cookie->vlan_id))
 327                 add = TRUE;
 328
 329         vfta = adapter->shadow_vfta[index];
 330
 331         if (add)
 332                 vfta |= mask;
 333         else
 334                 vfta &= ~mask;
 335
 336         e1000_write_vfta(hw, index, vfta);
 337         adapter->shadow_vfta[index] = vfta;
 338 }
 339
 340 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 341 //module_param(debug, int, 0);
 342 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 343
 344 /**
 345  * igb_init_module - Driver Registration Routine
 346  *
 347  * igb_init_module is the first routine called when the driver is
 348  * loaded. All it does is register with the PCI subsystem.
 349  **/
 350 static int __init igb_init_module(void)
 351 {
 352         int ret;
 353
 354         printk(KERN_INFO "%s - version %s\n",
 355                igb_driver_string, igb_driver_version);
 356
 357         printk(KERN_INFO "%s\n", igb_copyright);
 358 #ifdef IGB_HWMON
 359 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 360 #else
 361 #ifdef IGB_PROCFS
 362         if (igb_procfs_topdir_init())
 363                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 364 #endif /* IGB_PROCFS */
 365 #endif /* IGB_HWMON  */
 366
 367 #ifdef IGB_DCA
 368         dca_register_notify(&dca_notifier);
 369 #endif
 370         ret = pci_register_driver(&igb_driver);
 371 #ifdef USE_REBOOT_NOTIFIER
 372         if (ret >= 0) {
 373                 register_reboot_notifier(&igb_notifier_reboot);
 374         }
 375 #endif
 376         return ret;
 377 }
 378
 379 #undef module_init
 380 #define module_init(x) static int x(void)  __attribute__((__unused__));
 381 module_init(igb_init_module);
 382
 383 /**
 384  * igb_exit_module - Driver Exit Cleanup Routine
 385  *
 386  * igb_exit_module is called just before the driver is removed
 387  * from memory.
 388  **/
 389 static void __exit igb_exit_module(void)
 390 {
 391 #ifdef IGB_DCA
 392         dca_unregister_notify(&dca_notifier);
 393 #endif
 394 #ifdef USE_REBOOT_NOTIFIER
 395         unregister_reboot_notifier(&igb_notifier_reboot);
 396 #endif
 397         pci_unregister_driver(&igb_driver);
 398
 399 #ifdef IGB_HWMON
 400 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 401 #else
 402 #ifdef IGB_PROCFS
 403         igb_procfs_topdir_exit();
 404 #endif /* IGB_PROCFS */
 405 #endif /* IGB_HWMON */
 406 }
 407
 408 #undef module_exit
 409 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 410 module_exit(igb_exit_module);
 411
 412 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 413 /**
 414  * igb_cache_ring_register - Descriptor ring to register mapping
 415  * @adapter: board private structure to initialize
 416  *
 417  * Once we know the feature-set enabled for the device, we'll cache
 418  * the register offset the descriptor ring is assigned to.
 419  **/
 420 static void igb_cache_ring_register(struct igb_adapter *adapter)
 421 {
 422         int i = 0, j = 0;
 423         u32 rbase_offset = adapter->vfs_allocated_count;
 424
 425         switch (adapter->hw.mac.type) {
 426         case e1000_82576:
 427                 /* The queues are allocated for virtualization such that VF 0
 428                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 429                  * In order to avoid collision we start at the first free queue
 430                  * and continue consuming queues in the same sequence
 431                  */
 432                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 433                         for (; i < adapter->rss_queues; i++)
 434                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 435                                                                Q_IDX_82576(i);
 436                 }
 437         case e1000_82575:
 438         case e1000_82580:
 439         case e1000_i350:
 440         case e1000_i354:
 441         case e1000_i210:
 442         case e1000_i211:
 443         default:
 444                 for (; i < adapter->num_rx_queues; i++)
 445                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 446                 for (; j < adapter->num_tx_queues; j++)
 447                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 448                 break;
 449         }
 450 }
 451
 452 static void igb_configure_lli(struct igb_adapter *adapter)
 453 {
 454         struct e1000_hw *hw = &adapter->hw;
 455         u16 port;
 456
 457         /* LLI should only be enabled for MSI-X or MSI interrupts */
 458         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 459                 return;
 460
 461         if (adapter->lli_port) {
 462                 /* use filter 0 for port */
 463                 port = htons((u16)adapter->lli_port);
 464                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 465                         (port | E1000_IMIR_PORT_IM_EN));
 466                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 467                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 468         }
 469
 470         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 471                 /* use filter 1 for push flag */
 472                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 473                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 474                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 475                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 476         }
 477
 478         if (adapter->lli_size) {
 479                 /* use filter 2 for size */
 480                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 481                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 482                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 483                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 484         }
 485
 486 }
 487
 488 /**
 489  *  igb_write_ivar - configure ivar for given MSI-X vector
 490  *  @hw: pointer to the HW structure
 491  *  @msix_vector: vector number we are allocating to a given ring
 492  *  @index: row index of IVAR register to write within IVAR table
 493  *  @offset: column offset of in IVAR, should be multiple of 8
 494  *
 495  *  This function is intended to handle the writing of the IVAR register
 496  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 497  *  each containing an cause allocation for an Rx and Tx ring, and a
 498  *  variable number of rows depending on the number of queues supported.
 499  **/
 500 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 501                            int index, int offset)
 502 {
 503         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 504
 505         /* clear any bits that are currently set */
 506         ivar &= ~((u32)0xFF << offset);
 507
 508         /* write vector and valid bit */
 509         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 510
 511         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 512 }
 513
 514 #define IGB_N0_QUEUE -1
 515 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 516 {
 517         struct igb_adapter *adapter = q_vector->adapter;
 518         struct e1000_hw *hw = &adapter->hw;
 519         int rx_queue = IGB_N0_QUEUE;
 520         int tx_queue = IGB_N0_QUEUE;
 521         u32 msixbm = 0;
 522
 523         if (q_vector->rx.ring)
 524                 rx_queue = q_vector->rx.ring->reg_idx;
 525         if (q_vector->tx.ring)
 526                 tx_queue = q_vector->tx.ring->reg_idx;
 527
 528         switch (hw->mac.type) {
 529         case e1000_82575:
 530                 /* The 82575 assigns vectors using a bitmask, which matches the
 531                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 532                    or more queues to a vector, we write the appropriate bits
 533                    into the MSIXBM register for that vector. */
 534                 if (rx_queue > IGB_N0_QUEUE)
 535                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 536                 if (tx_queue > IGB_N0_QUEUE)
 537                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 538                 if (!adapter->msix_entries && msix_vector == 0)
 539                         msixbm |= E1000_EIMS_OTHER;
 540                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 541                 q_vector->eims_value = msixbm;
 542                 break;
 543         case e1000_82576:
 544                 /*
 545                  * 82576 uses a table that essentially consists of 2 columns
 546                  * with 8 rows.  The ordering is column-major so we use the
 547                  * lower 3 bits as the row index, and the 4th bit as the
 548                  * column offset.
 549                  */
 550                 if (rx_queue > IGB_N0_QUEUE)
 551                         igb_write_ivar(hw, msix_vector,
 552                                        rx_queue & 0x7,
 553                                        (rx_queue & 0x8) << 1);
 554                 if (tx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        tx_queue & 0x7,
 557                                        ((tx_queue & 0x8) << 1) + 8);
 558                 q_vector->eims_value = 1 << msix_vector;
 559                 break;
 560         case e1000_82580:
 561         case e1000_i350:
 562         case e1000_i354:
 563         case e1000_i210:
 564         case e1000_i211:
 565                 /*
 566                  * On 82580 and newer adapters the scheme is similar to 82576
 567                  * however instead of ordering column-major we have things
 568                  * ordered row-major.  So we traverse the table by using
 569                  * bit 0 as the column offset, and the remaining bits as the
 570                  * row index.
 571                  */
 572                 if (rx_queue > IGB_N0_QUEUE)
 573                         igb_write_ivar(hw, msix_vector,
 574                                        rx_queue >> 1,
 575                                        (rx_queue & 0x1) << 4);
 576                 if (tx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        tx_queue >> 1,
 579                                        ((tx_queue & 0x1) << 4) + 8);
 580                 q_vector->eims_value = 1 << msix_vector;
 581                 break;
 582         default:
 583                 BUG();
 584                 break;
 585         }
 586
 587         /* add q_vector eims value to global eims_enable_mask */
 588         adapter->eims_enable_mask |= q_vector->eims_value;
 589
 590         /* configure q_vector to set itr on first interrupt */
 591         q_vector->set_itr = 1;
 592 }
 593
 594 /**
 595  * igb_configure_msix - Configure MSI-X hardware
 596  *
 597  * igb_configure_msix sets up the hardware to properly
 598  * generate MSI-X interrupts.
 599  **/
 600 static void igb_configure_msix(struct igb_adapter *adapter)
 601 {
 602         u32 tmp;
 603         int i, vector = 0;
 604         struct e1000_hw *hw = &adapter->hw;
 605
 606         adapter->eims_enable_mask = 0;
 607
 608         /* set vector for other causes, i.e. link changes */
 609         switch (hw->mac.type) {
 610         case e1000_82575:
 611                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 612                 /* enable MSI-X PBA support*/
 613                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 614
 615                 /* Auto-Mask interrupts upon ICR read. */
 616                 tmp |= E1000_CTRL_EXT_EIAME;
 617                 tmp |= E1000_CTRL_EXT_IRCA;
 618
 619                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 620
 621                 /* enable msix_other interrupt */
 622                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 623                                       E1000_EIMS_OTHER);
 624                 adapter->eims_other = E1000_EIMS_OTHER;
 625
 626                 break;
 627
 628         case e1000_82576:
 629         case e1000_82580:
 630         case e1000_i350:
 631         case e1000_i354:
 632         case e1000_i210:
 633         case e1000_i211:
 634                 /* Turn on MSI-X capability first, or our settings
 635                  * won't stick.  And it will take days to debug. */
 636                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 637                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 638                                 E1000_GPIE_NSICR);
 639
 640                 /* enable msix_other interrupt */
 641                 adapter->eims_other = 1 << vector;
 642                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 643
 644                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 645                 break;
 646         default:
 647                 /* do nothing, since nothing else supports MSI-X */
 648                 break;
 649         } /* switch (hw->mac.type) */
 650
 651         adapter->eims_enable_mask |= adapter->eims_other;
 652
 653         for (i = 0; i < adapter->num_q_vectors; i++)
 654                 igb_assign_vector(adapter->q_vector[i], vector++);
 655
 656         E1000_WRITE_FLUSH(hw);
 657 }
 658
 659 /**
 660  * igb_request_msix - Initialize MSI-X interrupts
 661  *
 662  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 663  * kernel.
 664  **/
 665 static int igb_request_msix(struct igb_adapter *adapter)
 666 {
 667         struct net_device *netdev = adapter->netdev;
 668         struct e1000_hw *hw = &adapter->hw;
 669         int i, err = 0, vector = 0, free_vector = 0;
 670
 671         err = request_irq(adapter->msix_entries[vector].vector,
 672                           &igb_msix_other, 0, netdev->name, adapter);
 673         if (err)
 674                 goto err_out;
 675
 676         for (i = 0; i < adapter->num_q_vectors; i++) {
 677                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 678
 679                 vector++;
 680
 681                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 682
 683                 if (q_vector->rx.ring && q_vector->tx.ring)
 684                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 685                                 q_vector->rx.ring->queue_index);
 686                 else if (q_vector->tx.ring)
 687                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 688                                 q_vector->tx.ring->queue_index);
 689                 else if (q_vector->rx.ring)
 690                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 691                                 q_vector->rx.ring->queue_index);
 692                 else
 693                         sprintf(q_vector->name, "%s-unused", netdev->name);
 694
 695                 err = request_irq(adapter->msix_entries[vector].vector,
 696                                   igb_msix_ring, 0, q_vector->name,
 697                                   q_vector);
 698                 if (err)
 699                         goto err_free;
 700         }
 701
 702         igb_configure_msix(adapter);
 703         return 0;
 704
 705 err_free:
 706         /* free already assigned IRQs */
 707         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 708
 709         vector--;
 710         for (i = 0; i < vector; i++) {
 711                 free_irq(adapter->msix_entries[free_vector++].vector,
 712                          adapter->q_vector[i]);
 713         }
 714 err_out:
 715         return err;
 716 }
 717
 718 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 719 {
 720         if (adapter->msix_entries) {
 721                 pci_disable_msix(adapter->pdev);
 722                 kfree(adapter->msix_entries);
 723                 adapter->msix_entries = NULL;
 724         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 725                 pci_disable_msi(adapter->pdev);
 726         }
 727 }
 728
 729 /**
 730  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 731  * @adapter: board private structure to initialize
 732  * @v_idx: Index of vector to be freed
 733  *
 734  * This function frees the memory allocated to the q_vector.  In addition if
 735  * NAPI is enabled it will delete any references to the NAPI struct prior
 736  * to freeing the q_vector.
 737  **/
 738 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 739 {
 740         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 741
 742         if (q_vector->tx.ring)
 743                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 744
 745         if (q_vector->rx.ring)
 746                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 747
 748         adapter->q_vector[v_idx] = NULL;
 749         netif_napi_del(&q_vector->napi);
 750 #ifndef IGB_NO_LRO
 751         __skb_queue_purge(&q_vector->lrolist.active);
 752 #endif
 753         kfree(q_vector);
 754 }
 755
 756 /**
 757  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 758  * @adapter: board private structure to initialize
 759  *
 760  * This function frees the memory allocated to the q_vectors.  In addition if
 761  * NAPI is enabled it will delete any references to the NAPI struct prior
 762  * to freeing the q_vector.
 763  **/
 764 static void igb_free_q_vectors(struct igb_adapter *adapter)
 765 {
 766         int v_idx = adapter->num_q_vectors;
 767
 768         adapter->num_tx_queues = 0;
 769         adapter->num_rx_queues = 0;
 770         adapter->num_q_vectors = 0;
 771
 772         while (v_idx--)
 773                 igb_free_q_vector(adapter, v_idx);
 774 }
 775
 776 /**
 777  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 778  *
 779  * This function resets the device so that it has 0 rx queues, tx queues, and
 780  * MSI-X interrupts allocated.
 781  */
 782 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 783 {
 784         igb_free_q_vectors(adapter);
 785         igb_reset_interrupt_capability(adapter);
 786 }
 787
 788 /**
 789  * igb_process_mdd_event
 790  * @adapter - board private structure
 791  *
 792  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 793  */
 794 static void igb_process_mdd_event(struct igb_adapter *adapter)
 795 {
 796         struct e1000_hw *hw = &adapter->hw;
 797         u32 lvmmc, vfte, vfre, mdfb;
 798         u8 vf_queue;
 799
 800         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 801         vf_queue = lvmmc >> 29;
 802
 803         /* VF index cannot be bigger or equal to VFs allocated */
 804         if (vf_queue >= adapter->vfs_allocated_count)
 805                 return;
 806
 807         netdev_info(adapter->netdev,
 808                     "VF %d misbehaved. VF queues are disabled. "
 809                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 810
 811         /* Disable VFTE and VFRE related bits */
 812         vfte = E1000_READ_REG(hw, E1000_VFTE);
 813         vfte &= ~(1 << vf_queue);
 814         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 815
 816         vfre = E1000_READ_REG(hw, E1000_VFRE);
 817         vfre &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 819
 820         /* Disable MDFB related bit. Clear on write */
 821         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 822         mdfb |= (1 << vf_queue);
 823         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 824
 825         /* Reset the specific VF */
 826         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 827 }
 828
 829 /**
 830  * igb_disable_mdd
 831  * @adapter - board private structure
 832  *
 833  * Disable MDD behavior in the HW
 834  **/
 835 static void igb_disable_mdd(struct igb_adapter *adapter)
 836 {
 837         struct e1000_hw *hw = &adapter->hw;
 838         u32 reg;
 839
 840         if ((hw->mac.type != e1000_i350) ||
 841             (hw->mac.type != e1000_i354))
 842                 return;
 843
 844         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 845         reg &= (~E1000_DTXCTL_MDP_EN);
 846         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 847 }
 848
 849 /**
 850  * igb_enable_mdd
 851  * @adapter - board private structure
 852  *
 853  * Enable the HW to detect malicious driver and sends an interrupt to
 854  * the driver.
 855  **/
 856 static void igb_enable_mdd(struct igb_adapter *adapter)
 857 {
 858         struct e1000_hw *hw = &adapter->hw;
 859         u32 reg;
 860
 861         /* Only available on i350 device */
 862         if (hw->mac.type != e1000_i350)
 863                 return;
 864
 865         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 866         reg |= E1000_DTXCTL_MDP_EN;
 867         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 868 }
 869
 870 /**
 871  * igb_reset_sriov_capability - disable SR-IOV if enabled
 872  *
 873  * Attempt to disable single root IO virtualization capabilites present in the
 874  * kernel.
 875  **/
 876 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 877 {
 878         struct pci_dev *pdev = adapter->pdev;
 879         struct e1000_hw *hw = &adapter->hw;
 880
 881         /* reclaim resources allocated to VFs */
 882         if (adapter->vf_data) {
 883                 if (!pci_vfs_assigned(pdev)) {
 884                         /*
 885                          * disable iov and allow time for transactions to
 886                          * clear
 887                          */
 888                         pci_disable_sriov(pdev);
 889                         msleep(500);
 890
 891                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 892                 } else {
 893                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 894                                         "VF(s) are assigned to guests!\n");
 895                 }
 896                 /* Disable Malicious Driver Detection */
 897                 igb_disable_mdd(adapter);
 898
 899                 /* free vf data storage */
 900                 kfree(adapter->vf_data);
 901                 adapter->vf_data = NULL;
 902
 903                 /* switch rings back to PF ownership */
 904                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 905                                 E1000_IOVCTL_REUSE_VFQ);
 906                 E1000_WRITE_FLUSH(hw);
 907                 msleep(100);
 908         }
 909
 910         adapter->vfs_allocated_count = 0;
 911 }
 912
 913 /**
 914  * igb_set_sriov_capability - setup SR-IOV if supported
 915  *
 916  * Attempt to enable single root IO virtualization capabilites present in the
 917  * kernel.
 918  **/
 919 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 920 {
 921         struct pci_dev *pdev = adapter->pdev;
 922         int old_vfs = 0;
 923         int i;
 924
 925         old_vfs = pci_num_vf(pdev);
 926         if (old_vfs) {
 927                 dev_info(pci_dev_to_dev(pdev),
 928                                 "%d pre-allocated VFs found - override "
 929                                 "max_vfs setting of %d\n", old_vfs,
 930                                 adapter->vfs_allocated_count);
 931                 adapter->vfs_allocated_count = old_vfs;
 932         }
 933         /* no VFs requested, do nothing */
 934         if (!adapter->vfs_allocated_count)
 935                 return;
 936
 937         /* allocate vf data storage */
 938         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 939                                    sizeof(struct vf_data_storage),
 940                                    GFP_KERNEL);
 941
 942         if (adapter->vf_data) {
 943                 if (!old_vfs) {
 944                         if (pci_enable_sriov(pdev,
 945                                         adapter->vfs_allocated_count))
 946                                 goto err_out;
 947                 }
 948                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 949                         igb_vf_configure(adapter, i);
 950
 951                 switch (adapter->hw.mac.type) {
 952                 case e1000_82576:
 953                 case e1000_i350:
 954                         /* Enable VM to VM loopback by default */
 955                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 956                         break;
 957                 default:
 958                         /* Currently no other hardware supports loopback */
 959                         break;
 960                 }
 961
 962                 /* DMA Coalescing is not supported in IOV mode. */
 963                 if (adapter->hw.mac.type >= e1000_i350)
 964                 adapter->dmac = IGB_DMAC_DISABLE;
 965                 if (adapter->hw.mac.type < e1000_i350)
 966                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 967                 return;
 968
 969         }
 970
 971 err_out:
 972         kfree(adapter->vf_data);
 973         adapter->vf_data = NULL;
 974         adapter->vfs_allocated_count = 0;
 975         dev_warn(pci_dev_to_dev(pdev),
 976                         "Failed to initialize SR-IOV virtualization\n");
 977 }
 978
 979 /**
 980  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 981  *
 982  * Attempt to configure interrupts using the best available
 983  * capabilities of the hardware and kernel.
 984  **/
 985 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 986 {
 987         struct pci_dev *pdev = adapter->pdev;
 988         int err;
 989         int numvecs, i;
 990
 991         if (!msix)
 992                 adapter->int_mode = IGB_INT_MODE_MSI;
 993
 994         /* Number of supported queues. */
 995         adapter->num_rx_queues = adapter->rss_queues;
 996
 997         if (adapter->vmdq_pools > 1)
 998                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
 999
1000 #ifdef HAVE_TX_MQ
1001         if (adapter->vmdq_pools)
1002                 adapter->num_tx_queues = adapter->vmdq_pools;
1003         else
1004                 adapter->num_tx_queues = adapter->num_rx_queues;
1005 #else
1006         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1007 #endif
1008
1009         switch (adapter->int_mode) {
1010         case IGB_INT_MODE_MSIX:
1011                 /* start with one vector for every rx queue */
1012                 numvecs = adapter->num_rx_queues;
1013
1014                 /* if tx handler is separate add 1 for every tx queue */
1015                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1016                         numvecs += adapter->num_tx_queues;
1017
1018                 /* store the number of vectors reserved for queues */
1019                 adapter->num_q_vectors = numvecs;
1020
1021                 /* add 1 vector for link status interrupts */
1022                 numvecs++;
1023                 adapter->msix_entries = kcalloc(numvecs,
1024                                                 sizeof(struct msix_entry),
1025                                                 GFP_KERNEL);
1026                 if (adapter->msix_entries) {
1027                         for (i = 0; i < numvecs; i++)
1028                                 adapter->msix_entries[i].entry = i;
1029
1030                         err = pci_enable_msix(pdev,
1031                                               adapter->msix_entries, numvecs);
1032                         if (err == 0)
1033                                 break;
1034                 }
1035                 /* MSI-X failed, so fall through and try MSI */
1036                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1037                          "Falling back to MSI interrupts.\n");
1038                 igb_reset_interrupt_capability(adapter);
1039         case IGB_INT_MODE_MSI:
1040                 if (!pci_enable_msi(pdev))
1041                         adapter->flags |= IGB_FLAG_HAS_MSI;
1042                 else
1043                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1044                                  "interrupts.  Falling back to legacy "
1045                                  "interrupts.\n");
1046                 /* Fall through */
1047         case IGB_INT_MODE_LEGACY:
1048                 /* disable advanced features and set number of queues to 1 */
1049                 igb_reset_sriov_capability(adapter);
1050                 adapter->vmdq_pools = 0;
1051                 adapter->rss_queues = 1;
1052                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1053                 adapter->num_rx_queues = 1;
1054                 adapter->num_tx_queues = 1;
1055                 adapter->num_q_vectors = 1;
1056                 /* Don't do anything; this is system default */
1057                 break;
1058         }
1059 }
1060
1061 static void igb_add_ring(struct igb_ring *ring,
1062                          struct igb_ring_container *head)
1063 {
1064         head->ring = ring;
1065         head->count++;
1066 }
1067
1068 /**
1069  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1070  * @adapter: board private structure to initialize
1071  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1072  * @v_idx: index of vector in adapter struct
1073  * @txr_count: total number of Tx rings to allocate
1074  * @txr_idx: index of first Tx ring to allocate
1075  * @rxr_count: total number of Rx rings to allocate
1076  * @rxr_idx: index of first Rx ring to allocate
1077  *
1078  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1079  **/
1080 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1081                               unsigned int v_count, unsigned int v_idx,
1082                               unsigned int txr_count, unsigned int txr_idx,
1083                               unsigned int rxr_count, unsigned int rxr_idx)
1084 {
1085         struct igb_q_vector *q_vector;
1086         struct igb_ring *ring;
1087         int ring_count, size;
1088
1089         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1090         if (txr_count > 1 || rxr_count > 1)
1091                 return -ENOMEM;
1092
1093         ring_count = txr_count + rxr_count;
1094         size = sizeof(struct igb_q_vector) +
1095                (sizeof(struct igb_ring) * ring_count);
1096
1097         /* allocate q_vector and rings */
1098         q_vector = kzalloc(size, GFP_KERNEL);
1099         if (!q_vector)
1100                 return -ENOMEM;
1101
1102 #ifndef IGB_NO_LRO
1103         /* initialize LRO */
1104         __skb_queue_head_init(&q_vector->lrolist.active);
1105
1106 #endif
1107         /* initialize NAPI */
1108         netif_napi_add(adapter->netdev, &q_vector->napi,
1109                        igb_poll, 64);
1110
1111         /* tie q_vector and adapter together */
1112         adapter->q_vector[v_idx] = q_vector;
1113         q_vector->adapter = adapter;
1114
1115         /* initialize work limits */
1116         q_vector->tx.work_limit = adapter->tx_work_limit;
1117
1118         /* initialize ITR configuration */
1119         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1120         q_vector->itr_val = IGB_START_ITR;
1121
1122         /* initialize pointer to rings */
1123         ring = q_vector->ring;
1124
1125         /* intialize ITR */
1126         if (rxr_count) {
1127                 /* rx or rx/tx vector */
1128                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1129                         q_vector->itr_val = adapter->rx_itr_setting;
1130         } else {
1131                 /* tx only vector */
1132                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->tx_itr_setting;
1134         }
1135
1136         if (txr_count) {
1137                 /* assign generic ring traits */
1138                 ring->dev = &adapter->pdev->dev;
1139                 ring->netdev = adapter->netdev;
1140
1141                 /* configure backlink on ring */
1142                 ring->q_vector = q_vector;
1143
1144                 /* update q_vector Tx values */
1145                 igb_add_ring(ring, &q_vector->tx);
1146
1147                 /* For 82575, context index must be unique per ring. */
1148                 if (adapter->hw.mac.type == e1000_82575)
1149                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1150
1151                 /* apply Tx specific ring traits */
1152                 ring->count = adapter->tx_ring_count;
1153                 ring->queue_index = txr_idx;
1154
1155                 /* assign ring to adapter */
1156                 adapter->tx_ring[txr_idx] = ring;
1157
1158                 /* push pointer to next ring */
1159                 ring++;
1160         }
1161
1162         if (rxr_count) {
1163                 /* assign generic ring traits */
1164                 ring->dev = &adapter->pdev->dev;
1165                 ring->netdev = adapter->netdev;
1166
1167                 /* configure backlink on ring */
1168                 ring->q_vector = q_vector;
1169
1170                 /* update q_vector Rx values */
1171                 igb_add_ring(ring, &q_vector->rx);
1172
1173 #ifndef HAVE_NDO_SET_FEATURES
1174                 /* enable rx checksum */
1175                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1176
1177 #endif
1178                 /* set flag indicating ring supports SCTP checksum offload */
1179                 if (adapter->hw.mac.type >= e1000_82576)
1180                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1181
1182                 if ((adapter->hw.mac.type == e1000_i350) ||
1183                     (adapter->hw.mac.type == e1000_i354))
1184                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1185
1186                 /* apply Rx specific ring traits */
1187                 ring->count = adapter->rx_ring_count;
1188                 ring->queue_index = rxr_idx;
1189
1190                 /* assign ring to adapter */
1191                 adapter->rx_ring[rxr_idx] = ring;
1192         }
1193
1194         return 0;
1195 }
1196
1197 /**
1198  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1199  * @adapter: board private structure to initialize
1200  *
1201  * We allocate one q_vector per queue interrupt.  If allocation fails we
1202  * return -ENOMEM.
1203  **/
1204 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1205 {
1206         int q_vectors = adapter->num_q_vectors;
1207         int rxr_remaining = adapter->num_rx_queues;
1208         int txr_remaining = adapter->num_tx_queues;
1209         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1210         int err;
1211
1212         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1213                 for (; rxr_remaining; v_idx++) {
1214                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1215                                                  0, 0, 1, rxr_idx);
1216
1217                         if (err)
1218                                 goto err_out;
1219
1220                         /* update counts and index */
1221                         rxr_remaining--;
1222                         rxr_idx++;
1223                 }
1224         }
1225
1226         for (; v_idx < q_vectors; v_idx++) {
1227                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1228                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1229                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1230                                          tqpv, txr_idx, rqpv, rxr_idx);
1231
1232                 if (err)
1233                         goto err_out;
1234
1235                 /* update counts and index */
1236                 rxr_remaining -= rqpv;
1237                 txr_remaining -= tqpv;
1238                 rxr_idx++;
1239                 txr_idx++;
1240         }
1241
1242         return 0;
1243
1244 err_out:
1245         adapter->num_tx_queues = 0;
1246         adapter->num_rx_queues = 0;
1247         adapter->num_q_vectors = 0;
1248
1249         while (v_idx--)
1250                 igb_free_q_vector(adapter, v_idx);
1251
1252         return -ENOMEM;
1253 }
1254
1255 /**
1256  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1257  *
1258  * This function initializes the interrupts and allocates all of the queues.
1259  **/
1260 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1261 {
1262         struct pci_dev *pdev = adapter->pdev;
1263         int err;
1264
1265         igb_set_interrupt_capability(adapter, msix);
1266
1267         err = igb_alloc_q_vectors(adapter);
1268         if (err) {
1269                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1270                 goto err_alloc_q_vectors;
1271         }
1272
1273         igb_cache_ring_register(adapter);
1274
1275         return 0;
1276
1277 err_alloc_q_vectors:
1278         igb_reset_interrupt_capability(adapter);
1279         return err;
1280 }
1281
1282 /**
1283  * igb_request_irq - initialize interrupts
1284  *
1285  * Attempts to configure interrupts using the best available
1286  * capabilities of the hardware and kernel.
1287  **/
1288 static int igb_request_irq(struct igb_adapter *adapter)
1289 {
1290         struct net_device *netdev = adapter->netdev;
1291         struct pci_dev *pdev = adapter->pdev;
1292         int err = 0;
1293
1294         if (adapter->msix_entries) {
1295                 err = igb_request_msix(adapter);
1296                 if (!err)
1297                         goto request_done;
1298                 /* fall back to MSI */
1299                 igb_free_all_tx_resources(adapter);
1300                 igb_free_all_rx_resources(adapter);
1301
1302                 igb_clear_interrupt_scheme(adapter);
1303                 igb_reset_sriov_capability(adapter);
1304                 err = igb_init_interrupt_scheme(adapter, false);
1305                 if (err)
1306                         goto request_done;
1307                 igb_setup_all_tx_resources(adapter);
1308                 igb_setup_all_rx_resources(adapter);
1309                 igb_configure(adapter);
1310         }
1311
1312         igb_assign_vector(adapter->q_vector[0], 0);
1313
1314         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1315                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1316                                   netdev->name, adapter);
1317                 if (!err)
1318                         goto request_done;
1319
1320                 /* fall back to legacy interrupts */
1321                 igb_reset_interrupt_capability(adapter);
1322                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1323         }
1324
1325         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1326                           netdev->name, adapter);
1327
1328         if (err)
1329                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1330                         err);
1331
1332 request_done:
1333         return err;
1334 }
1335
1336 static void igb_free_irq(struct igb_adapter *adapter)
1337 {
1338         if (adapter->msix_entries) {
1339                 int vector = 0, i;
1340
1341                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1342
1343                 for (i = 0; i < adapter->num_q_vectors; i++)
1344                         free_irq(adapter->msix_entries[vector++].vector,
1345                                  adapter->q_vector[i]);
1346         } else {
1347                 free_irq(adapter->pdev->irq, adapter);
1348         }
1349 }
1350
1351 /**
1352  * igb_irq_disable - Mask off interrupt generation on the NIC
1353  * @adapter: board private structure
1354  **/
1355 static void igb_irq_disable(struct igb_adapter *adapter)
1356 {
1357         struct e1000_hw *hw = &adapter->hw;
1358
1359         /*
1360          * we need to be careful when disabling interrupts.  The VFs are also
1361          * mapped into these registers and so clearing the bits can cause
1362          * issues on the VF drivers so we only need to clear what we set
1363          */
1364         if (adapter->msix_entries) {
1365                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1366                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1367                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1368                 regval = E1000_READ_REG(hw, E1000_EIAC);
1369                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1370         }
1371
1372         E1000_WRITE_REG(hw, E1000_IAM, 0);
1373         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1374         E1000_WRITE_FLUSH(hw);
1375
1376         if (adapter->msix_entries) {
1377                 int vector = 0, i;
1378
1379                 synchronize_irq(adapter->msix_entries[vector++].vector);
1380
1381                 for (i = 0; i < adapter->num_q_vectors; i++)
1382                         synchronize_irq(adapter->msix_entries[vector++].vector);
1383         } else {
1384                 synchronize_irq(adapter->pdev->irq);
1385         }
1386 }
1387
1388 /**
1389  * igb_irq_enable - Enable default interrupt generation settings
1390  * @adapter: board private structure
1391  **/
1392 static void igb_irq_enable(struct igb_adapter *adapter)
1393 {
1394         struct e1000_hw *hw = &adapter->hw;
1395
1396         if (adapter->msix_entries) {
1397                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1398                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1399                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1400                 regval = E1000_READ_REG(hw, E1000_EIAM);
1401                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1402                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1403                 if (adapter->vfs_allocated_count) {
1404                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1405                         ims |= E1000_IMS_VMMB;
1406                         if (adapter->mdd)
1407                                 if ((adapter->hw.mac.type == e1000_i350) ||
1408                                     (adapter->hw.mac.type == e1000_i354))
1409                                 ims |= E1000_IMS_MDDET;
1410                 }
1411                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1412         } else {
1413                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1414                                 E1000_IMS_DRSTA);
1415                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1416                                 E1000_IMS_DRSTA);
1417         }
1418 }
1419
1420 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1421 {
1422         struct e1000_hw *hw = &adapter->hw;
1423         u16 vid = adapter->hw.mng_cookie.vlan_id;
1424         u16 old_vid = adapter->mng_vlan_id;
1425
1426         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1427                 /* add VID to filter table */
1428                 igb_vfta_set(adapter, vid, TRUE);
1429                 adapter->mng_vlan_id = vid;
1430         } else {
1431                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1432         }
1433
1434         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1435             (vid != old_vid) &&
1436 #ifdef HAVE_VLAN_RX_REGISTER
1437             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1438 #else
1439             !test_bit(old_vid, adapter->active_vlans)) {
1440 #endif
1441                 /* remove VID from filter table */
1442                 igb_vfta_set(adapter, old_vid, FALSE);
1443         }
1444 }
1445
1446 /**
1447  * igb_release_hw_control - release control of the h/w to f/w
1448  * @adapter: address of board private structure
1449  *
1450  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1451  * For ASF and Pass Through versions of f/w this means that the
1452  * driver is no longer loaded.
1453  *
1454  **/
1455 static void igb_release_hw_control(struct igb_adapter *adapter)
1456 {
1457         struct e1000_hw *hw = &adapter->hw;
1458         u32 ctrl_ext;
1459
1460         /* Let firmware take over control of h/w */
1461         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1462         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1463                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1464 }
1465
1466 /**
1467  * igb_get_hw_control - get control of the h/w from f/w
1468  * @adapter: address of board private structure
1469  *
1470  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1471  * For ASF and Pass Through versions of f/w this means that
1472  * the driver is loaded.
1473  *
1474  **/
1475 static void igb_get_hw_control(struct igb_adapter *adapter)
1476 {
1477         struct e1000_hw *hw = &adapter->hw;
1478         u32 ctrl_ext;
1479
1480         /* Let firmware know the driver has taken over */
1481         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1482         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1483                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1484 }
1485
1486 /**
1487  * igb_configure - configure the hardware for RX and TX
1488  * @adapter: private board structure
1489  **/
1490 static void igb_configure(struct igb_adapter *adapter)
1491 {
1492         struct net_device *netdev = adapter->netdev;
1493         int i;
1494
1495         igb_get_hw_control(adapter);
1496         igb_set_rx_mode(netdev);
1497
1498         igb_restore_vlan(adapter);
1499
1500         igb_setup_tctl(adapter);
1501         igb_setup_mrqc(adapter);
1502         igb_setup_rctl(adapter);
1503
1504         igb_configure_tx(adapter);
1505         igb_configure_rx(adapter);
1506
1507         e1000_rx_fifo_flush_82575(&adapter->hw);
1508 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1509         if (adapter->num_tx_queues > 1)
1510                 netdev->features |= NETIF_F_MULTI_QUEUE;
1511         else
1512                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1513 #endif
1514
1515         /* call igb_desc_unused which always leaves
1516          * at least 1 descriptor unused to make sure
1517          * next_to_use != next_to_clean */
1518         for (i = 0; i < adapter->num_rx_queues; i++) {
1519                 struct igb_ring *ring = adapter->rx_ring[i];
1520                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1521         }
1522 }
1523
1524 /**
1525  * igb_power_up_link - Power up the phy/serdes link
1526  * @adapter: address of board private structure
1527  **/
1528 void igb_power_up_link(struct igb_adapter *adapter)
1529 {
1530         e1000_phy_hw_reset(&adapter->hw);
1531
1532         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1533                 e1000_power_up_phy(&adapter->hw);
1534         else
1535                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1536 }
1537
1538 /**
1539  * igb_power_down_link - Power down the phy/serdes link
1540  * @adapter: address of board private structure
1541  */
1542 static void igb_power_down_link(struct igb_adapter *adapter)
1543 {
1544         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1545                 e1000_power_down_phy(&adapter->hw);
1546         else
1547                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1548 }
1549
1550 /* Detect and switch function for Media Auto Sense */
1551 static void igb_check_swap_media(struct igb_adapter *adapter)
1552 {
1553         struct e1000_hw *hw = &adapter->hw;
1554         u32 ctrl_ext, connsw;
1555         bool swap_now = false;
1556         bool link;
1557
1558         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1559         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1560         link = igb_has_link(adapter);
1561
1562         /* need to live swap if current media is copper and we have fiber/serdes
1563          * to go to.
1564          */
1565
1566         if ((hw->phy.media_type == e1000_media_type_copper) &&
1567             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1568                 swap_now = true;
1569         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1570                 /* copper signal takes time to appear */
1571                 if (adapter->copper_tries < 2) {
1572                         adapter->copper_tries++;
1573                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1574                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1575                         return;
1576                 } else {
1577                         adapter->copper_tries = 0;
1578                         if ((connsw & E1000_CONNSW_PHYSD) &&
1579                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1580                                 swap_now = true;
1581                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1582                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1583                         }
1584                 }
1585         }
1586
1587         if (swap_now) {
1588                 switch (hw->phy.media_type) {
1589                 case e1000_media_type_copper:
1590                         dev_info(pci_dev_to_dev(adapter->pdev),
1591                                  "%s:MAS: changing media to fiber/serdes\n",
1592                         adapter->netdev->name);
1593                         ctrl_ext |=
1594                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1595                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1596                         adapter->copper_tries = 0;
1597                         break;
1598                 case e1000_media_type_internal_serdes:
1599                 case e1000_media_type_fiber:
1600                         dev_info(pci_dev_to_dev(adapter->pdev),
1601                                  "%s:MAS: changing media to copper\n",
1602                                  adapter->netdev->name);
1603                         ctrl_ext &=
1604                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1605                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1606                         break;
1607                 default:
1608                         /* shouldn't get here during regular operation */
1609                         dev_err(pci_dev_to_dev(adapter->pdev),
1610                                 "%s:AMS: Invalid media type found, returning\n",
1611                                 adapter->netdev->name);
1612                         break;
1613                 }
1614                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1615         }
1616 }
1617
1618 #ifdef HAVE_I2C_SUPPORT
1619 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1620  *  @hw: pointer to hardware structure
1621  *  @i2cctl: Current value of I2CCTL register
1622  *
1623  *  Returns the I2C data bit value
1624  */
1625 static int igb_get_i2c_data(void *data)
1626 {
1627         struct igb_adapter *adapter = (struct igb_adapter *)data;
1628         struct e1000_hw *hw = &adapter->hw;
1629         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1630
1631         return ((i2cctl & E1000_I2C_DATA_IN) != 0);
1632 }
1633
1634 /* igb_set_i2c_data - Sets the I2C data bit
1635  *  @data: pointer to hardware structure
1636  *  @state: I2C data value (0 or 1) to set
1637  *
1638  *  Sets the I2C data bit
1639  */
1640 static void igb_set_i2c_data(void *data, int state)
1641 {
1642         struct igb_adapter *adapter = (struct igb_adapter *)data;
1643         struct e1000_hw *hw = &adapter->hw;
1644         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1645
1646         if (state)
1647                 i2cctl |= E1000_I2C_DATA_OUT;
1648         else
1649                 i2cctl &= ~E1000_I2C_DATA_OUT;
1650
1651         i2cctl &= ~E1000_I2C_DATA_OE_N;
1652         i2cctl |= E1000_I2C_CLK_OE_N;
1653
1654         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1655         E1000_WRITE_FLUSH(hw);
1656
1657 }
1658
1659 /* igb_set_i2c_clk - Sets the I2C SCL clock
1660  *  @data: pointer to hardware structure
1661  *  @state: state to set clock
1662  *
1663  *  Sets the I2C clock line to state
1664  */
1665 static void igb_set_i2c_clk(void *data, int state)
1666 {
1667         struct igb_adapter *adapter = (struct igb_adapter *)data;
1668         struct e1000_hw *hw = &adapter->hw;
1669         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1670
1671         if (state) {
1672                 i2cctl |= E1000_I2C_CLK_OUT;
1673                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1674         } else {
1675                 i2cctl &= ~E1000_I2C_CLK_OUT;
1676                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1677         }
1678         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1679         E1000_WRITE_FLUSH(hw);
1680 }
1681
1682 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1683  *  @data: pointer to hardware structure
1684  *
1685  *  Gets the I2C clock state
1686  */
1687 static int igb_get_i2c_clk(void *data)
1688 {
1689         struct igb_adapter *adapter = (struct igb_adapter *)data;
1690         struct e1000_hw *hw = &adapter->hw;
1691         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1692
1693         return ((i2cctl & E1000_I2C_CLK_IN) != 0);
1694 }
1695
1696 static const struct i2c_algo_bit_data igb_i2c_algo = {
1697         .setsda         = igb_set_i2c_data,
1698         .setscl         = igb_set_i2c_clk,
1699         .getsda         = igb_get_i2c_data,
1700         .getscl         = igb_get_i2c_clk,
1701         .udelay         = 5,
1702         .timeout        = 20,
1703 };
1704
1705 /*  igb_init_i2c - Init I2C interface
1706  *  @adapter: pointer to adapter structure
1707  *
1708  */
1709 static s32 igb_init_i2c(struct igb_adapter *adapter)
1710 {
1711         s32 status = E1000_SUCCESS;
1712
1713         /* I2C interface supported on i350 devices */
1714         if (adapter->hw.mac.type != e1000_i350)
1715                 return E1000_SUCCESS;
1716
1717         /* Initialize the i2c bus which is controlled by the registers.
1718          * This bus will use the i2c_algo_bit structue that implements
1719          * the protocol through toggling of the 4 bits in the register.
1720          */
1721         adapter->i2c_adap.owner = THIS_MODULE;
1722         adapter->i2c_algo = igb_i2c_algo;
1723         adapter->i2c_algo.data = adapter;
1724         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1725         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1726         strlcpy(adapter->i2c_adap.name, "igb BB",
1727                 sizeof(adapter->i2c_adap.name));
1728         status = i2c_bit_add_bus(&adapter->i2c_adap);
1729         return status;
1730 }
1731
1732 #endif /* HAVE_I2C_SUPPORT */
1733 /**
1734  * igb_up - Open the interface and prepare it to handle traffic
1735  * @adapter: board private structure
1736  **/
1737 int igb_up(struct igb_adapter *adapter)
1738 {
1739         struct e1000_hw *hw = &adapter->hw;
1740         int i;
1741
1742         /* hardware has been reset, we need to reload some things */
1743         igb_configure(adapter);
1744
1745         clear_bit(__IGB_DOWN, &adapter->state);
1746
1747         for (i = 0; i < adapter->num_q_vectors; i++)
1748                 napi_enable(&(adapter->q_vector[i]->napi));
1749
1750         if (adapter->msix_entries)
1751                 igb_configure_msix(adapter);
1752         else
1753                 igb_assign_vector(adapter->q_vector[0], 0);
1754
1755         igb_configure_lli(adapter);
1756
1757         /* Clear any pending interrupts. */
1758         E1000_READ_REG(hw, E1000_ICR);
1759         igb_irq_enable(adapter);
1760
1761         /* notify VFs that reset has been completed */
1762         if (adapter->vfs_allocated_count) {
1763                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1764                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1765                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1766         }
1767
1768         netif_tx_start_all_queues(adapter->netdev);
1769
1770         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1771                 schedule_work(&adapter->dma_err_task);
1772         /* start the watchdog. */
1773         hw->mac.get_link_status = 1;
1774         schedule_work(&adapter->watchdog_task);
1775
1776         if ((adapter->flags & IGB_FLAG_EEE) &&
1777             (!hw->dev_spec._82575.eee_disable))
1778                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1779
1780         return 0;
1781 }
1782
1783 void igb_down(struct igb_adapter *adapter)
1784 {
1785         struct net_device *netdev = adapter->netdev;
1786         struct e1000_hw *hw = &adapter->hw;
1787         u32 tctl, rctl;
1788         int i;
1789
1790         /* signal that we're down so the interrupt handler does not
1791          * reschedule our watchdog timer */
1792         set_bit(__IGB_DOWN, &adapter->state);
1793
1794         /* disable receives in the hardware */
1795         rctl = E1000_READ_REG(hw, E1000_RCTL);
1796         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1797         /* flush and sleep below */
1798
1799         netif_tx_stop_all_queues(netdev);
1800
1801         /* disable transmits in the hardware */
1802         tctl = E1000_READ_REG(hw, E1000_TCTL);
1803         tctl &= ~E1000_TCTL_EN;
1804         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1805         /* flush both disables and wait for them to finish */
1806         E1000_WRITE_FLUSH(hw);
1807         usleep_range(10000, 20000);
1808
1809         for (i = 0; i < adapter->num_q_vectors; i++)
1810                 napi_disable(&(adapter->q_vector[i]->napi));
1811
1812         igb_irq_disable(adapter);
1813
1814         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1815
1816         del_timer_sync(&adapter->watchdog_timer);
1817         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1818                 del_timer_sync(&adapter->dma_err_timer);
1819         del_timer_sync(&adapter->phy_info_timer);
1820
1821         netif_carrier_off(netdev);
1822
1823         /* record the stats before reset*/
1824         igb_update_stats(adapter);
1825
1826         adapter->link_speed = 0;
1827         adapter->link_duplex = 0;
1828
1829 #ifdef HAVE_PCI_ERS
1830         if (!pci_channel_offline(adapter->pdev))
1831                 igb_reset(adapter);
1832 #else
1833         igb_reset(adapter);
1834 #endif
1835         igb_clean_all_tx_rings(adapter);
1836         igb_clean_all_rx_rings(adapter);
1837 #ifdef IGB_DCA
1838         /* since we reset the hardware DCA settings were cleared */
1839         igb_setup_dca(adapter);
1840 #endif
1841 }
1842
1843 void igb_reinit_locked(struct igb_adapter *adapter)
1844 {
1845         WARN_ON(in_interrupt());
1846         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1847                 usleep_range(1000, 2000);
1848         igb_down(adapter);
1849         igb_up(adapter);
1850         clear_bit(__IGB_RESETTING, &adapter->state);
1851 }
1852
1853 /**
1854  * igb_enable_mas - Media Autosense re-enable after swap
1855  *
1856  * @adapter: adapter struct
1857  **/
1858 static s32  igb_enable_mas(struct igb_adapter *adapter)
1859 {
1860         struct e1000_hw *hw = &adapter->hw;
1861         u32 connsw;
1862         s32 ret_val = E1000_SUCCESS;
1863
1864         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1865         if (hw->phy.media_type == e1000_media_type_copper) {
1866                 /* configure for SerDes media detect */
1867                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1868                         connsw |= E1000_CONNSW_ENRGSRC;
1869                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1870                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1871                         E1000_WRITE_FLUSH(hw);
1872                 } else if (connsw & E1000_CONNSW_SERDESD) {
1873                         /* already SerDes, no need to enable anything */
1874                         return ret_val;
1875                 } else {
1876                         dev_info(pci_dev_to_dev(adapter->pdev),
1877                         "%s:MAS: Unable to configure feature, disabling..\n",
1878                         adapter->netdev->name);
1879                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1880                 }
1881         }
1882         return ret_val;
1883 }
1884
1885 void igb_reset(struct igb_adapter *adapter)
1886 {
1887         struct pci_dev *pdev = adapter->pdev;
1888         struct e1000_hw *hw = &adapter->hw;
1889         struct e1000_mac_info *mac = &hw->mac;
1890         struct e1000_fc_info *fc = &hw->fc;
1891         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1892
1893         /* Repartition Pba for greater than 9k mtu
1894          * To take effect CTRL.RST is required.
1895          */
1896         switch (mac->type) {
1897         case e1000_i350:
1898         case e1000_82580:
1899         case e1000_i354:
1900                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1901                 pba = e1000_rxpbs_adjust_82580(pba);
1902                 break;
1903         case e1000_82576:
1904                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1906                 break;
1907         case e1000_82575:
1908         case e1000_i210:
1909         case e1000_i211:
1910         default:
1911                 pba = E1000_PBA_34K;
1912                 break;
1913         }
1914
1915         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1916             (mac->type < e1000_82576)) {
1917                 /* adjust PBA for jumbo frames */
1918                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1919
1920                 /* To maintain wire speed transmits, the Tx FIFO should be
1921                  * large enough to accommodate two full transmit packets,
1922                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1923                  * the Rx FIFO should be large enough to accommodate at least
1924                  * one full receive packet and is similarly rounded up and
1925                  * expressed in KB. */
1926                 pba = E1000_READ_REG(hw, E1000_PBA);
1927                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928                 tx_space = pba >> 16;
1929                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1930                 pba &= 0xffff;
1931                 /* the tx fifo also stores 16 bytes of information about the tx
1932                  * but don't include ethernet FCS because hardware appends it */
1933                 min_tx_space = (adapter->max_frame_size +
1934                                 sizeof(union e1000_adv_tx_desc) -
1935                                 ETH_FCS_LEN) * 2;
1936                 min_tx_space = ALIGN(min_tx_space, 1024);
1937                 min_tx_space >>= 10;
1938                 /* software strips receive CRC, so leave room for it */
1939                 min_rx_space = adapter->max_frame_size;
1940                 min_rx_space = ALIGN(min_rx_space, 1024);
1941                 min_rx_space >>= 10;
1942
1943                 /* If current Tx allocation is less than the min Tx FIFO size,
1944                  * and the min Tx FIFO size is less than the current Rx FIFO
1945                  * allocation, take space away from current Rx allocation */
1946                 if (tx_space < min_tx_space &&
1947                     ((min_tx_space - tx_space) < pba)) {
1948                         pba = pba - (min_tx_space - tx_space);
1949
1950                         /* if short on rx space, rx wins and must trump tx
1951                          * adjustment */
1952                         if (pba < min_rx_space)
1953                                 pba = min_rx_space;
1954                 }
1955                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1956         }
1957
1958         /* flow control settings */
1959         /* The high water mark must be low enough to fit one full frame
1960          * (or the size used for early receive) above it in the Rx FIFO.
1961          * Set it to the lower of:
1962          * - 90% of the Rx FIFO size, or
1963          * - the full Rx FIFO size minus one full frame */
1964         hwm = min(((pba << 10) * 9 / 10),
1965                         ((pba << 10) - 2 * adapter->max_frame_size));
1966
1967         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1968         fc->low_water = fc->high_water - 16;
1969         fc->pause_time = 0xFFFF;
1970         fc->send_xon = 1;
1971         fc->current_mode = fc->requested_mode;
1972
1973         /* disable receive for all VFs and wait one second */
1974         if (adapter->vfs_allocated_count) {
1975                 int i;
1976                 /*
1977                  * Clear all flags except indication that the PF has set
1978                  * the VF MAC addresses administratively
1979                  */
1980                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1981                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1982
1983                 /* ping all the active vfs to let them know we are going down */
1984                 igb_ping_all_vfs(adapter);
1985
1986                 /* disable transmits and receives */
1987                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1988                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1989         }
1990
1991         /* Allow time for pending master requests to run */
1992         e1000_reset_hw(hw);
1993         E1000_WRITE_REG(hw, E1000_WUC, 0);
1994
1995         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
1996                 e1000_setup_init_funcs(hw, TRUE);
1997                 igb_check_options(adapter);
1998                 e1000_get_bus_info(hw);
1999                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2000         }
2001         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2002                 if (igb_enable_mas(adapter))
2003                         dev_err(pci_dev_to_dev(pdev),
2004                                 "Error enabling Media Auto Sense\n");
2005         }
2006         if (e1000_init_hw(hw))
2007                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2008
2009         /*
2010          * Flow control settings reset on hardware reset, so guarantee flow
2011          * control is off when forcing speed.
2012          */
2013         if (!hw->mac.autoneg)
2014                 e1000_force_mac_fc(hw);
2015
2016         igb_init_dmac(adapter, pba);
2017         /* Re-initialize the thermal sensor on i350 devices. */
2018         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2019                 /*
2020                  * If present, re-initialize the external thermal sensor
2021                  * interface.
2022                  */
2023                 if (adapter->ets)
2024                         e1000_set_i2c_bb(hw);
2025                 e1000_init_thermal_sensor_thresh(hw);
2026         }
2027
2028         /*Re-establish EEE setting */
2029         if (hw->phy.media_type == e1000_media_type_copper) {
2030                 switch (mac->type) {
2031                 case e1000_i350:
2032                 case e1000_i210:
2033                 case e1000_i211:
2034                         e1000_set_eee_i350(hw);
2035                         break;
2036                 case e1000_i354:
2037                         e1000_set_eee_i354(hw);
2038                         break;
2039                 default:
2040                         break;
2041                 }
2042         }
2043
2044         if (!netif_running(adapter->netdev))
2045                 igb_power_down_link(adapter);
2046
2047         igb_update_mng_vlan(adapter);
2048
2049         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2050         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2051
2052
2053 #ifdef HAVE_PTP_1588_CLOCK
2054         /* Re-enable PTP, where applicable. */
2055         igb_ptp_reset(adapter);
2056 #endif /* HAVE_PTP_1588_CLOCK */
2057
2058         e1000_get_phy_info(hw);
2059
2060         adapter->devrc++;
2061 }
2062
2063 #ifdef HAVE_NDO_SET_FEATURES
2064 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2065                                               kni_netdev_features_t features)
2066 {
2067         /*
2068          * Since there is no support for separate tx vlan accel
2069          * enabled make sure tx flag is cleared if rx is.
2070          */
2071 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2072         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2073                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2074 #else
2075         if (!(features & NETIF_F_HW_VLAN_RX))
2076                 features &= ~NETIF_F_HW_VLAN_TX;
2077 #endif
2078
2079         /* If Rx checksum is disabled, then LRO should also be disabled */
2080         if (!(features & NETIF_F_RXCSUM))
2081                 features &= ~NETIF_F_LRO;
2082
2083         return features;
2084 }
2085
2086 static int igb_set_features(struct net_device *netdev,
2087                             kni_netdev_features_t features)
2088 {
2089         u32 changed = netdev->features ^ features;
2090
2091 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2092         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2093 #else
2094         if (changed & NETIF_F_HW_VLAN_RX)
2095 #endif
2096                 igb_vlan_mode(netdev, features);
2097
2098         return 0;
2099 }
2100
2101 #ifdef NTF_SELF
2102 #ifdef USE_CONST_DEV_UC_CHAR
2103 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2104                            struct net_device *dev,
2105                            const unsigned char *addr,
2106 #ifdef HAVE_NDO_FDB_ADD_VID
2107                            u16 vid,
2108 #endif
2109                            u16 flags)
2110 #else
2111 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2112                            struct net_device *dev,
2113                            unsigned char *addr,
2114                            u16 flags)
2115 #endif
2116 {
2117         struct igb_adapter *adapter = netdev_priv(dev);
2118         struct e1000_hw *hw = &adapter->hw;
2119         int err;
2120
2121         if (!(adapter->vfs_allocated_count))
2122                 return -EOPNOTSUPP;
2123
2124         /* Hardware does not support aging addresses so if a
2125          * ndm_state is given only allow permanent addresses
2126          */
2127         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2128                 pr_info("%s: FDB only supports static addresses\n",
2129                         igb_driver_name);
2130                 return -EINVAL;
2131         }
2132
2133         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2134                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2135                                         (adapter->vfs_allocated_count + 1);
2136
2137                 if (netdev_uc_count(dev) < rar_uc_entries)
2138                         err = dev_uc_add_excl(dev, addr);
2139                 else
2140                         err = -ENOMEM;
2141         } else if (is_multicast_ether_addr(addr)) {
2142                 err = dev_mc_add_excl(dev, addr);
2143         } else {
2144                 err = -EINVAL;
2145         }
2146
2147         /* Only return duplicate errors if NLM_F_EXCL is set */
2148         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2149                 err = 0;
2150
2151         return err;
2152 }
2153
2154 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2155 #ifdef USE_CONST_DEV_UC_CHAR
2156 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2157                            struct net_device *dev,
2158                            const unsigned char *addr)
2159 #else
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161                            struct net_device *dev,
2162                            unsigned char *addr)
2163 #endif
2164 {
2165         struct igb_adapter *adapter = netdev_priv(dev);
2166         int err = -EOPNOTSUPP;
2167
2168         if (ndm->ndm_state & NUD_PERMANENT) {
2169                 pr_info("%s: FDB only supports static addresses\n",
2170                         igb_driver_name);
2171                 return -EINVAL;
2172         }
2173
2174         if (adapter->vfs_allocated_count) {
2175                 if (is_unicast_ether_addr(addr))
2176                         err = dev_uc_del(dev, addr);
2177                 else if (is_multicast_ether_addr(addr))
2178                         err = dev_mc_del(dev, addr);
2179                 else
2180                         err = -EINVAL;
2181         }
2182
2183         return err;
2184 }
2185
2186 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2187                             struct netlink_callback *cb,
2188                             struct net_device *dev,
2189                             int idx)
2190 {
2191         struct igb_adapter *adapter = netdev_priv(dev);
2192
2193         if (adapter->vfs_allocated_count)
2194                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2195
2196         return idx;
2197 }
2198 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2199
2200 #ifdef HAVE_BRIDGE_ATTRIBS
2201 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2202 static int igb_ndo_bridge_setlink(struct net_device *dev,
2203                                   struct nlmsghdr *nlh,
2204                                   u16 flags)
2205 #else
2206 static int igb_ndo_bridge_setlink(struct net_device *dev,
2207                                   struct nlmsghdr *nlh)
2208 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2209 {
2210         struct igb_adapter *adapter = netdev_priv(dev);
2211         struct e1000_hw *hw = &adapter->hw;
2212         struct nlattr *attr, *br_spec;
2213         int rem;
2214
2215         if (!(adapter->vfs_allocated_count))
2216                 return -EOPNOTSUPP;
2217
2218         switch (adapter->hw.mac.type) {
2219         case e1000_82576:
2220         case e1000_i350:
2221         case e1000_i354:
2222                 break;
2223         default:
2224                 return -EOPNOTSUPP;
2225         }
2226
2227         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2228
2229         nla_for_each_nested(attr, br_spec, rem) {
2230                 __u16 mode;
2231
2232                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2233                         continue;
2234
2235                 mode = nla_get_u16(attr);
2236                 if (mode == BRIDGE_MODE_VEPA) {
2237                         e1000_vmdq_set_loopback_pf(hw, 0);
2238                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2239                 } else if (mode == BRIDGE_MODE_VEB) {
2240                         e1000_vmdq_set_loopback_pf(hw, 1);
2241                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2242                 } else
2243                         return -EINVAL;
2244
2245                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2246                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2247         }
2248
2249         return 0;
2250 }
2251
2252 #ifdef HAVE_BRIDGE_FILTER
2253 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2254                                   struct net_device *dev, u32 filter_mask)
2255 #else
2256 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2257                                   struct net_device *dev)
2258 #endif
2259 {
2260         struct igb_adapter *adapter = netdev_priv(dev);
2261         u16 mode;
2262
2263         if (!(adapter->vfs_allocated_count))
2264                 return -EOPNOTSUPP;
2265
2266         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2267                 mode = BRIDGE_MODE_VEB;
2268         else
2269                 mode = BRIDGE_MODE_VEPA;
2270
2271 #ifdef HAVE_NDO_FDB_ADD_VID
2272         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2273 #else
2274         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2275 #endif /* HAVE_NDO_FDB_ADD_VID */
2276 }
2277 #endif /* HAVE_BRIDGE_ATTRIBS */
2278 #endif /* NTF_SELF */
2279
2280 #endif /* HAVE_NDO_SET_FEATURES */
2281 #ifdef HAVE_NET_DEVICE_OPS
2282 static const struct net_device_ops igb_netdev_ops = {
2283         .ndo_open               = igb_open,
2284         .ndo_stop               = igb_close,
2285         .ndo_start_xmit         = igb_xmit_frame,
2286         .ndo_get_stats          = igb_get_stats,
2287         .ndo_set_rx_mode        = igb_set_rx_mode,
2288         .ndo_set_mac_address    = igb_set_mac,
2289         .ndo_change_mtu         = igb_change_mtu,
2290         .ndo_do_ioctl           = igb_ioctl,
2291         .ndo_tx_timeout         = igb_tx_timeout,
2292         .ndo_validate_addr      = eth_validate_addr,
2293         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2294         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2295 #ifdef IFLA_VF_MAX
2296         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2297         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2298 #ifdef HAVE_VF_MIN_MAX_TXRATE
2299         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2300 #else /* HAVE_VF_MIN_MAX_TXRATE */
2301         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2302 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2303         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2304 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2305         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2306 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2307 #endif /* IFLA_VF_MAX */
2308 #ifdef CONFIG_NET_POLL_CONTROLLER
2309         .ndo_poll_controller    = igb_netpoll,
2310 #endif
2311 #ifdef HAVE_NDO_SET_FEATURES
2312         .ndo_fix_features       = igb_fix_features,
2313         .ndo_set_features       = igb_set_features,
2314 #endif
2315 #ifdef HAVE_VLAN_RX_REGISTER
2316         .ndo_vlan_rx_register   = igb_vlan_mode,
2317 #endif
2318 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2319 #ifdef NTF_SELF
2320         .ndo_fdb_add            = igb_ndo_fdb_add,
2321 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2322         .ndo_fdb_del            = igb_ndo_fdb_del,
2323         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2324 #endif
2325 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2326 #ifdef HAVE_BRIDGE_ATTRIBS
2327         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2328         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2329 #endif /* HAVE_BRIDGE_ATTRIBS */
2330 #endif
2331 };
2332
2333 #ifdef CONFIG_IGB_VMDQ_NETDEV
2334 static const struct net_device_ops igb_vmdq_ops = {
2335         .ndo_open               = &igb_vmdq_open,
2336         .ndo_stop               = &igb_vmdq_close,
2337         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2338         .ndo_get_stats          = &igb_vmdq_get_stats,
2339         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2340         .ndo_validate_addr      = eth_validate_addr,
2341         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2342         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2343         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2344         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2345         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2346         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2347 };
2348
2349 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2350 #endif /* HAVE_NET_DEVICE_OPS */
2351 #ifdef CONFIG_IGB_VMDQ_NETDEV
2352 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2353 {
2354 #ifdef HAVE_NET_DEVICE_OPS
2355         vnetdev->netdev_ops = &igb_vmdq_ops;
2356 #else
2357         dev->open = &igb_vmdq_open;
2358         dev->stop = &igb_vmdq_close;
2359         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2360         dev->get_stats = &igb_vmdq_get_stats;
2361 #ifdef HAVE_SET_RX_MODE
2362         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2363 #endif
2364         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2365         dev->set_mac_address = &igb_vmdq_set_mac;
2366         dev->change_mtu = &igb_vmdq_change_mtu;
2367 #ifdef HAVE_TX_TIMEOUT
2368         dev->tx_timeout = &igb_vmdq_tx_timeout;
2369 #endif
2370 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2371         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2372         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2373         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2374 #endif
2375 #endif
2376         igb_vmdq_set_ethtool_ops(vnetdev);
2377         vnetdev->watchdog_timeo = 5 * HZ;
2378
2379 }
2380
2381 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2382 {
2383         int pool, err = 0, base_queue;
2384         struct net_device *vnetdev;
2385         struct igb_vmdq_adapter *vmdq_adapter;
2386
2387         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2388                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2389                 base_queue = pool * qpp;
2390                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2391                 if (!vnetdev) {
2392                         err = -ENOMEM;
2393                         break;
2394                 }
2395                 vmdq_adapter = netdev_priv(vnetdev);
2396                 vmdq_adapter->vnetdev = vnetdev;
2397                 vmdq_adapter->real_adapter = adapter;
2398                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2399                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2400                 igb_assign_vmdq_netdev_ops(vnetdev);
2401                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2402                          adapter->netdev->name, pool);
2403                 vnetdev->features = adapter->netdev->features;
2404 #ifdef HAVE_NETDEV_VLAN_FEATURES
2405                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2406 #endif
2407                 adapter->vmdq_netdev[pool-1] = vnetdev;
2408                 err = register_netdev(vnetdev);
2409                 if (err)
2410                         break;
2411         }
2412         return err;
2413 }
2414
2415 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2416 {
2417         int pool, err = 0;
2418
2419         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2420                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2421                 free_netdev(adapter->vmdq_netdev[pool-1]);
2422                 adapter->vmdq_netdev[pool-1] = NULL;
2423         }
2424         return err;
2425 }
2426 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2427
2428 /**
2429  * igb_set_fw_version - Configure version string for ethtool
2430  * @adapter: adapter struct
2431  *
2432  **/
2433 static void igb_set_fw_version(struct igb_adapter *adapter)
2434 {
2435         struct e1000_hw *hw = &adapter->hw;
2436         struct e1000_fw_version fw;
2437
2438         e1000_get_fw_version(hw, &fw);
2439
2440         switch (hw->mac.type) {
2441         case e1000_i210:
2442         case e1000_i211:
2443                 if (!(e1000_get_flash_presence_i210(hw))) {
2444                         snprintf(adapter->fw_version,
2445                             sizeof(adapter->fw_version),
2446                             "%2d.%2d-%d",
2447                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2448                         break;
2449                 }
2450                 /* fall through */
2451         default:
2452                 /* if option rom is valid, display its version too*/
2453                 if (fw.or_valid) {
2454                         snprintf(adapter->fw_version,
2455                             sizeof(adapter->fw_version),
2456                             "%d.%d, 0x%08x, %d.%d.%d",
2457                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2458                             fw.or_major, fw.or_build, fw.or_patch);
2459                 /* no option rom */
2460                 } else {
2461                         if (fw.etrack_id != 0X0000) {
2462                         snprintf(adapter->fw_version,
2463                             sizeof(adapter->fw_version),
2464                             "%d.%d, 0x%08x",
2465                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2466                         } else {
2467                         snprintf(adapter->fw_version,
2468                             sizeof(adapter->fw_version),
2469                             "%d.%d.%d",
2470                             fw.eep_major, fw.eep_minor, fw.eep_build);
2471                         }
2472                 }
2473                 break;
2474         }
2475
2476         return;
2477 }
2478
2479 /**
2480  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2481  *
2482  * @adapter: adapter struct
2483  **/
2484 static void igb_init_mas(struct igb_adapter *adapter)
2485 {
2486         struct e1000_hw *hw = &adapter->hw;
2487         u16 eeprom_data;
2488
2489         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2490         switch (hw->bus.func) {
2491         case E1000_FUNC_0:
2492                 if (eeprom_data & IGB_MAS_ENABLE_0)
2493                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2494                 break;
2495         case E1000_FUNC_1:
2496                 if (eeprom_data & IGB_MAS_ENABLE_1)
2497                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2498                 break;
2499         case E1000_FUNC_2:
2500                 if (eeprom_data & IGB_MAS_ENABLE_2)
2501                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2502                 break;
2503         case E1000_FUNC_3:
2504                 if (eeprom_data & IGB_MAS_ENABLE_3)
2505                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2506                 break;
2507         default:
2508                 /* Shouldn't get here */
2509                 dev_err(pci_dev_to_dev(adapter->pdev),
2510                         "%s:AMS: Invalid port configuration, returning\n",
2511                         adapter->netdev->name);
2512                 break;
2513         }
2514 }
2515
2516 /**
2517  * igb_probe - Device Initialization Routine
2518  * @pdev: PCI device information struct
2519  * @ent: entry in igb_pci_tbl
2520  *
2521  * Returns 0 on success, negative on failure
2522  *
2523  * igb_probe initializes an adapter identified by a pci_dev structure.
2524  * The OS initialization, configuring of the adapter private structure,
2525  * and a hardware reset occur.
2526  **/
2527 static int __devinit igb_probe(struct pci_dev *pdev,
2528                                const struct pci_device_id *ent)
2529 {
2530         struct net_device *netdev;
2531         struct igb_adapter *adapter;
2532         struct e1000_hw *hw;
2533         u16 eeprom_data = 0;
2534         u8 pba_str[E1000_PBANUM_LENGTH];
2535         s32 ret_val;
2536         static int global_quad_port_a; /* global quad port a indication */
2537         int i, err, pci_using_dac;
2538         static int cards_found;
2539
2540         err = pci_enable_device_mem(pdev);
2541         if (err)
2542                 return err;
2543
2544         pci_using_dac = 0;
2545         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2546         if (!err) {
2547                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2548                 if (!err)
2549                         pci_using_dac = 1;
2550         } else {
2551                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2552                 if (err) {
2553                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2554                         if (err) {
2555                                 IGB_ERR("No usable DMA configuration, "
2556                                         "aborting\n");
2557                                 goto err_dma;
2558                         }
2559                 }
2560         }
2561
2562 #ifndef HAVE_ASPM_QUIRKS
2563         /* 82575 requires that the pci-e link partner disable the L0s state */
2564         switch (pdev->device) {
2565         case E1000_DEV_ID_82575EB_COPPER:
2566         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2567         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2568                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2569         default:
2570                 break;
2571         }
2572
2573 #endif /* HAVE_ASPM_QUIRKS */
2574         err = pci_request_selected_regions(pdev,
2575                                            pci_select_bars(pdev,
2576                                                            IORESOURCE_MEM),
2577                                            igb_driver_name);
2578         if (err)
2579                 goto err_pci_reg;
2580
2581         pci_enable_pcie_error_reporting(pdev);
2582
2583         pci_set_master(pdev);
2584
2585         err = -ENOMEM;
2586 #ifdef HAVE_TX_MQ
2587         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2588                                    IGB_MAX_TX_QUEUES);
2589 #else
2590         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2591 #endif /* HAVE_TX_MQ */
2592         if (!netdev)
2593                 goto err_alloc_etherdev;
2594
2595         SET_MODULE_OWNER(netdev);
2596         SET_NETDEV_DEV(netdev, &pdev->dev);
2597
2598         pci_set_drvdata(pdev, netdev);
2599         adapter = netdev_priv(netdev);
2600         adapter->netdev = netdev;
2601         adapter->pdev = pdev;
2602         hw = &adapter->hw;
2603         hw->back = adapter;
2604         adapter->port_num = hw->bus.func;
2605         adapter->msg_enable = (1 << debug) - 1;
2606
2607 #ifdef HAVE_PCI_ERS
2608         err = pci_save_state(pdev);
2609         if (err)
2610                 goto err_ioremap;
2611 #endif
2612         err = -EIO;
2613         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2614                               pci_resource_len(pdev, 0));
2615         if (!hw->hw_addr)
2616                 goto err_ioremap;
2617
2618 #ifdef HAVE_NET_DEVICE_OPS
2619         netdev->netdev_ops = &igb_netdev_ops;
2620 #else /* HAVE_NET_DEVICE_OPS */
2621         netdev->open = &igb_open;
2622         netdev->stop = &igb_close;
2623         netdev->get_stats = &igb_get_stats;
2624 #ifdef HAVE_SET_RX_MODE
2625         netdev->set_rx_mode = &igb_set_rx_mode;
2626 #endif
2627         netdev->set_multicast_list = &igb_set_rx_mode;
2628         netdev->set_mac_address = &igb_set_mac;
2629         netdev->change_mtu = &igb_change_mtu;
2630         netdev->do_ioctl = &igb_ioctl;
2631 #ifdef HAVE_TX_TIMEOUT
2632         netdev->tx_timeout = &igb_tx_timeout;
2633 #endif
2634         netdev->vlan_rx_register = igb_vlan_mode;
2635         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2636         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2637 #ifdef CONFIG_NET_POLL_CONTROLLER
2638         netdev->poll_controller = igb_netpoll;
2639 #endif
2640         netdev->hard_start_xmit = &igb_xmit_frame;
2641 #endif /* HAVE_NET_DEVICE_OPS */
2642         igb_set_ethtool_ops(netdev);
2643 #ifdef HAVE_TX_TIMEOUT
2644         netdev->watchdog_timeo = 5 * HZ;
2645 #endif
2646
2647         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2648
2649         adapter->bd_number = cards_found;
2650
2651         /* setup the private structure */
2652         err = igb_sw_init(adapter);
2653         if (err)
2654                 goto err_sw_init;
2655
2656         e1000_get_bus_info(hw);
2657
2658         hw->phy.autoneg_wait_to_complete = FALSE;
2659         hw->mac.adaptive_ifs = FALSE;
2660
2661         /* Copper options */
2662         if (hw->phy.media_type == e1000_media_type_copper) {
2663                 hw->phy.mdix = AUTO_ALL_MODES;
2664                 hw->phy.disable_polarity_correction = FALSE;
2665                 hw->phy.ms_type = e1000_ms_hw_default;
2666         }
2667
2668         if (e1000_check_reset_block(hw))
2669                 dev_info(pci_dev_to_dev(pdev),
2670                         "PHY reset is blocked due to SOL/IDER session.\n");
2671
2672         /*
2673          * features is initialized to 0 in allocation, it might have bits
2674          * set by igb_sw_init so we should use an or instead of an
2675          * assignment.
2676          */
2677         netdev->features |= NETIF_F_SG |
2678                             NETIF_F_IP_CSUM |
2679 #ifdef NETIF_F_IPV6_CSUM
2680                             NETIF_F_IPV6_CSUM |
2681 #endif
2682 #ifdef NETIF_F_TSO
2683                             NETIF_F_TSO |
2684 #ifdef NETIF_F_TSO6
2685                             NETIF_F_TSO6 |
2686 #endif
2687 #endif /* NETIF_F_TSO */
2688 #ifdef NETIF_F_RXHASH
2689                             NETIF_F_RXHASH |
2690 #endif
2691                             NETIF_F_RXCSUM |
2692 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2693                             NETIF_F_HW_VLAN_CTAG_RX |
2694                             NETIF_F_HW_VLAN_CTAG_TX;
2695 #else
2696                             NETIF_F_HW_VLAN_RX |
2697                             NETIF_F_HW_VLAN_TX;
2698 #endif
2699
2700         if (hw->mac.type >= e1000_82576)
2701                 netdev->features |= NETIF_F_SCTP_CSUM;
2702
2703 #ifdef HAVE_NDO_SET_FEATURES
2704         /* copy netdev features into list of user selectable features */
2705         netdev->hw_features |= netdev->features;
2706 #ifndef IGB_NO_LRO
2707
2708         /* give us the option of enabling LRO later */
2709         netdev->hw_features |= NETIF_F_LRO;
2710 #endif
2711 #else
2712 #ifdef NETIF_F_GRO
2713
2714         /* this is only needed on kernels prior to 2.6.39 */
2715         netdev->features |= NETIF_F_GRO;
2716 #endif
2717 #endif
2718
2719         /* set this bit last since it cannot be part of hw_features */
2720 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2721         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2722 #else
2723         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2724 #endif
2725
2726 #ifdef HAVE_NETDEV_VLAN_FEATURES
2727         netdev->vlan_features |= NETIF_F_TSO |
2728                                  NETIF_F_TSO6 |
2729                                  NETIF_F_IP_CSUM |
2730                                  NETIF_F_IPV6_CSUM |
2731                                  NETIF_F_SG;
2732
2733 #endif
2734         if (pci_using_dac)
2735                 netdev->features |= NETIF_F_HIGHDMA;
2736
2737         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2738 #ifdef DEBUG
2739         if (adapter->dmac != IGB_DMAC_DISABLE)
2740                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2741 #endif
2742
2743         /* before reading the NVM, reset the controller to put the device in a
2744          * known good starting state */
2745         e1000_reset_hw(hw);
2746
2747         /* make sure the NVM is good */
2748         if (e1000_validate_nvm_checksum(hw) < 0) {
2749                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2750                         " Valid\n");
2751                 err = -EIO;
2752                 goto err_eeprom;
2753         }
2754
2755         /* copy the MAC address out of the NVM */
2756         if (e1000_read_mac_addr(hw))
2757                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2758         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2759 #ifdef ETHTOOL_GPERMADDR
2760         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2761
2762         if (!is_valid_ether_addr(netdev->perm_addr)) {
2763 #else
2764         if (!is_valid_ether_addr(netdev->dev_addr)) {
2765 #endif
2766                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2767                 err = -EIO;
2768                 goto err_eeprom;
2769         }
2770
2771         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2772         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2773         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2774         igb_rar_set(adapter, 0);
2775
2776         /* get firmware version for ethtool -i */
2777         igb_set_fw_version(adapter);
2778
2779         /* Check if Media Autosense is enabled */
2780         if (hw->mac.type == e1000_82580)
2781                 igb_init_mas(adapter);
2782         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2783                     (unsigned long) adapter);
2784         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2785                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2786                             (unsigned long) adapter);
2787         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2788                     (unsigned long) adapter);
2789
2790         INIT_WORK(&adapter->reset_task, igb_reset_task);
2791         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2792         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2793                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2794
2795         /* Initialize link properties that are user-changeable */
2796         adapter->fc_autoneg = true;
2797         hw->mac.autoneg = true;
2798         hw->phy.autoneg_advertised = 0x2f;
2799
2800         hw->fc.requested_mode = e1000_fc_default;
2801         hw->fc.current_mode = e1000_fc_default;
2802
2803         e1000_validate_mdi_setting(hw);
2804
2805         /* By default, support wake on port A */
2806         if (hw->bus.func == 0)
2807                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2808
2809         /* Check the NVM for wake support for non-port A ports */
2810         if (hw->mac.type >= e1000_82580)
2811                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2812                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2813                                  &eeprom_data);
2814         else if (hw->bus.func == 1)
2815                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2816
2817         if (eeprom_data & IGB_EEPROM_APME)
2818                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2819
2820         /* now that we have the eeprom settings, apply the special cases where
2821          * the eeprom may be wrong or the board simply won't support wake on
2822          * lan on a particular port */
2823         switch (pdev->device) {
2824         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2825                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2826                 break;
2827         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2828         case E1000_DEV_ID_82576_FIBER:
2829         case E1000_DEV_ID_82576_SERDES:
2830                 /* Wake events only supported on port A for dual fiber
2831                  * regardless of eeprom setting */
2832                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2833                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2834                 break;
2835         case E1000_DEV_ID_82576_QUAD_COPPER:
2836         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2837                 /* if quad port adapter, disable WoL on all but port A */
2838                 if (global_quad_port_a != 0)
2839                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2840                 else
2841                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2842                 /* Reset for multiple quad port adapters */
2843                 if (++global_quad_port_a == 4)
2844                         global_quad_port_a = 0;
2845                 break;
2846         default:
2847                 /* If the device can't wake, don't set software support */
2848                 if (!device_can_wakeup(&adapter->pdev->dev))
2849                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2850                 break;
2851         }
2852
2853         /* initialize the wol settings based on the eeprom settings */
2854         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2855                 adapter->wol |= E1000_WUFC_MAG;
2856
2857         /* Some vendors want WoL disabled by default, but still supported */
2858         if ((hw->mac.type == e1000_i350) &&
2859             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2860                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2861                 adapter->wol = 0;
2862         }
2863
2864         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2865                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2866
2867         /* reset the hardware with the new settings */
2868         igb_reset(adapter);
2869         adapter->devrc = 0;
2870
2871 #ifdef HAVE_I2C_SUPPORT
2872         /* Init the I2C interface */
2873         err = igb_init_i2c(adapter);
2874         if (err) {
2875                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2876                 goto err_eeprom;
2877         }
2878 #endif /* HAVE_I2C_SUPPORT */
2879
2880         /* let the f/w know that the h/w is now under the control of the
2881          * driver. */
2882         igb_get_hw_control(adapter);
2883
2884         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2885         err = register_netdev(netdev);
2886         if (err)
2887                 goto err_register;
2888
2889 #ifdef CONFIG_IGB_VMDQ_NETDEV
2890         err = igb_init_vmdq_netdevs(adapter);
2891         if (err)
2892                 goto err_register;
2893 #endif
2894         /* carrier off reporting is important to ethtool even BEFORE open */
2895         netif_carrier_off(netdev);
2896
2897 #ifdef IGB_DCA
2898         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2899                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2900                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2901                 igb_setup_dca(adapter);
2902         }
2903
2904 #endif
2905 #ifdef HAVE_PTP_1588_CLOCK
2906         /* do hw tstamp init after resetting */
2907         igb_ptp_init(adapter);
2908 #endif /* HAVE_PTP_1588_CLOCK */
2909
2910         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2911         /* print bus type/speed/width info */
2912         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2913                  netdev->name,
2914                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2915                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2916                   (hw->mac.type == e1000_i354) ? "integrated" :
2917                                                             "unknown"),
2918                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2919                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2920                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2921                   (hw->mac.type == e1000_i354) ? "integrated" :
2922                    "unknown"));
2923         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2924         for (i = 0; i < 6; i++)
2925                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2926
2927         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2928         if (ret_val)
2929                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2930         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2931                  pba_str);
2932
2933
2934         /* Initialize the thermal sensor on i350 devices. */
2935         if (hw->mac.type == e1000_i350) {
2936                 if (hw->bus.func == 0) {
2937                         u16 ets_word;
2938
2939                         /*
2940                          * Read the NVM to determine if this i350 device
2941                          * supports an external thermal sensor.
2942                          */
2943                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2944                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2945                                 adapter->ets = true;
2946                         else
2947                                 adapter->ets = false;
2948                 }
2949 #ifdef IGB_HWMON
2950
2951                 igb_sysfs_init(adapter);
2952 #else
2953 #ifdef IGB_PROCFS
2954
2955                 igb_procfs_init(adapter);
2956 #endif /* IGB_PROCFS */
2957 #endif /* IGB_HWMON */
2958         } else {
2959                 adapter->ets = false;
2960         }
2961
2962         if (hw->phy.media_type == e1000_media_type_copper) {
2963                 switch (hw->mac.type) {
2964                 case e1000_i350:
2965                 case e1000_i210:
2966                 case e1000_i211:
2967                         /* Enable EEE for internal copper PHY devices */
2968                         err = e1000_set_eee_i350(hw);
2969                         if ((!err) &&
2970                             (adapter->flags & IGB_FLAG_EEE))
2971                                 adapter->eee_advert =
2972                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2973                         break;
2974                 case e1000_i354:
2975                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2976                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2977                                 err = e1000_set_eee_i354(hw);
2978                                 if ((!err) &&
2979                                     (adapter->flags & IGB_FLAG_EEE))
2980                                         adapter->eee_advert =
2981                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
2982                         }
2983                         break;
2984                 default:
2985                         break;
2986                 }
2987         }
2988
2989         /* send driver version info to firmware */
2990         if (hw->mac.type >= e1000_i350)
2991                 igb_init_fw(adapter);
2992
2993 #ifndef IGB_NO_LRO
2994         if (netdev->features & NETIF_F_LRO)
2995                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
2996         else
2997                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
2998 #endif
2999         dev_info(pci_dev_to_dev(pdev),
3000                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3001                  adapter->msix_entries ? "MSI-X" :
3002                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3003                  adapter->num_rx_queues, adapter->num_tx_queues);
3004
3005         cards_found++;
3006
3007         pm_runtime_put_noidle(&pdev->dev);
3008         return 0;
3009
3010 err_register:
3011         igb_release_hw_control(adapter);
3012 #ifdef HAVE_I2C_SUPPORT
3013         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3014 #endif /* HAVE_I2C_SUPPORT */
3015 err_eeprom:
3016         if (!e1000_check_reset_block(hw))
3017                 e1000_phy_hw_reset(hw);
3018
3019         if (hw->flash_address)
3020                 iounmap(hw->flash_address);
3021 err_sw_init:
3022         igb_clear_interrupt_scheme(adapter);
3023         igb_reset_sriov_capability(adapter);
3024         iounmap(hw->hw_addr);
3025 err_ioremap:
3026         free_netdev(netdev);
3027 err_alloc_etherdev:
3028         pci_release_selected_regions(pdev,
3029                                      pci_select_bars(pdev, IORESOURCE_MEM));
3030 err_pci_reg:
3031 err_dma:
3032         pci_disable_device(pdev);
3033         return err;
3034 }
3035 #ifdef HAVE_I2C_SUPPORT
3036 /*
3037  *  igb_remove_i2c - Cleanup  I2C interface
3038  *  @adapter: pointer to adapter structure
3039  *
3040  */
3041 static void igb_remove_i2c(struct igb_adapter *adapter)
3042 {
3043
3044         /* free the adapter bus structure */
3045         i2c_del_adapter(&adapter->i2c_adap);
3046 }
3047 #endif /* HAVE_I2C_SUPPORT */
3048
3049 /**
3050  * igb_remove - Device Removal Routine
3051  * @pdev: PCI device information struct
3052  *
3053  * igb_remove is called by the PCI subsystem to alert the driver
3054  * that it should release a PCI device.  The could be caused by a
3055  * Hot-Plug event, or because the driver is going to be removed from
3056  * memory.
3057  **/
3058 static void __devexit igb_remove(struct pci_dev *pdev)
3059 {
3060         struct net_device *netdev = pci_get_drvdata(pdev);
3061         struct igb_adapter *adapter = netdev_priv(netdev);
3062         struct e1000_hw *hw = &adapter->hw;
3063
3064         pm_runtime_get_noresume(&pdev->dev);
3065 #ifdef HAVE_I2C_SUPPORT
3066         igb_remove_i2c(adapter);
3067 #endif /* HAVE_I2C_SUPPORT */
3068 #ifdef HAVE_PTP_1588_CLOCK
3069         igb_ptp_stop(adapter);
3070 #endif /* HAVE_PTP_1588_CLOCK */
3071
3072         /* flush_scheduled work may reschedule our watchdog task, so
3073          * explicitly disable watchdog tasks from being rescheduled  */
3074         set_bit(__IGB_DOWN, &adapter->state);
3075         del_timer_sync(&adapter->watchdog_timer);
3076         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3077                 del_timer_sync(&adapter->dma_err_timer);
3078         del_timer_sync(&adapter->phy_info_timer);
3079
3080         flush_scheduled_work();
3081
3082 #ifdef IGB_DCA
3083         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3084                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3085                 dca_remove_requester(&pdev->dev);
3086                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3087                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3088         }
3089 #endif
3090
3091         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3092          * would have already happened in close and is redundant. */
3093         igb_release_hw_control(adapter);
3094
3095         unregister_netdev(netdev);
3096 #ifdef CONFIG_IGB_VMDQ_NETDEV
3097         igb_remove_vmdq_netdevs(adapter);
3098 #endif
3099
3100         igb_clear_interrupt_scheme(adapter);
3101         igb_reset_sriov_capability(adapter);
3102
3103         iounmap(hw->hw_addr);
3104         if (hw->flash_address)
3105                 iounmap(hw->flash_address);
3106         pci_release_selected_regions(pdev,
3107                                      pci_select_bars(pdev, IORESOURCE_MEM));
3108
3109 #ifdef IGB_HWMON
3110         igb_sysfs_exit(adapter);
3111 #else
3112 #ifdef IGB_PROCFS
3113         igb_procfs_exit(adapter);
3114 #endif /* IGB_PROCFS */
3115 #endif /* IGB_HWMON */
3116         kfree(adapter->mac_table);
3117         kfree(adapter->shadow_vfta);
3118         free_netdev(netdev);
3119
3120         pci_disable_pcie_error_reporting(pdev);
3121
3122         pci_disable_device(pdev);
3123 }
3124
3125 /**
3126  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3127  * @adapter: board private structure to initialize
3128  *
3129  * igb_sw_init initializes the Adapter private data structure.
3130  * Fields are initialized based on PCI device information and
3131  * OS network device settings (MTU size).
3132  **/
3133 static int igb_sw_init(struct igb_adapter *adapter)
3134 {
3135         struct e1000_hw *hw = &adapter->hw;
3136         struct net_device *netdev = adapter->netdev;
3137         struct pci_dev *pdev = adapter->pdev;
3138
3139         /* PCI config space info */
3140
3141         hw->vendor_id = pdev->vendor;
3142         hw->device_id = pdev->device;
3143         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3144         hw->subsystem_device_id = pdev->subsystem_device;
3145
3146         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3147
3148         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3149
3150         /* set default ring sizes */
3151         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3152         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3153
3154         /* set default work limits */
3155         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3156
3157         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3158                                               VLAN_HLEN;
3159
3160         /* Initialize the hardware-specific values */
3161         if (e1000_setup_init_funcs(hw, TRUE)) {
3162                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3163                 return -EIO;
3164         }
3165
3166         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3167                                      hw->mac.rar_entry_count,
3168                                      GFP_ATOMIC);
3169
3170         /* Setup and initialize a copy of the hw vlan table array */
3171         adapter->shadow_vfta = (u32 *)kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3172                                         GFP_ATOMIC);
3173 #ifdef NO_KNI
3174         /* These calls may decrease the number of queues */
3175         if (hw->mac.type < e1000_i210) {
3176                 igb_set_sriov_capability(adapter);
3177         }
3178
3179         if (igb_init_interrupt_scheme(adapter, true)) {
3180                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3181                 return -ENOMEM;
3182         }
3183
3184         /* Explicitly disable IRQ since the NIC can be in any state. */
3185         igb_irq_disable(adapter);
3186
3187         set_bit(__IGB_DOWN, &adapter->state);
3188 #endif
3189         return 0;
3190 }
3191
3192 /**
3193  * igb_open - Called when a network interface is made active
3194  * @netdev: network interface device structure
3195  *
3196  * Returns 0 on success, negative value on failure
3197  *
3198  * The open entry point is called when a network interface is made
3199  * active by the system (IFF_UP).  At this point all resources needed
3200  * for transmit and receive operations are allocated, the interrupt
3201  * handler is registered with the OS, the watchdog timer is started,
3202  * and the stack is notified that the interface is ready.
3203  **/
3204 static int __igb_open(struct net_device *netdev, bool resuming)
3205 {
3206         struct igb_adapter *adapter = netdev_priv(netdev);
3207         struct e1000_hw *hw = &adapter->hw;
3208 #ifdef CONFIG_PM_RUNTIME
3209         struct pci_dev *pdev = adapter->pdev;
3210 #endif /* CONFIG_PM_RUNTIME */
3211         int err;
3212         int i;
3213
3214         /* disallow open during test */
3215         if (test_bit(__IGB_TESTING, &adapter->state)) {
3216                 WARN_ON(resuming);
3217                 return -EBUSY;
3218         }
3219
3220 #ifdef CONFIG_PM_RUNTIME
3221         if (!resuming)
3222                 pm_runtime_get_sync(&pdev->dev);
3223 #endif /* CONFIG_PM_RUNTIME */
3224
3225         netif_carrier_off(netdev);
3226
3227         /* allocate transmit descriptors */
3228         err = igb_setup_all_tx_resources(adapter);
3229         if (err)
3230                 goto err_setup_tx;
3231
3232         /* allocate receive descriptors */
3233         err = igb_setup_all_rx_resources(adapter);
3234         if (err)
3235                 goto err_setup_rx;
3236
3237         igb_power_up_link(adapter);
3238
3239         /* before we allocate an interrupt, we must be ready to handle it.
3240          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3241          * as soon as we call pci_request_irq, so we have to setup our
3242          * clean_rx handler before we do so.  */
3243         igb_configure(adapter);
3244
3245         err = igb_request_irq(adapter);
3246         if (err)
3247                 goto err_req_irq;
3248
3249         /* Notify the stack of the actual queue counts. */
3250         netif_set_real_num_tx_queues(netdev,
3251                                      adapter->vmdq_pools ? 1 :
3252                                      adapter->num_tx_queues);
3253
3254         err = netif_set_real_num_rx_queues(netdev,
3255                                            adapter->vmdq_pools ? 1 :
3256                                            adapter->num_rx_queues);
3257         if (err)
3258                 goto err_set_queues;
3259
3260         /* From here on the code is the same as igb_up() */
3261         clear_bit(__IGB_DOWN, &adapter->state);
3262
3263         for (i = 0; i < adapter->num_q_vectors; i++)
3264                 napi_enable(&(adapter->q_vector[i]->napi));
3265         igb_configure_lli(adapter);
3266
3267         /* Clear any pending interrupts. */
3268         E1000_READ_REG(hw, E1000_ICR);
3269
3270         igb_irq_enable(adapter);
3271
3272         /* notify VFs that reset has been completed */
3273         if (adapter->vfs_allocated_count) {
3274                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3275                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3276                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3277         }
3278
3279         netif_tx_start_all_queues(netdev);
3280
3281         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3282                 schedule_work(&adapter->dma_err_task);
3283
3284         /* start the watchdog. */
3285         hw->mac.get_link_status = 1;
3286         schedule_work(&adapter->watchdog_task);
3287
3288         return E1000_SUCCESS;
3289
3290 err_set_queues:
3291         igb_free_irq(adapter);
3292 err_req_irq:
3293         igb_release_hw_control(adapter);
3294         igb_power_down_link(adapter);
3295         igb_free_all_rx_resources(adapter);
3296 err_setup_rx:
3297         igb_free_all_tx_resources(adapter);
3298 err_setup_tx:
3299         igb_reset(adapter);
3300
3301 #ifdef CONFIG_PM_RUNTIME
3302         if (!resuming)
3303                 pm_runtime_put(&pdev->dev);
3304 #endif /* CONFIG_PM_RUNTIME */
3305
3306         return err;
3307 }
3308
3309 static int igb_open(struct net_device *netdev)
3310 {
3311         return __igb_open(netdev, false);
3312 }
3313
3314 /**
3315  * igb_close - Disables a network interface
3316  * @netdev: network interface device structure
3317  *
3318  * Returns 0, this is not allowed to fail
3319  *
3320  * The close entry point is called when an interface is de-activated
3321  * by the OS.  The hardware is still under the driver's control, but
3322  * needs to be disabled.  A global MAC reset is issued to stop the
3323  * hardware, and all transmit and receive resources are freed.
3324  **/
3325 static int __igb_close(struct net_device *netdev, bool suspending)
3326 {
3327         struct igb_adapter *adapter = netdev_priv(netdev);
3328 #ifdef CONFIG_PM_RUNTIME
3329         struct pci_dev *pdev = adapter->pdev;
3330 #endif /* CONFIG_PM_RUNTIME */
3331
3332         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3333
3334 #ifdef CONFIG_PM_RUNTIME
3335         if (!suspending)
3336                 pm_runtime_get_sync(&pdev->dev);
3337 #endif /* CONFIG_PM_RUNTIME */
3338
3339         igb_down(adapter);
3340
3341         igb_release_hw_control(adapter);
3342
3343         igb_free_irq(adapter);
3344
3345         igb_free_all_tx_resources(adapter);
3346         igb_free_all_rx_resources(adapter);
3347
3348 #ifdef CONFIG_PM_RUNTIME
3349         if (!suspending)
3350                 pm_runtime_put_sync(&pdev->dev);
3351 #endif /* CONFIG_PM_RUNTIME */
3352
3353         return 0;
3354 }
3355
3356 static int igb_close(struct net_device *netdev)
3357 {
3358         return __igb_close(netdev, false);
3359 }
3360
3361 /**
3362  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3363  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3364  *
3365  * Return 0 on success, negative on failure
3366  **/
3367 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3368 {
3369         struct device *dev = tx_ring->dev;
3370         int size;
3371
3372         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3373         tx_ring->tx_buffer_info = vzalloc(size);
3374         if (!tx_ring->tx_buffer_info)
3375                 goto err;
3376
3377         /* round up to nearest 4K */
3378         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3379         tx_ring->size = ALIGN(tx_ring->size, 4096);
3380
3381         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3382                                            &tx_ring->dma, GFP_KERNEL);
3383
3384         if (!tx_ring->desc)
3385                 goto err;
3386
3387         tx_ring->next_to_use = 0;
3388         tx_ring->next_to_clean = 0;
3389
3390         return 0;
3391
3392 err:
3393         vfree(tx_ring->tx_buffer_info);
3394         dev_err(dev,
3395                 "Unable to allocate memory for the transmit descriptor ring\n");
3396         return -ENOMEM;
3397 }
3398
3399 /**
3400  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3401  *                                (Descriptors) for all queues
3402  * @adapter: board private structure
3403  *
3404  * Return 0 on success, negative on failure
3405  **/
3406 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3407 {
3408         struct pci_dev *pdev = adapter->pdev;
3409         int i, err = 0;
3410
3411         for (i = 0; i < adapter->num_tx_queues; i++) {
3412                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3413                 if (err) {
3414                         dev_err(pci_dev_to_dev(pdev),
3415                                 "Allocation for Tx Queue %u failed\n", i);
3416                         for (i--; i >= 0; i--)
3417                                 igb_free_tx_resources(adapter->tx_ring[i]);
3418                         break;
3419                 }
3420         }
3421
3422         return err;
3423 }
3424
3425 /**
3426  * igb_setup_tctl - configure the transmit control registers
3427  * @adapter: Board private structure
3428  **/
3429 void igb_setup_tctl(struct igb_adapter *adapter)
3430 {
3431         struct e1000_hw *hw = &adapter->hw;
3432         u32 tctl;
3433
3434         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3435         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3436
3437         /* Program the Transmit Control Register */
3438         tctl = E1000_READ_REG(hw, E1000_TCTL);
3439         tctl &= ~E1000_TCTL_CT;
3440         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3441                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3442
3443         e1000_config_collision_dist(hw);
3444
3445         /* Enable transmits */
3446         tctl |= E1000_TCTL_EN;
3447
3448         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3449 }
3450
3451 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3452 {
3453         struct e1000_hw *hw = &adapter->hw;
3454         switch (hw->mac.type) {
3455         case e1000_i354:
3456                 return 4;
3457         case e1000_82576:
3458                 if (adapter->msix_entries)
3459                         return 1;
3460         default:
3461                 break;
3462         }
3463
3464         return 16;
3465 }
3466
3467 /**
3468  * igb_configure_tx_ring - Configure transmit ring after Reset
3469  * @adapter: board private structure
3470  * @ring: tx ring to configure
3471  *
3472  * Configure a transmit ring after a reset.
3473  **/
3474 void igb_configure_tx_ring(struct igb_adapter *adapter,
3475                            struct igb_ring *ring)
3476 {
3477         struct e1000_hw *hw = &adapter->hw;
3478         u32 txdctl = 0;
3479         u64 tdba = ring->dma;
3480         int reg_idx = ring->reg_idx;
3481
3482         /* disable the queue */
3483         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3484         E1000_WRITE_FLUSH(hw);
3485         mdelay(10);
3486
3487         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3488                         ring->count * sizeof(union e1000_adv_tx_desc));
3489         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3490                         tdba & 0x00000000ffffffffULL);
3491         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3492
3493         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3494         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3495         writel(0, ring->tail);
3496
3497         txdctl |= IGB_TX_PTHRESH;
3498         txdctl |= IGB_TX_HTHRESH << 8;
3499         txdctl |= igb_tx_wthresh(adapter) << 16;
3500
3501         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3502         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3503 }
3504
3505 /**
3506  * igb_configure_tx - Configure transmit Unit after Reset
3507  * @adapter: board private structure
3508  *
3509  * Configure the Tx unit of the MAC after a reset.
3510  **/
3511 static void igb_configure_tx(struct igb_adapter *adapter)
3512 {
3513         int i;
3514
3515         for (i = 0; i < adapter->num_tx_queues; i++)
3516                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3517 }
3518
3519 /**
3520  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3521  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3522  *
3523  * Returns 0 on success, negative on failure
3524  **/
3525 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3526 {
3527         struct device *dev = rx_ring->dev;
3528         int size, desc_len;
3529
3530         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3531         rx_ring->rx_buffer_info = vzalloc(size);
3532         if (!rx_ring->rx_buffer_info)
3533                 goto err;
3534
3535         desc_len = sizeof(union e1000_adv_rx_desc);
3536
3537         /* Round up to nearest 4K */
3538         rx_ring->size = rx_ring->count * desc_len;
3539         rx_ring->size = ALIGN(rx_ring->size, 4096);
3540
3541         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3542                                            &rx_ring->dma, GFP_KERNEL);
3543
3544         if (!rx_ring->desc)
3545                 goto err;
3546
3547         rx_ring->next_to_alloc = 0;
3548         rx_ring->next_to_clean = 0;
3549         rx_ring->next_to_use = 0;
3550
3551         return 0;
3552
3553 err:
3554         vfree(rx_ring->rx_buffer_info);
3555         rx_ring->rx_buffer_info = NULL;
3556         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3557                 " ring\n");
3558         return -ENOMEM;
3559 }
3560
3561 /**
3562  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3563  *                                (Descriptors) for all queues
3564  * @adapter: board private structure
3565  *
3566  * Return 0 on success, negative on failure
3567  **/
3568 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3569 {
3570         struct pci_dev *pdev = adapter->pdev;
3571         int i, err = 0;
3572
3573         for (i = 0; i < adapter->num_rx_queues; i++) {
3574                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3575                 if (err) {
3576                         dev_err(pci_dev_to_dev(pdev),
3577                                 "Allocation for Rx Queue %u failed\n", i);
3578                         for (i--; i >= 0; i--)
3579                                 igb_free_rx_resources(adapter->rx_ring[i]);
3580                         break;
3581                 }
3582         }
3583
3584         return err;
3585 }
3586
3587 /**
3588  * igb_setup_mrqc - configure the multiple receive queue control registers
3589  * @adapter: Board private structure
3590  **/
3591 static void igb_setup_mrqc(struct igb_adapter *adapter)
3592 {
3593         struct e1000_hw *hw = &adapter->hw;
3594         u32 mrqc, rxcsum;
3595         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3596         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3597                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3598                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3599                                         0xFA01ACBE };
3600
3601         /* Fill out hash function seeds */
3602         for (j = 0; j < 10; j++)
3603                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3604
3605         num_rx_queues = adapter->rss_queues;
3606
3607         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3608         switch (hw->mac.type) {
3609         case e1000_82575:
3610                 if (adapter->vmdq_pools) {
3611                         shift = 2;
3612                         shift2 = 6;
3613                         break;
3614                 }
3615                 shift = 6;
3616                 break;
3617         case e1000_82576:
3618                 /* 82576 supports 2 RSS queues for SR-IOV */
3619                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3620                         shift = 3;
3621                         num_rx_queues = 2;
3622                 }
3623                 break;
3624         default:
3625                 break;
3626         }
3627
3628         /*
3629          * Populate the redirection table 4 entries at a time.  To do this
3630          * we are generating the results for n and n+2 and then interleaving
3631          * those with the results with n+1 and n+3.
3632          */
3633         for (j = 0; j < 32; j++) {
3634                 /* first pass generates n and n+2 */
3635                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3636                 u32 reta = (base & 0x07800780) >> (7 - shift);
3637
3638                 /* second pass generates n+1 and n+3 */
3639                 base += 0x00010001 * num_rx_queues;
3640                 reta |= (base & 0x07800780) << (1 + shift);
3641
3642                 /* generate 2nd table for 82575 based parts */
3643                 if (shift2)
3644                         reta |= (0x01010101 * num_rx_queues) << shift2;
3645
3646                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3647         }
3648
3649         /*
3650          * Disable raw packet checksumming so that RSS hash is placed in
3651          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3652          * offloads as they are enabled by default
3653          */
3654         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3655         rxcsum |= E1000_RXCSUM_PCSD;
3656
3657         if (adapter->hw.mac.type >= e1000_82576)
3658                 /* Enable Receive Checksum Offload for SCTP */
3659                 rxcsum |= E1000_RXCSUM_CRCOFL;
3660
3661         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3662         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3663
3664         /* Generate RSS hash based on packet types, TCP/UDP
3665          * port numbers and/or IPv4/v6 src and dst addresses
3666          */
3667         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3668                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3669                E1000_MRQC_RSS_FIELD_IPV6 |
3670                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3671                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3672
3673         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3674                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3675         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3676                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3677
3678         /* If VMDq is enabled then we set the appropriate mode for that, else
3679          * we default to RSS so that an RSS hash is calculated per packet even
3680          * if we are only using one queue */
3681         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3682                 if (hw->mac.type > e1000_82575) {
3683                         /* Set the default pool for the PF's first queue */
3684                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3685                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3686                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3687                         vtctl |= adapter->vfs_allocated_count <<
3688                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3689                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3690                 } else if (adapter->rss_queues > 1) {
3691                         /* set default queue for pool 1 to queue 2 */
3692                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3693                                         adapter->rss_queues << 7);
3694                 }
3695                 if (adapter->rss_queues > 1)
3696                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3697                 else
3698                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3699         } else {
3700                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3701         }
3702         igb_vmm_control(adapter);
3703
3704         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3705 }
3706
3707 /**
3708  * igb_setup_rctl - configure the receive control registers
3709  * @adapter: Board private structure
3710  **/
3711 void igb_setup_rctl(struct igb_adapter *adapter)
3712 {
3713         struct e1000_hw *hw = &adapter->hw;
3714         u32 rctl;
3715
3716         rctl = E1000_READ_REG(hw, E1000_RCTL);
3717
3718         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3719         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3720
3721         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3722                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3723
3724         /*
3725          * enable stripping of CRC. It's unlikely this will break BMC
3726          * redirection as it did with e1000. Newer features require
3727          * that the HW strips the CRC.
3728          */
3729         rctl |= E1000_RCTL_SECRC;
3730
3731         /* disable store bad packets and clear size bits. */
3732         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3733
3734         /* enable LPE to prevent packets larger than max_frame_size */
3735         rctl |= E1000_RCTL_LPE;
3736
3737         /* disable queue 0 to prevent tail write w/o re-config */
3738         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3739
3740         /* Attention!!!  For SR-IOV PF driver operations you must enable
3741          * queue drop for all VF and PF queues to prevent head of line blocking
3742          * if an un-trusted VF does not provide descriptors to hardware.
3743          */
3744         if (adapter->vfs_allocated_count) {
3745                 /* set all queue drop enable bits */
3746                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3747         }
3748
3749         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3750 }
3751
3752 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3753                                    int vfn)
3754 {
3755         struct e1000_hw *hw = &adapter->hw;
3756         u32 vmolr;
3757
3758         /* if it isn't the PF check to see if VFs are enabled and
3759          * increase the size to support vlan tags */
3760         if (vfn < adapter->vfs_allocated_count &&
3761             adapter->vf_data[vfn].vlans_enabled)
3762                 size += VLAN_HLEN;
3763
3764 #ifdef CONFIG_IGB_VMDQ_NETDEV
3765         if (vfn >= adapter->vfs_allocated_count) {
3766                 int queue = vfn - adapter->vfs_allocated_count;
3767                 struct igb_vmdq_adapter *vadapter;
3768
3769                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3770                 if (vadapter->vlgrp)
3771                         size += VLAN_HLEN;
3772         }
3773 #endif
3774         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3775         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3776         vmolr |= size | E1000_VMOLR_LPE;
3777         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3778
3779         return 0;
3780 }
3781
3782 /**
3783  * igb_rlpml_set - set maximum receive packet size
3784  * @adapter: board private structure
3785  *
3786  * Configure maximum receivable packet size.
3787  **/
3788 static void igb_rlpml_set(struct igb_adapter *adapter)
3789 {
3790         u32 max_frame_size = adapter->max_frame_size;
3791         struct e1000_hw *hw = &adapter->hw;
3792         u16 pf_id = adapter->vfs_allocated_count;
3793
3794         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3795                 int i;
3796                 for (i = 0; i < adapter->vmdq_pools; i++)
3797                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3798                 /*
3799                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3800                  * to our max jumbo frame size, in case we need to enable
3801                  * jumbo frames on one of the rings later.
3802                  * This will not pass over-length frames into the default
3803                  * queue because it's gated by the VMOLR.RLPML.
3804                  */
3805                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3806         }
3807         /* Set VF RLPML for the PF device. */
3808         if (adapter->vfs_allocated_count)
3809                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3810
3811         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3812 }
3813
3814 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3815                                         int vfn, bool enable)
3816 {
3817         struct e1000_hw *hw = &adapter->hw;
3818         u32 val;
3819         void __iomem *reg;
3820
3821         if (hw->mac.type < e1000_82576)
3822                 return;
3823
3824         if (hw->mac.type == e1000_i350)
3825                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3826         else
3827                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3828
3829         val = readl(reg);
3830         if (enable)
3831                 val |= E1000_VMOLR_STRVLAN;
3832         else
3833                 val &= ~(E1000_VMOLR_STRVLAN);
3834         writel(val, reg);
3835 }
3836 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3837                                  int vfn, bool aupe)
3838 {
3839         struct e1000_hw *hw = &adapter->hw;
3840         u32 vmolr;
3841
3842         /*
3843          * This register exists only on 82576 and newer so if we are older then
3844          * we should exit and do nothing
3845          */
3846         if (hw->mac.type < e1000_82576)
3847                 return;
3848
3849         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3850
3851         if (aupe)
3852                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3853         else
3854                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3855
3856         /* clear all bits that might not be set */
3857         vmolr &= ~E1000_VMOLR_RSSE;
3858
3859         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3860                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3861
3862         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3863         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3864
3865         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3866 }
3867
3868 /**
3869  * igb_configure_rx_ring - Configure a receive ring after Reset
3870  * @adapter: board private structure
3871  * @ring: receive ring to be configured
3872  *
3873  * Configure the Rx unit of the MAC after a reset.
3874  **/
3875 void igb_configure_rx_ring(struct igb_adapter *adapter,
3876                            struct igb_ring *ring)
3877 {
3878         struct e1000_hw *hw = &adapter->hw;
3879         u64 rdba = ring->dma;
3880         int reg_idx = ring->reg_idx;
3881         u32 srrctl = 0, rxdctl = 0;
3882
3883 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3884         /*
3885          * RLPML prevents us from receiving a frame larger than max_frame so
3886          * it is safe to just set the rx_buffer_len to max_frame without the
3887          * risk of an skb over panic.
3888          */
3889         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3890                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3891
3892 #endif
3893         /* disable the queue */
3894         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3895
3896         /* Set DMA base address registers */
3897         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3898                         rdba & 0x00000000ffffffffULL);
3899         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3900         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3901                        ring->count * sizeof(union e1000_adv_rx_desc));
3902
3903         /* initialize head and tail */
3904         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3905         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3906         writel(0, ring->tail);
3907
3908         /* reset next-to- use/clean to place SW in sync with hardwdare */
3909         ring->next_to_clean = 0;
3910         ring->next_to_use = 0;
3911 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3912         ring->next_to_alloc = 0;
3913
3914 #endif
3915         /* set descriptor configuration */
3916 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3917         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3918         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3919 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3920         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3921                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3922 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3923         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3924 #ifdef HAVE_PTP_1588_CLOCK
3925         if (hw->mac.type >= e1000_82580)
3926                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3927 #endif /* HAVE_PTP_1588_CLOCK */
3928         /*
3929          * We should set the drop enable bit if:
3930          *  SR-IOV is enabled
3931          *   or
3932          *  Flow Control is disabled and number of RX queues > 1
3933          *
3934          *  This allows us to avoid head of line blocking for security
3935          *  and performance reasons.
3936          */
3937         if (adapter->vfs_allocated_count ||
3938             (adapter->num_rx_queues > 1 &&
3939              (hw->fc.requested_mode == e1000_fc_none ||
3940               hw->fc.requested_mode == e1000_fc_rx_pause)))
3941                 srrctl |= E1000_SRRCTL_DROP_EN;
3942
3943         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3944
3945         /* set filtering for VMDQ pools */
3946         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3947
3948         rxdctl |= IGB_RX_PTHRESH;
3949         rxdctl |= IGB_RX_HTHRESH << 8;
3950         rxdctl |= IGB_RX_WTHRESH << 16;
3951
3952         /* enable receive descriptor fetching */
3953         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3954         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3955 }
3956
3957 /**
3958  * igb_configure_rx - Configure receive Unit after Reset
3959  * @adapter: board private structure
3960  *
3961  * Configure the Rx unit of the MAC after a reset.
3962  **/
3963 static void igb_configure_rx(struct igb_adapter *adapter)
3964 {
3965         int i;
3966
3967         /* set UTA to appropriate mode */
3968         igb_set_uta(adapter);
3969
3970         igb_full_sync_mac_table(adapter);
3971         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3972          * the Base and Length of the Rx Descriptor Ring */
3973         for (i = 0; i < adapter->num_rx_queues; i++)
3974                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3975 }
3976
3977 /**
3978  * igb_free_tx_resources - Free Tx Resources per Queue
3979  * @tx_ring: Tx descriptor ring for a specific queue
3980  *
3981  * Free all transmit software resources
3982  **/
3983 void igb_free_tx_resources(struct igb_ring *tx_ring)
3984 {
3985         igb_clean_tx_ring(tx_ring);
3986
3987         vfree(tx_ring->tx_buffer_info);
3988         tx_ring->tx_buffer_info = NULL;
3989
3990         /* if not set, then don't free */
3991         if (!tx_ring->desc)
3992                 return;
3993
3994         dma_free_coherent(tx_ring->dev, tx_ring->size,
3995                           tx_ring->desc, tx_ring->dma);
3996
3997         tx_ring->desc = NULL;
3998 }
3999
4000 /**
4001  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4002  * @adapter: board private structure
4003  *
4004  * Free all transmit software resources
4005  **/
4006 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4007 {
4008         int i;
4009
4010         for (i = 0; i < adapter->num_tx_queues; i++)
4011                 igb_free_tx_resources(adapter->tx_ring[i]);
4012 }
4013
4014 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4015                                     struct igb_tx_buffer *tx_buffer)
4016 {
4017         if (tx_buffer->skb) {
4018                 dev_kfree_skb_any(tx_buffer->skb);
4019                 if (dma_unmap_len(tx_buffer, len))
4020                         dma_unmap_single(ring->dev,
4021                                          dma_unmap_addr(tx_buffer, dma),
4022                                          dma_unmap_len(tx_buffer, len),
4023                                          DMA_TO_DEVICE);
4024         } else if (dma_unmap_len(tx_buffer, len)) {
4025                 dma_unmap_page(ring->dev,
4026                                dma_unmap_addr(tx_buffer, dma),
4027                                dma_unmap_len(tx_buffer, len),
4028                                DMA_TO_DEVICE);
4029         }
4030         tx_buffer->next_to_watch = NULL;
4031         tx_buffer->skb = NULL;
4032         dma_unmap_len_set(tx_buffer, len, 0);
4033         /* buffer_info must be completely set up in the transmit path */
4034 }
4035
4036 /**
4037  * igb_clean_tx_ring - Free Tx Buffers
4038  * @tx_ring: ring to be cleaned
4039  **/
4040 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4041 {
4042         struct igb_tx_buffer *buffer_info;
4043         unsigned long size;
4044         u16 i;
4045
4046         if (!tx_ring->tx_buffer_info)
4047                 return;
4048         /* Free all the Tx ring sk_buffs */
4049
4050         for (i = 0; i < tx_ring->count; i++) {
4051                 buffer_info = &tx_ring->tx_buffer_info[i];
4052                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4053         }
4054
4055         netdev_tx_reset_queue(txring_txq(tx_ring));
4056
4057         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4058         memset(tx_ring->tx_buffer_info, 0, size);
4059
4060         /* Zero out the descriptor ring */
4061         memset(tx_ring->desc, 0, tx_ring->size);
4062
4063         tx_ring->next_to_use = 0;
4064         tx_ring->next_to_clean = 0;
4065 }
4066
4067 /**
4068  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4069  * @adapter: board private structure
4070  **/
4071 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4072 {
4073         int i;
4074
4075         for (i = 0; i < adapter->num_tx_queues; i++)
4076                 igb_clean_tx_ring(adapter->tx_ring[i]);
4077 }
4078
4079 /**
4080  * igb_free_rx_resources - Free Rx Resources
4081  * @rx_ring: ring to clean the resources from
4082  *
4083  * Free all receive software resources
4084  **/
4085 void igb_free_rx_resources(struct igb_ring *rx_ring)
4086 {
4087         igb_clean_rx_ring(rx_ring);
4088
4089         vfree(rx_ring->rx_buffer_info);
4090         rx_ring->rx_buffer_info = NULL;
4091
4092         /* if not set, then don't free */
4093         if (!rx_ring->desc)
4094                 return;
4095
4096         dma_free_coherent(rx_ring->dev, rx_ring->size,
4097                           rx_ring->desc, rx_ring->dma);
4098
4099         rx_ring->desc = NULL;
4100 }
4101
4102 /**
4103  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4104  * @adapter: board private structure
4105  *
4106  * Free all receive software resources
4107  **/
4108 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4109 {
4110         int i;
4111
4112         for (i = 0; i < adapter->num_rx_queues; i++)
4113                 igb_free_rx_resources(adapter->rx_ring[i]);
4114 }
4115
4116 /**
4117  * igb_clean_rx_ring - Free Rx Buffers per Queue
4118  * @rx_ring: ring to free buffers from
4119  **/
4120 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4121 {
4122         unsigned long size;
4123         u16 i;
4124
4125         if (!rx_ring->rx_buffer_info)
4126                 return;
4127
4128 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4129         if (rx_ring->skb)
4130                 dev_kfree_skb(rx_ring->skb);
4131         rx_ring->skb = NULL;
4132
4133 #endif
4134         /* Free all the Rx ring sk_buffs */
4135         for (i = 0; i < rx_ring->count; i++) {
4136                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4137 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4138                 if (buffer_info->dma) {
4139                         dma_unmap_single(rx_ring->dev,
4140                                          buffer_info->dma,
4141                                          rx_ring->rx_buffer_len,
4142                                          DMA_FROM_DEVICE);
4143                         buffer_info->dma = 0;
4144                 }
4145
4146                 if (buffer_info->skb) {
4147                         dev_kfree_skb(buffer_info->skb);
4148                         buffer_info->skb = NULL;
4149                 }
4150 #else
4151                 if (!buffer_info->page)
4152                         continue;
4153
4154                 dma_unmap_page(rx_ring->dev,
4155                                buffer_info->dma,
4156                                PAGE_SIZE,
4157                                DMA_FROM_DEVICE);
4158                 __free_page(buffer_info->page);
4159
4160                 buffer_info->page = NULL;
4161 #endif
4162         }
4163
4164         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4165         memset(rx_ring->rx_buffer_info, 0, size);
4166
4167         /* Zero out the descriptor ring */
4168         memset(rx_ring->desc, 0, rx_ring->size);
4169
4170         rx_ring->next_to_alloc = 0;
4171         rx_ring->next_to_clean = 0;
4172         rx_ring->next_to_use = 0;
4173 }
4174
4175 /**
4176  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4177  * @adapter: board private structure
4178  **/
4179 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4180 {
4181         int i;
4182
4183         for (i = 0; i < adapter->num_rx_queues; i++)
4184                 igb_clean_rx_ring(adapter->rx_ring[i]);
4185 }
4186
4187 /**
4188  * igb_set_mac - Change the Ethernet Address of the NIC
4189  * @netdev: network interface device structure
4190  * @p: pointer to an address structure
4191  *
4192  * Returns 0 on success, negative on failure
4193  **/
4194 static int igb_set_mac(struct net_device *netdev, void *p)
4195 {
4196         struct igb_adapter *adapter = netdev_priv(netdev);
4197         struct e1000_hw *hw = &adapter->hw;
4198         struct sockaddr *addr = p;
4199
4200         if (!is_valid_ether_addr(addr->sa_data))
4201                 return -EADDRNOTAVAIL;
4202
4203         igb_del_mac_filter(adapter, hw->mac.addr,
4204                            adapter->vfs_allocated_count);
4205         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4206         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4207
4208         /* set the correct pool for the new PF MAC address in entry 0 */
4209         return igb_add_mac_filter(adapter, hw->mac.addr,
4210                            adapter->vfs_allocated_count);
4211 }
4212
4213 /**
4214  * igb_write_mc_addr_list - write multicast addresses to MTA
4215  * @netdev: network interface device structure
4216  *
4217  * Writes multicast address list to the MTA hash table.
4218  * Returns: -ENOMEM on failure
4219  *                0 on no addresses written
4220  *                X on writing X addresses to MTA
4221  **/
4222 int igb_write_mc_addr_list(struct net_device *netdev)
4223 {
4224         struct igb_adapter *adapter = netdev_priv(netdev);
4225         struct e1000_hw *hw = &adapter->hw;
4226 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4227         struct netdev_hw_addr *ha;
4228 #else
4229         struct dev_mc_list *ha;
4230 #endif
4231         u8  *mta_list;
4232         int i, count;
4233 #ifdef CONFIG_IGB_VMDQ_NETDEV
4234         int vm;
4235 #endif
4236         count = netdev_mc_count(netdev);
4237 #ifdef CONFIG_IGB_VMDQ_NETDEV
4238         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4239                 if (!adapter->vmdq_netdev[vm])
4240                         break;
4241                 if (!netif_running(adapter->vmdq_netdev[vm]))
4242                         continue;
4243                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4244         }
4245 #endif
4246
4247         if (!count) {
4248                 e1000_update_mc_addr_list(hw, NULL, 0);
4249                 return 0;
4250         }
4251         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4252         if (!mta_list)
4253                 return -ENOMEM;
4254
4255         /* The shared function expects a packed array of only addresses. */
4256         i = 0;
4257         netdev_for_each_mc_addr(ha, netdev)
4258 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4259                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4260 #else
4261                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4262 #endif
4263 #ifdef CONFIG_IGB_VMDQ_NETDEV
4264         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4265                 if (!adapter->vmdq_netdev[vm])
4266                         break;
4267                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4268                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4269                         continue;
4270                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4271 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4272                         memcpy(mta_list + (i++ * ETH_ALEN),
4273                                ha->addr, ETH_ALEN);
4274 #else
4275                         memcpy(mta_list + (i++ * ETH_ALEN),
4276                                ha->dmi_addr, ETH_ALEN);
4277 #endif
4278         }
4279 #endif
4280         e1000_update_mc_addr_list(hw, mta_list, i);
4281         kfree(mta_list);
4282
4283         return count;
4284 }
4285
4286 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4287 {
4288         u32 rar_low, rar_high;
4289         struct e1000_hw *hw = &adapter->hw;
4290         u8 *addr = adapter->mac_table[index].addr;
4291         /* HW expects these in little endian so we reverse the byte order
4292          * from network order (big endian) to little endian
4293          */
4294         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4295                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4296         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4297
4298         /* Indicate to hardware the Address is Valid. */
4299         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4300                 rar_high |= E1000_RAH_AV;
4301
4302         if (hw->mac.type == e1000_82575)
4303                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4304         else
4305                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4306
4307         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4308         E1000_WRITE_FLUSH(hw);
4309         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4310         E1000_WRITE_FLUSH(hw);
4311 }
4312
4313 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4314 {
4315         struct e1000_hw *hw = &adapter->hw;
4316         int i;
4317         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4318                         igb_rar_set(adapter, i);
4319         }
4320 }
4321
4322 void igb_sync_mac_table(struct igb_adapter *adapter)
4323 {
4324         struct e1000_hw *hw = &adapter->hw;
4325         int i;
4326         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4327                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4328                         igb_rar_set(adapter, i);
4329                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4330         }
4331 }
4332
4333 int igb_available_rars(struct igb_adapter *adapter)
4334 {
4335         struct e1000_hw *hw = &adapter->hw;
4336         int i, count = 0;
4337
4338         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4339                 if (adapter->mac_table[i].state == 0)
4340                         count++;
4341         }
4342         return count;
4343 }
4344
4345 #ifdef HAVE_SET_RX_MODE
4346 /**
4347  * igb_write_uc_addr_list - write unicast addresses to RAR table
4348  * @netdev: network interface device structure
4349  *
4350  * Writes unicast address list to the RAR table.
4351  * Returns: -ENOMEM on failure/insufficient address space
4352  *                0 on no addresses written
4353  *                X on writing X addresses to the RAR table
4354  **/
4355 static int igb_write_uc_addr_list(struct net_device *netdev)
4356 {
4357         struct igb_adapter *adapter = netdev_priv(netdev);
4358         unsigned int vfn = adapter->vfs_allocated_count;
4359         int count = 0;
4360
4361         /* return ENOMEM indicating insufficient memory for addresses */
4362         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4363                 return -ENOMEM;
4364         if (!netdev_uc_empty(netdev)) {
4365 #ifdef NETDEV_HW_ADDR_T_UNICAST
4366                 struct netdev_hw_addr *ha;
4367 #else
4368                 struct dev_mc_list *ha;
4369 #endif
4370                 netdev_for_each_uc_addr(ha, netdev) {
4371 #ifdef NETDEV_HW_ADDR_T_UNICAST
4372                         igb_del_mac_filter(adapter, ha->addr, vfn);
4373                         igb_add_mac_filter(adapter, ha->addr, vfn);
4374 #else
4375                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4376                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4377 #endif
4378                         count++;
4379                 }
4380         }
4381         return count;
4382 }
4383
4384 #endif /* HAVE_SET_RX_MODE */
4385 /**
4386  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4387  * @netdev: network interface device structure
4388  *
4389  * The set_rx_mode entry point is called whenever the unicast or multicast
4390  * address lists or the network interface flags are updated.  This routine is
4391  * responsible for configuring the hardware for proper unicast, multicast,
4392  * promiscuous mode, and all-multi behavior.
4393  **/
4394 static void igb_set_rx_mode(struct net_device *netdev)
4395 {
4396         struct igb_adapter *adapter = netdev_priv(netdev);
4397         struct e1000_hw *hw = &adapter->hw;
4398         unsigned int vfn = adapter->vfs_allocated_count;
4399         u32 rctl, vmolr = 0;
4400         int count;
4401
4402         /* Check for Promiscuous and All Multicast modes */
4403         rctl = E1000_READ_REG(hw, E1000_RCTL);
4404
4405         /* clear the effected bits */
4406         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4407
4408         if (netdev->flags & IFF_PROMISC) {
4409                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4410                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4411                 /* retain VLAN HW filtering if in VT mode */
4412                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4413                         rctl |= E1000_RCTL_VFE;
4414         } else {
4415                 if (netdev->flags & IFF_ALLMULTI) {
4416                         rctl |= E1000_RCTL_MPE;
4417                         vmolr |= E1000_VMOLR_MPME;
4418                 } else {
4419                         /*
4420                          * Write addresses to the MTA, if the attempt fails
4421                          * then we should just turn on promiscuous mode so
4422                          * that we can at least receive multicast traffic
4423                          */
4424                         count = igb_write_mc_addr_list(netdev);
4425                         if (count < 0) {
4426                                 rctl |= E1000_RCTL_MPE;
4427                                 vmolr |= E1000_VMOLR_MPME;
4428                         } else if (count) {
4429                                 vmolr |= E1000_VMOLR_ROMPE;
4430                         }
4431                 }
4432 #ifdef HAVE_SET_RX_MODE
4433                 /*
4434                  * Write addresses to available RAR registers, if there is not
4435                  * sufficient space to store all the addresses then enable
4436                  * unicast promiscuous mode
4437                  */
4438                 count = igb_write_uc_addr_list(netdev);
4439                 if (count < 0) {
4440                         rctl |= E1000_RCTL_UPE;
4441                         vmolr |= E1000_VMOLR_ROPE;
4442                 }
4443 #endif /* HAVE_SET_RX_MODE */
4444                 rctl |= E1000_RCTL_VFE;
4445         }
4446         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4447
4448         /*
4449          * In order to support SR-IOV and eventually VMDq it is necessary to set
4450          * the VMOLR to enable the appropriate modes.  Without this workaround
4451          * we will have issues with VLAN tag stripping not being done for frames
4452          * that are only arriving because we are the default pool
4453          */
4454         if (hw->mac.type < e1000_82576)
4455                 return;
4456
4457         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4458                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4459         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4460         igb_restore_vf_multicasts(adapter);
4461 }
4462
4463 static void igb_check_wvbr(struct igb_adapter *adapter)
4464 {
4465         struct e1000_hw *hw = &adapter->hw;
4466         u32 wvbr = 0;
4467
4468         switch (hw->mac.type) {
4469         case e1000_82576:
4470         case e1000_i350:
4471                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4472                         return;
4473                 break;
4474         default:
4475                 break;
4476         }
4477
4478         adapter->wvbr |= wvbr;
4479 }
4480
4481 #define IGB_STAGGERED_QUEUE_OFFSET 8
4482
4483 static void igb_spoof_check(struct igb_adapter *adapter)
4484 {
4485         int j;
4486
4487         if (!adapter->wvbr)
4488                 return;
4489
4490         switch (adapter->hw.mac.type) {
4491         case e1000_82576:
4492                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4493                         if (adapter->wvbr & (1 << j) ||
4494                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4495                                 DPRINTK(DRV, WARNING,
4496                                         "Spoof event(s) detected on VF %d\n", j);
4497                                 adapter->wvbr &=
4498                                         ~((1 << j) |
4499                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4500                         }
4501                 }
4502                 break;
4503         case e1000_i350:
4504                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4505                         if (adapter->wvbr & (1 << j)) {
4506                                 DPRINTK(DRV, WARNING,
4507                                         "Spoof event(s) detected on VF %d\n", j);
4508                                 adapter->wvbr &= ~(1 << j);
4509                         }
4510                 }
4511                 break;
4512         default:
4513                 break;
4514         }
4515 }
4516
4517 /* Need to wait a few seconds after link up to get diagnostic information from
4518  * the phy */
4519 static void igb_update_phy_info(unsigned long data)
4520 {
4521         struct igb_adapter *adapter = (struct igb_adapter *) data;
4522         e1000_get_phy_info(&adapter->hw);
4523 }
4524
4525 /**
4526  * igb_has_link - check shared code for link and determine up/down
4527  * @adapter: pointer to driver private info
4528  **/
4529 bool igb_has_link(struct igb_adapter *adapter)
4530 {
4531         struct e1000_hw *hw = &adapter->hw;
4532         bool link_active = FALSE;
4533
4534         /* get_link_status is set on LSC (link status) interrupt or
4535          * rx sequence error interrupt.  get_link_status will stay
4536          * false until the e1000_check_for_link establishes link
4537          * for copper adapters ONLY
4538          */
4539         switch (hw->phy.media_type) {
4540         case e1000_media_type_copper:
4541                 if (!hw->mac.get_link_status)
4542                         return true;
4543         case e1000_media_type_internal_serdes:
4544                 e1000_check_for_link(hw);
4545                 link_active = !hw->mac.get_link_status;
4546                 break;
4547         case e1000_media_type_unknown:
4548         default:
4549                 break;
4550         }
4551
4552         if (((hw->mac.type == e1000_i210) ||
4553              (hw->mac.type == e1000_i211)) &&
4554              (hw->phy.id == I210_I_PHY_ID)) {
4555                 if (!netif_carrier_ok(adapter->netdev)) {
4556                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4557                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4558                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4559                         adapter->link_check_timeout = jiffies;
4560                 }
4561         }
4562
4563         return link_active;
4564 }
4565
4566 /**
4567  * igb_watchdog - Timer Call-back
4568  * @data: pointer to adapter cast into an unsigned long
4569  **/
4570 static void igb_watchdog(unsigned long data)
4571 {
4572         struct igb_adapter *adapter = (struct igb_adapter *)data;
4573         /* Do the rest outside of interrupt context */
4574         schedule_work(&adapter->watchdog_task);
4575 }
4576
4577 static void igb_watchdog_task(struct work_struct *work)
4578 {
4579         struct igb_adapter *adapter = container_of(work,
4580                                                    struct igb_adapter,
4581                                                    watchdog_task);
4582         struct e1000_hw *hw = &adapter->hw;
4583         struct net_device *netdev = adapter->netdev;
4584         u32 link;
4585         int i;
4586         u32 thstat, ctrl_ext;
4587         u32 connsw;
4588
4589         link = igb_has_link(adapter);
4590         /* Force link down if we have fiber to swap to */
4591         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4592                 if (hw->phy.media_type == e1000_media_type_copper) {
4593                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4594                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4595                                 link = 0;
4596                 }
4597         }
4598
4599         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4600                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4601                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4602                 else
4603                         link = FALSE;
4604         }
4605
4606         if (link) {
4607                 /* Perform a reset if the media type changed. */
4608                 if (hw->dev_spec._82575.media_changed) {
4609                         hw->dev_spec._82575.media_changed = false;
4610                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4611                         igb_reset(adapter);
4612                 }
4613
4614                 /* Cancel scheduled suspend requests. */
4615                 pm_runtime_resume(netdev->dev.parent);
4616
4617                 if (!netif_carrier_ok(netdev)) {
4618                         u32 ctrl;
4619                         e1000_get_speed_and_duplex(hw,
4620                                                    &adapter->link_speed,
4621                                                    &adapter->link_duplex);
4622
4623                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4624                         /* Links status message must follow this format */
4625                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4626                                  "Flow Control: %s\n",
4627                                netdev->name,
4628                                adapter->link_speed,
4629                                adapter->link_duplex == FULL_DUPLEX ?
4630                                  "Full Duplex" : "Half Duplex",
4631                                ((ctrl & E1000_CTRL_TFCE) &&
4632                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4633                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4634                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4635                         /* adjust timeout factor according to speed/duplex */
4636                         adapter->tx_timeout_factor = 1;
4637                         switch (adapter->link_speed) {
4638                         case SPEED_10:
4639                                 adapter->tx_timeout_factor = 14;
4640                                 break;
4641                         case SPEED_100:
4642                                 /* maybe add some timeout factor ? */
4643                                 break;
4644                         default:
4645                                 break;
4646                         }
4647
4648                         netif_carrier_on(netdev);
4649                         netif_tx_wake_all_queues(netdev);
4650
4651                         igb_ping_all_vfs(adapter);
4652 #ifdef IFLA_VF_MAX
4653                         igb_check_vf_rate_limit(adapter);
4654 #endif /* IFLA_VF_MAX */
4655
4656                         /* link state has changed, schedule phy info update */
4657                         if (!test_bit(__IGB_DOWN, &adapter->state))
4658                                 mod_timer(&adapter->phy_info_timer,
4659                                           round_jiffies(jiffies + 2 * HZ));
4660                 }
4661         } else {
4662                 if (netif_carrier_ok(netdev)) {
4663                         adapter->link_speed = 0;
4664                         adapter->link_duplex = 0;
4665                         /* check for thermal sensor event on i350 */
4666                         if (hw->mac.type == e1000_i350) {
4667                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4668                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4669                                 if ((hw->phy.media_type ==
4670                                         e1000_media_type_copper) &&
4671                                         !(ctrl_ext &
4672                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4673                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4674                                                 printk(KERN_ERR "igb: %s The "
4675                                                 "network adapter was stopped "
4676                                                 "because it overheated.\n",
4677                                                 netdev->name);
4678                                         }
4679                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4680                                                 printk(KERN_INFO
4681                                                         "igb: %s The network "
4682                                                         "adapter supported "
4683                                                         "link speed "
4684                                                         "was downshifted "
4685                                                         "because it "
4686                                                         "overheated.\n",
4687                                                         netdev->name);
4688                                         }
4689                                 }
4690                         }
4691
4692                         /* Links status message must follow this format */
4693                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4694                                netdev->name);
4695                         netif_carrier_off(netdev);
4696                         netif_tx_stop_all_queues(netdev);
4697
4698                         igb_ping_all_vfs(adapter);
4699
4700                         /* link state has changed, schedule phy info update */
4701                         if (!test_bit(__IGB_DOWN, &adapter->state))
4702                                 mod_timer(&adapter->phy_info_timer,
4703                                           round_jiffies(jiffies + 2 * HZ));
4704                         /* link is down, time to check for alternate media */
4705                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4706                                 igb_check_swap_media(adapter);
4707                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4708                                         schedule_work(&adapter->reset_task);
4709                                         /* return immediately */
4710                                         return;
4711                                 }
4712                         }
4713                         pm_schedule_suspend(netdev->dev.parent,
4714                                             MSEC_PER_SEC * 5);
4715
4716                 /* also check for alternate media here */
4717                 } else if (!netif_carrier_ok(netdev) &&
4718                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4719                         hw->mac.ops.power_up_serdes(hw);
4720                         igb_check_swap_media(adapter);
4721                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4722                                 schedule_work(&adapter->reset_task);
4723                                 /* return immediately */
4724                                 return;
4725                         }
4726                 }
4727         }
4728
4729         igb_update_stats(adapter);
4730
4731         for (i = 0; i < adapter->num_tx_queues; i++) {
4732                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4733                 if (!netif_carrier_ok(netdev)) {
4734                         /* We've lost link, so the controller stops DMA,
4735                          * but we've got queued Tx work that's never going
4736                          * to get done, so reset controller to flush Tx.
4737                          * (Do the reset outside of interrupt context). */
4738                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4739                                 adapter->tx_timeout_count++;
4740                                 schedule_work(&adapter->reset_task);
4741                                 /* return immediately since reset is imminent */
4742                                 return;
4743                         }
4744                 }
4745
4746                 /* Force detection of hung controller every watchdog period */
4747                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4748         }
4749
4750         /* Cause software interrupt to ensure rx ring is cleaned */
4751         if (adapter->msix_entries) {
4752                 u32 eics = 0;
4753                 for (i = 0; i < adapter->num_q_vectors; i++)
4754                         eics |= adapter->q_vector[i]->eims_value;
4755                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4756         } else {
4757                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4758         }
4759
4760         igb_spoof_check(adapter);
4761
4762         /* Reset the timer */
4763         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4764                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4765                         mod_timer(&adapter->watchdog_timer,
4766                                   round_jiffies(jiffies +  HZ));
4767                 else
4768                         mod_timer(&adapter->watchdog_timer,
4769                                   round_jiffies(jiffies + 2 * HZ));
4770         }
4771 }
4772
4773 static void igb_dma_err_task(struct work_struct *work)
4774 {
4775         struct igb_adapter *adapter = container_of(work,
4776                                                    struct igb_adapter,
4777                                                    dma_err_task);
4778         int vf;
4779         struct e1000_hw *hw = &adapter->hw;
4780         struct net_device *netdev = adapter->netdev;
4781         u32 hgptc;
4782         u32 ciaa, ciad;
4783
4784         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4785         if (hgptc) /* If incrementing then no need for the check below */
4786                 goto dma_timer_reset;
4787         /*
4788          * Check to see if a bad DMA write target from an errant or
4789          * malicious VF has caused a PCIe error.  If so then we can
4790          * issue a VFLR to the offending VF(s) and then resume without
4791          * requesting a full slot reset.
4792          */
4793
4794         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4795                 ciaa = (vf << 16) | 0x80000000;
4796                 /* 32 bit read so align, we really want status at offset 6 */
4797                 ciaa |= PCI_COMMAND;
4798                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4799                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4800                 ciaa &= 0x7FFFFFFF;
4801                 /* disable debug mode asap after reading data */
4802                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4803                 /* Get the upper 16 bits which will be the PCI status reg */
4804                 ciad >>= 16;
4805                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4806                             PCI_STATUS_REC_TARGET_ABORT |
4807                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4808                         netdev_err(netdev, "VF %d suffered error\n", vf);
4809                         /* Issue VFLR */
4810                         ciaa = (vf << 16) | 0x80000000;
4811                         ciaa |= 0xA8;
4812                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4813                         ciad = 0x00008000;  /* VFLR */
4814                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4815                         ciaa &= 0x7FFFFFFF;
4816                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4817                 }
4818         }
4819 dma_timer_reset:
4820         /* Reset the timer */
4821         if (!test_bit(__IGB_DOWN, &adapter->state))
4822                 mod_timer(&adapter->dma_err_timer,
4823                           round_jiffies(jiffies + HZ / 10));
4824 }
4825
4826 /**
4827  * igb_dma_err_timer - Timer Call-back
4828  * @data: pointer to adapter cast into an unsigned long
4829  **/
4830 static void igb_dma_err_timer(unsigned long data)
4831 {
4832         struct igb_adapter *adapter = (struct igb_adapter *)data;
4833         /* Do the rest outside of interrupt context */
4834         schedule_work(&adapter->dma_err_task);
4835 }
4836
4837 enum latency_range {
4838         lowest_latency = 0,
4839         low_latency = 1,
4840         bulk_latency = 2,
4841         latency_invalid = 255
4842 };
4843
4844 /**
4845  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4846  *
4847  *      Stores a new ITR value based on strictly on packet size.  This
4848  *      algorithm is less sophisticated than that used in igb_update_itr,
4849  *      due to the difficulty of synchronizing statistics across multiple
4850  *      receive rings.  The divisors and thresholds used by this function
4851  *      were determined based on theoretical maximum wire speed and testing
4852  *      data, in order to minimize response time while increasing bulk
4853  *      throughput.
4854  *      This functionality is controlled by the InterruptThrottleRate module
4855  *      parameter (see igb_param.c)
4856  *      NOTE:  This function is called only when operating in a multiqueue
4857  *             receive environment.
4858  * @q_vector: pointer to q_vector
4859  **/
4860 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4861 {
4862         int new_val = q_vector->itr_val;
4863         int avg_wire_size = 0;
4864         struct igb_adapter *adapter = q_vector->adapter;
4865         unsigned int packets;
4866
4867         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4868          * ints/sec - ITR timer value of 120 ticks.
4869          */
4870         switch (adapter->link_speed) {
4871         case SPEED_10:
4872         case SPEED_100:
4873                 new_val = IGB_4K_ITR;
4874                 goto set_itr_val;
4875         default:
4876                 break;
4877         }
4878
4879         packets = q_vector->rx.total_packets;
4880         if (packets)
4881                 avg_wire_size = q_vector->rx.total_bytes / packets;
4882
4883         packets = q_vector->tx.total_packets;
4884         if (packets)
4885                 avg_wire_size = max_t(u32, avg_wire_size,
4886                                       q_vector->tx.total_bytes / packets);
4887
4888         /* if avg_wire_size isn't set no work was done */
4889         if (!avg_wire_size)
4890                 goto clear_counts;
4891
4892         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4893         avg_wire_size += 24;
4894
4895         /* Don't starve jumbo frames */
4896         avg_wire_size = min(avg_wire_size, 3000);
4897
4898         /* Give a little boost to mid-size frames */
4899         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4900                 new_val = avg_wire_size / 3;
4901         else
4902                 new_val = avg_wire_size / 2;
4903
4904         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4905         if (new_val < IGB_20K_ITR &&
4906             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4907              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4908                 new_val = IGB_20K_ITR;
4909
4910 set_itr_val:
4911         if (new_val != q_vector->itr_val) {
4912                 q_vector->itr_val = new_val;
4913                 q_vector->set_itr = 1;
4914         }
4915 clear_counts:
4916         q_vector->rx.total_bytes = 0;
4917         q_vector->rx.total_packets = 0;
4918         q_vector->tx.total_bytes = 0;
4919         q_vector->tx.total_packets = 0;
4920 }
4921
4922 /**
4923  * igb_update_itr - update the dynamic ITR value based on statistics
4924  *      Stores a new ITR value based on packets and byte
4925  *      counts during the last interrupt.  The advantage of per interrupt
4926  *      computation is faster updates and more accurate ITR for the current
4927  *      traffic pattern.  Constants in this function were computed
4928  *      based on theoretical maximum wire speed and thresholds were set based
4929  *      on testing data as well as attempting to minimize response time
4930  *      while increasing bulk throughput.
4931  *      this functionality is controlled by the InterruptThrottleRate module
4932  *      parameter (see igb_param.c)
4933  *      NOTE:  These calculations are only valid when operating in a single-
4934  *             queue environment.
4935  * @q_vector: pointer to q_vector
4936  * @ring_container: ring info to update the itr for
4937  **/
4938 static void igb_update_itr(struct igb_q_vector *q_vector,
4939                            struct igb_ring_container *ring_container)
4940 {
4941         unsigned int packets = ring_container->total_packets;
4942         unsigned int bytes = ring_container->total_bytes;
4943         u8 itrval = ring_container->itr;
4944
4945         /* no packets, exit with status unchanged */
4946         if (packets == 0)
4947                 return;
4948
4949         switch (itrval) {
4950         case lowest_latency:
4951                 /* handle TSO and jumbo frames */
4952                 if (bytes/packets > 8000)
4953                         itrval = bulk_latency;
4954                 else if ((packets < 5) && (bytes > 512))
4955                         itrval = low_latency;
4956                 break;
4957         case low_latency:  /* 50 usec aka 20000 ints/s */
4958                 if (bytes > 10000) {
4959                         /* this if handles the TSO accounting */
4960                         if (bytes/packets > 8000) {
4961                                 itrval = bulk_latency;
4962                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4963                                 itrval = bulk_latency;
4964                         } else if ((packets > 35)) {
4965                                 itrval = lowest_latency;
4966                         }
4967                 } else if (bytes/packets > 2000) {
4968                         itrval = bulk_latency;
4969                 } else if (packets <= 2 && bytes < 512) {
4970                         itrval = lowest_latency;
4971                 }
4972                 break;
4973         case bulk_latency: /* 250 usec aka 4000 ints/s */
4974                 if (bytes > 25000) {
4975                         if (packets > 35)
4976                                 itrval = low_latency;
4977                 } else if (bytes < 1500) {
4978                         itrval = low_latency;
4979                 }
4980                 break;
4981         }
4982
4983         /* clear work counters since we have the values we need */
4984         ring_container->total_bytes = 0;
4985         ring_container->total_packets = 0;
4986
4987         /* write updated itr to ring container */
4988         ring_container->itr = itrval;
4989 }
4990
4991 static void igb_set_itr(struct igb_q_vector *q_vector)
4992 {
4993         struct igb_adapter *adapter = q_vector->adapter;
4994         u32 new_itr = q_vector->itr_val;
4995         u8 current_itr = 0;
4996
4997         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4998         switch (adapter->link_speed) {
4999         case SPEED_10:
5000         case SPEED_100:
5001                 current_itr = 0;
5002                 new_itr = IGB_4K_ITR;
5003                 goto set_itr_now;
5004         default:
5005                 break;
5006         }
5007
5008         igb_update_itr(q_vector, &q_vector->tx);
5009         igb_update_itr(q_vector, &q_vector->rx);
5010
5011         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5012
5013         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5014         if (current_itr == lowest_latency &&
5015             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5016              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5017                 current_itr = low_latency;
5018
5019         switch (current_itr) {
5020         /* counts and packets in update_itr are dependent on these numbers */
5021         case lowest_latency:
5022                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5023                 break;
5024         case low_latency:
5025                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5026                 break;
5027         case bulk_latency:
5028                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5029                 break;
5030         default:
5031                 break;
5032         }
5033
5034 set_itr_now:
5035         if (new_itr != q_vector->itr_val) {
5036                 /* this attempts to bias the interrupt rate towards Bulk
5037                  * by adding intermediate steps when interrupt rate is
5038                  * increasing */
5039                 new_itr = new_itr > q_vector->itr_val ?
5040                              max((new_itr * q_vector->itr_val) /
5041                                  (new_itr + (q_vector->itr_val >> 2)),
5042                                  new_itr) :
5043                              new_itr;
5044                 /* Don't write the value here; it resets the adapter's
5045                  * internal timer, and causes us to delay far longer than
5046                  * we should between interrupts.  Instead, we write the ITR
5047                  * value at the beginning of the next interrupt so the timing
5048                  * ends up being correct.
5049                  */
5050                 q_vector->itr_val = new_itr;
5051                 q_vector->set_itr = 1;
5052         }
5053 }
5054
5055 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5056                      u32 type_tucmd, u32 mss_l4len_idx)
5057 {
5058         struct e1000_adv_tx_context_desc *context_desc;
5059         u16 i = tx_ring->next_to_use;
5060
5061         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5062
5063         i++;
5064         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5065
5066         /* set bits to identify this as an advanced context descriptor */
5067         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5068
5069         /* For 82575, context index must be unique per ring. */
5070         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5071                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5072
5073         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5074         context_desc->seqnum_seed       = 0;
5075         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5076         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5077 }
5078
5079 static int igb_tso(struct igb_ring *tx_ring,
5080                    struct igb_tx_buffer *first,
5081                    u8 *hdr_len)
5082 {
5083 #ifdef NETIF_F_TSO
5084         struct sk_buff *skb = first->skb;
5085         u32 vlan_macip_lens, type_tucmd;
5086         u32 mss_l4len_idx, l4len;
5087
5088         if (skb->ip_summed != CHECKSUM_PARTIAL)
5089                 return 0;
5090
5091         if (!skb_is_gso(skb))
5092 #endif /* NETIF_F_TSO */
5093                 return 0;
5094 #ifdef NETIF_F_TSO
5095
5096         if (skb_header_cloned(skb)) {
5097                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5098                 if (err)
5099                         return err;
5100         }
5101
5102         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5103         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5104
5105         if (first->protocol == __constant_htons(ETH_P_IP)) {
5106                 struct iphdr *iph = ip_hdr(skb);
5107                 iph->tot_len = 0;
5108                 iph->check = 0;
5109                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5110                                                          iph->daddr, 0,
5111                                                          IPPROTO_TCP,
5112                                                          0);
5113                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5114                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5115                                    IGB_TX_FLAGS_CSUM |
5116                                    IGB_TX_FLAGS_IPV4;
5117 #ifdef NETIF_F_TSO6
5118         } else if (skb_is_gso_v6(skb)) {
5119                 ipv6_hdr(skb)->payload_len = 0;
5120                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5121                                                        &ipv6_hdr(skb)->daddr,
5122                                                        0, IPPROTO_TCP, 0);
5123                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5124                                    IGB_TX_FLAGS_CSUM;
5125 #endif
5126         }
5127
5128         /* compute header lengths */
5129         l4len = tcp_hdrlen(skb);
5130         *hdr_len = skb_transport_offset(skb) + l4len;
5131
5132         /* update gso size and bytecount with header size */
5133         first->gso_segs = skb_shinfo(skb)->gso_segs;
5134         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5135
5136         /* MSS L4LEN IDX */
5137         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5138         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5139
5140         /* VLAN MACLEN IPLEN */
5141         vlan_macip_lens = skb_network_header_len(skb);
5142         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5143         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5144
5145         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5146
5147         return 1;
5148 #endif  /* NETIF_F_TSO */
5149 }
5150
5151 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5152 {
5153         struct sk_buff *skb = first->skb;
5154         u32 vlan_macip_lens = 0;
5155         u32 mss_l4len_idx = 0;
5156         u32 type_tucmd = 0;
5157
5158         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5159                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5160                         return;
5161         } else {
5162                 u8 nexthdr = 0;
5163                 switch (first->protocol) {
5164                 case __constant_htons(ETH_P_IP):
5165                         vlan_macip_lens |= skb_network_header_len(skb);
5166                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5167                         nexthdr = ip_hdr(skb)->protocol;
5168                         break;
5169 #ifdef NETIF_F_IPV6_CSUM
5170                 case __constant_htons(ETH_P_IPV6):
5171                         vlan_macip_lens |= skb_network_header_len(skb);
5172                         nexthdr = ipv6_hdr(skb)->nexthdr;
5173                         break;
5174 #endif
5175                 default:
5176                         if (unlikely(net_ratelimit())) {
5177                                 dev_warn(tx_ring->dev,
5178                                  "partial checksum but proto=%x!\n",
5179                                  first->protocol);
5180                         }
5181                         break;
5182                 }
5183
5184                 switch (nexthdr) {
5185                 case IPPROTO_TCP:
5186                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5187                         mss_l4len_idx = tcp_hdrlen(skb) <<
5188                                         E1000_ADVTXD_L4LEN_SHIFT;
5189                         break;
5190 #ifdef HAVE_SCTP
5191                 case IPPROTO_SCTP:
5192                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5193                         mss_l4len_idx = sizeof(struct sctphdr) <<
5194                                         E1000_ADVTXD_L4LEN_SHIFT;
5195                         break;
5196 #endif
5197                 case IPPROTO_UDP:
5198                         mss_l4len_idx = sizeof(struct udphdr) <<
5199                                         E1000_ADVTXD_L4LEN_SHIFT;
5200                         break;
5201                 default:
5202                         if (unlikely(net_ratelimit())) {
5203                                 dev_warn(tx_ring->dev,
5204                                  "partial checksum but l4 proto=%x!\n",
5205                                  nexthdr);
5206                         }
5207                         break;
5208                 }
5209
5210                 /* update TX checksum flag */
5211                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5212         }
5213
5214         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5215         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5216
5217         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5218 }
5219
5220 #define IGB_SET_FLAG(_input, _flag, _result) \
5221         ((_flag <= _result) ? \
5222          ((u32)(_input & _flag) * (_result / _flag)) : \
5223          ((u32)(_input & _flag) / (_flag / _result)))
5224
5225 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5226 {
5227         /* set type for advanced descriptor with frame checksum insertion */
5228         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5229                        E1000_ADVTXD_DCMD_DEXT |
5230                        E1000_ADVTXD_DCMD_IFCS;
5231
5232         /* set HW vlan bit if vlan is present */
5233         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5234                                  (E1000_ADVTXD_DCMD_VLE));
5235
5236         /* set segmentation bits for TSO */
5237         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5238                                  (E1000_ADVTXD_DCMD_TSE));
5239
5240         /* set timestamp bit if present */
5241         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5242                                  (E1000_ADVTXD_MAC_TSTAMP));
5243
5244         return cmd_type;
5245 }
5246
5247 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5248                                  union e1000_adv_tx_desc *tx_desc,
5249                                  u32 tx_flags, unsigned int paylen)
5250 {
5251         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5252
5253         /* 82575 requires a unique index per ring */
5254         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5255                 olinfo_status |= tx_ring->reg_idx << 4;
5256
5257         /* insert L4 checksum */
5258         olinfo_status |= IGB_SET_FLAG(tx_flags,
5259                                       IGB_TX_FLAGS_CSUM,
5260                                       (E1000_TXD_POPTS_TXSM << 8));
5261
5262         /* insert IPv4 checksum */
5263         olinfo_status |= IGB_SET_FLAG(tx_flags,
5264                                       IGB_TX_FLAGS_IPV4,
5265                                       (E1000_TXD_POPTS_IXSM << 8));
5266
5267         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5268 }
5269
5270 static void igb_tx_map(struct igb_ring *tx_ring,
5271                        struct igb_tx_buffer *first,
5272                        const u8 hdr_len)
5273 {
5274         struct sk_buff *skb = first->skb;
5275         struct igb_tx_buffer *tx_buffer;
5276         union e1000_adv_tx_desc *tx_desc;
5277         struct skb_frag_struct *frag;
5278         dma_addr_t dma;
5279         unsigned int data_len, size;
5280         u32 tx_flags = first->tx_flags;
5281         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5282         u16 i = tx_ring->next_to_use;
5283
5284         tx_desc = IGB_TX_DESC(tx_ring, i);
5285
5286         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5287
5288         size = skb_headlen(skb);
5289         data_len = skb->data_len;
5290
5291         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5292
5293         tx_buffer = first;
5294
5295         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5296                 if (dma_mapping_error(tx_ring->dev, dma))
5297                         goto dma_error;
5298
5299                 /* record length, and DMA address */
5300                 dma_unmap_len_set(tx_buffer, len, size);
5301                 dma_unmap_addr_set(tx_buffer, dma, dma);
5302
5303                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5304
5305                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5306                         tx_desc->read.cmd_type_len =
5307                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5308
5309                         i++;
5310                         tx_desc++;
5311                         if (i == tx_ring->count) {
5312                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5313                                 i = 0;
5314                         }
5315                         tx_desc->read.olinfo_status = 0;
5316
5317                         dma += IGB_MAX_DATA_PER_TXD;
5318                         size -= IGB_MAX_DATA_PER_TXD;
5319
5320                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5321                 }
5322
5323                 if (likely(!data_len))
5324                         break;
5325
5326                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5327
5328                 i++;
5329                 tx_desc++;
5330                 if (i == tx_ring->count) {
5331                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5332                         i = 0;
5333                 }
5334                 tx_desc->read.olinfo_status = 0;
5335
5336                 size = skb_frag_size(frag);
5337                 data_len -= size;
5338
5339                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5340                                        size, DMA_TO_DEVICE);
5341
5342                 tx_buffer = &tx_ring->tx_buffer_info[i];
5343         }
5344
5345         /* write last descriptor with RS and EOP bits */
5346         cmd_type |= size | IGB_TXD_DCMD;
5347         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5348
5349         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5350         /* set the timestamp */
5351         first->time_stamp = jiffies;
5352
5353         /*
5354          * Force memory writes to complete before letting h/w know there
5355          * are new descriptors to fetch.  (Only applicable for weak-ordered
5356          * memory model archs, such as IA-64).
5357          *
5358          * We also need this memory barrier to make certain all of the
5359          * status bits have been updated before next_to_watch is written.
5360          */
5361         wmb();
5362
5363         /* set next_to_watch value indicating a packet is present */
5364         first->next_to_watch = tx_desc;
5365
5366         i++;
5367         if (i == tx_ring->count)
5368                 i = 0;
5369
5370         tx_ring->next_to_use = i;
5371
5372         writel(i, tx_ring->tail);
5373
5374         /* we need this if more than one processor can write to our tail
5375          * at a time, it syncronizes IO on IA64/Altix systems */
5376         mmiowb();
5377
5378         return;
5379
5380 dma_error:
5381         dev_err(tx_ring->dev, "TX DMA map failed\n");
5382
5383         /* clear dma mappings for failed tx_buffer_info map */
5384         for (;;) {
5385                 tx_buffer = &tx_ring->tx_buffer_info[i];
5386                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5387                 if (tx_buffer == first)
5388                         break;
5389                 if (i == 0)
5390                         i = tx_ring->count;
5391                 i--;
5392         }
5393
5394         tx_ring->next_to_use = i;
5395 }
5396
5397 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5398 {
5399         struct net_device *netdev = netdev_ring(tx_ring);
5400
5401         if (netif_is_multiqueue(netdev))
5402                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5403         else
5404                 netif_stop_queue(netdev);
5405
5406         /* Herbert's original patch had:
5407          *  smp_mb__after_netif_stop_queue();
5408          * but since that doesn't exist yet, just open code it. */
5409         smp_mb();
5410
5411         /* We need to check again in a case another CPU has just
5412          * made room available. */
5413         if (igb_desc_unused(tx_ring) < size)
5414                 return -EBUSY;
5415
5416         /* A reprieve! */
5417         if (netif_is_multiqueue(netdev))
5418                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5419         else
5420                 netif_wake_queue(netdev);
5421
5422         tx_ring->tx_stats.restart_queue++;
5423
5424         return 0;
5425 }
5426
5427 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5428 {
5429         if (igb_desc_unused(tx_ring) >= size)
5430                 return 0;
5431         return __igb_maybe_stop_tx(tx_ring, size);
5432 }
5433
5434 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5435                                 struct igb_ring *tx_ring)
5436 {
5437         struct igb_tx_buffer *first;
5438         int tso;
5439         u32 tx_flags = 0;
5440 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5441         unsigned short f;
5442 #endif
5443         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5444         __be16 protocol = vlan_get_protocol(skb);
5445         u8 hdr_len = 0;
5446
5447         /*
5448          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5449          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5450          *       + 2 desc gap to keep tail from touching head,
5451          *       + 1 desc for context descriptor,
5452          * otherwise try next time
5453          */
5454 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5455         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5456                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5457 #else
5458         count += skb_shinfo(skb)->nr_frags;
5459 #endif
5460         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5461                 /* this is a hard error */
5462                 return NETDEV_TX_BUSY;
5463         }
5464
5465         /* record the location of the first descriptor for this packet */
5466         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5467         first->skb = skb;
5468         first->bytecount = skb->len;
5469         first->gso_segs = 1;
5470
5471         skb_tx_timestamp(skb);
5472
5473 #ifdef HAVE_PTP_1588_CLOCK
5474         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5475                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5476                 if (!adapter->ptp_tx_skb) {
5477                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5478                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5479
5480                         adapter->ptp_tx_skb = skb_get(skb);
5481                         adapter->ptp_tx_start = jiffies;
5482                         if (adapter->hw.mac.type == e1000_82576)
5483                                 schedule_work(&adapter->ptp_tx_work);
5484                 }
5485         }
5486 #endif /* HAVE_PTP_1588_CLOCK */
5487
5488         if (vlan_tx_tag_present(skb)) {
5489                 tx_flags |= IGB_TX_FLAGS_VLAN;
5490                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5491         }
5492
5493         /* record initial flags and protocol */
5494         first->tx_flags = tx_flags;
5495         first->protocol = protocol;
5496
5497         tso = igb_tso(tx_ring, first, &hdr_len);
5498         if (tso < 0)
5499                 goto out_drop;
5500         else if (!tso)
5501                 igb_tx_csum(tx_ring, first);
5502
5503         igb_tx_map(tx_ring, first, hdr_len);
5504
5505 #ifndef HAVE_TRANS_START_IN_QUEUE
5506         netdev_ring(tx_ring)->trans_start = jiffies;
5507
5508 #endif
5509         /* Make sure there is space in the ring for the next send. */
5510         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5511
5512         return NETDEV_TX_OK;
5513
5514 out_drop:
5515         igb_unmap_and_free_tx_resource(tx_ring, first);
5516
5517         return NETDEV_TX_OK;
5518 }
5519
5520 #ifdef HAVE_TX_MQ
5521 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5522                                                     struct sk_buff *skb)
5523 {
5524         unsigned int r_idx = skb->queue_mapping;
5525
5526         if (r_idx >= adapter->num_tx_queues)
5527                 r_idx = r_idx % adapter->num_tx_queues;
5528
5529         return adapter->tx_ring[r_idx];
5530 }
5531 #else
5532 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5533 #endif
5534
5535 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5536                                   struct net_device *netdev)
5537 {
5538         struct igb_adapter *adapter = netdev_priv(netdev);
5539
5540         if (test_bit(__IGB_DOWN, &adapter->state)) {
5541                 dev_kfree_skb_any(skb);
5542                 return NETDEV_TX_OK;
5543         }
5544
5545         if (skb->len <= 0) {
5546                 dev_kfree_skb_any(skb);
5547                 return NETDEV_TX_OK;
5548         }
5549
5550         /*
5551          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5552          * in order to meet this minimum size requirement.
5553          */
5554         if (skb->len < 17) {
5555                 if (skb_padto(skb, 17))
5556                         return NETDEV_TX_OK;
5557                 skb->len = 17;
5558         }
5559
5560         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5561 }
5562
5563 /**
5564  * igb_tx_timeout - Respond to a Tx Hang
5565  * @netdev: network interface device structure
5566  **/
5567 static void igb_tx_timeout(struct net_device *netdev)
5568 {
5569         struct igb_adapter *adapter = netdev_priv(netdev);
5570         struct e1000_hw *hw = &adapter->hw;
5571
5572         /* Do the reset outside of interrupt context */
5573         adapter->tx_timeout_count++;
5574
5575         if (hw->mac.type >= e1000_82580)
5576                 hw->dev_spec._82575.global_device_reset = true;
5577
5578         schedule_work(&adapter->reset_task);
5579         E1000_WRITE_REG(hw, E1000_EICS,
5580                         (adapter->eims_enable_mask & ~adapter->eims_other));
5581 }
5582
5583 static void igb_reset_task(struct work_struct *work)
5584 {
5585         struct igb_adapter *adapter;
5586         adapter = container_of(work, struct igb_adapter, reset_task);
5587
5588         igb_reinit_locked(adapter);
5589 }
5590
5591 /**
5592  * igb_get_stats - Get System Network Statistics
5593  * @netdev: network interface device structure
5594  *
5595  * Returns the address of the device statistics structure.
5596  * The statistics are updated here and also from the timer callback.
5597  **/
5598 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5599 {
5600         struct igb_adapter *adapter = netdev_priv(netdev);
5601
5602         if (!test_bit(__IGB_RESETTING, &adapter->state))
5603                 igb_update_stats(adapter);
5604
5605 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5606         /* only return the current stats */
5607         return &netdev->stats;
5608 #else
5609         /* only return the current stats */
5610         return &adapter->net_stats;
5611 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5612 }
5613
5614 /**
5615  * igb_change_mtu - Change the Maximum Transfer Unit
5616  * @netdev: network interface device structure
5617  * @new_mtu: new value for maximum frame size
5618  *
5619  * Returns 0 on success, negative on failure
5620  **/
5621 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5622 {
5623         struct igb_adapter *adapter = netdev_priv(netdev);
5624         struct e1000_hw *hw = &adapter->hw;
5625         struct pci_dev *pdev = adapter->pdev;
5626         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5627
5628         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5629                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5630                 return -EINVAL;
5631         }
5632
5633 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5634         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5635                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5636                 return -EINVAL;
5637         }
5638
5639         /* adjust max frame to be at least the size of a standard frame */
5640         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5641                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5642
5643         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5644                 usleep_range(1000, 2000);
5645
5646         /* igb_down has a dependency on max_frame_size */
5647         adapter->max_frame_size = max_frame;
5648
5649         if (netif_running(netdev))
5650                 igb_down(adapter);
5651
5652         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5653                 netdev->mtu, new_mtu);
5654         netdev->mtu = new_mtu;
5655         hw->dev_spec._82575.mtu = new_mtu;
5656
5657         if (netif_running(netdev))
5658                 igb_up(adapter);
5659         else
5660                 igb_reset(adapter);
5661
5662         clear_bit(__IGB_RESETTING, &adapter->state);
5663
5664         return 0;
5665 }
5666
5667 /**
5668  * igb_update_stats - Update the board statistics counters
5669  * @adapter: board private structure
5670  **/
5671
5672 void igb_update_stats(struct igb_adapter *adapter)
5673 {
5674 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5675         struct net_device_stats *net_stats = &adapter->netdev->stats;
5676 #else
5677         struct net_device_stats *net_stats = &adapter->net_stats;
5678 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5679         struct e1000_hw *hw = &adapter->hw;
5680 #ifdef HAVE_PCI_ERS
5681         struct pci_dev *pdev = adapter->pdev;
5682 #endif
5683         u32 reg, mpc;
5684         u16 phy_tmp;
5685         int i;
5686         u64 bytes, packets;
5687 #ifndef IGB_NO_LRO
5688         u32 flushed = 0, coal = 0;
5689         struct igb_q_vector *q_vector;
5690 #endif
5691
5692 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5693
5694         /*
5695          * Prevent stats update while adapter is being reset, or if the pci
5696          * connection is down.
5697          */
5698         if (adapter->link_speed == 0)
5699                 return;
5700 #ifdef HAVE_PCI_ERS
5701         if (pci_channel_offline(pdev))
5702                 return;
5703
5704 #endif
5705 #ifndef IGB_NO_LRO
5706         for (i = 0; i < adapter->num_q_vectors; i++) {
5707                 q_vector = adapter->q_vector[i];
5708                 if (!q_vector)
5709                         continue;
5710                 flushed += q_vector->lrolist.stats.flushed;
5711                 coal += q_vector->lrolist.stats.coal;
5712         }
5713         adapter->lro_stats.flushed = flushed;
5714         adapter->lro_stats.coal = coal;
5715
5716 #endif
5717         bytes = 0;
5718         packets = 0;
5719         for (i = 0; i < adapter->num_rx_queues; i++) {
5720                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5721                 struct igb_ring *ring = adapter->rx_ring[i];
5722                 ring->rx_stats.drops += rqdpc_tmp;
5723                 net_stats->rx_fifo_errors += rqdpc_tmp;
5724 #ifdef CONFIG_IGB_VMDQ_NETDEV
5725                 if (!ring->vmdq_netdev) {
5726                         bytes += ring->rx_stats.bytes;
5727                         packets += ring->rx_stats.packets;
5728                 }
5729 #else
5730                 bytes += ring->rx_stats.bytes;
5731                 packets += ring->rx_stats.packets;
5732 #endif
5733         }
5734
5735         net_stats->rx_bytes = bytes;
5736         net_stats->rx_packets = packets;
5737
5738         bytes = 0;
5739         packets = 0;
5740         for (i = 0; i < adapter->num_tx_queues; i++) {
5741                 struct igb_ring *ring = adapter->tx_ring[i];
5742 #ifdef CONFIG_IGB_VMDQ_NETDEV
5743                 if (!ring->vmdq_netdev) {
5744                         bytes += ring->tx_stats.bytes;
5745                         packets += ring->tx_stats.packets;
5746                 }
5747 #else
5748                 bytes += ring->tx_stats.bytes;
5749                 packets += ring->tx_stats.packets;
5750 #endif
5751         }
5752         net_stats->tx_bytes = bytes;
5753         net_stats->tx_packets = packets;
5754
5755         /* read stats registers */
5756         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5757         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5758         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5759         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5760         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5761         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5762         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5763
5764         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5765         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5766         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5767         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5768         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5769         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5770         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5771         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5772
5773         mpc = E1000_READ_REG(hw, E1000_MPC);
5774         adapter->stats.mpc += mpc;
5775         net_stats->rx_fifo_errors += mpc;
5776         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5777         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5778         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5779         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5780         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5781         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5782         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5783         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5784         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5785         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5786         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5787         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5788         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5789         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5790         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5791         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5792         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5793         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5794         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5795         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5796         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5797
5798         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5799         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5800         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5801         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5802         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5803         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5804
5805         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5806         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5807
5808         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5809         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5810
5811         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5812         /* read internal phy sepecific stats */
5813         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5814         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5815                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5816
5817                 /* this stat has invalid values on i210/i211 */
5818                 if ((hw->mac.type != e1000_i210) &&
5819                     (hw->mac.type != e1000_i211))
5820                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5821         }
5822         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5823         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5824
5825         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5826         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5827         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5828         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5829         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5830         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5831         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5832         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5833         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5834
5835         /* Fill out the OS statistics structure */
5836         net_stats->multicast = adapter->stats.mprc;
5837         net_stats->collisions = adapter->stats.colc;
5838
5839         /* Rx Errors */
5840
5841         /* RLEC on some newer hardware can be incorrect so build
5842          * our own version based on RUC and ROC */
5843         net_stats->rx_errors = adapter->stats.rxerrc +
5844                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5845                 adapter->stats.ruc + adapter->stats.roc +
5846                 adapter->stats.cexterr;
5847         net_stats->rx_length_errors = adapter->stats.ruc +
5848                                       adapter->stats.roc;
5849         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5850         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5851         net_stats->rx_missed_errors = adapter->stats.mpc;
5852
5853         /* Tx Errors */
5854         net_stats->tx_errors = adapter->stats.ecol +
5855                                adapter->stats.latecol;
5856         net_stats->tx_aborted_errors = adapter->stats.ecol;
5857         net_stats->tx_window_errors = adapter->stats.latecol;
5858         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5859
5860         /* Tx Dropped needs to be maintained elsewhere */
5861
5862         /* Phy Stats */
5863         if (hw->phy.media_type == e1000_media_type_copper) {
5864                 if ((adapter->link_speed == SPEED_1000) &&
5865                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5866                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5867                         adapter->phy_stats.idle_errors += phy_tmp;
5868                 }
5869         }
5870
5871         /* Management Stats */
5872         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5873         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5874         if (hw->mac.type > e1000_82580) {
5875                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5876                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5877                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5878                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5879         }
5880 }
5881
5882 static irqreturn_t igb_msix_other(int irq, void *data)
5883 {
5884         struct igb_adapter *adapter = data;
5885         struct e1000_hw *hw = &adapter->hw;
5886         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5887         /* reading ICR causes bit 31 of EICR to be cleared */
5888
5889         if (icr & E1000_ICR_DRSTA)
5890                 schedule_work(&adapter->reset_task);
5891
5892         if (icr & E1000_ICR_DOUTSYNC) {
5893                 /* HW is reporting DMA is out of sync */
5894                 adapter->stats.doosync++;
5895                 /* The DMA Out of Sync is also indication of a spoof event
5896                  * in IOV mode. Check the Wrong VM Behavior register to
5897                  * see if it is really a spoof event. */
5898                 igb_check_wvbr(adapter);
5899         }
5900
5901         /* Check for a mailbox event */
5902         if (icr & E1000_ICR_VMMB)
5903                 igb_msg_task(adapter);
5904
5905         if (icr & E1000_ICR_LSC) {
5906                 hw->mac.get_link_status = 1;
5907                 /* guard against interrupt when we're going down */
5908                 if (!test_bit(__IGB_DOWN, &adapter->state))
5909                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5910         }
5911
5912 #ifdef HAVE_PTP_1588_CLOCK
5913         if (icr & E1000_ICR_TS) {
5914                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5915
5916                 if (tsicr & E1000_TSICR_TXTS) {
5917                         /* acknowledge the interrupt */
5918                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5919                         /* retrieve hardware timestamp */
5920                         schedule_work(&adapter->ptp_tx_work);
5921                 }
5922         }
5923 #endif /* HAVE_PTP_1588_CLOCK */
5924
5925         /* Check for MDD event */
5926         if (icr & E1000_ICR_MDDET)
5927                 igb_process_mdd_event(adapter);
5928
5929         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5930
5931         return IRQ_HANDLED;
5932 }
5933
5934 static void igb_write_itr(struct igb_q_vector *q_vector)
5935 {
5936         struct igb_adapter *adapter = q_vector->adapter;
5937         u32 itr_val = q_vector->itr_val & 0x7FFC;
5938
5939         if (!q_vector->set_itr)
5940                 return;
5941
5942         if (!itr_val)
5943                 itr_val = 0x4;
5944
5945         if (adapter->hw.mac.type == e1000_82575)
5946                 itr_val |= itr_val << 16;
5947         else
5948                 itr_val |= E1000_EITR_CNT_IGNR;
5949
5950         writel(itr_val, q_vector->itr_register);
5951         q_vector->set_itr = 0;
5952 }
5953
5954 static irqreturn_t igb_msix_ring(int irq, void *data)
5955 {
5956         struct igb_q_vector *q_vector = data;
5957
5958         /* Write the ITR value calculated from the previous interrupt. */
5959         igb_write_itr(q_vector);
5960
5961         napi_schedule(&q_vector->napi);
5962
5963         return IRQ_HANDLED;
5964 }
5965
5966 #ifdef IGB_DCA
5967 static void igb_update_tx_dca(struct igb_adapter *adapter,
5968                               struct igb_ring *tx_ring,
5969                               int cpu)
5970 {
5971         struct e1000_hw *hw = &adapter->hw;
5972         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5973
5974         if (hw->mac.type != e1000_82575)
5975                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5976
5977         /*
5978          * We can enable relaxed ordering for reads, but not writes when
5979          * DCA is enabled.  This is due to a known issue in some chipsets
5980          * which will cause the DCA tag to be cleared.
5981          */
5982         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
5983                   E1000_DCA_TXCTRL_DATA_RRO_EN |
5984                   E1000_DCA_TXCTRL_DESC_DCA_EN;
5985
5986         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
5987 }
5988
5989 static void igb_update_rx_dca(struct igb_adapter *adapter,
5990                               struct igb_ring *rx_ring,
5991                               int cpu)
5992 {
5993         struct e1000_hw *hw = &adapter->hw;
5994         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
5995
5996         if (hw->mac.type != e1000_82575)
5997                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
5998
5999         /*
6000          * We can enable relaxed ordering for reads, but not writes when
6001          * DCA is enabled.  This is due to a known issue in some chipsets
6002          * which will cause the DCA tag to be cleared.
6003          */
6004         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6005                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6006
6007         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6008 }
6009
6010 static void igb_update_dca(struct igb_q_vector *q_vector)
6011 {
6012         struct igb_adapter *adapter = q_vector->adapter;
6013         int cpu = get_cpu();
6014
6015         if (q_vector->cpu == cpu)
6016                 goto out_no_update;
6017
6018         if (q_vector->tx.ring)
6019                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6020
6021         if (q_vector->rx.ring)
6022                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6023
6024         q_vector->cpu = cpu;
6025 out_no_update:
6026         put_cpu();
6027 }
6028
6029 static void igb_setup_dca(struct igb_adapter *adapter)
6030 {
6031         struct e1000_hw *hw = &adapter->hw;
6032         int i;
6033
6034         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6035                 return;
6036
6037         /* Always use CB2 mode, difference is masked in the CB driver. */
6038         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6039
6040         for (i = 0; i < adapter->num_q_vectors; i++) {
6041                 adapter->q_vector[i]->cpu = -1;
6042                 igb_update_dca(adapter->q_vector[i]);
6043         }
6044 }
6045
6046 static int __igb_notify_dca(struct device *dev, void *data)
6047 {
6048         struct net_device *netdev = dev_get_drvdata(dev);
6049         struct igb_adapter *adapter = netdev_priv(netdev);
6050         struct pci_dev *pdev = adapter->pdev;
6051         struct e1000_hw *hw = &adapter->hw;
6052         unsigned long event = *(unsigned long *)data;
6053
6054         switch (event) {
6055         case DCA_PROVIDER_ADD:
6056                 /* if already enabled, don't do it again */
6057                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6058                         break;
6059                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6060                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6061                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6062                         igb_setup_dca(adapter);
6063                         break;
6064                 }
6065                 /* Fall Through since DCA is disabled. */
6066         case DCA_PROVIDER_REMOVE:
6067                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6068                         /* without this a class_device is left
6069                          * hanging around in the sysfs model */
6070                         dca_remove_requester(dev);
6071                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6072                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6073                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6074                 }
6075                 break;
6076         }
6077
6078         return E1000_SUCCESS;
6079 }
6080
6081 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6082                           void *p)
6083 {
6084         int ret_val;
6085
6086         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6087                                          __igb_notify_dca);
6088
6089         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6090 }
6091 #endif /* IGB_DCA */
6092
6093 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6094 {
6095         unsigned char mac_addr[ETH_ALEN];
6096
6097         random_ether_addr(mac_addr);
6098         igb_set_vf_mac(adapter, vf, mac_addr);
6099
6100 #ifdef IFLA_VF_MAX
6101 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6102         /* By default spoof check is enabled for all VFs */
6103         adapter->vf_data[vf].spoofchk_enabled = true;
6104 #endif
6105 #endif
6106
6107         return true;
6108 }
6109
6110 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6111 {
6112         struct e1000_hw *hw = &adapter->hw;
6113         u32 ping;
6114         int i;
6115
6116         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6117                 ping = E1000_PF_CONTROL_MSG;
6118                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6119                         ping |= E1000_VT_MSGTYPE_CTS;
6120                 e1000_write_mbx(hw, &ping, 1, i);
6121         }
6122 }
6123
6124 /**
6125  *  igb_mta_set_ - Set multicast filter table address
6126  *  @adapter: pointer to the adapter structure
6127  *  @hash_value: determines the MTA register and bit to set
6128  *
6129  *  The multicast table address is a register array of 32-bit registers.
6130  *  The hash_value is used to determine what register the bit is in, the
6131  *  current value is read, the new bit is OR'd in and the new value is
6132  *  written back into the register.
6133  **/
6134 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6135 {
6136         struct e1000_hw *hw = &adapter->hw;
6137         u32 hash_bit, hash_reg, mta;
6138
6139         /*
6140          * The MTA is a register array of 32-bit registers. It is
6141          * treated like an array of (32*mta_reg_count) bits.  We want to
6142          * set bit BitArray[hash_value]. So we figure out what register
6143          * the bit is in, read it, OR in the new bit, then write
6144          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6145          * mask to bits 31:5 of the hash value which gives us the
6146          * register we're modifying.  The hash bit within that register
6147          * is determined by the lower 5 bits of the hash value.
6148          */
6149         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6150         hash_bit = hash_value & 0x1F;
6151
6152         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6153
6154         mta |= (1 << hash_bit);
6155
6156         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6157         E1000_WRITE_FLUSH(hw);
6158 }
6159
6160 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6161 {
6162
6163         struct e1000_hw *hw = &adapter->hw;
6164         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6165         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6166
6167         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6168                             IGB_VF_FLAG_MULTI_PROMISC);
6169         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6170
6171 #ifdef IGB_ENABLE_VF_PROMISC
6172         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6173                 vmolr |= E1000_VMOLR_ROPE;
6174                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6175                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6176         }
6177 #endif
6178         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6179                 vmolr |= E1000_VMOLR_MPME;
6180                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6181                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6182         } else {
6183                 /*
6184                  * if we have hashes and we are clearing a multicast promisc
6185                  * flag we need to write the hashes to the MTA as this step
6186                  * was previously skipped
6187                  */
6188                 if (vf_data->num_vf_mc_hashes > 30) {
6189                         vmolr |= E1000_VMOLR_MPME;
6190                 } else if (vf_data->num_vf_mc_hashes) {
6191                         int j;
6192                         vmolr |= E1000_VMOLR_ROMPE;
6193                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6194                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6195                 }
6196         }
6197
6198         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6199
6200         /* there are flags left unprocessed, likely not supported */
6201         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6202                 return -EINVAL;
6203
6204         return 0;
6205
6206 }
6207
6208 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6209                                   u32 *msgbuf, u32 vf)
6210 {
6211         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6212         u16 *hash_list = (u16 *)&msgbuf[1];
6213         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6214         int i;
6215
6216         /* salt away the number of multicast addresses assigned
6217          * to this VF for later use to restore when the PF multi cast
6218          * list changes
6219          */
6220         vf_data->num_vf_mc_hashes = n;
6221
6222         /* only up to 30 hash values supported */
6223         if (n > 30)
6224                 n = 30;
6225
6226         /* store the hashes for later use */
6227         for (i = 0; i < n; i++)
6228                 vf_data->vf_mc_hashes[i] = hash_list[i];
6229
6230         /* Flush and reset the mta with the new values */
6231         igb_set_rx_mode(adapter->netdev);
6232
6233         return 0;
6234 }
6235
6236 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6237 {
6238         struct e1000_hw *hw = &adapter->hw;
6239         struct vf_data_storage *vf_data;
6240         int i, j;
6241
6242         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6243                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6244                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6245
6246                 vf_data = &adapter->vf_data[i];
6247
6248                 if ((vf_data->num_vf_mc_hashes > 30) ||
6249                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6250                         vmolr |= E1000_VMOLR_MPME;
6251                 } else if (vf_data->num_vf_mc_hashes) {
6252                         vmolr |= E1000_VMOLR_ROMPE;
6253                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6254                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6255                 }
6256                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6257         }
6258 }
6259
6260 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6261 {
6262         struct e1000_hw *hw = &adapter->hw;
6263         u32 pool_mask, reg, vid;
6264         u16 vlan_default;
6265         int i;
6266
6267         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6268
6269         /* Find the vlan filter for this id */
6270         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6271                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6272
6273                 /* remove the vf from the pool */
6274                 reg &= ~pool_mask;
6275
6276                 /* if pool is empty then remove entry from vfta */
6277                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6278                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6279                         reg = 0;
6280                         vid = reg & E1000_VLVF_VLANID_MASK;
6281                         igb_vfta_set(adapter, vid, FALSE);
6282                 }
6283
6284                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6285         }
6286
6287         adapter->vf_data[vf].vlans_enabled = 0;
6288
6289         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6290         if (vlan_default)
6291                 igb_vlvf_set(adapter, vlan_default, true, vf);
6292 }
6293
6294 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6295 {
6296         struct e1000_hw *hw = &adapter->hw;
6297         u32 reg, i;
6298
6299         /* The vlvf table only exists on 82576 hardware and newer */
6300         if (hw->mac.type < e1000_82576)
6301                 return -1;
6302
6303         /* we only need to do this if VMDq is enabled */
6304         if (!adapter->vmdq_pools)
6305                 return -1;
6306
6307         /* Find the vlan filter for this id */
6308         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6309                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6310                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6311                     vid == (reg & E1000_VLVF_VLANID_MASK))
6312                         break;
6313         }
6314
6315         if (add) {
6316                 if (i == E1000_VLVF_ARRAY_SIZE) {
6317                         /* Did not find a matching VLAN ID entry that was
6318                          * enabled.  Search for a free filter entry, i.e.
6319                          * one without the enable bit set
6320                          */
6321                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6322                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6323                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6324                                         break;
6325                         }
6326                 }
6327                 if (i < E1000_VLVF_ARRAY_SIZE) {
6328                         /* Found an enabled/available entry */
6329                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6330
6331                         /* if !enabled we need to set this up in vfta */
6332                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6333                                 /* add VID to filter table */
6334                                 igb_vfta_set(adapter, vid, TRUE);
6335                                 reg |= E1000_VLVF_VLANID_ENABLE;
6336                         }
6337                         reg &= ~E1000_VLVF_VLANID_MASK;
6338                         reg |= vid;
6339                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6340
6341                         /* do not modify RLPML for PF devices */
6342                         if (vf >= adapter->vfs_allocated_count)
6343                                 return E1000_SUCCESS;
6344
6345                         if (!adapter->vf_data[vf].vlans_enabled) {
6346                                 u32 size;
6347                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6348                                 size = reg & E1000_VMOLR_RLPML_MASK;
6349                                 size += 4;
6350                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6351                                 reg |= size;
6352                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6353                         }
6354
6355                         adapter->vf_data[vf].vlans_enabled++;
6356                 }
6357         } else {
6358                 if (i < E1000_VLVF_ARRAY_SIZE) {
6359                         /* remove vf from the pool */
6360                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6361                         /* if pool is empty then remove entry from vfta */
6362                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6363                                 reg = 0;
6364                                 igb_vfta_set(adapter, vid, FALSE);
6365                         }
6366                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6367
6368                         /* do not modify RLPML for PF devices */
6369                         if (vf >= adapter->vfs_allocated_count)
6370                                 return E1000_SUCCESS;
6371
6372                         adapter->vf_data[vf].vlans_enabled--;
6373                         if (!adapter->vf_data[vf].vlans_enabled) {
6374                                 u32 size;
6375                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6376                                 size = reg & E1000_VMOLR_RLPML_MASK;
6377                                 size -= 4;
6378                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6379                                 reg |= size;
6380                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6381                         }
6382                 }
6383         }
6384         return E1000_SUCCESS;
6385 }
6386
6387 #ifdef IFLA_VF_MAX
6388 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6389 {
6390         struct e1000_hw *hw = &adapter->hw;
6391
6392         if (vid)
6393                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6394         else
6395                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6396 }
6397
6398 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6399                                int vf, u16 vlan, u8 qos)
6400 {
6401         int err = 0;
6402         struct igb_adapter *adapter = netdev_priv(netdev);
6403
6404         /* VLAN IDs accepted range 0-4094 */
6405         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6406                 return -EINVAL;
6407         if (vlan || qos) {
6408                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6409                 if (err)
6410                         goto out;
6411                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6412                 igb_set_vmolr(adapter, vf, !vlan);
6413                 adapter->vf_data[vf].pf_vlan = vlan;
6414                 adapter->vf_data[vf].pf_qos = qos;
6415                 igb_set_vf_vlan_strip(adapter, vf, true);
6416                 dev_info(&adapter->pdev->dev,
6417                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6418                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6419                         dev_warn(&adapter->pdev->dev,
6420                                  "The VF VLAN has been set,"
6421                                  " but the PF device is not up.\n");
6422                         dev_warn(&adapter->pdev->dev,
6423                                  "Bring the PF device up before"
6424                                  " attempting to use the VF device.\n");
6425                 }
6426         } else {
6427                 if (adapter->vf_data[vf].pf_vlan)
6428                         dev_info(&adapter->pdev->dev,
6429                                  "Clearing VLAN on VF %d\n", vf);
6430                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6431                                    false, vf);
6432                 igb_set_vmvir(adapter, vlan, vf);
6433                 igb_set_vmolr(adapter, vf, true);
6434                 igb_set_vf_vlan_strip(adapter, vf, false);
6435                 adapter->vf_data[vf].pf_vlan = 0;
6436                 adapter->vf_data[vf].pf_qos = 0;
6437        }
6438 out:
6439        return err;
6440 }
6441
6442 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6443 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6444                                 bool setting)
6445 {
6446         struct igb_adapter *adapter = netdev_priv(netdev);
6447         struct e1000_hw *hw = &adapter->hw;
6448         u32 dtxswc, reg_offset;
6449
6450         if (!adapter->vfs_allocated_count)
6451                 return -EOPNOTSUPP;
6452
6453         if (vf >= adapter->vfs_allocated_count)
6454                 return -EINVAL;
6455
6456         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6457         dtxswc = E1000_READ_REG(hw, reg_offset);
6458         if (setting)
6459                 dtxswc |= ((1 << vf) |
6460                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6461         else
6462                 dtxswc &= ~((1 << vf) |
6463                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6464         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6465
6466         adapter->vf_data[vf].spoofchk_enabled = setting;
6467         return E1000_SUCCESS;
6468 }
6469 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6470 #endif /* IFLA_VF_MAX */
6471
6472 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6473 {
6474         struct e1000_hw *hw = &adapter->hw;
6475         int i;
6476         u32 reg;
6477
6478         /* Find the vlan filter for this id */
6479         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6480                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6481                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6482                     vid == (reg & E1000_VLVF_VLANID_MASK))
6483                         break;
6484         }
6485
6486         if (i >= E1000_VLVF_ARRAY_SIZE)
6487                 i = -1;
6488
6489         return i;
6490 }
6491
6492 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6493 {
6494         struct e1000_hw *hw = &adapter->hw;
6495         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6496         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6497         int err = 0;
6498
6499         if (vid)
6500                 igb_set_vf_vlan_strip(adapter, vf, true);
6501         else
6502                 igb_set_vf_vlan_strip(adapter, vf, false);
6503
6504         /* If in promiscuous mode we need to make sure the PF also has
6505          * the VLAN filter set.
6506          */
6507         if (add && (adapter->netdev->flags & IFF_PROMISC))
6508                 err = igb_vlvf_set(adapter, vid, add,
6509                                    adapter->vfs_allocated_count);
6510         if (err)
6511                 goto out;
6512
6513         err = igb_vlvf_set(adapter, vid, add, vf);
6514
6515         if (err)
6516                 goto out;
6517
6518         /* Go through all the checks to see if the VLAN filter should
6519          * be wiped completely.
6520          */
6521         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6522                 u32 vlvf, bits;
6523
6524                 int regndx = igb_find_vlvf_entry(adapter, vid);
6525                 if (regndx < 0)
6526                         goto out;
6527                 /* See if any other pools are set for this VLAN filter
6528                  * entry other than the PF.
6529                  */
6530                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6531                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6532                               adapter->vfs_allocated_count);
6533                 /* If the filter was removed then ensure PF pool bit
6534                  * is cleared if the PF only added itself to the pool
6535                  * because the PF is in promiscuous mode.
6536                  */
6537                 if ((vlvf & VLAN_VID_MASK) == vid &&
6538 #ifndef HAVE_VLAN_RX_REGISTER
6539                     !test_bit(vid, adapter->active_vlans) &&
6540 #endif
6541                     !bits)
6542                         igb_vlvf_set(adapter, vid, add,
6543                                      adapter->vfs_allocated_count);
6544         }
6545
6546 out:
6547         return err;
6548 }
6549
6550 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6551 {
6552         struct e1000_hw *hw = &adapter->hw;
6553
6554         /* clear flags except flag that the PF has set the MAC */
6555         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6556         adapter->vf_data[vf].last_nack = jiffies;
6557
6558         /* reset offloads to defaults */
6559         igb_set_vmolr(adapter, vf, true);
6560
6561         /* reset vlans for device */
6562         igb_clear_vf_vfta(adapter, vf);
6563 #ifdef IFLA_VF_MAX
6564         if (adapter->vf_data[vf].pf_vlan)
6565                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6566                                     adapter->vf_data[vf].pf_vlan,
6567                                     adapter->vf_data[vf].pf_qos);
6568         else
6569                 igb_clear_vf_vfta(adapter, vf);
6570 #endif
6571
6572         /* reset multicast table array for vf */
6573         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6574
6575         /* Flush and reset the mta with the new values */
6576         igb_set_rx_mode(adapter->netdev);
6577
6578         /*
6579          * Reset the VFs TDWBAL and TDWBAH registers which are not
6580          * cleared by a VFLR
6581          */
6582         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6583         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6584         if (hw->mac.type == e1000_82576) {
6585                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6586                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6587         }
6588 }
6589
6590 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6591 {
6592         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6593
6594         /* generate a new mac address as we were hotplug removed/added */
6595         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6596                 random_ether_addr(vf_mac);
6597
6598         /* process remaining reset events */
6599         igb_vf_reset(adapter, vf);
6600 }
6601
6602 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6603 {
6604         struct e1000_hw *hw = &adapter->hw;
6605         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6606         u32 reg, msgbuf[3];
6607         u8 *addr = (u8 *)(&msgbuf[1]);
6608
6609         /* process all the same items cleared in a function level reset */
6610         igb_vf_reset(adapter, vf);
6611
6612         /* set vf mac address */
6613         igb_del_mac_filter(adapter, vf_mac, vf);
6614         igb_add_mac_filter(adapter, vf_mac, vf);
6615
6616         /* enable transmit and receive for vf */
6617         reg = E1000_READ_REG(hw, E1000_VFTE);
6618         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6619         reg = E1000_READ_REG(hw, E1000_VFRE);
6620         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6621
6622         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6623
6624         /* reply to reset with ack and vf mac address */
6625         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6626         memcpy(addr, vf_mac, 6);
6627         e1000_write_mbx(hw, msgbuf, 3, vf);
6628 }
6629
6630 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6631 {
6632         /*
6633          * The VF MAC Address is stored in a packed array of bytes
6634          * starting at the second 32 bit word of the msg array
6635          */
6636         unsigned char *addr = (unsigned char *)&msg[1];
6637         int err = -1;
6638
6639         if (is_valid_ether_addr(addr))
6640                 err = igb_set_vf_mac(adapter, vf, addr);
6641
6642         return err;
6643 }
6644
6645 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6646 {
6647         struct e1000_hw *hw = &adapter->hw;
6648         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6649         u32 msg = E1000_VT_MSGTYPE_NACK;
6650
6651         /* if device isn't clear to send it shouldn't be reading either */
6652         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6653             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6654                 e1000_write_mbx(hw, &msg, 1, vf);
6655                 vf_data->last_nack = jiffies;
6656         }
6657 }
6658
6659 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6660 {
6661         struct pci_dev *pdev = adapter->pdev;
6662         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6663         struct e1000_hw *hw = &adapter->hw;
6664         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6665         s32 retval;
6666
6667         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6668
6669         if (retval) {
6670                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6671                 return;
6672         }
6673
6674         /* this is a message we already processed, do nothing */
6675         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6676                 return;
6677
6678         /*
6679          * until the vf completes a reset it should not be
6680          * allowed to start any configuration.
6681          */
6682
6683         if (msgbuf[0] == E1000_VF_RESET) {
6684                 igb_vf_reset_msg(adapter, vf);
6685                 return;
6686         }
6687
6688         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6689                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6690                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6691                         e1000_write_mbx(hw, msgbuf, 1, vf);
6692                         vf_data->last_nack = jiffies;
6693                 }
6694                 return;
6695         }
6696
6697         switch ((msgbuf[0] & 0xFFFF)) {
6698         case E1000_VF_SET_MAC_ADDR:
6699                 retval = -EINVAL;
6700 #ifndef IGB_DISABLE_VF_MAC_SET
6701                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6702                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6703                 else
6704                         DPRINTK(DRV, INFO,
6705                                 "VF %d attempted to override administratively "
6706                                 "set MAC address\nReload the VF driver to "
6707                                 "resume operations\n", vf);
6708 #endif
6709                 break;
6710         case E1000_VF_SET_PROMISC:
6711                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6712                 break;
6713         case E1000_VF_SET_MULTICAST:
6714                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6715                 break;
6716         case E1000_VF_SET_LPE:
6717                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6718                 break;
6719         case E1000_VF_SET_VLAN:
6720                 retval = -1;
6721 #ifdef IFLA_VF_MAX
6722                 if (vf_data->pf_vlan)
6723                         DPRINTK(DRV, INFO,
6724                                 "VF %d attempted to override administratively "
6725                                 "set VLAN tag\nReload the VF driver to "
6726                                 "resume operations\n", vf);
6727                 else
6728 #endif
6729                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6730                 break;
6731         default:
6732                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6733                 retval = -E1000_ERR_MBX;
6734                 break;
6735         }
6736
6737         /* notify the VF of the results of what it sent us */
6738         if (retval)
6739                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6740         else
6741                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6742
6743         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6744
6745         e1000_write_mbx(hw, msgbuf, 1, vf);
6746 }
6747
6748 static void igb_msg_task(struct igb_adapter *adapter)
6749 {
6750         struct e1000_hw *hw = &adapter->hw;
6751         u32 vf;
6752
6753         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6754                 /* process any reset requests */
6755                 if (!e1000_check_for_rst(hw, vf))
6756                         igb_vf_reset_event(adapter, vf);
6757
6758                 /* process any messages pending */
6759                 if (!e1000_check_for_msg(hw, vf))
6760                         igb_rcv_msg_from_vf(adapter, vf);
6761
6762                 /* process any acks */
6763                 if (!e1000_check_for_ack(hw, vf))
6764                         igb_rcv_ack_from_vf(adapter, vf);
6765         }
6766 }
6767
6768 /**
6769  *  igb_set_uta - Set unicast filter table address
6770  *  @adapter: board private structure
6771  *
6772  *  The unicast table address is a register array of 32-bit registers.
6773  *  The table is meant to be used in a way similar to how the MTA is used
6774  *  however due to certain limitations in the hardware it is necessary to
6775  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6776  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6777  **/
6778 static void igb_set_uta(struct igb_adapter *adapter)
6779 {
6780         struct e1000_hw *hw = &adapter->hw;
6781         int i;
6782
6783         /* The UTA table only exists on 82576 hardware and newer */
6784         if (hw->mac.type < e1000_82576)
6785                 return;
6786
6787         /* we only need to do this if VMDq is enabled */
6788         if (!adapter->vmdq_pools)
6789                 return;
6790
6791         for (i = 0; i < hw->mac.uta_reg_count; i++)
6792                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6793 }
6794
6795 /**
6796  * igb_intr_msi - Interrupt Handler
6797  * @irq: interrupt number
6798  * @data: pointer to a network interface device structure
6799  **/
6800 static irqreturn_t igb_intr_msi(int irq, void *data)
6801 {
6802         struct igb_adapter *adapter = data;
6803         struct igb_q_vector *q_vector = adapter->q_vector[0];
6804         struct e1000_hw *hw = &adapter->hw;
6805         /* read ICR disables interrupts using IAM */
6806         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6807
6808         igb_write_itr(q_vector);
6809
6810         if (icr & E1000_ICR_DRSTA)
6811                 schedule_work(&adapter->reset_task);
6812
6813         if (icr & E1000_ICR_DOUTSYNC) {
6814                 /* HW is reporting DMA is out of sync */
6815                 adapter->stats.doosync++;
6816         }
6817
6818         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6819                 hw->mac.get_link_status = 1;
6820                 if (!test_bit(__IGB_DOWN, &adapter->state))
6821                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6822         }
6823
6824 #ifdef HAVE_PTP_1588_CLOCK
6825         if (icr & E1000_ICR_TS) {
6826                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6827
6828                 if (tsicr & E1000_TSICR_TXTS) {
6829                         /* acknowledge the interrupt */
6830                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6831                         /* retrieve hardware timestamp */
6832                         schedule_work(&adapter->ptp_tx_work);
6833                 }
6834         }
6835 #endif /* HAVE_PTP_1588_CLOCK */
6836
6837         napi_schedule(&q_vector->napi);
6838
6839         return IRQ_HANDLED;
6840 }
6841
6842 /**
6843  * igb_intr - Legacy Interrupt Handler
6844  * @irq: interrupt number
6845  * @data: pointer to a network interface device structure
6846  **/
6847 static irqreturn_t igb_intr(int irq, void *data)
6848 {
6849         struct igb_adapter *adapter = data;
6850         struct igb_q_vector *q_vector = adapter->q_vector[0];
6851         struct e1000_hw *hw = &adapter->hw;
6852         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6853          * need for the IMC write */
6854         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6855
6856         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6857          * not set, then the adapter didn't send an interrupt */
6858         if (!(icr & E1000_ICR_INT_ASSERTED))
6859                 return IRQ_NONE;
6860
6861         igb_write_itr(q_vector);
6862
6863         if (icr & E1000_ICR_DRSTA)
6864                 schedule_work(&adapter->reset_task);
6865
6866         if (icr & E1000_ICR_DOUTSYNC) {
6867                 /* HW is reporting DMA is out of sync */
6868                 adapter->stats.doosync++;
6869         }
6870
6871         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6872                 hw->mac.get_link_status = 1;
6873                 /* guard against interrupt when we're going down */
6874                 if (!test_bit(__IGB_DOWN, &adapter->state))
6875                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6876         }
6877
6878 #ifdef HAVE_PTP_1588_CLOCK
6879         if (icr & E1000_ICR_TS) {
6880                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6881
6882                 if (tsicr & E1000_TSICR_TXTS) {
6883                         /* acknowledge the interrupt */
6884                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6885                         /* retrieve hardware timestamp */
6886                         schedule_work(&adapter->ptp_tx_work);
6887                 }
6888         }
6889 #endif /* HAVE_PTP_1588_CLOCK */
6890
6891         napi_schedule(&q_vector->napi);
6892
6893         return IRQ_HANDLED;
6894 }
6895
6896 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6897 {
6898         struct igb_adapter *adapter = q_vector->adapter;
6899         struct e1000_hw *hw = &adapter->hw;
6900
6901         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6902             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6903                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6904                         igb_set_itr(q_vector);
6905                 else
6906                         igb_update_ring_itr(q_vector);
6907         }
6908
6909         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6910                 if (adapter->msix_entries)
6911                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6912                 else
6913                         igb_irq_enable(adapter);
6914         }
6915 }
6916
6917 /**
6918  * igb_poll - NAPI Rx polling callback
6919  * @napi: napi polling structure
6920  * @budget: count of how many packets we should handle
6921  **/
6922 static int igb_poll(struct napi_struct *napi, int budget)
6923 {
6924         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6925         bool clean_complete = true;
6926
6927 #ifdef IGB_DCA
6928         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6929                 igb_update_dca(q_vector);
6930 #endif
6931         if (q_vector->tx.ring)
6932                 clean_complete = igb_clean_tx_irq(q_vector);
6933
6934         if (q_vector->rx.ring)
6935                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6936
6937 #ifndef HAVE_NETDEV_NAPI_LIST
6938         /* if netdev is disabled we need to stop polling */
6939         if (!netif_running(q_vector->adapter->netdev))
6940                 clean_complete = true;
6941
6942 #endif
6943         /* If all work not completed, return budget and keep polling */
6944         if (!clean_complete)
6945                 return budget;
6946
6947         /* If not enough Rx work done, exit the polling mode */
6948         napi_complete(napi);
6949         igb_ring_irq_enable(q_vector);
6950
6951         return 0;
6952 }
6953
6954 /**
6955  * igb_clean_tx_irq - Reclaim resources after transmit completes
6956  * @q_vector: pointer to q_vector containing needed info
6957  * returns TRUE if ring is completely cleaned
6958  **/
6959 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6960 {
6961         struct igb_adapter *adapter = q_vector->adapter;
6962         struct igb_ring *tx_ring = q_vector->tx.ring;
6963         struct igb_tx_buffer *tx_buffer;
6964         union e1000_adv_tx_desc *tx_desc;
6965         unsigned int total_bytes = 0, total_packets = 0;
6966         unsigned int budget = q_vector->tx.work_limit;
6967         unsigned int i = tx_ring->next_to_clean;
6968
6969         if (test_bit(__IGB_DOWN, &adapter->state))
6970                 return true;
6971
6972         tx_buffer = &tx_ring->tx_buffer_info[i];
6973         tx_desc = IGB_TX_DESC(tx_ring, i);
6974         i -= tx_ring->count;
6975
6976         do {
6977                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
6978
6979                 /* if next_to_watch is not set then there is no work pending */
6980                 if (!eop_desc)
6981                         break;
6982
6983                 /* prevent any other reads prior to eop_desc */
6984                 read_barrier_depends();
6985
6986                 /* if DD is not set pending work has not been completed */
6987                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
6988                         break;
6989
6990                 /* clear next_to_watch to prevent false hangs */
6991                 tx_buffer->next_to_watch = NULL;
6992
6993                 /* update the statistics for this packet */
6994                 total_bytes += tx_buffer->bytecount;
6995                 total_packets += tx_buffer->gso_segs;
6996
6997                 /* free the skb */
6998                 dev_kfree_skb_any(tx_buffer->skb);
6999
7000                 /* unmap skb header data */
7001                 dma_unmap_single(tx_ring->dev,
7002                                  dma_unmap_addr(tx_buffer, dma),
7003                                  dma_unmap_len(tx_buffer, len),
7004                                  DMA_TO_DEVICE);
7005
7006                 /* clear tx_buffer data */
7007                 tx_buffer->skb = NULL;
7008                 dma_unmap_len_set(tx_buffer, len, 0);
7009
7010                 /* clear last DMA location and unmap remaining buffers */
7011                 while (tx_desc != eop_desc) {
7012                         tx_buffer++;
7013                         tx_desc++;
7014                         i++;
7015                         if (unlikely(!i)) {
7016                                 i -= tx_ring->count;
7017                                 tx_buffer = tx_ring->tx_buffer_info;
7018                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7019                         }
7020
7021                         /* unmap any remaining paged data */
7022                         if (dma_unmap_len(tx_buffer, len)) {
7023                                 dma_unmap_page(tx_ring->dev,
7024                                                dma_unmap_addr(tx_buffer, dma),
7025                                                dma_unmap_len(tx_buffer, len),
7026                                                DMA_TO_DEVICE);
7027                                 dma_unmap_len_set(tx_buffer, len, 0);
7028                         }
7029                 }
7030
7031                 /* move us one more past the eop_desc for start of next pkt */
7032                 tx_buffer++;
7033                 tx_desc++;
7034                 i++;
7035                 if (unlikely(!i)) {
7036                         i -= tx_ring->count;
7037                         tx_buffer = tx_ring->tx_buffer_info;
7038                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7039                 }
7040
7041                 /* issue prefetch for next Tx descriptor */
7042                 prefetch(tx_desc);
7043
7044                 /* update budget accounting */
7045                 budget--;
7046         } while (likely(budget));
7047
7048         netdev_tx_completed_queue(txring_txq(tx_ring),
7049                                   total_packets, total_bytes);
7050
7051         i += tx_ring->count;
7052         tx_ring->next_to_clean = i;
7053         tx_ring->tx_stats.bytes += total_bytes;
7054         tx_ring->tx_stats.packets += total_packets;
7055         q_vector->tx.total_bytes += total_bytes;
7056         q_vector->tx.total_packets += total_packets;
7057
7058 #ifdef DEBUG
7059         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7060             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7061 #else
7062         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7063 #endif
7064                 struct e1000_hw *hw = &adapter->hw;
7065
7066                 /* Detect a transmit hang in hardware, this serializes the
7067                  * check with the clearing of time_stamp and movement of i */
7068                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7069                 if (tx_buffer->next_to_watch &&
7070                     time_after(jiffies, tx_buffer->time_stamp +
7071                                (adapter->tx_timeout_factor * HZ))
7072                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7073                          E1000_STATUS_TXOFF)) {
7074
7075                         /* detected Tx unit hang */
7076 #ifdef DEBUG
7077                         adapter->tx_hang_detected = TRUE;
7078                         if (adapter->disable_hw_reset) {
7079                                 DPRINTK(DRV, WARNING,
7080                                         "Deactivating netdev watchdog timer\n");
7081                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7082                                         dev_put(netdev_ring(tx_ring));
7083 #ifndef HAVE_NET_DEVICE_OPS
7084                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7085 #endif
7086                         }
7087 #endif /* DEBUG */
7088                         dev_err(tx_ring->dev,
7089                                 "Detected Tx Unit Hang\n"
7090                                 "  Tx Queue             <%d>\n"
7091                                 "  TDH                  <%x>\n"
7092                                 "  TDT                  <%x>\n"
7093                                 "  next_to_use          <%x>\n"
7094                                 "  next_to_clean        <%x>\n"
7095                                 "buffer_info[next_to_clean]\n"
7096                                 "  time_stamp           <%lx>\n"
7097                                 "  next_to_watch        <%p>\n"
7098                                 "  jiffies              <%lx>\n"
7099                                 "  desc.status          <%x>\n",
7100                                 tx_ring->queue_index,
7101                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7102                                 readl(tx_ring->tail),
7103                                 tx_ring->next_to_use,
7104                                 tx_ring->next_to_clean,
7105                                 tx_buffer->time_stamp,
7106                                 tx_buffer->next_to_watch,
7107                                 jiffies,
7108                                 tx_buffer->next_to_watch->wb.status);
7109                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7110                                 netif_stop_subqueue(netdev_ring(tx_ring),
7111                                                     ring_queue_index(tx_ring));
7112                         else
7113                                 netif_stop_queue(netdev_ring(tx_ring));
7114
7115                         /* we are about to reset, no point in enabling stuff */
7116                         return true;
7117                 }
7118         }
7119
7120 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7121         if (unlikely(total_packets &&
7122                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7123                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7124                 /* Make sure that anybody stopping the queue after this
7125                  * sees the new next_to_clean.
7126                  */
7127                 smp_mb();
7128                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7129                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7130                                                      ring_queue_index(tx_ring)) &&
7131                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7132                                 netif_wake_subqueue(netdev_ring(tx_ring),
7133                                                     ring_queue_index(tx_ring));
7134                                 tx_ring->tx_stats.restart_queue++;
7135                         }
7136                 } else {
7137                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7138                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7139                                 netif_wake_queue(netdev_ring(tx_ring));
7140                                 tx_ring->tx_stats.restart_queue++;
7141                         }
7142                 }
7143         }
7144
7145         return !!budget;
7146 }
7147
7148 #ifdef HAVE_VLAN_RX_REGISTER
7149 /**
7150  * igb_receive_skb - helper function to handle rx indications
7151  * @q_vector: structure containing interrupt and ring information
7152  * @skb: packet to send up
7153  **/
7154 static void igb_receive_skb(struct igb_q_vector *q_vector,
7155                             struct sk_buff *skb)
7156 {
7157         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7158
7159         if (IGB_CB(skb)->vid) {
7160                 if (*vlgrp) {
7161                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7162                                          IGB_CB(skb)->vid, skb);
7163                 } else {
7164                         dev_kfree_skb_any(skb);
7165                 }
7166         } else {
7167                 napi_gro_receive(&q_vector->napi, skb);
7168         }
7169 }
7170
7171 #endif /* HAVE_VLAN_RX_REGISTER */
7172 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7173 /**
7174  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7175  * @rx_ring: rx descriptor ring to store buffers on
7176  * @old_buff: donor buffer to have page reused
7177  *
7178  * Synchronizes page for reuse by the adapter
7179  **/
7180 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7181                               struct igb_rx_buffer *old_buff)
7182 {
7183         struct igb_rx_buffer *new_buff;
7184         u16 nta = rx_ring->next_to_alloc;
7185
7186         new_buff = &rx_ring->rx_buffer_info[nta];
7187
7188         /* update, and store next to alloc */
7189         nta++;
7190         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7191
7192         /* transfer page from old buffer to new buffer */
7193         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7194
7195         /* sync the buffer for use by the device */
7196         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7197                                          old_buff->page_offset,
7198                                          IGB_RX_BUFSZ,
7199                                          DMA_FROM_DEVICE);
7200 }
7201
7202 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7203                                   struct page *page,
7204                                   unsigned int truesize)
7205 {
7206         /* avoid re-using remote pages */
7207         if (unlikely(page_to_nid(page) != numa_node_id()))
7208                 return false;
7209
7210 #if (PAGE_SIZE < 8192)
7211         /* if we are only owner of page we can reuse it */
7212         if (unlikely(page_count(page) != 1))
7213                 return false;
7214
7215         /* flip page offset to other buffer */
7216         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7217
7218 #else
7219         /* move offset up to the next cache line */
7220         rx_buffer->page_offset += truesize;
7221
7222         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7223                 return false;
7224 #endif
7225
7226         /* bump ref count on page before it is given to the stack */
7227         get_page(page);
7228
7229         return true;
7230 }
7231
7232 /**
7233  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7234  * @rx_ring: rx descriptor ring to transact packets on
7235  * @rx_buffer: buffer containing page to add
7236  * @rx_desc: descriptor containing length of buffer written by hardware
7237  * @skb: sk_buff to place the data into
7238  *
7239  * This function will add the data contained in rx_buffer->page to the skb.
7240  * This is done either through a direct copy if the data in the buffer is
7241  * less than the skb header size, otherwise it will just attach the page as
7242  * a frag to the skb.
7243  *
7244  * The function will then update the page offset if necessary and return
7245  * true if the buffer can be reused by the adapter.
7246  **/
7247 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7248                             struct igb_rx_buffer *rx_buffer,
7249                             union e1000_adv_rx_desc *rx_desc,
7250                             struct sk_buff *skb)
7251 {
7252         struct page *page = rx_buffer->page;
7253         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7254 #if (PAGE_SIZE < 8192)
7255         unsigned int truesize = IGB_RX_BUFSZ;
7256 #else
7257         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7258 #endif
7259
7260         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7261                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7262
7263 #ifdef HAVE_PTP_1588_CLOCK
7264                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7265                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7266                         va += IGB_TS_HDR_LEN;
7267                         size -= IGB_TS_HDR_LEN;
7268                 }
7269 #endif /* HAVE_PTP_1588_CLOCK */
7270
7271                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7272
7273                 /* we can reuse buffer as-is, just make sure it is local */
7274                 if (likely(page_to_nid(page) == numa_node_id()))
7275                         return true;
7276
7277                 /* this page cannot be reused so discard it */
7278                 put_page(page);
7279                 return false;
7280         }
7281
7282         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7283                         rx_buffer->page_offset, size, truesize);
7284
7285         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7286 }
7287
7288 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7289                                            union e1000_adv_rx_desc *rx_desc,
7290                                            struct sk_buff *skb)
7291 {
7292         struct igb_rx_buffer *rx_buffer;
7293         struct page *page;
7294
7295         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7296
7297         page = rx_buffer->page;
7298         prefetchw(page);
7299
7300         if (likely(!skb)) {
7301                 void *page_addr = page_address(page) +
7302                                   rx_buffer->page_offset;
7303
7304                 /* prefetch first cache line of first page */
7305                 prefetch(page_addr);
7306 #if L1_CACHE_BYTES < 128
7307                 prefetch(page_addr + L1_CACHE_BYTES);
7308 #endif
7309
7310                 /* allocate a skb to store the frags */
7311                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7312                                                 IGB_RX_HDR_LEN);
7313                 if (unlikely(!skb)) {
7314                         rx_ring->rx_stats.alloc_failed++;
7315                         return NULL;
7316                 }
7317
7318                 /*
7319                  * we will be copying header into skb->data in
7320                  * pskb_may_pull so it is in our interest to prefetch
7321                  * it now to avoid a possible cache miss
7322                  */
7323                 prefetchw(skb->data);
7324         }
7325
7326         /* we are reusing so sync this buffer for CPU use */
7327         dma_sync_single_range_for_cpu(rx_ring->dev,
7328                                       rx_buffer->dma,
7329                                       rx_buffer->page_offset,
7330                                       IGB_RX_BUFSZ,
7331                                       DMA_FROM_DEVICE);
7332
7333         /* pull page into skb */
7334         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7335                 /* hand second half of page back to the ring */
7336                 igb_reuse_rx_page(rx_ring, rx_buffer);
7337         } else {
7338                 /* we are not reusing the buffer so unmap it */
7339                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7340                                PAGE_SIZE, DMA_FROM_DEVICE);
7341         }
7342
7343         /* clear contents of rx_buffer */
7344         rx_buffer->page = NULL;
7345
7346         return skb;
7347 }
7348
7349 #endif
7350 static inline void igb_rx_checksum(struct igb_ring *ring,
7351                                    union e1000_adv_rx_desc *rx_desc,
7352                                    struct sk_buff *skb)
7353 {
7354         skb_checksum_none_assert(skb);
7355
7356         /* Ignore Checksum bit is set */
7357         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7358                 return;
7359
7360         /* Rx checksum disabled via ethtool */
7361         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7362                 return;
7363
7364         /* TCP/UDP checksum error bit is set */
7365         if (igb_test_staterr(rx_desc,
7366                              E1000_RXDEXT_STATERR_TCPE |
7367                              E1000_RXDEXT_STATERR_IPE)) {
7368                 /*
7369                  * work around errata with sctp packets where the TCPE aka
7370                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7371                  * packets, (aka let the stack check the crc32c)
7372                  */
7373                 if (!((skb->len == 60) &&
7374                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7375                         ring->rx_stats.csum_err++;
7376
7377                 /* let the stack verify checksum errors */
7378                 return;
7379         }
7380         /* It must be a TCP or UDP packet with a valid checksum */
7381         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7382                                       E1000_RXD_STAT_UDPCS))
7383                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7384 }
7385
7386 #ifdef NETIF_F_RXHASH
7387 static inline void igb_rx_hash(struct igb_ring *ring,
7388                                union e1000_adv_rx_desc *rx_desc,
7389                                struct sk_buff *skb)
7390 {
7391         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7392                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7393                              PKT_HASH_TYPE_L3);
7394 }
7395
7396 #endif
7397 #ifndef IGB_NO_LRO
7398 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7399 /**
7400  * igb_merge_active_tail - merge active tail into lro skb
7401  * @tail: pointer to active tail in frag_list
7402  *
7403  * This function merges the length and data of an active tail into the
7404  * skb containing the frag_list.  It resets the tail's pointer to the head,
7405  * but it leaves the heads pointer to tail intact.
7406  **/
7407 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7408 {
7409         struct sk_buff *head = IGB_CB(tail)->head;
7410
7411         if (!head)
7412                 return tail;
7413
7414         head->len += tail->len;
7415         head->data_len += tail->len;
7416         head->truesize += tail->len;
7417
7418         IGB_CB(tail)->head = NULL;
7419
7420         return head;
7421 }
7422
7423 /**
7424  * igb_add_active_tail - adds an active tail into the skb frag_list
7425  * @head: pointer to the start of the skb
7426  * @tail: pointer to active tail to add to frag_list
7427  *
7428  * This function adds an active tail to the end of the frag list.  This tail
7429  * will still be receiving data so we cannot yet ad it's stats to the main
7430  * skb.  That is done via igb_merge_active_tail.
7431  **/
7432 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7433 {
7434         struct sk_buff *old_tail = IGB_CB(head)->tail;
7435
7436         if (old_tail) {
7437                 igb_merge_active_tail(old_tail);
7438                 old_tail->next = tail;
7439         } else {
7440                 skb_shinfo(head)->frag_list = tail;
7441         }
7442
7443         IGB_CB(tail)->head = head;
7444         IGB_CB(head)->tail = tail;
7445
7446         IGB_CB(head)->append_cnt++;
7447 }
7448
7449 /**
7450  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7451  * @head: pointer to head of an active frag list
7452  *
7453  * This function will clear the frag_tail_tracker pointer on an active
7454  * frag_list and returns true if the pointer was actually set
7455  **/
7456 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7457 {
7458         struct sk_buff *tail = IGB_CB(head)->tail;
7459
7460         if (!tail)
7461                 return false;
7462
7463         igb_merge_active_tail(tail);
7464
7465         IGB_CB(head)->tail = NULL;
7466
7467         return true;
7468 }
7469
7470 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7471 /**
7472  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7473  * @adapter: board private structure
7474  * @rx_desc: pointer to the rx descriptor
7475  * @skb: pointer to the skb to be merged
7476  *
7477  **/
7478 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7479                                union e1000_adv_rx_desc *rx_desc,
7480                                struct sk_buff *skb)
7481 {
7482         struct iphdr *iph = (struct iphdr *)skb->data;
7483         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7484
7485         /* verify hardware indicates this is IPv4/TCP */
7486         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7487             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7488                 return false;
7489
7490         /* .. and LRO is enabled */
7491         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7492                 return false;
7493
7494         /* .. and we are not in promiscuous mode */
7495         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7496                 return false;
7497
7498         /* .. and the header is large enough for us to read IP/TCP fields */
7499         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7500                 return false;
7501
7502         /* .. and there are no VLANs on packet */
7503         if (skb->protocol != __constant_htons(ETH_P_IP))
7504                 return false;
7505
7506         /* .. and we are version 4 with no options */
7507         if (*(u8 *)iph != 0x45)
7508                 return false;
7509
7510         /* .. and the packet is not fragmented */
7511         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7512                 return false;
7513
7514         /* .. and that next header is TCP */
7515         if (iph->protocol != IPPROTO_TCP)
7516                 return false;
7517
7518         return true;
7519 }
7520
7521 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7522 {
7523         return (struct igb_lrohdr *)skb->data;
7524 }
7525
7526 /**
7527  * igb_lro_flush - Indicate packets to upper layer.
7528  *
7529  * Update IP and TCP header part of head skb if more than one
7530  * skb's chained and indicate packets to upper layer.
7531  **/
7532 static void igb_lro_flush(struct igb_q_vector *q_vector,
7533                           struct sk_buff *skb)
7534 {
7535         struct igb_lro_list *lrolist = &q_vector->lrolist;
7536
7537         __skb_unlink(skb, &lrolist->active);
7538
7539         if (IGB_CB(skb)->append_cnt) {
7540                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7541
7542 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7543                 /* close any active lro contexts */
7544                 igb_close_active_frag_list(skb);
7545
7546 #endif
7547                 /* incorporate ip header and re-calculate checksum */
7548                 lroh->iph.tot_len = ntohs(skb->len);
7549                 lroh->iph.check = 0;
7550
7551                 /* header length is 5 since we know no options exist */
7552                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7553
7554                 /* clear TCP checksum to indicate we are an LRO frame */
7555                 lroh->th.check = 0;
7556
7557                 /* incorporate latest timestamp into the tcp header */
7558                 if (IGB_CB(skb)->tsecr) {
7559                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7560                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7561                 }
7562 #ifdef NETIF_F_GSO
7563
7564                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7565                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7566 #endif
7567         }
7568
7569 #ifdef HAVE_VLAN_RX_REGISTER
7570         igb_receive_skb(q_vector, skb);
7571 #else
7572         napi_gro_receive(&q_vector->napi, skb);
7573 #endif
7574         lrolist->stats.flushed++;
7575 }
7576
7577 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7578 {
7579         struct igb_lro_list *lrolist = &q_vector->lrolist;
7580         struct sk_buff *skb, *tmp;
7581
7582         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7583                 igb_lro_flush(q_vector, skb);
7584 }
7585
7586 /*
7587  * igb_lro_header_ok - Main LRO function.
7588  **/
7589 static void igb_lro_header_ok(struct sk_buff *skb)
7590 {
7591         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7592         u16 opt_bytes, data_len;
7593
7594 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7595         IGB_CB(skb)->tail = NULL;
7596 #endif
7597         IGB_CB(skb)->tsecr = 0;
7598         IGB_CB(skb)->append_cnt = 0;
7599         IGB_CB(skb)->mss = 0;
7600
7601         /* ensure that the checksum is valid */
7602         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7603                 return;
7604
7605         /* If we see CE codepoint in IP header, packet is not mergeable */
7606         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7607                 return;
7608
7609         /* ensure no bits set besides ack or psh */
7610         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7611             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7612             !lroh->th.ack)
7613                 return;
7614
7615         /* store the total packet length */
7616         data_len = ntohs(lroh->iph.tot_len);
7617
7618         /* remove any padding from the end of the skb */
7619         __pskb_trim(skb, data_len);
7620
7621         /* remove header length from data length */
7622         data_len -= sizeof(struct igb_lrohdr);
7623
7624         /*
7625          * check for timestamps. Since the only option we handle are timestamps,
7626          * we only have to handle the simple case of aligned timestamps
7627          */
7628         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7629         if (opt_bytes != 0) {
7630                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7631                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7632                                         TCPOLEN_TSTAMP_ALIGNED) ||
7633                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7634                                              (TCPOPT_NOP << 16) |
7635                                              (TCPOPT_TIMESTAMP << 8) |
7636                                               TCPOLEN_TIMESTAMP)) ||
7637                     (lroh->ts[2] == 0)) {
7638                         return;
7639                 }
7640
7641                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7642                 IGB_CB(skb)->tsecr = lroh->ts[2];
7643
7644                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7645         }
7646
7647         /* record data_len as mss for the packet */
7648         IGB_CB(skb)->mss = data_len;
7649         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7650 }
7651
7652 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7653 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7654 {
7655         struct skb_shared_info *sh_info;
7656         struct skb_shared_info *new_skb_info;
7657         unsigned int data_len;
7658
7659         sh_info = skb_shinfo(lro_skb);
7660         new_skb_info = skb_shinfo(new_skb);
7661
7662         /* copy frags into the last skb */
7663         memcpy(sh_info->frags + sh_info->nr_frags,
7664                new_skb_info->frags,
7665                new_skb_info->nr_frags * sizeof(skb_frag_t));
7666
7667         /* copy size data over */
7668         sh_info->nr_frags += new_skb_info->nr_frags;
7669         data_len = IGB_CB(new_skb)->mss;
7670         lro_skb->len += data_len;
7671         lro_skb->data_len += data_len;
7672         lro_skb->truesize += data_len;
7673
7674         /* wipe record of data from new_skb */
7675         new_skb_info->nr_frags = 0;
7676         new_skb->len = new_skb->data_len = 0;
7677         dev_kfree_skb_any(new_skb);
7678 }
7679
7680 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7681 /**
7682  * igb_lro_receive - if able, queue skb into lro chain
7683  * @q_vector: structure containing interrupt and ring information
7684  * @new_skb: pointer to current skb being checked
7685  *
7686  * Checks whether the skb given is eligible for LRO and if that's
7687  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7688  * the flow doesn't exist create one.
7689  **/
7690 static void igb_lro_receive(struct igb_q_vector *q_vector,
7691                             struct sk_buff *new_skb)
7692 {
7693         struct sk_buff *lro_skb;
7694         struct igb_lro_list *lrolist = &q_vector->lrolist;
7695         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7696         __be32 saddr = lroh->iph.saddr;
7697         __be32 daddr = lroh->iph.daddr;
7698         __be32 tcp_ports = *(__be32 *)&lroh->th;
7699         u16 data_len;
7700 #ifdef HAVE_VLAN_RX_REGISTER
7701         u16 vid = IGB_CB(new_skb)->vid;
7702 #else
7703         u16 vid = new_skb->vlan_tci;
7704 #endif
7705
7706         igb_lro_header_ok(new_skb);
7707
7708         /*
7709          * we have a packet that might be eligible for LRO,
7710          * so see if it matches anything we might expect
7711          */
7712         skb_queue_walk(&lrolist->active, lro_skb) {
7713                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7714                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7715                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7716                         continue;
7717
7718 #ifdef HAVE_VLAN_RX_REGISTER
7719                 if (IGB_CB(lro_skb)->vid != vid)
7720 #else
7721                 if (lro_skb->vlan_tci != vid)
7722 #endif
7723                         continue;
7724
7725                 /* out of order packet */
7726                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7727                         igb_lro_flush(q_vector, lro_skb);
7728                         IGB_CB(new_skb)->mss = 0;
7729                         break;
7730                 }
7731
7732                 /* TCP timestamp options have changed */
7733                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7734                         igb_lro_flush(q_vector, lro_skb);
7735                         break;
7736                 }
7737
7738                 /* make sure timestamp values are increasing */
7739                 if (IGB_CB(lro_skb)->tsecr &&
7740                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7741                         igb_lro_flush(q_vector, lro_skb);
7742                         IGB_CB(new_skb)->mss = 0;
7743                         break;
7744                 }
7745
7746                 data_len = IGB_CB(new_skb)->mss;
7747
7748                 /* Check for all of the above below
7749                  *   malformed header
7750                  *   no tcp data
7751                  *   resultant packet would be too large
7752                  *   new skb is larger than our current mss
7753                  *   data would remain in header
7754                  *   we would consume more frags then the sk_buff contains
7755                  *   ack sequence numbers changed
7756                  *   window size has changed
7757                  */
7758                 if (data_len == 0 ||
7759                     data_len > IGB_CB(lro_skb)->mss ||
7760                     data_len > IGB_CB(lro_skb)->free ||
7761 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7762                     data_len != new_skb->data_len ||
7763                     skb_shinfo(new_skb)->nr_frags >=
7764                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7765 #endif
7766                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7767                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7768                         igb_lro_flush(q_vector, lro_skb);
7769                         break;
7770                 }
7771
7772                 /* Remove IP and TCP header*/
7773                 skb_pull(new_skb, new_skb->len - data_len);
7774
7775                 /* update timestamp and timestamp echo response */
7776                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7777                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7778
7779                 /* update sequence and free space */
7780                 IGB_CB(lro_skb)->next_seq += data_len;
7781                 IGB_CB(lro_skb)->free -= data_len;
7782
7783                 /* update append_cnt */
7784                 IGB_CB(lro_skb)->append_cnt++;
7785
7786 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7787                 /* if header is empty pull pages into current skb */
7788                 igb_merge_frags(lro_skb, new_skb);
7789 #else
7790                 /* chain this new skb in frag_list */
7791                 igb_add_active_tail(lro_skb, new_skb);
7792 #endif
7793
7794                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7795                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7796                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7797                         igb_lro_flush(q_vector, lro_skb);
7798                 }
7799
7800                 lrolist->stats.coal++;
7801                 return;
7802         }
7803
7804         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7805                 /* if we are at capacity flush the tail */
7806                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7807                         lro_skb = skb_peek_tail(&lrolist->active);
7808                         if (lro_skb)
7809                                 igb_lro_flush(q_vector, lro_skb);
7810                 }
7811
7812                 /* update sequence and free space */
7813                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7814                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7815
7816                 /* .. and insert at the front of the active list */
7817                 __skb_queue_head(&lrolist->active, new_skb);
7818
7819                 lrolist->stats.coal++;
7820                 return;
7821         }
7822
7823         /* packet not handled by any of the above, pass it to the stack */
7824 #ifdef HAVE_VLAN_RX_REGISTER
7825         igb_receive_skb(q_vector, new_skb);
7826 #else
7827         napi_gro_receive(&q_vector->napi, new_skb);
7828 #endif
7829 }
7830
7831 #endif /* IGB_NO_LRO */
7832 /**
7833  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7834  * @rx_ring: rx descriptor ring packet is being transacted on
7835  * @rx_desc: pointer to the EOP Rx descriptor
7836  * @skb: pointer to current skb being populated
7837  *
7838  * This function checks the ring, descriptor, and packet information in
7839  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7840  * other fields within the skb.
7841  **/
7842 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7843                                    union e1000_adv_rx_desc *rx_desc,
7844                                    struct sk_buff *skb)
7845 {
7846         struct net_device *dev = rx_ring->netdev;
7847         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7848
7849 #ifdef NETIF_F_RXHASH
7850         igb_rx_hash(rx_ring, rx_desc, skb);
7851
7852 #endif
7853         igb_rx_checksum(rx_ring, rx_desc, skb);
7854
7855     /* update packet type stats */
7856         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7857                 rx_ring->rx_stats.ipv4_packets++;
7858         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7859                 rx_ring->rx_stats.ipv4e_packets++;
7860         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7861                 rx_ring->rx_stats.ipv6_packets++;
7862         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7863                 rx_ring->rx_stats.ipv6e_packets++;
7864         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7865                 rx_ring->rx_stats.tcp_packets++;
7866         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7867                 rx_ring->rx_stats.udp_packets++;
7868         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7869                 rx_ring->rx_stats.sctp_packets++;
7870         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7871                 rx_ring->rx_stats.nfs_packets++;
7872
7873 #ifdef HAVE_PTP_1588_CLOCK
7874         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7875 #endif /* HAVE_PTP_1588_CLOCK */
7876
7877 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7878         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7879 #else
7880         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7881 #endif
7882             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7883                 u16 vid = 0;
7884                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7885                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7886                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7887                 else
7888                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7889 #ifdef HAVE_VLAN_RX_REGISTER
7890                 IGB_CB(skb)->vid = vid;
7891         } else {
7892                 IGB_CB(skb)->vid = 0;
7893 #else
7894
7895 #ifdef HAVE_VLAN_PROTOCOL
7896                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7897 #else
7898                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7899 #endif
7900
7901
7902 #endif
7903         }
7904
7905         skb_record_rx_queue(skb, rx_ring->queue_index);
7906
7907         skb->protocol = eth_type_trans(skb, dev);
7908 }
7909
7910 /**
7911  * igb_is_non_eop - process handling of non-EOP buffers
7912  * @rx_ring: Rx ring being processed
7913  * @rx_desc: Rx descriptor for current buffer
7914  *
7915  * This function updates next to clean.  If the buffer is an EOP buffer
7916  * this function exits returning false, otherwise it will place the
7917  * sk_buff in the next buffer to be chained and return true indicating
7918  * that this is in fact a non-EOP buffer.
7919  **/
7920 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7921                            union e1000_adv_rx_desc *rx_desc)
7922 {
7923         u32 ntc = rx_ring->next_to_clean + 1;
7924
7925         /* fetch, update, and store next to clean */
7926         ntc = (ntc < rx_ring->count) ? ntc : 0;
7927         rx_ring->next_to_clean = ntc;
7928
7929         prefetch(IGB_RX_DESC(rx_ring, ntc));
7930
7931         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7932                 return false;
7933
7934         return true;
7935 }
7936
7937 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7938 /* igb_clean_rx_irq -- * legacy */
7939 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7940 {
7941         struct igb_ring *rx_ring = q_vector->rx.ring;
7942         unsigned int total_bytes = 0, total_packets = 0;
7943         u16 cleaned_count = igb_desc_unused(rx_ring);
7944
7945         do {
7946                 struct igb_rx_buffer *rx_buffer;
7947                 union e1000_adv_rx_desc *rx_desc;
7948                 struct sk_buff *skb;
7949                 u16 ntc;
7950
7951                 /* return some buffers to hardware, one at a time is too slow */
7952                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7953                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7954                         cleaned_count = 0;
7955                 }
7956
7957                 ntc = rx_ring->next_to_clean;
7958                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7959                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7960
7961                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7962                         break;
7963
7964                 /*
7965                  * This memory barrier is needed to keep us from reading
7966                  * any other fields out of the rx_desc until we know the
7967                  * RXD_STAT_DD bit is set
7968                  */
7969                 rmb();
7970
7971                 skb = rx_buffer->skb;
7972
7973                 prefetch(skb->data);
7974
7975                 /* pull the header of the skb in */
7976                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
7977
7978                 /* clear skb reference in buffer info structure */
7979                 rx_buffer->skb = NULL;
7980
7981                 cleaned_count++;
7982
7983                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
7984
7985                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
7986                                  rx_ring->rx_buffer_len,
7987                                  DMA_FROM_DEVICE);
7988                 rx_buffer->dma = 0;
7989
7990                 if (igb_test_staterr(rx_desc,
7991                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
7992                         dev_kfree_skb_any(skb);
7993                         continue;
7994                 }
7995
7996                 total_bytes += skb->len;
7997
7998                 /* populate checksum, timestamp, VLAN, and protocol */
7999                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8000
8001 #ifndef IGB_NO_LRO
8002                 if (igb_can_lro(rx_ring, rx_desc, skb))
8003                         igb_lro_receive(q_vector, skb);
8004                 else
8005 #endif
8006 #ifdef HAVE_VLAN_RX_REGISTER
8007                         igb_receive_skb(q_vector, skb);
8008 #else
8009                         napi_gro_receive(&q_vector->napi, skb);
8010 #endif
8011
8012 #ifndef NETIF_F_GRO
8013                 netdev_ring(rx_ring)->last_rx = jiffies;
8014
8015 #endif
8016                 /* update budget accounting */
8017                 total_packets++;
8018         } while (likely(total_packets < budget));
8019
8020         rx_ring->rx_stats.packets += total_packets;
8021         rx_ring->rx_stats.bytes += total_bytes;
8022         q_vector->rx.total_packets += total_packets;
8023         q_vector->rx.total_bytes += total_bytes;
8024
8025         if (cleaned_count)
8026                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8027
8028 #ifndef IGB_NO_LRO
8029         igb_lro_flush_all(q_vector);
8030
8031 #endif /* IGB_NO_LRO */
8032         return (total_packets < budget);
8033 }
8034 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8035 /**
8036  * igb_get_headlen - determine size of header for LRO/GRO
8037  * @data: pointer to the start of the headers
8038  * @max_len: total length of section to find headers in
8039  *
8040  * This function is meant to determine the length of headers that will
8041  * be recognized by hardware for LRO, and GRO offloads.  The main
8042  * motivation of doing this is to only perform one pull for IPv4 TCP
8043  * packets so that we can do basic things like calculating the gso_size
8044  * based on the average data per packet.
8045  **/
8046 static unsigned int igb_get_headlen(unsigned char *data,
8047                                     unsigned int max_len)
8048 {
8049         union {
8050                 unsigned char *network;
8051                 /* l2 headers */
8052                 struct ethhdr *eth;
8053                 struct vlan_hdr *vlan;
8054                 /* l3 headers */
8055                 struct iphdr *ipv4;
8056                 struct ipv6hdr *ipv6;
8057         } hdr;
8058         __be16 protocol;
8059         u8 nexthdr = 0; /* default to not TCP */
8060         u8 hlen;
8061
8062         /* this should never happen, but better safe than sorry */
8063         if (max_len < ETH_HLEN)
8064                 return max_len;
8065
8066         /* initialize network frame pointer */
8067         hdr.network = data;
8068
8069         /* set first protocol and move network header forward */
8070         protocol = hdr.eth->h_proto;
8071         hdr.network += ETH_HLEN;
8072
8073         /* handle any vlan tag if present */
8074         if (protocol == __constant_htons(ETH_P_8021Q)) {
8075                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8076                         return max_len;
8077
8078                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8079                 hdr.network += VLAN_HLEN;
8080         }
8081
8082         /* handle L3 protocols */
8083         if (protocol == __constant_htons(ETH_P_IP)) {
8084                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8085                         return max_len;
8086
8087                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8088                 hlen = (hdr.network[0] & 0x0F) << 2;
8089
8090                 /* verify hlen meets minimum size requirements */
8091                 if (hlen < sizeof(struct iphdr))
8092                         return hdr.network - data;
8093
8094                 /* record next protocol if header is present */
8095                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8096                         nexthdr = hdr.ipv4->protocol;
8097 #ifdef NETIF_F_TSO6
8098         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8099                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8100                         return max_len;
8101
8102                 /* record next protocol */
8103                 nexthdr = hdr.ipv6->nexthdr;
8104                 hlen = sizeof(struct ipv6hdr);
8105 #endif /* NETIF_F_TSO6 */
8106         } else {
8107                 return hdr.network - data;
8108         }
8109
8110         /* relocate pointer to start of L4 header */
8111         hdr.network += hlen;
8112
8113         /* finally sort out TCP */
8114         if (nexthdr == IPPROTO_TCP) {
8115                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8116                         return max_len;
8117
8118                 /* access doff as a u8 to avoid unaligned access on ia64 */
8119                 hlen = (hdr.network[12] & 0xF0) >> 2;
8120
8121                 /* verify hlen meets minimum size requirements */
8122                 if (hlen < sizeof(struct tcphdr))
8123                         return hdr.network - data;
8124
8125                 hdr.network += hlen;
8126         } else if (nexthdr == IPPROTO_UDP) {
8127                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8128                         return max_len;
8129
8130                 hdr.network += sizeof(struct udphdr);
8131         }
8132
8133         /*
8134          * If everything has gone correctly hdr.network should be the
8135          * data section of the packet and will be the end of the header.
8136          * If not then it probably represents the end of the last recognized
8137          * header.
8138          */
8139         if ((hdr.network - data) < max_len)
8140                 return hdr.network - data;
8141         else
8142                 return max_len;
8143 }
8144
8145 /**
8146  * igb_pull_tail - igb specific version of skb_pull_tail
8147  * @rx_ring: rx descriptor ring packet is being transacted on
8148  * @rx_desc: pointer to the EOP Rx descriptor
8149  * @skb: pointer to current skb being adjusted
8150  *
8151  * This function is an igb specific version of __pskb_pull_tail.  The
8152  * main difference between this version and the original function is that
8153  * this function can make several assumptions about the state of things
8154  * that allow for significant optimizations versus the standard function.
8155  * As a result we can do things like drop a frag and maintain an accurate
8156  * truesize for the skb.
8157  */
8158 static void igb_pull_tail(struct igb_ring *rx_ring,
8159                           union e1000_adv_rx_desc *rx_desc,
8160                           struct sk_buff *skb)
8161 {
8162         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8163         unsigned char *va;
8164         unsigned int pull_len;
8165
8166         /*
8167          * it is valid to use page_address instead of kmap since we are
8168          * working with pages allocated out of the lomem pool per
8169          * alloc_page(GFP_ATOMIC)
8170          */
8171         va = skb_frag_address(frag);
8172
8173 #ifdef HAVE_PTP_1588_CLOCK
8174         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8175                 /* retrieve timestamp from buffer */
8176                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8177
8178                 /* update pointers to remove timestamp header */
8179                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8180                 frag->page_offset += IGB_TS_HDR_LEN;
8181                 skb->data_len -= IGB_TS_HDR_LEN;
8182                 skb->len -= IGB_TS_HDR_LEN;
8183
8184                 /* move va to start of packet data */
8185                 va += IGB_TS_HDR_LEN;
8186         }
8187 #endif /* HAVE_PTP_1588_CLOCK */
8188
8189         /*
8190          * we need the header to contain the greater of either ETH_HLEN or
8191          * 60 bytes if the skb->len is less than 60 for skb_pad.
8192          */
8193         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8194
8195         /* align pull length to size of long to optimize memcpy performance */
8196         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8197
8198         /* update all of the pointers */
8199         skb_frag_size_sub(frag, pull_len);
8200         frag->page_offset += pull_len;
8201         skb->data_len -= pull_len;
8202         skb->tail += pull_len;
8203 }
8204
8205 /**
8206  * igb_cleanup_headers - Correct corrupted or empty headers
8207  * @rx_ring: rx descriptor ring packet is being transacted on
8208  * @rx_desc: pointer to the EOP Rx descriptor
8209  * @skb: pointer to current skb being fixed
8210  *
8211  * Address the case where we are pulling data in on pages only
8212  * and as such no data is present in the skb header.
8213  *
8214  * In addition if skb is not at least 60 bytes we need to pad it so that
8215  * it is large enough to qualify as a valid Ethernet frame.
8216  *
8217  * Returns true if an error was encountered and skb was freed.
8218  **/
8219 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8220                                 union e1000_adv_rx_desc *rx_desc,
8221                                 struct sk_buff *skb)
8222 {
8223
8224         if (unlikely((igb_test_staterr(rx_desc,
8225                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8226                 struct net_device *netdev = rx_ring->netdev;
8227                 if (!(netdev->features & NETIF_F_RXALL)) {
8228                         dev_kfree_skb_any(skb);
8229                         return true;
8230                 }
8231         }
8232
8233         /* place header in linear portion of buffer */
8234         if (skb_is_nonlinear(skb))
8235                 igb_pull_tail(rx_ring, rx_desc, skb);
8236
8237         /* if skb_pad returns an error the skb was freed */
8238         if (unlikely(skb->len < 60)) {
8239                 int pad_len = 60 - skb->len;
8240
8241                 if (skb_pad(skb, pad_len))
8242                         return true;
8243                 __skb_put(skb, pad_len);
8244         }
8245
8246         return false;
8247 }
8248
8249 /* igb_clean_rx_irq -- * packet split */
8250 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8251 {
8252         struct igb_ring *rx_ring = q_vector->rx.ring;
8253         struct sk_buff *skb = rx_ring->skb;
8254         unsigned int total_bytes = 0, total_packets = 0;
8255         u16 cleaned_count = igb_desc_unused(rx_ring);
8256
8257         do {
8258                 union e1000_adv_rx_desc *rx_desc;
8259
8260                 /* return some buffers to hardware, one at a time is too slow */
8261                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8262                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8263                         cleaned_count = 0;
8264                 }
8265
8266                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8267
8268                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8269                         break;
8270
8271                 /*
8272                  * This memory barrier is needed to keep us from reading
8273                  * any other fields out of the rx_desc until we know the
8274                  * RXD_STAT_DD bit is set
8275                  */
8276                 rmb();
8277
8278                 /* retrieve a buffer from the ring */
8279                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8280
8281                 /* exit if we failed to retrieve a buffer */
8282                 if (!skb)
8283                         break;
8284
8285                 cleaned_count++;
8286
8287                 /* fetch next buffer in frame if non-eop */
8288                 if (igb_is_non_eop(rx_ring, rx_desc))
8289                         continue;
8290
8291                 /* verify the packet layout is correct */
8292                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8293                         skb = NULL;
8294                         continue;
8295                 }
8296
8297                 /* probably a little skewed due to removing CRC */
8298                 total_bytes += skb->len;
8299
8300                 /* populate checksum, timestamp, VLAN, and protocol */
8301                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8302
8303 #ifndef IGB_NO_LRO
8304                 if (igb_can_lro(rx_ring, rx_desc, skb))
8305                         igb_lro_receive(q_vector, skb);
8306                 else
8307 #endif
8308 #ifdef HAVE_VLAN_RX_REGISTER
8309                         igb_receive_skb(q_vector, skb);
8310 #else
8311                         napi_gro_receive(&q_vector->napi, skb);
8312 #endif
8313 #ifndef NETIF_F_GRO
8314
8315                 netdev_ring(rx_ring)->last_rx = jiffies;
8316 #endif
8317
8318                 /* reset skb pointer */
8319                 skb = NULL;
8320
8321                 /* update budget accounting */
8322                 total_packets++;
8323         } while (likely(total_packets < budget));
8324
8325         /* place incomplete frames back on ring for completion */
8326         rx_ring->skb = skb;
8327
8328         rx_ring->rx_stats.packets += total_packets;
8329         rx_ring->rx_stats.bytes += total_bytes;
8330         q_vector->rx.total_packets += total_packets;
8331         q_vector->rx.total_bytes += total_bytes;
8332
8333         if (cleaned_count)
8334                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8335
8336 #ifndef IGB_NO_LRO
8337         igb_lro_flush_all(q_vector);
8338
8339 #endif /* IGB_NO_LRO */
8340         return (total_packets < budget);
8341 }
8342 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8343
8344 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8345 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8346                                  struct igb_rx_buffer *bi)
8347 {
8348         struct sk_buff *skb = bi->skb;
8349         dma_addr_t dma = bi->dma;
8350
8351         if (dma)
8352                 return true;
8353
8354         if (likely(!skb)) {
8355                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8356                                                 rx_ring->rx_buffer_len);
8357                 bi->skb = skb;
8358                 if (!skb) {
8359                         rx_ring->rx_stats.alloc_failed++;
8360                         return false;
8361                 }
8362
8363                 /* initialize skb for ring */
8364                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8365         }
8366
8367         dma = dma_map_single(rx_ring->dev, skb->data,
8368                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8369
8370         /* if mapping failed free memory back to system since
8371          * there isn't much point in holding memory we can't use
8372          */
8373         if (dma_mapping_error(rx_ring->dev, dma)) {
8374                 dev_kfree_skb_any(skb);
8375                 bi->skb = NULL;
8376
8377                 rx_ring->rx_stats.alloc_failed++;
8378                 return false;
8379         }
8380
8381         bi->dma = dma;
8382         return true;
8383 }
8384
8385 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8386 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8387                                   struct igb_rx_buffer *bi)
8388 {
8389         struct page *page = bi->page;
8390         dma_addr_t dma;
8391
8392         /* since we are recycling buffers we should seldom need to alloc */
8393         if (likely(page))
8394                 return true;
8395
8396         /* alloc new page for storage */
8397         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8398         if (unlikely(!page)) {
8399                 rx_ring->rx_stats.alloc_failed++;
8400                 return false;
8401         }
8402
8403         /* map page for use */
8404         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8405
8406         /*
8407          * if mapping failed free memory back to system since
8408          * there isn't much point in holding memory we can't use
8409          */
8410         if (dma_mapping_error(rx_ring->dev, dma)) {
8411                 __free_page(page);
8412
8413                 rx_ring->rx_stats.alloc_failed++;
8414                 return false;
8415         }
8416
8417         bi->dma = dma;
8418         bi->page = page;
8419         bi->page_offset = 0;
8420
8421         return true;
8422 }
8423
8424 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8425 /**
8426  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8427  * @adapter: address of board private structure
8428  **/
8429 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8430 {
8431         union e1000_adv_rx_desc *rx_desc;
8432         struct igb_rx_buffer *bi;
8433         u16 i = rx_ring->next_to_use;
8434
8435         /* nothing to do */
8436         if (!cleaned_count)
8437                 return;
8438
8439         rx_desc = IGB_RX_DESC(rx_ring, i);
8440         bi = &rx_ring->rx_buffer_info[i];
8441         i -= rx_ring->count;
8442
8443         do {
8444 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8445                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8446 #else
8447                 if (!igb_alloc_mapped_page(rx_ring, bi))
8448 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8449                         break;
8450
8451                 /*
8452                  * Refresh the desc even if buffer_addrs didn't change
8453                  * because each write-back erases this info.
8454                  */
8455 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8456                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8457 #else
8458                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8459 #endif
8460
8461                 rx_desc++;
8462                 bi++;
8463                 i++;
8464                 if (unlikely(!i)) {
8465                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8466                         bi = rx_ring->rx_buffer_info;
8467                         i -= rx_ring->count;
8468                 }
8469
8470                 /* clear the hdr_addr for the next_to_use descriptor */
8471                 rx_desc->read.hdr_addr = 0;
8472
8473                 cleaned_count--;
8474         } while (cleaned_count);
8475
8476         i += rx_ring->count;
8477
8478         if (rx_ring->next_to_use != i) {
8479                 /* record the next descriptor to use */
8480                 rx_ring->next_to_use = i;
8481
8482 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8483                 /* update next to alloc since we have filled the ring */
8484                 rx_ring->next_to_alloc = i;
8485
8486 #endif
8487                 /*
8488                  * Force memory writes to complete before letting h/w
8489                  * know there are new descriptors to fetch.  (Only
8490                  * applicable for weak-ordered memory model archs,
8491                  * such as IA-64).
8492                  */
8493                 wmb();
8494                 writel(i, rx_ring->tail);
8495         }
8496 }
8497
8498 #ifdef SIOCGMIIPHY
8499 /**
8500  * igb_mii_ioctl -
8501  * @netdev:
8502  * @ifreq:
8503  * @cmd:
8504  **/
8505 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8506 {
8507         struct igb_adapter *adapter = netdev_priv(netdev);
8508         struct mii_ioctl_data *data = if_mii(ifr);
8509
8510         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8511                 return -EOPNOTSUPP;
8512
8513         switch (cmd) {
8514         case SIOCGMIIPHY:
8515                 data->phy_id = adapter->hw.phy.addr;
8516                 break;
8517         case SIOCGMIIREG:
8518                 if (!capable(CAP_NET_ADMIN))
8519                         return -EPERM;
8520                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8521                                    &data->val_out))
8522                         return -EIO;
8523                 break;
8524         case SIOCSMIIREG:
8525         default:
8526                 return -EOPNOTSUPP;
8527         }
8528         return E1000_SUCCESS;
8529 }
8530
8531 #endif
8532 /**
8533  * igb_ioctl -
8534  * @netdev:
8535  * @ifreq:
8536  * @cmd:
8537  **/
8538 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8539 {
8540         switch (cmd) {
8541 #ifdef SIOCGMIIPHY
8542         case SIOCGMIIPHY:
8543         case SIOCGMIIREG:
8544         case SIOCSMIIREG:
8545                 return igb_mii_ioctl(netdev, ifr, cmd);
8546 #endif
8547 #ifdef HAVE_PTP_1588_CLOCK
8548         case SIOCSHWTSTAMP:
8549                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8550 #endif /* HAVE_PTP_1588_CLOCK */
8551 #ifdef ETHTOOL_OPS_COMPAT
8552         case SIOCETHTOOL:
8553                 return ethtool_ioctl(ifr);
8554 #endif
8555         default:
8556                 return -EOPNOTSUPP;
8557         }
8558 }
8559
8560 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8561 {
8562         struct igb_adapter *adapter = hw->back;
8563         u16 cap_offset;
8564
8565         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8566         if (!cap_offset)
8567                 return -E1000_ERR_CONFIG;
8568
8569         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8570
8571         return E1000_SUCCESS;
8572 }
8573
8574 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8575 {
8576         struct igb_adapter *adapter = hw->back;
8577         u16 cap_offset;
8578
8579         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8580         if (!cap_offset)
8581                 return -E1000_ERR_CONFIG;
8582
8583         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8584
8585         return E1000_SUCCESS;
8586 }
8587
8588 #ifdef HAVE_VLAN_RX_REGISTER
8589 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8590 #else
8591 void igb_vlan_mode(struct net_device *netdev, u32 features)
8592 #endif
8593 {
8594         struct igb_adapter *adapter = netdev_priv(netdev);
8595         struct e1000_hw *hw = &adapter->hw;
8596         u32 ctrl, rctl;
8597         int i;
8598 #ifdef HAVE_VLAN_RX_REGISTER
8599         bool enable = !!vlgrp;
8600
8601         igb_irq_disable(adapter);
8602
8603         adapter->vlgrp = vlgrp;
8604
8605         if (!test_bit(__IGB_DOWN, &adapter->state))
8606                 igb_irq_enable(adapter);
8607 #else
8608 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8609         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8610 #else
8611         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8612 #endif
8613 #endif
8614
8615         if (enable) {
8616                 /* enable VLAN tag insert/strip */
8617                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8618                 ctrl |= E1000_CTRL_VME;
8619                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8620
8621                 /* Disable CFI check */
8622                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8623                 rctl &= ~E1000_RCTL_CFIEN;
8624                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8625         } else {
8626                 /* disable VLAN tag insert/strip */
8627                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8628                 ctrl &= ~E1000_CTRL_VME;
8629                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8630         }
8631
8632 #ifndef CONFIG_IGB_VMDQ_NETDEV
8633         for (i = 0; i < adapter->vmdq_pools; i++) {
8634                 igb_set_vf_vlan_strip(adapter,
8635                                       adapter->vfs_allocated_count + i,
8636                                       enable);
8637         }
8638
8639 #else
8640         igb_set_vf_vlan_strip(adapter,
8641                               adapter->vfs_allocated_count,
8642                               enable);
8643
8644         for (i = 1; i < adapter->vmdq_pools; i++) {
8645 #ifdef HAVE_VLAN_RX_REGISTER
8646                 struct igb_vmdq_adapter *vadapter;
8647                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8648                 enable = !!vadapter->vlgrp;
8649 #else
8650                 struct net_device *vnetdev;
8651                 vnetdev = adapter->vmdq_netdev[i-1];
8652 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8653                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8654 #else
8655                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8656 #endif
8657 #endif
8658                 igb_set_vf_vlan_strip(adapter,
8659                                       adapter->vfs_allocated_count + i,
8660                                       enable);
8661         }
8662
8663 #endif
8664         igb_rlpml_set(adapter);
8665 }
8666
8667 #ifdef HAVE_VLAN_PROTOCOL
8668 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8669 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8670 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8671 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8672                                __always_unused __be16 proto, u16 vid)
8673 #else
8674 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8675 #endif
8676 #else
8677 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8678 #endif
8679 {
8680         struct igb_adapter *adapter = netdev_priv(netdev);
8681         int pf_id = adapter->vfs_allocated_count;
8682
8683         /* attempt to add filter to vlvf array */
8684         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8685
8686         /* add the filter since PF can receive vlans w/o entry in vlvf */
8687         igb_vfta_set(adapter, vid, TRUE);
8688 #ifndef HAVE_NETDEV_VLAN_FEATURES
8689
8690         /* Copy feature flags from netdev to the vlan netdev for this vid.
8691          * This allows things like TSO to bubble down to our vlan device.
8692          * There is no need to update netdev for vlan 0 (DCB), since it
8693          * wouldn't has v_netdev.
8694          */
8695         if (adapter->vlgrp) {
8696                 struct vlan_group *vlgrp = adapter->vlgrp;
8697                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8698                 if (v_netdev) {
8699                         v_netdev->features |= netdev->features;
8700                         vlan_group_set_device(vlgrp, vid, v_netdev);
8701                 }
8702         }
8703 #endif
8704 #ifndef HAVE_VLAN_RX_REGISTER
8705
8706         set_bit(vid, adapter->active_vlans);
8707 #endif
8708 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8709         return 0;
8710 #endif
8711 }
8712
8713 #ifdef HAVE_VLAN_PROTOCOL
8714 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8715 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8716 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8717 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8718                                 __always_unused __be16 proto, u16 vid)
8719 #else
8720 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8721 #endif
8722 #else
8723 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8724 #endif
8725 {
8726         struct igb_adapter *adapter = netdev_priv(netdev);
8727         int pf_id = adapter->vfs_allocated_count;
8728         s32 err;
8729
8730 #ifdef HAVE_VLAN_RX_REGISTER
8731         igb_irq_disable(adapter);
8732
8733         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8734
8735         if (!test_bit(__IGB_DOWN, &adapter->state))
8736                 igb_irq_enable(adapter);
8737
8738 #endif /* HAVE_VLAN_RX_REGISTER */
8739         /* remove vlan from VLVF table array */
8740         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8741
8742         /* if vid was not present in VLVF just remove it from table */
8743         if (err)
8744                 igb_vfta_set(adapter, vid, FALSE);
8745 #ifndef HAVE_VLAN_RX_REGISTER
8746
8747         clear_bit(vid, adapter->active_vlans);
8748 #endif
8749 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8750         return 0;
8751 #endif
8752 }
8753
8754 static void igb_restore_vlan(struct igb_adapter *adapter)
8755 {
8756 #ifdef HAVE_VLAN_RX_REGISTER
8757         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8758
8759         if (adapter->vlgrp) {
8760                 u16 vid;
8761                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8762                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8763                                 continue;
8764 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8765                         igb_vlan_rx_add_vid(adapter->netdev,
8766                                             htons(ETH_P_8021Q), vid);
8767 #else
8768                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8769 #endif
8770                 }
8771         }
8772 #else
8773         u16 vid;
8774
8775         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8776
8777         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8778 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8779                 igb_vlan_rx_add_vid(adapter->netdev,
8780                                     htons(ETH_P_8021Q), vid);
8781 #else
8782                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8783 #endif
8784 #endif
8785 }
8786
8787 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8788 {
8789         struct pci_dev *pdev = adapter->pdev;
8790         struct e1000_mac_info *mac = &adapter->hw.mac;
8791
8792         mac->autoneg = 0;
8793
8794         /* SerDes device's does not support 10Mbps Full/duplex
8795          * and 100Mbps Half duplex
8796          */
8797         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8798                 switch (spddplx) {
8799                 case SPEED_10 + DUPLEX_HALF:
8800                 case SPEED_10 + DUPLEX_FULL:
8801                 case SPEED_100 + DUPLEX_HALF:
8802                         dev_err(pci_dev_to_dev(pdev),
8803                                 "Unsupported Speed/Duplex configuration\n");
8804                         return -EINVAL;
8805                 default:
8806                         break;
8807                 }
8808         }
8809
8810         switch (spddplx) {
8811         case SPEED_10 + DUPLEX_HALF:
8812                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8813                 break;
8814         case SPEED_10 + DUPLEX_FULL:
8815                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8816                 break;
8817         case SPEED_100 + DUPLEX_HALF:
8818                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8819                 break;
8820         case SPEED_100 + DUPLEX_FULL:
8821                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8822                 break;
8823         case SPEED_1000 + DUPLEX_FULL:
8824                 mac->autoneg = 1;
8825                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8826                 break;
8827         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8828         default:
8829                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8830                 return -EINVAL;
8831         }
8832
8833         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8834         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8835
8836         return 0;
8837 }
8838
8839 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8840                           bool runtime)
8841 {
8842         struct net_device *netdev = pci_get_drvdata(pdev);
8843         struct igb_adapter *adapter = netdev_priv(netdev);
8844         struct e1000_hw *hw = &adapter->hw;
8845         u32 ctrl, rctl, status;
8846         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8847 #ifdef CONFIG_PM
8848         int retval = 0;
8849 #endif
8850
8851         netif_device_detach(netdev);
8852
8853         status = E1000_READ_REG(hw, E1000_STATUS);
8854         if (status & E1000_STATUS_LU)
8855                 wufc &= ~E1000_WUFC_LNKC;
8856
8857         if (netif_running(netdev))
8858                 __igb_close(netdev, true);
8859
8860         igb_clear_interrupt_scheme(adapter);
8861
8862 #ifdef CONFIG_PM
8863         retval = pci_save_state(pdev);
8864         if (retval)
8865                 return retval;
8866 #endif
8867
8868         if (wufc) {
8869                 igb_setup_rctl(adapter);
8870                 igb_set_rx_mode(netdev);
8871
8872                 /* turn on all-multi mode if wake on multicast is enabled */
8873                 if (wufc & E1000_WUFC_MC) {
8874                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8875                         rctl |= E1000_RCTL_MPE;
8876                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8877                 }
8878
8879                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8880                 /* phy power management enable */
8881                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8882                 ctrl |= E1000_CTRL_ADVD3WUC;
8883                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8884
8885                 /* Allow time for pending master requests to run */
8886                 e1000_disable_pcie_master(hw);
8887
8888                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8889                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8890         } else {
8891                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8892                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8893         }
8894
8895         *enable_wake = wufc || adapter->en_mng_pt;
8896         if (!*enable_wake)
8897                 igb_power_down_link(adapter);
8898         else
8899                 igb_power_up_link(adapter);
8900
8901         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8902          * would have already happened in close and is redundant. */
8903         igb_release_hw_control(adapter);
8904
8905         pci_disable_device(pdev);
8906
8907         return 0;
8908 }
8909
8910 #ifdef CONFIG_PM
8911 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8912 static int igb_suspend(struct device *dev)
8913 #else
8914 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8915 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8916 {
8917 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8918         struct pci_dev *pdev = to_pci_dev(dev);
8919 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8920         int retval;
8921         bool wake;
8922
8923         retval = __igb_shutdown(pdev, &wake, 0);
8924         if (retval)
8925                 return retval;
8926
8927         if (wake) {
8928                 pci_prepare_to_sleep(pdev);
8929         } else {
8930                 pci_wake_from_d3(pdev, false);
8931                 pci_set_power_state(pdev, PCI_D3hot);
8932         }
8933
8934         return 0;
8935 }
8936
8937 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8938 static int igb_resume(struct device *dev)
8939 #else
8940 static int igb_resume(struct pci_dev *pdev)
8941 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8942 {
8943 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8944         struct pci_dev *pdev = to_pci_dev(dev);
8945 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8946         struct net_device *netdev = pci_get_drvdata(pdev);
8947         struct igb_adapter *adapter = netdev_priv(netdev);
8948         struct e1000_hw *hw = &adapter->hw;
8949         u32 err;
8950
8951         pci_set_power_state(pdev, PCI_D0);
8952         pci_restore_state(pdev);
8953         pci_save_state(pdev);
8954
8955         err = pci_enable_device_mem(pdev);
8956         if (err) {
8957                 dev_err(pci_dev_to_dev(pdev),
8958                         "igb: Cannot enable PCI device from suspend\n");
8959                 return err;
8960         }
8961         pci_set_master(pdev);
8962
8963         pci_enable_wake(pdev, PCI_D3hot, 0);
8964         pci_enable_wake(pdev, PCI_D3cold, 0);
8965
8966         if (igb_init_interrupt_scheme(adapter, true)) {
8967                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
8968                 return -ENOMEM;
8969         }
8970
8971         igb_reset(adapter);
8972
8973         /* let the f/w know that the h/w is now under the control of the
8974          * driver. */
8975         igb_get_hw_control(adapter);
8976
8977         E1000_WRITE_REG(hw, E1000_WUS, ~0);
8978
8979         if (netdev->flags & IFF_UP) {
8980                 rtnl_lock();
8981                 err = __igb_open(netdev, true);
8982                 rtnl_unlock();
8983                 if (err)
8984                         return err;
8985         }
8986
8987         netif_device_attach(netdev);
8988
8989         return 0;
8990 }
8991
8992 #ifdef CONFIG_PM_RUNTIME
8993 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8994 static int igb_runtime_idle(struct device *dev)
8995 {
8996         struct pci_dev *pdev = to_pci_dev(dev);
8997         struct net_device *netdev = pci_get_drvdata(pdev);
8998         struct igb_adapter *adapter = netdev_priv(netdev);
8999
9000         if (!igb_has_link(adapter))
9001                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9002
9003         return -EBUSY;
9004 }
9005
9006 static int igb_runtime_suspend(struct device *dev)
9007 {
9008         struct pci_dev *pdev = to_pci_dev(dev);
9009         int retval;
9010         bool wake;
9011
9012         retval = __igb_shutdown(pdev, &wake, 1);
9013         if (retval)
9014                 return retval;
9015
9016         if (wake) {
9017                 pci_prepare_to_sleep(pdev);
9018         } else {
9019                 pci_wake_from_d3(pdev, false);
9020                 pci_set_power_state(pdev, PCI_D3hot);
9021         }
9022
9023         return 0;
9024 }
9025
9026 static int igb_runtime_resume(struct device *dev)
9027 {
9028         return igb_resume(dev);
9029 }
9030 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9031 #endif /* CONFIG_PM_RUNTIME */
9032 #endif /* CONFIG_PM */
9033
9034 #ifdef USE_REBOOT_NOTIFIER
9035 /* only want to do this for 2.4 kernels? */
9036 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9037                              void *p)
9038 {
9039         struct pci_dev *pdev = NULL;
9040         bool wake;
9041
9042         switch (event) {
9043         case SYS_DOWN:
9044         case SYS_HALT:
9045         case SYS_POWER_OFF:
9046                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9047                         if (pci_dev_driver(pdev) == &igb_driver) {
9048                                 __igb_shutdown(pdev, &wake, 0);
9049                                 if (event == SYS_POWER_OFF) {
9050                                         pci_wake_from_d3(pdev, wake);
9051                                         pci_set_power_state(pdev, PCI_D3hot);
9052                                 }
9053                         }
9054                 }
9055         }
9056         return NOTIFY_DONE;
9057 }
9058 #else
9059 static void igb_shutdown(struct pci_dev *pdev)
9060 {
9061         bool wake = false;
9062
9063         __igb_shutdown(pdev, &wake, 0);
9064
9065         if (system_state == SYSTEM_POWER_OFF) {
9066                 pci_wake_from_d3(pdev, wake);
9067                 pci_set_power_state(pdev, PCI_D3hot);
9068         }
9069 }
9070 #endif /* USE_REBOOT_NOTIFIER */
9071
9072 #ifdef CONFIG_NET_POLL_CONTROLLER
9073 /*
9074  * Polling 'interrupt' - used by things like netconsole to send skbs
9075  * without having to re-enable interrupts. It's not called while
9076  * the interrupt routine is executing.
9077  */
9078 static void igb_netpoll(struct net_device *netdev)
9079 {
9080         struct igb_adapter *adapter = netdev_priv(netdev);
9081         struct e1000_hw *hw = &adapter->hw;
9082         struct igb_q_vector *q_vector;
9083         int i;
9084
9085         for (i = 0; i < adapter->num_q_vectors; i++) {
9086                 q_vector = adapter->q_vector[i];
9087                 if (adapter->msix_entries)
9088                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9089                 else
9090                         igb_irq_disable(adapter);
9091                 napi_schedule(&q_vector->napi);
9092         }
9093 }
9094 #endif /* CONFIG_NET_POLL_CONTROLLER */
9095
9096 #ifdef HAVE_PCI_ERS
9097 #define E1000_DEV_ID_82576_VF 0x10CA
9098 /**
9099  * igb_io_error_detected - called when PCI error is detected
9100  * @pdev: Pointer to PCI device
9101  * @state: The current pci connection state
9102  *
9103  * This function is called after a PCI bus error affecting
9104  * this device has been detected.
9105  */
9106 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9107                                               pci_channel_state_t state)
9108 {
9109         struct net_device *netdev = pci_get_drvdata(pdev);
9110         struct igb_adapter *adapter = netdev_priv(netdev);
9111
9112 #ifdef CONFIG_PCI_IOV__UNUSED
9113         struct pci_dev *bdev, *vfdev;
9114         u32 dw0, dw1, dw2, dw3;
9115         int vf, pos;
9116         u16 req_id, pf_func;
9117
9118         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9119                 goto skip_bad_vf_detection;
9120
9121         bdev = pdev->bus->self;
9122         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9123                 bdev = bdev->bus->self;
9124
9125         if (!bdev)
9126                 goto skip_bad_vf_detection;
9127
9128         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9129         if (!pos)
9130                 goto skip_bad_vf_detection;
9131
9132         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9133         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9134         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9135         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9136
9137         req_id = dw1 >> 16;
9138         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9139         if (!(req_id & 0x0080))
9140                 goto skip_bad_vf_detection;
9141
9142         pf_func = req_id & 0x01;
9143         if ((pf_func & 1) == (pdev->devfn & 1)) {
9144
9145                 vf = (req_id & 0x7F) >> 1;
9146                 dev_err(pci_dev_to_dev(pdev),
9147                         "VF %d has caused a PCIe error\n", vf);
9148                 dev_err(pci_dev_to_dev(pdev),
9149                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9150                         "%8.8x\tdw3: %8.8x\n",
9151                         dw0, dw1, dw2, dw3);
9152
9153                 /* Find the pci device of the offending VF */
9154                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9155                                        E1000_DEV_ID_82576_VF, NULL);
9156                 while (vfdev) {
9157                         if (vfdev->devfn == (req_id & 0xFF))
9158                                 break;
9159                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9160                                                E1000_DEV_ID_82576_VF, vfdev);
9161                 }
9162                 /*
9163                  * There's a slim chance the VF could have been hot plugged,
9164                  * so if it is no longer present we don't need to issue the
9165                  * VFLR.  Just clean up the AER in that case.
9166                  */
9167                 if (vfdev) {
9168                         dev_err(pci_dev_to_dev(pdev),
9169                                 "Issuing VFLR to VF %d\n", vf);
9170                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9171                 }
9172
9173                 pci_cleanup_aer_uncorrect_error_status(pdev);
9174         }
9175
9176         /*
9177          * Even though the error may have occurred on the other port
9178          * we still need to increment the vf error reference count for
9179          * both ports because the I/O resume function will be called
9180          * for both of them.
9181          */
9182         adapter->vferr_refcount++;
9183
9184         return PCI_ERS_RESULT_RECOVERED;
9185
9186 skip_bad_vf_detection:
9187 #endif /* CONFIG_PCI_IOV */
9188
9189         netif_device_detach(netdev);
9190
9191         if (state == pci_channel_io_perm_failure)
9192                 return PCI_ERS_RESULT_DISCONNECT;
9193
9194         if (netif_running(netdev))
9195                 igb_down(adapter);
9196         pci_disable_device(pdev);
9197
9198         /* Request a slot slot reset. */
9199         return PCI_ERS_RESULT_NEED_RESET;
9200 }
9201
9202 /**
9203  * igb_io_slot_reset - called after the pci bus has been reset.
9204  * @pdev: Pointer to PCI device
9205  *
9206  * Restart the card from scratch, as if from a cold-boot. Implementation
9207  * resembles the first-half of the igb_resume routine.
9208  */
9209 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9210 {
9211         struct net_device *netdev = pci_get_drvdata(pdev);
9212         struct igb_adapter *adapter = netdev_priv(netdev);
9213         struct e1000_hw *hw = &adapter->hw;
9214         pci_ers_result_t result;
9215
9216         if (pci_enable_device_mem(pdev)) {
9217                 dev_err(pci_dev_to_dev(pdev),
9218                         "Cannot re-enable PCI device after reset.\n");
9219                 result = PCI_ERS_RESULT_DISCONNECT;
9220         } else {
9221                 pci_set_master(pdev);
9222                 pci_restore_state(pdev);
9223                 pci_save_state(pdev);
9224
9225                 pci_enable_wake(pdev, PCI_D3hot, 0);
9226                 pci_enable_wake(pdev, PCI_D3cold, 0);
9227
9228                 schedule_work(&adapter->reset_task);
9229                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9230                 result = PCI_ERS_RESULT_RECOVERED;
9231         }
9232
9233         pci_cleanup_aer_uncorrect_error_status(pdev);
9234
9235         return result;
9236 }
9237
9238 /**
9239  * igb_io_resume - called when traffic can start flowing again.
9240  * @pdev: Pointer to PCI device
9241  *
9242  * This callback is called when the error recovery driver tells us that
9243  * its OK to resume normal operation. Implementation resembles the
9244  * second-half of the igb_resume routine.
9245  */
9246 static void igb_io_resume(struct pci_dev *pdev)
9247 {
9248         struct net_device *netdev = pci_get_drvdata(pdev);
9249         struct igb_adapter *adapter = netdev_priv(netdev);
9250
9251         if (adapter->vferr_refcount) {
9252                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9253                 adapter->vferr_refcount--;
9254                 return;
9255         }
9256
9257         if (netif_running(netdev)) {
9258                 if (igb_up(adapter)) {
9259                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9260                         return;
9261                 }
9262         }
9263
9264         netif_device_attach(netdev);
9265
9266         /* let the f/w know that the h/w is now under the control of the
9267          * driver. */
9268         igb_get_hw_control(adapter);
9269 }
9270
9271 #endif /* HAVE_PCI_ERS */
9272
9273 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9274 {
9275         struct e1000_hw *hw = &adapter->hw;
9276         int i;
9277
9278         if (is_zero_ether_addr(addr))
9279                 return 0;
9280
9281         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9282                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9283                         continue;
9284                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9285                                                    IGB_MAC_STATE_IN_USE);
9286                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9287                 adapter->mac_table[i].queue = queue;
9288                 igb_sync_mac_table(adapter);
9289                 return 0;
9290         }
9291         return -ENOMEM;
9292 }
9293 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9294 {
9295         /* search table for addr, if found, set to 0 and sync */
9296         int i;
9297         struct e1000_hw *hw = &adapter->hw;
9298
9299         if (is_zero_ether_addr(addr))
9300                 return 0;
9301         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9302                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9303                     adapter->mac_table[i].queue == queue) {
9304                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9305                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9306                         adapter->mac_table[i].queue = 0;
9307                         igb_sync_mac_table(adapter);
9308                         return 0;
9309                 }
9310         }
9311         return -ENOMEM;
9312 }
9313 static int igb_set_vf_mac(struct igb_adapter *adapter,
9314                           int vf, unsigned char *mac_addr)
9315 {
9316         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9317         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9318
9319         igb_add_mac_filter(adapter, mac_addr, vf);
9320
9321         return 0;
9322 }
9323
9324 #ifdef IFLA_VF_MAX
9325 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9326 {
9327         struct igb_adapter *adapter = netdev_priv(netdev);
9328         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9329                 return -EINVAL;
9330         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9331         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9332         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9333                                       " change effective.\n");
9334         if (test_bit(__IGB_DOWN, &adapter->state)) {
9335                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9336                          " but the PF device is not up.\n");
9337                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9338                          " attempting to use the VF device.\n");
9339         }
9340         return igb_set_vf_mac(adapter, vf, mac);
9341 }
9342
9343 static int igb_link_mbps(int internal_link_speed)
9344 {
9345         switch (internal_link_speed) {
9346         case SPEED_100:
9347                 return 100;
9348         case SPEED_1000:
9349                 return 1000;
9350         case SPEED_2500:
9351                 return 2500;
9352         default:
9353                 return 0;
9354         }
9355 }
9356
9357 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9358                         int link_speed)
9359 {
9360         int rf_dec, rf_int;
9361         u32 bcnrc_val;
9362
9363         if (tx_rate != 0) {
9364                 /* Calculate the rate factor values to set */
9365                 rf_int = link_speed / tx_rate;
9366                 rf_dec = (link_speed - (rf_int * tx_rate));
9367                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9368
9369                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9370                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9371                                 E1000_RTTBCNRC_RF_INT_MASK);
9372                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9373         } else {
9374                 bcnrc_val = 0;
9375         }
9376
9377         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9378         /*
9379          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9380          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9381          */
9382         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9383         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9384 }
9385
9386 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9387 {
9388         int actual_link_speed, i;
9389         bool reset_rate = false;
9390
9391         /* VF TX rate limit was not set */
9392         if ((adapter->vf_rate_link_speed == 0) ||
9393                 (adapter->hw.mac.type != e1000_82576))
9394                 return;
9395
9396         actual_link_speed = igb_link_mbps(adapter->link_speed);
9397         if (actual_link_speed != adapter->vf_rate_link_speed) {
9398                 reset_rate = true;
9399                 adapter->vf_rate_link_speed = 0;
9400                 dev_info(&adapter->pdev->dev,
9401                 "Link speed has been changed. VF Transmit rate is disabled\n");
9402         }
9403
9404         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9405                 if (reset_rate)
9406                         adapter->vf_data[i].tx_rate = 0;
9407
9408                 igb_set_vf_rate_limit(&adapter->hw, i,
9409                         adapter->vf_data[i].tx_rate, actual_link_speed);
9410         }
9411 }
9412
9413 #ifdef HAVE_VF_MIN_MAX_TXRATE
9414 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9415                              int tx_rate)
9416 #else /* HAVE_VF_MIN_MAX_TXRATE */
9417 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9418 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9419 {
9420         struct igb_adapter *adapter = netdev_priv(netdev);
9421         struct e1000_hw *hw = &adapter->hw;
9422         int actual_link_speed;
9423
9424         if (hw->mac.type != e1000_82576)
9425                 return -EOPNOTSUPP;
9426
9427 #ifdef HAVE_VF_MIN_MAX_TXRATE
9428         if (min_tx_rate)
9429                 return -EINVAL;
9430 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9431
9432         actual_link_speed = igb_link_mbps(adapter->link_speed);
9433         if ((vf >= adapter->vfs_allocated_count) ||
9434                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9435                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9436                 return -EINVAL;
9437
9438         adapter->vf_rate_link_speed = actual_link_speed;
9439         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9440         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9441
9442         return 0;
9443 }
9444
9445 static int igb_ndo_get_vf_config(struct net_device *netdev,
9446                                  int vf, struct ifla_vf_info *ivi)
9447 {
9448         struct igb_adapter *adapter = netdev_priv(netdev);
9449         if (vf >= adapter->vfs_allocated_count)
9450                 return -EINVAL;
9451         ivi->vf = vf;
9452         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9453 #ifdef HAVE_VF_MIN_MAX_TXRATE
9454         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9455         ivi->min_tx_rate = 0;
9456 #else /* HAVE_VF_MIN_MAX_TXRATE */
9457         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9458 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9459         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9460         ivi->qos = adapter->vf_data[vf].pf_qos;
9461 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9462         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9463 #endif
9464         return 0;
9465 }
9466 #endif
9467 static void igb_vmm_control(struct igb_adapter *adapter)
9468 {
9469         struct e1000_hw *hw = &adapter->hw;
9470         int count;
9471         u32 reg;
9472
9473         switch (hw->mac.type) {
9474         case e1000_82575:
9475         default:
9476                 /* replication is not supported for 82575 */
9477                 return;
9478         case e1000_82576:
9479                 /* notify HW that the MAC is adding vlan tags */
9480                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9481                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9482                         E1000_DTXCTL_SPOOF_INT);
9483                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9484         case e1000_82580:
9485                 /* enable replication vlan tag stripping */
9486                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9487                 reg |= E1000_RPLOLR_STRVLAN;
9488                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9489         case e1000_i350:
9490         case e1000_i354:
9491                 /* none of the above registers are supported by i350 */
9492                 break;
9493         }
9494
9495         /* Enable Malicious Driver Detection */
9496         if ((adapter->vfs_allocated_count) &&
9497             (adapter->mdd)) {
9498                 if (hw->mac.type == e1000_i350)
9499                         igb_enable_mdd(adapter);
9500         }
9501
9502                 /* enable replication and loopback support */
9503                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9504                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9505                         e1000_vmdq_set_loopback_pf(hw, 1);
9506                 e1000_vmdq_set_anti_spoofing_pf(hw,
9507                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9508                         adapter->vfs_allocated_count);
9509         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9510                                       adapter->vmdq_pools);
9511 }
9512
9513 static void igb_init_fw(struct igb_adapter *adapter)
9514 {
9515         struct e1000_fw_drv_info fw_cmd;
9516         struct e1000_hw *hw = &adapter->hw;
9517         int i;
9518         u16 mask;
9519
9520         if (hw->mac.type == e1000_i210)
9521                 mask = E1000_SWFW_EEP_SM;
9522         else
9523                 mask = E1000_SWFW_PHY0_SM;
9524         /* i211 parts do not support this feature */
9525         if (hw->mac.type == e1000_i211)
9526                 hw->mac.arc_subsystem_valid = false;
9527
9528         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9529                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9530                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9531                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9532                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9533                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9534                         fw_cmd.port_num = hw->bus.func;
9535                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9536                         fw_cmd.hdr.checksum = 0;
9537                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9538                                                                    (FW_HDR_LEN +
9539                                                                     fw_cmd.hdr.buf_len));
9540                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9541                                                      sizeof(fw_cmd));
9542                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9543                                 break;
9544                 }
9545         } else
9546                 dev_warn(pci_dev_to_dev(adapter->pdev),
9547                          "Unable to get semaphore, firmware init failed.\n");
9548         hw->mac.ops.release_swfw_sync(hw, mask);
9549 }
9550
9551 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9552 {
9553         struct e1000_hw *hw = &adapter->hw;
9554         u32 dmac_thr;
9555         u16 hwm;
9556         u32 status;
9557
9558         if (hw->mac.type == e1000_i211)
9559                 return;
9560
9561         if (hw->mac.type > e1000_82580) {
9562                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9563                         u32 reg;
9564
9565                         /* force threshold to 0.  */
9566                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9567
9568                         /*
9569                          * DMA Coalescing high water mark needs to be greater
9570                          * than the Rx threshold. Set hwm to PBA - max frame
9571                          * size in 16B units, capping it at PBA - 6KB.
9572                          */
9573                         hwm = 64 * pba - adapter->max_frame_size / 16;
9574                         if (hwm < 64 * (pba - 6))
9575                                 hwm = 64 * (pba - 6);
9576                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9577                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9578                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9579                                 & E1000_FCRTC_RTH_COAL_MASK);
9580                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9581
9582                         /*
9583                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9584                          * frame size, capping it at PBA - 10KB.
9585                          */
9586                         dmac_thr = pba - adapter->max_frame_size / 512;
9587                         if (dmac_thr < pba - 10)
9588                                 dmac_thr = pba - 10;
9589                         reg = E1000_READ_REG(hw, E1000_DMACR);
9590                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9591                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9592                                 & E1000_DMACR_DMACTHR_MASK);
9593
9594                         /* transition to L0x or L1 if available..*/
9595                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9596
9597                         /* Check if status is 2.5Gb backplane connection
9598                          * before configuration of watchdog timer, which is
9599                          * in msec values in 12.8usec intervals
9600                          * watchdog timer= msec values in 32usec intervals
9601                          * for non 2.5Gb connection
9602                          */
9603                         if (hw->mac.type == e1000_i354) {
9604                                 status = E1000_READ_REG(hw, E1000_STATUS);
9605                                 if ((status & E1000_STATUS_2P5_SKU) &&
9606                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9607                                         reg |= ((adapter->dmac * 5) >> 6);
9608                                 else
9609                                         reg |= ((adapter->dmac) >> 5);
9610                         } else {
9611                                 reg |= ((adapter->dmac) >> 5);
9612                         }
9613
9614                         /*
9615                          * Disable BMC-to-OS Watchdog enable
9616                          * on devices that support OS-to-BMC
9617                          */
9618                         if (hw->mac.type != e1000_i354)
9619                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9620                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9621
9622                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9623                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9624
9625                         /* This sets the time to wait before requesting
9626                          * transition to low power state to number of usecs
9627                          * needed to receive 1 512 byte frame at gigabit
9628                          * line rate. On i350 device, time to make transition
9629                          * to Lx state is delayed by 4 usec with flush disable
9630                          * bit set to avoid losing mailbox interrupts
9631                          */
9632                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9633                         if (hw->mac.type == e1000_i350)
9634                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9635
9636                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9637                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9638                          */
9639                         if (hw->mac.type == e1000_i354) {
9640                                 status = E1000_READ_REG(hw, E1000_STATUS);
9641                                 if ((status & E1000_STATUS_2P5_SKU) &&
9642                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9643                                         reg |= 0xA;
9644                                 else
9645                                         reg |= 0x4;
9646                         } else {
9647                                 reg |= 0x4;
9648                         }
9649                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9650
9651                         /* free space in tx packet buffer to wake from DMA coal */
9652                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9653                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9654
9655                         /* make low power state decision controlled by DMA coal */
9656                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9657                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9658                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9659                 } /* endif adapter->dmac is not disabled */
9660         } else if (hw->mac.type == e1000_82580) {
9661                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9662                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9663                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9664                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9665         }
9666 }
9667
9668 #ifdef HAVE_I2C_SUPPORT
9669 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9670  *  @hw: pointer to hardware structure
9671  *  @byte_offset: byte offset to read
9672  *  @dev_addr: device address
9673  *  @data: value read
9674  *
9675  *  Performs byte read operation over I2C interface at
9676  *  a specified device address.
9677  */
9678 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9679                                 u8 dev_addr, u8 *data)
9680 {
9681         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9682         struct i2c_client *this_client = adapter->i2c_client;
9683         s32 status;
9684         u16 swfw_mask = 0;
9685
9686         if (!this_client)
9687                 return E1000_ERR_I2C;
9688
9689         swfw_mask = E1000_SWFW_PHY0_SM;
9690
9691         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9692             != E1000_SUCCESS)
9693                 return E1000_ERR_SWFW_SYNC;
9694
9695         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9696         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9697
9698         if (status < 0)
9699                 return E1000_ERR_I2C;
9700         else {
9701                 *data = status;
9702                 return E1000_SUCCESS;
9703         }
9704 }
9705
9706 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9707  *  @hw: pointer to hardware structure
9708  *  @byte_offset: byte offset to write
9709  *  @dev_addr: device address
9710  *  @data: value to write
9711  *
9712  *  Performs byte write operation over I2C interface at
9713  *  a specified device address.
9714  */
9715 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9716                                  u8 dev_addr, u8 data)
9717 {
9718         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9719         struct i2c_client *this_client = adapter->i2c_client;
9720         s32 status;
9721         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9722
9723         if (!this_client)
9724                 return E1000_ERR_I2C;
9725
9726         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9727                 return E1000_ERR_SWFW_SYNC;
9728         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9729         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9730
9731         if (status)
9732                 return E1000_ERR_I2C;
9733         else
9734                 return E1000_SUCCESS;
9735 }
9736 #endif /*  HAVE_I2C_SUPPORT */
9737 /* igb_main.c */
9738
9739
9740 /**
9741  * igb_probe - Device Initialization Routine
9742  * @pdev: PCI device information struct
9743  * @ent: entry in igb_pci_tbl
9744  *
9745  * Returns 0 on success, negative on failure
9746  *
9747  * igb_probe initializes an adapter identified by a pci_dev structure.
9748  * The OS initialization, configuring of the adapter private structure,
9749  * and a hardware reset occur.
9750  **/
9751 int igb_kni_probe(struct pci_dev *pdev,
9752                                struct net_device **lad_dev)
9753 {
9754         struct net_device *netdev;
9755         struct igb_adapter *adapter;
9756         struct e1000_hw *hw;
9757         u16 eeprom_data = 0;
9758         u8 pba_str[E1000_PBANUM_LENGTH];
9759         s32 ret_val;
9760         static int global_quad_port_a; /* global quad port a indication */
9761         int i, err, pci_using_dac = 0;
9762         static int cards_found;
9763
9764         err = pci_enable_device_mem(pdev);
9765         if (err)
9766                 return err;
9767
9768 #ifdef NO_KNI
9769         pci_using_dac = 0;
9770         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9771         if (!err) {
9772                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9773                 if (!err)
9774                         pci_using_dac = 1;
9775         } else {
9776                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9777                 if (err) {
9778                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9779                         if (err) {
9780                                 IGB_ERR("No usable DMA configuration, "
9781                                         "aborting\n");
9782                                 goto err_dma;
9783                         }
9784                 }
9785         }
9786
9787 #ifndef HAVE_ASPM_QUIRKS
9788         /* 82575 requires that the pci-e link partner disable the L0s state */
9789         switch (pdev->device) {
9790         case E1000_DEV_ID_82575EB_COPPER:
9791         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9792         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9793                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9794         default:
9795                 break;
9796         }
9797
9798 #endif /* HAVE_ASPM_QUIRKS */
9799         err = pci_request_selected_regions(pdev,
9800                                            pci_select_bars(pdev,
9801                                                            IORESOURCE_MEM),
9802                                            igb_driver_name);
9803         if (err)
9804                 goto err_pci_reg;
9805
9806         pci_enable_pcie_error_reporting(pdev);
9807
9808         pci_set_master(pdev);
9809
9810         err = -ENOMEM;
9811 #endif /* NO_KNI */
9812 #ifdef HAVE_TX_MQ
9813         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9814                                    IGB_MAX_TX_QUEUES);
9815 #else
9816         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9817 #endif /* HAVE_TX_MQ */
9818         if (!netdev)
9819                 goto err_alloc_etherdev;
9820
9821         SET_MODULE_OWNER(netdev);
9822         SET_NETDEV_DEV(netdev, &pdev->dev);
9823
9824         //pci_set_drvdata(pdev, netdev);
9825         adapter = netdev_priv(netdev);
9826         adapter->netdev = netdev;
9827         adapter->pdev = pdev;
9828         hw = &adapter->hw;
9829         hw->back = adapter;
9830         adapter->port_num = hw->bus.func;
9831         adapter->msg_enable = (1 << debug) - 1;
9832
9833 #ifdef HAVE_PCI_ERS
9834         err = pci_save_state(pdev);
9835         if (err)
9836                 goto err_ioremap;
9837 #endif
9838         err = -EIO;
9839         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9840                               pci_resource_len(pdev, 0));
9841         if (!hw->hw_addr)
9842                 goto err_ioremap;
9843
9844 #ifdef HAVE_NET_DEVICE_OPS
9845         netdev->netdev_ops = &igb_netdev_ops;
9846 #else /* HAVE_NET_DEVICE_OPS */
9847         netdev->open = &igb_open;
9848         netdev->stop = &igb_close;
9849         netdev->get_stats = &igb_get_stats;
9850 #ifdef HAVE_SET_RX_MODE
9851         netdev->set_rx_mode = &igb_set_rx_mode;
9852 #endif
9853         netdev->set_multicast_list = &igb_set_rx_mode;
9854         netdev->set_mac_address = &igb_set_mac;
9855         netdev->change_mtu = &igb_change_mtu;
9856         netdev->do_ioctl = &igb_ioctl;
9857 #ifdef HAVE_TX_TIMEOUT
9858         netdev->tx_timeout = &igb_tx_timeout;
9859 #endif
9860         netdev->vlan_rx_register = igb_vlan_mode;
9861         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9862         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9863 #ifdef CONFIG_NET_POLL_CONTROLLER
9864         netdev->poll_controller = igb_netpoll;
9865 #endif
9866         netdev->hard_start_xmit = &igb_xmit_frame;
9867 #endif /* HAVE_NET_DEVICE_OPS */
9868         igb_set_ethtool_ops(netdev);
9869 #ifdef HAVE_TX_TIMEOUT
9870         netdev->watchdog_timeo = 5 * HZ;
9871 #endif
9872
9873         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9874
9875         adapter->bd_number = cards_found;
9876
9877         /* setup the private structure */
9878         err = igb_sw_init(adapter);
9879         if (err)
9880                 goto err_sw_init;
9881
9882         e1000_get_bus_info(hw);
9883
9884         hw->phy.autoneg_wait_to_complete = FALSE;
9885         hw->mac.adaptive_ifs = FALSE;
9886
9887         /* Copper options */
9888         if (hw->phy.media_type == e1000_media_type_copper) {
9889                 hw->phy.mdix = AUTO_ALL_MODES;
9890                 hw->phy.disable_polarity_correction = FALSE;
9891                 hw->phy.ms_type = e1000_ms_hw_default;
9892         }
9893
9894         if (e1000_check_reset_block(hw))
9895                 dev_info(pci_dev_to_dev(pdev),
9896                         "PHY reset is blocked due to SOL/IDER session.\n");
9897
9898         /*
9899          * features is initialized to 0 in allocation, it might have bits
9900          * set by igb_sw_init so we should use an or instead of an
9901          * assignment.
9902          */
9903         netdev->features |= NETIF_F_SG |
9904                             NETIF_F_IP_CSUM |
9905 #ifdef NETIF_F_IPV6_CSUM
9906                             NETIF_F_IPV6_CSUM |
9907 #endif
9908 #ifdef NETIF_F_TSO
9909                             NETIF_F_TSO |
9910 #ifdef NETIF_F_TSO6
9911                             NETIF_F_TSO6 |
9912 #endif
9913 #endif /* NETIF_F_TSO */
9914 #ifdef NETIF_F_RXHASH
9915                             NETIF_F_RXHASH |
9916 #endif
9917                             NETIF_F_RXCSUM |
9918 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9919                             NETIF_F_HW_VLAN_CTAG_RX |
9920                             NETIF_F_HW_VLAN_CTAG_TX;
9921 #else
9922                             NETIF_F_HW_VLAN_RX |
9923                             NETIF_F_HW_VLAN_TX;
9924 #endif
9925
9926         if (hw->mac.type >= e1000_82576)
9927                 netdev->features |= NETIF_F_SCTP_CSUM;
9928
9929 #ifdef HAVE_NDO_SET_FEATURES
9930         /* copy netdev features into list of user selectable features */
9931         netdev->hw_features |= netdev->features;
9932 #ifndef IGB_NO_LRO
9933
9934         /* give us the option of enabling LRO later */
9935         netdev->hw_features |= NETIF_F_LRO;
9936 #endif
9937 #else
9938 #ifdef NETIF_F_GRO
9939
9940         /* this is only needed on kernels prior to 2.6.39 */
9941         netdev->features |= NETIF_F_GRO;
9942 #endif
9943 #endif
9944
9945         /* set this bit last since it cannot be part of hw_features */
9946 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9947         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9948 #else
9949         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9950 #endif
9951
9952 #ifdef HAVE_NETDEV_VLAN_FEATURES
9953         netdev->vlan_features |= NETIF_F_TSO |
9954                                  NETIF_F_TSO6 |
9955                                  NETIF_F_IP_CSUM |
9956                                  NETIF_F_IPV6_CSUM |
9957                                  NETIF_F_SG;
9958
9959 #endif
9960         if (pci_using_dac)
9961                 netdev->features |= NETIF_F_HIGHDMA;
9962
9963 #ifdef NO_KNI
9964         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9965 #ifdef DEBUG
9966         if (adapter->dmac != IGB_DMAC_DISABLE)
9967                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
9968 #endif
9969
9970         /* before reading the NVM, reset the controller to put the device in a
9971          * known good starting state */
9972         e1000_reset_hw(hw);
9973 #endif /* NO_KNI */
9974
9975         /* make sure the NVM is good */
9976         if (e1000_validate_nvm_checksum(hw) < 0) {
9977                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
9978                         " Valid\n");
9979                 err = -EIO;
9980                 goto err_eeprom;
9981         }
9982
9983         /* copy the MAC address out of the NVM */
9984         if (e1000_read_mac_addr(hw))
9985                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
9986         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
9987 #ifdef ETHTOOL_GPERMADDR
9988         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
9989
9990         if (!is_valid_ether_addr(netdev->perm_addr)) {
9991 #else
9992         if (!is_valid_ether_addr(netdev->dev_addr)) {
9993 #endif
9994                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
9995                 err = -EIO;
9996                 goto err_eeprom;
9997         }
9998
9999         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10000         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10001         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10002         igb_rar_set(adapter, 0);
10003
10004         /* get firmware version for ethtool -i */
10005         igb_set_fw_version(adapter);
10006
10007         /* Check if Media Autosense is enabled */
10008         if (hw->mac.type == e1000_82580)
10009                 igb_init_mas(adapter);
10010
10011 #ifdef NO_KNI
10012         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10013                     (unsigned long) adapter);
10014         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10015                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10016                             (unsigned long) adapter);
10017         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10018                     (unsigned long) adapter);
10019
10020         INIT_WORK(&adapter->reset_task, igb_reset_task);
10021         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10022         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10023                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10024 #endif
10025
10026         /* Initialize link properties that are user-changeable */
10027         adapter->fc_autoneg = true;
10028         hw->mac.autoneg = true;
10029         hw->phy.autoneg_advertised = 0x2f;
10030
10031         hw->fc.requested_mode = e1000_fc_default;
10032         hw->fc.current_mode = e1000_fc_default;
10033
10034         e1000_validate_mdi_setting(hw);
10035
10036         /* By default, support wake on port A */
10037         if (hw->bus.func == 0)
10038                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10039
10040         /* Check the NVM for wake support for non-port A ports */
10041         if (hw->mac.type >= e1000_82580)
10042                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10043                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10044                                  &eeprom_data);
10045         else if (hw->bus.func == 1)
10046                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10047
10048         if (eeprom_data & IGB_EEPROM_APME)
10049                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10050
10051         /* now that we have the eeprom settings, apply the special cases where
10052          * the eeprom may be wrong or the board simply won't support wake on
10053          * lan on a particular port */
10054         switch (pdev->device) {
10055         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10056                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10057                 break;
10058         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10059         case E1000_DEV_ID_82576_FIBER:
10060         case E1000_DEV_ID_82576_SERDES:
10061                 /* Wake events only supported on port A for dual fiber
10062                  * regardless of eeprom setting */
10063                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10064                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10065                 break;
10066         case E1000_DEV_ID_82576_QUAD_COPPER:
10067         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10068                 /* if quad port adapter, disable WoL on all but port A */
10069                 if (global_quad_port_a != 0)
10070                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10071                 else
10072                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10073                 /* Reset for multiple quad port adapters */
10074                 if (++global_quad_port_a == 4)
10075                         global_quad_port_a = 0;
10076                 break;
10077         default:
10078                 /* If the device can't wake, don't set software support */
10079                 if (!device_can_wakeup(&adapter->pdev->dev))
10080                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10081                 break;
10082         }
10083
10084         /* initialize the wol settings based on the eeprom settings */
10085         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10086                 adapter->wol |= E1000_WUFC_MAG;
10087
10088         /* Some vendors want WoL disabled by default, but still supported */
10089         if ((hw->mac.type == e1000_i350) &&
10090             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10091                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10092                 adapter->wol = 0;
10093         }
10094
10095 #ifdef NO_KNI
10096         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10097                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10098
10099         /* reset the hardware with the new settings */
10100         igb_reset(adapter);
10101         adapter->devrc = 0;
10102
10103 #ifdef HAVE_I2C_SUPPORT
10104         /* Init the I2C interface */
10105         err = igb_init_i2c(adapter);
10106         if (err) {
10107                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10108                 goto err_eeprom;
10109         }
10110 #endif /* HAVE_I2C_SUPPORT */
10111
10112         /* let the f/w know that the h/w is now under the control of the
10113          * driver. */
10114         igb_get_hw_control(adapter);
10115
10116         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10117         err = register_netdev(netdev);
10118         if (err)
10119                 goto err_register;
10120
10121 #ifdef CONFIG_IGB_VMDQ_NETDEV
10122         err = igb_init_vmdq_netdevs(adapter);
10123         if (err)
10124                 goto err_register;
10125 #endif
10126         /* carrier off reporting is important to ethtool even BEFORE open */
10127         netif_carrier_off(netdev);
10128
10129 #ifdef IGB_DCA
10130         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10131                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10132                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10133                 igb_setup_dca(adapter);
10134         }
10135
10136 #endif
10137 #ifdef HAVE_PTP_1588_CLOCK
10138         /* do hw tstamp init after resetting */
10139         igb_ptp_init(adapter);
10140 #endif /* HAVE_PTP_1588_CLOCK */
10141
10142 #endif /* NO_KNI */
10143         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10144         /* print bus type/speed/width info */
10145         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10146                  netdev->name,
10147                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10148                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10149                   (hw->mac.type == e1000_i354) ? "integrated" :
10150                                                             "unknown"),
10151                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10152                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10153                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10154                   (hw->mac.type == e1000_i354) ? "integrated" :
10155                    "unknown"));
10156         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10157         for (i = 0; i < 6; i++)
10158                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10159
10160         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10161         if (ret_val)
10162                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10163         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10164                  pba_str);
10165
10166
10167         /* Initialize the thermal sensor on i350 devices. */
10168         if (hw->mac.type == e1000_i350) {
10169                 if (hw->bus.func == 0) {
10170                         u16 ets_word;
10171
10172                         /*
10173                          * Read the NVM to determine if this i350 device
10174                          * supports an external thermal sensor.
10175                          */
10176                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10177                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10178                                 adapter->ets = true;
10179                         else
10180                                 adapter->ets = false;
10181                 }
10182 #ifdef NO_KNI
10183 #ifdef IGB_HWMON
10184
10185                 igb_sysfs_init(adapter);
10186 #else
10187 #ifdef IGB_PROCFS
10188
10189                 igb_procfs_init(adapter);
10190 #endif /* IGB_PROCFS */
10191 #endif /* IGB_HWMON */
10192 #endif /* NO_KNI */
10193         } else {
10194                 adapter->ets = false;
10195         }
10196
10197         if (hw->phy.media_type == e1000_media_type_copper) {
10198                 switch (hw->mac.type) {
10199                 case e1000_i350:
10200                 case e1000_i210:
10201                 case e1000_i211:
10202                         /* Enable EEE for internal copper PHY devices */
10203                         err = e1000_set_eee_i350(hw);
10204                         if ((!err) &&
10205                             (adapter->flags & IGB_FLAG_EEE))
10206                                 adapter->eee_advert =
10207                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10208                         break;
10209                 case e1000_i354:
10210                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10211                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10212                                 err = e1000_set_eee_i354(hw);
10213                                 if ((!err) &&
10214                                     (adapter->flags & IGB_FLAG_EEE))
10215                                         adapter->eee_advert =
10216                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10217                         }
10218                         break;
10219                 default:
10220                         break;
10221                 }
10222         }
10223
10224         /* send driver version info to firmware */
10225         if (hw->mac.type >= e1000_i350)
10226                 igb_init_fw(adapter);
10227
10228 #ifndef IGB_NO_LRO
10229         if (netdev->features & NETIF_F_LRO)
10230                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10231         else
10232                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10233 #endif
10234         dev_info(pci_dev_to_dev(pdev),
10235                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10236                  adapter->msix_entries ? "MSI-X" :
10237                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10238                  adapter->num_rx_queues, adapter->num_tx_queues);
10239
10240         cards_found++;
10241         *lad_dev = netdev;
10242
10243         pm_runtime_put_noidle(&pdev->dev);
10244         return 0;
10245
10246 //err_register:
10247 //      igb_release_hw_control(adapter);
10248 #ifdef HAVE_I2C_SUPPORT
10249         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10250 #endif /* HAVE_I2C_SUPPORT */
10251 err_eeprom:
10252 //      if (!e1000_check_reset_block(hw))
10253 //              e1000_phy_hw_reset(hw);
10254
10255         if (hw->flash_address)
10256                 iounmap(hw->flash_address);
10257 err_sw_init:
10258 //      igb_clear_interrupt_scheme(adapter);
10259 //      igb_reset_sriov_capability(adapter);
10260         iounmap(hw->hw_addr);
10261 err_ioremap:
10262         free_netdev(netdev);
10263 err_alloc_etherdev:
10264 //      pci_release_selected_regions(pdev,
10265 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10266 //err_pci_reg:
10267 //err_dma:
10268         pci_disable_device(pdev);
10269         return err;
10270 }
10271
10272
10273 void igb_kni_remove(struct pci_dev *pdev)
10274 {
10275         pci_disable_device(pdev);
10276 }