1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2015 Intel Corporation
5 #ifndef _RTE_ETH_CTRL_H_
6 #define _RTE_ETH_CTRL_H_
9 #include <rte_common.h>
10 #include <rte_ether.h>
14 * @deprecated Please use rte_flow API instead of this legacy one.
17 * Ethernet device features and related data structures used
18 * by control APIs should be defined in this file.
26 * Feature filter types
28 enum rte_filter_type {
29 RTE_ETH_FILTER_NONE = 0,
30 RTE_ETH_FILTER_ETHERTYPE,
31 RTE_ETH_FILTER_FLEXIBLE,
33 RTE_ETH_FILTER_NTUPLE,
34 RTE_ETH_FILTER_TUNNEL,
37 RTE_ETH_FILTER_L2_TUNNEL,
38 RTE_ETH_FILTER_GENERIC,
43 * Generic operations on filters
46 /** used to check whether the type filter is supported */
47 RTE_ETH_FILTER_NOP = 0,
48 RTE_ETH_FILTER_ADD, /**< add filter entry */
49 RTE_ETH_FILTER_UPDATE, /**< update filter entry */
50 RTE_ETH_FILTER_DELETE, /**< delete filter entry */
51 RTE_ETH_FILTER_FLUSH, /**< flush all entries */
52 RTE_ETH_FILTER_GET, /**< get filter entry */
53 RTE_ETH_FILTER_SET, /**< configurations */
54 RTE_ETH_FILTER_INFO, /**< retrieve information */
55 RTE_ETH_FILTER_STATS, /**< retrieve statistics */
60 * Define all structures for ntuple Filter type.
63 #define RTE_NTUPLE_FLAGS_DST_IP 0x0001 /**< If set, dst_ip is part of ntuple */
64 #define RTE_NTUPLE_FLAGS_SRC_IP 0x0002 /**< If set, src_ip is part of ntuple */
65 #define RTE_NTUPLE_FLAGS_DST_PORT 0x0004 /**< If set, dst_port is part of ntuple */
66 #define RTE_NTUPLE_FLAGS_SRC_PORT 0x0008 /**< If set, src_port is part of ntuple */
67 #define RTE_NTUPLE_FLAGS_PROTO 0x0010 /**< If set, protocol is part of ntuple */
68 #define RTE_NTUPLE_FLAGS_TCP_FLAG 0x0020 /**< If set, tcp flag is involved */
70 #define RTE_5TUPLE_FLAGS ( \
71 RTE_NTUPLE_FLAGS_DST_IP | \
72 RTE_NTUPLE_FLAGS_SRC_IP | \
73 RTE_NTUPLE_FLAGS_DST_PORT | \
74 RTE_NTUPLE_FLAGS_SRC_PORT | \
75 RTE_NTUPLE_FLAGS_PROTO)
77 #define RTE_2TUPLE_FLAGS ( \
78 RTE_NTUPLE_FLAGS_DST_PORT | \
79 RTE_NTUPLE_FLAGS_PROTO)
81 #define RTE_NTUPLE_TCP_FLAGS_MASK 0x3F /**< TCP flags filter can match. */
84 * A structure used to define the ntuple filter entry
85 * to support RTE_ETH_FILTER_NTUPLE data representation.
87 struct rte_eth_ntuple_filter {
88 uint16_t flags; /**< Flags from RTE_NTUPLE_FLAGS_* */
89 uint32_t dst_ip; /**< Destination IP address in big endian. */
90 uint32_t dst_ip_mask; /**< Mask of destination IP address. */
91 uint32_t src_ip; /**< Source IP address in big endian. */
92 uint32_t src_ip_mask; /**< Mask of destination IP address. */
93 uint16_t dst_port; /**< Destination port in big endian. */
94 uint16_t dst_port_mask; /**< Mask of destination port. */
95 uint16_t src_port; /**< Source Port in big endian. */
96 uint16_t src_port_mask; /**< Mask of source port. */
97 uint8_t proto; /**< L4 protocol. */
98 uint8_t proto_mask; /**< Mask of L4 protocol. */
99 /** tcp_flags only meaningful when the proto is TCP.
100 The packet matched above ntuple fields and contain
101 any set bit in tcp_flags will hit this filter. */
103 uint16_t priority; /**< seven levels (001b-111b), 111b is highest,
104 used when more than one filter matches. */
105 uint16_t queue; /**< Queue assigned to when match*/
109 * filter type of tunneling packet
111 #define ETH_TUNNEL_FILTER_OMAC 0x01 /**< filter by outer MAC addr */
112 #define ETH_TUNNEL_FILTER_OIP 0x02 /**< filter by outer IP Addr */
113 #define ETH_TUNNEL_FILTER_TENID 0x04 /**< filter by tenant ID */
114 #define ETH_TUNNEL_FILTER_IMAC 0x08 /**< filter by inner MAC addr */
115 #define ETH_TUNNEL_FILTER_IVLAN 0x10 /**< filter by inner VLAN ID */
116 #define ETH_TUNNEL_FILTER_IIP 0x20 /**< filter by inner IP addr */
118 #define RTE_TUNNEL_FILTER_IMAC_IVLAN (ETH_TUNNEL_FILTER_IMAC | \
119 ETH_TUNNEL_FILTER_IVLAN)
120 #define RTE_TUNNEL_FILTER_IMAC_IVLAN_TENID (ETH_TUNNEL_FILTER_IMAC | \
121 ETH_TUNNEL_FILTER_IVLAN | \
122 ETH_TUNNEL_FILTER_TENID)
123 #define RTE_TUNNEL_FILTER_IMAC_TENID (ETH_TUNNEL_FILTER_IMAC | \
124 ETH_TUNNEL_FILTER_TENID)
125 #define RTE_TUNNEL_FILTER_OMAC_TENID_IMAC (ETH_TUNNEL_FILTER_OMAC | \
126 ETH_TUNNEL_FILTER_TENID | \
127 ETH_TUNNEL_FILTER_IMAC)
130 * Select IPv4 or IPv6 for tunnel filters.
132 enum rte_tunnel_iptype {
133 RTE_TUNNEL_IPTYPE_IPV4 = 0, /**< IPv4. */
134 RTE_TUNNEL_IPTYPE_IPV6, /**< IPv6. */
138 * Tunneling Packet filter configuration.
140 struct rte_eth_tunnel_filter_conf {
141 struct rte_ether_addr outer_mac; /**< Outer MAC address to match. */
142 struct rte_ether_addr inner_mac; /**< Inner MAC address to match. */
143 uint16_t inner_vlan; /**< Inner VLAN to match. */
144 enum rte_tunnel_iptype ip_type; /**< IP address type. */
145 /** Outer destination IP address to match if ETH_TUNNEL_FILTER_OIP
146 is set in filter_type, or inner destination IP address to match
147 if ETH_TUNNEL_FILTER_IIP is set in filter_type . */
149 uint32_t ipv4_addr; /**< IPv4 address in big endian. */
150 uint32_t ipv6_addr[4]; /**< IPv6 address in big endian. */
152 /** Flags from ETH_TUNNEL_FILTER_XX - see above. */
153 uint16_t filter_type;
154 enum rte_eth_tunnel_type tunnel_type; /**< Tunnel Type. */
155 uint32_t tenant_id; /**< Tenant ID to match. VNI, GRE key... */
156 uint16_t queue_id; /**< Queue assigned to if match. */
160 * Global eth device configuration type.
162 enum rte_eth_global_cfg_type {
163 RTE_ETH_GLOBAL_CFG_TYPE_UNKNOWN = 0,
164 RTE_ETH_GLOBAL_CFG_TYPE_GRE_KEY_LEN,
165 RTE_ETH_GLOBAL_CFG_TYPE_MAX,
169 * Global eth device configuration.
171 struct rte_eth_global_cfg {
172 enum rte_eth_global_cfg_type cfg_type; /**< Global config type. */
174 uint8_t gre_key_len; /**< Valid GRE key length in byte. */
175 uint64_t reserved; /**< Reserve space for future use. */
179 #define RTE_ETH_FDIR_MAX_FLEXLEN 16 /**< Max length of flexbytes. */
180 #define RTE_ETH_INSET_SIZE_MAX 128 /**< Max length of input set. */
183 * Input set fields for Flow Director and Hash filters
185 enum rte_eth_input_set_field {
186 RTE_ETH_INPUT_SET_UNKNOWN = 0,
189 RTE_ETH_INPUT_SET_L2_SRC_MAC = 1,
190 RTE_ETH_INPUT_SET_L2_DST_MAC,
191 RTE_ETH_INPUT_SET_L2_OUTER_VLAN,
192 RTE_ETH_INPUT_SET_L2_INNER_VLAN,
193 RTE_ETH_INPUT_SET_L2_ETHERTYPE,
196 RTE_ETH_INPUT_SET_L3_SRC_IP4 = 129,
197 RTE_ETH_INPUT_SET_L3_DST_IP4,
198 RTE_ETH_INPUT_SET_L3_SRC_IP6,
199 RTE_ETH_INPUT_SET_L3_DST_IP6,
200 RTE_ETH_INPUT_SET_L3_IP4_TOS,
201 RTE_ETH_INPUT_SET_L3_IP4_PROTO,
202 RTE_ETH_INPUT_SET_L3_IP6_TC,
203 RTE_ETH_INPUT_SET_L3_IP6_NEXT_HEADER,
204 RTE_ETH_INPUT_SET_L3_IP4_TTL,
205 RTE_ETH_INPUT_SET_L3_IP6_HOP_LIMITS,
208 RTE_ETH_INPUT_SET_L4_UDP_SRC_PORT = 257,
209 RTE_ETH_INPUT_SET_L4_UDP_DST_PORT,
210 RTE_ETH_INPUT_SET_L4_TCP_SRC_PORT,
211 RTE_ETH_INPUT_SET_L4_TCP_DST_PORT,
212 RTE_ETH_INPUT_SET_L4_SCTP_SRC_PORT,
213 RTE_ETH_INPUT_SET_L4_SCTP_DST_PORT,
214 RTE_ETH_INPUT_SET_L4_SCTP_VERIFICATION_TAG,
217 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_DST_MAC = 385,
218 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_SRC_MAC,
219 RTE_ETH_INPUT_SET_TUNNEL_L2_INNER_VLAN,
220 RTE_ETH_INPUT_SET_TUNNEL_L4_UDP_KEY,
221 RTE_ETH_INPUT_SET_TUNNEL_GRE_KEY,
223 /* Flexible Payload */
224 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_1ST_WORD = 641,
225 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_2ND_WORD,
226 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_3RD_WORD,
227 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_4TH_WORD,
228 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_5TH_WORD,
229 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_6TH_WORD,
230 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_7TH_WORD,
231 RTE_ETH_INPUT_SET_FLEX_PAYLOAD_8TH_WORD,
233 RTE_ETH_INPUT_SET_DEFAULT = 65533,
234 RTE_ETH_INPUT_SET_NONE = 65534,
235 RTE_ETH_INPUT_SET_MAX = 65535,
239 * Filters input set operations
241 enum rte_filter_input_set_op {
242 RTE_ETH_INPUT_SET_OP_UNKNOWN,
243 RTE_ETH_INPUT_SET_SELECT, /**< select input set */
244 RTE_ETH_INPUT_SET_ADD, /**< add input set entry */
245 RTE_ETH_INPUT_SET_OP_MAX
250 * A structure used to define the input set configuration for
251 * flow director and hash filters
253 struct rte_eth_input_set_conf {
256 enum rte_eth_input_set_field field[RTE_ETH_INSET_SIZE_MAX];
257 enum rte_filter_input_set_op op;
261 * A structure used to define the input for L2 flow
263 struct rte_eth_l2_flow {
264 uint16_t ether_type; /**< Ether type in big endian */
268 * A structure used to define the input for IPV4 flow
270 struct rte_eth_ipv4_flow {
271 uint32_t src_ip; /**< IPv4 source address in big endian. */
272 uint32_t dst_ip; /**< IPv4 destination address in big endian. */
273 uint8_t tos; /**< Type of service to match. */
274 uint8_t ttl; /**< Time to live to match. */
275 uint8_t proto; /**< Protocol, next header in big endian. */
279 * A structure used to define the input for IPV4 UDP flow
281 struct rte_eth_udpv4_flow {
282 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
283 uint16_t src_port; /**< UDP source port in big endian. */
284 uint16_t dst_port; /**< UDP destination port in big endian. */
288 * A structure used to define the input for IPV4 TCP flow
290 struct rte_eth_tcpv4_flow {
291 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
292 uint16_t src_port; /**< TCP source port in big endian. */
293 uint16_t dst_port; /**< TCP destination port in big endian. */
297 * A structure used to define the input for IPV4 SCTP flow
299 struct rte_eth_sctpv4_flow {
300 struct rte_eth_ipv4_flow ip; /**< IPv4 fields to match. */
301 uint16_t src_port; /**< SCTP source port in big endian. */
302 uint16_t dst_port; /**< SCTP destination port in big endian. */
303 uint32_t verify_tag; /**< Verify tag in big endian */
307 * A structure used to define the input for IPV6 flow
309 struct rte_eth_ipv6_flow {
310 uint32_t src_ip[4]; /**< IPv6 source address in big endian. */
311 uint32_t dst_ip[4]; /**< IPv6 destination address in big endian. */
312 uint8_t tc; /**< Traffic class to match. */
313 uint8_t proto; /**< Protocol, next header to match. */
314 uint8_t hop_limits; /**< Hop limits to match. */
318 * A structure used to define the input for IPV6 UDP flow
320 struct rte_eth_udpv6_flow {
321 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
322 uint16_t src_port; /**< UDP source port in big endian. */
323 uint16_t dst_port; /**< UDP destination port in big endian. */
327 * A structure used to define the input for IPV6 TCP flow
329 struct rte_eth_tcpv6_flow {
330 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
331 uint16_t src_port; /**< TCP source port to in big endian. */
332 uint16_t dst_port; /**< TCP destination port in big endian. */
336 * A structure used to define the input for IPV6 SCTP flow
338 struct rte_eth_sctpv6_flow {
339 struct rte_eth_ipv6_flow ip; /**< IPv6 fields to match. */
340 uint16_t src_port; /**< SCTP source port in big endian. */
341 uint16_t dst_port; /**< SCTP destination port in big endian. */
342 uint32_t verify_tag; /**< Verify tag in big endian. */
346 * A structure used to define the input for MAC VLAN flow
348 struct rte_eth_mac_vlan_flow {
349 struct rte_ether_addr mac_addr; /**< Mac address to match. */
353 * Tunnel type for flow director.
355 enum rte_eth_fdir_tunnel_type {
356 RTE_FDIR_TUNNEL_TYPE_UNKNOWN = 0,
357 RTE_FDIR_TUNNEL_TYPE_NVGRE,
358 RTE_FDIR_TUNNEL_TYPE_VXLAN,
362 * A structure used to define the input for tunnel flow, now it's VxLAN or
365 struct rte_eth_tunnel_flow {
366 enum rte_eth_fdir_tunnel_type tunnel_type; /**< Tunnel type to match. */
367 /** Tunnel ID to match. TNI, VNI... in big endian. */
369 struct rte_ether_addr mac_addr; /**< Mac address to match. */
373 * An union contains the inputs for all types of flow
374 * Items in flows need to be in big endian
376 union rte_eth_fdir_flow {
377 struct rte_eth_l2_flow l2_flow;
378 struct rte_eth_udpv4_flow udp4_flow;
379 struct rte_eth_tcpv4_flow tcp4_flow;
380 struct rte_eth_sctpv4_flow sctp4_flow;
381 struct rte_eth_ipv4_flow ip4_flow;
382 struct rte_eth_udpv6_flow udp6_flow;
383 struct rte_eth_tcpv6_flow tcp6_flow;
384 struct rte_eth_sctpv6_flow sctp6_flow;
385 struct rte_eth_ipv6_flow ipv6_flow;
386 struct rte_eth_mac_vlan_flow mac_vlan_flow;
387 struct rte_eth_tunnel_flow tunnel_flow;
391 * A structure used to contain extend input of flow
393 struct rte_eth_fdir_flow_ext {
395 uint8_t flexbytes[RTE_ETH_FDIR_MAX_FLEXLEN];
396 /**< It is filled by the flexible payload to match. */
397 uint8_t is_vf; /**< 1 for VF, 0 for port dev */
398 uint16_t dst_id; /**< VF ID, available when is_vf is 1*/
402 * A structure used to define the input for a flow director filter entry
404 struct rte_eth_fdir_input {
406 union rte_eth_fdir_flow flow;
407 /**< Flow fields to match, dependent on flow_type */
408 struct rte_eth_fdir_flow_ext flow_ext;
409 /**< Additional fields to match */
413 * Behavior will be taken if FDIR match
415 enum rte_eth_fdir_behavior {
416 RTE_ETH_FDIR_ACCEPT = 0,
418 RTE_ETH_FDIR_PASSTHRU,
422 * Flow director report status
423 * It defines what will be reported if FDIR entry is matched.
425 enum rte_eth_fdir_status {
426 RTE_ETH_FDIR_NO_REPORT_STATUS = 0, /**< Report nothing. */
427 RTE_ETH_FDIR_REPORT_ID, /**< Only report FD ID. */
428 RTE_ETH_FDIR_REPORT_ID_FLEX_4, /**< Report FD ID and 4 flex bytes. */
429 RTE_ETH_FDIR_REPORT_FLEX_8, /**< Report 8 flex bytes. */
433 * A structure used to define an action when match FDIR packet filter.
435 struct rte_eth_fdir_action {
436 uint16_t rx_queue; /**< Queue assigned to if FDIR match. */
437 enum rte_eth_fdir_behavior behavior; /**< Behavior will be taken */
438 enum rte_eth_fdir_status report_status; /**< Status report option */
440 /**< If report_status is RTE_ETH_FDIR_REPORT_ID_FLEX_4 or
441 RTE_ETH_FDIR_REPORT_FLEX_8, flex_off specifies where the reported
442 flex bytes start from in flexible payload. */
446 * A structure used to define the flow director filter entry by filter_ctrl API
447 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_ADD and
448 * RTE_ETH_FILTER_DELETE operations.
450 struct rte_eth_fdir_filter {
452 /**< ID, an unique value is required when deal with FDIR entry */
453 struct rte_eth_fdir_input input; /**< Input set */
454 struct rte_eth_fdir_action action; /**< Action taken when match */
458 * A structure used to configure FDIR masks that are used by the device
459 * to match the various fields of RX packet headers.
461 struct rte_eth_fdir_masks {
462 uint16_t vlan_tci_mask; /**< Bit mask for vlan_tci in big endian */
463 /** Bit mask for ipv4 flow in big endian. */
464 struct rte_eth_ipv4_flow ipv4_mask;
465 /** Bit mask for ipv6 flow in big endian. */
466 struct rte_eth_ipv6_flow ipv6_mask;
467 /** Bit mask for L4 source port in big endian. */
468 uint16_t src_port_mask;
469 /** Bit mask for L4 destination port in big endian. */
470 uint16_t dst_port_mask;
471 /** 6 bit mask for proper 6 bytes of Mac address, bit 0 matches the
472 first byte on the wire */
473 uint8_t mac_addr_byte_mask;
474 /** Bit mask for tunnel ID in big endian. */
475 uint32_t tunnel_id_mask;
476 uint8_t tunnel_type_mask; /**< 1 - Match tunnel type,
477 0 - Ignore tunnel type. */
483 enum rte_eth_payload_type {
484 RTE_ETH_PAYLOAD_UNKNOWN = 0,
489 RTE_ETH_PAYLOAD_MAX = 8,
493 * A structure used to select bytes extracted from the protocol layers to
494 * flexible payload for filter
496 struct rte_eth_flex_payload_cfg {
497 enum rte_eth_payload_type type; /**< Payload type */
498 uint16_t src_offset[RTE_ETH_FDIR_MAX_FLEXLEN];
499 /**< Offset in bytes from the beginning of packet's payload
500 src_offset[i] indicates the flexbyte i's offset in original
501 packet payload. This value should be less than
502 flex_payload_limit in struct rte_eth_fdir_info.*/
506 * A structure used to define FDIR masks for flexible payload
509 struct rte_eth_fdir_flex_mask {
511 uint8_t mask[RTE_ETH_FDIR_MAX_FLEXLEN];
512 /**< Mask for the whole flexible payload */
516 * A structure used to define all flexible payload related setting
517 * include flex payload and flex mask
519 struct rte_eth_fdir_flex_conf {
520 uint16_t nb_payloads; /**< The number of following payload cfg */
521 uint16_t nb_flexmasks; /**< The number of following mask */
522 struct rte_eth_flex_payload_cfg flex_set[RTE_ETH_PAYLOAD_MAX];
523 /**< Flex payload configuration for each payload type */
524 struct rte_eth_fdir_flex_mask flex_mask[RTE_ETH_FLOW_MAX];
525 /**< Flex mask configuration for each flow type */
529 * Flow Director setting modes: none, signature or perfect.
532 RTE_FDIR_MODE_NONE = 0, /**< Disable FDIR support. */
533 RTE_FDIR_MODE_SIGNATURE, /**< Enable FDIR signature filter mode. */
534 RTE_FDIR_MODE_PERFECT, /**< Enable FDIR perfect filter mode. */
535 RTE_FDIR_MODE_PERFECT_MAC_VLAN, /**< Enable FDIR filter mode - MAC VLAN. */
536 RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - tunnel. */
539 #define UINT64_BIT (CHAR_BIT * sizeof(uint64_t))
540 #define RTE_FLOW_MASK_ARRAY_SIZE \
541 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
544 * A structure used to get the information of flow director filter.
545 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_INFO operation.
546 * It includes the mode, flexible payload configuration information,
547 * capabilities and supported flow types, flexible payload characters.
548 * It can be gotten to help taking specific configurations per device.
550 struct rte_eth_fdir_info {
551 enum rte_fdir_mode mode; /**< Flow director mode */
552 struct rte_eth_fdir_masks mask;
553 /** Flex payload configuration information */
554 struct rte_eth_fdir_flex_conf flex_conf;
555 uint32_t guarant_spc; /**< Guaranteed spaces.*/
556 uint32_t best_spc; /**< Best effort spaces.*/
557 /** Bit mask for every supported flow type. */
558 uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE];
559 uint32_t max_flexpayload; /**< Total flex payload in bytes. */
560 /** Flexible payload unit in bytes. Size and alignments of all flex
561 payload segments should be multiplies of this value. */
562 uint32_t flex_payload_unit;
563 /** Max number of flexible payload continuous segments.
564 Each segment should be a multiple of flex_payload_unit.*/
565 uint32_t max_flex_payload_segment_num;
566 /** Maximum src_offset in bytes allowed. It indicates that
567 src_offset[i] in struct rte_eth_flex_payload_cfg should be less
569 uint16_t flex_payload_limit;
570 /** Flex bitmask unit in bytes. Size of flex bitmasks should be a
571 multiply of this value. */
572 uint32_t flex_bitmask_unit;
573 /** Max supported size of flex bitmasks in flex_bitmask_unit */
574 uint32_t max_flex_bitmask_num;
578 * A structure used to define the statistics of flow director.
579 * It supports RTE_ETH_FILTER_FDIR with RTE_ETH_FILTER_STATS operation.
581 struct rte_eth_fdir_stats {
582 uint32_t collision; /**< Number of filters with collision. */
583 uint32_t free; /**< Number of free filters. */
585 /**< The lookup hash value of the added filter that updated the value
586 of the MAXLEN field */
587 uint32_t maxlen; /**< Longest linked list of filters. */
588 uint64_t add; /**< Number of added filters. */
589 uint64_t remove; /**< Number of removed filters. */
590 uint64_t f_add; /**< Number of failed added filters. */
591 uint64_t f_remove; /**< Number of failed removed filters. */
592 uint32_t guarant_cnt; /**< Number of filters in guaranteed spaces. */
593 uint32_t best_cnt; /**< Number of filters in best effort spaces. */
597 * Flow Director filter information types.
599 enum rte_eth_fdir_filter_info_type {
600 RTE_ETH_FDIR_FILTER_INFO_TYPE_UNKNOWN = 0,
601 /** Flow Director filter input set configuration */
602 RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT,
603 RTE_ETH_FDIR_FILTER_INFO_TYPE_MAX,
607 * A structure used to set FDIR filter information, to support filter type
608 * of 'RTE_ETH_FILTER_FDIR' RTE_ETH_FDIR_FILTER_INPUT_SET_SELECT operation.
610 struct rte_eth_fdir_filter_info {
611 enum rte_eth_fdir_filter_info_type info_type; /**< Information type */
612 /** Details of fdir filter information */
614 /** Flow Director input set configuration per port */
615 struct rte_eth_input_set_conf input_set_conf;
620 * Hash filter information types.
621 * - RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT is for getting/setting the
622 * information/configuration of 'symmetric hash enable' per port.
623 * - RTE_ETH_HASH_FILTER_GLOBAL_CONFIG is for getting/setting the global
624 * configurations of hash filters. Those global configurations are valid
625 * for all ports of the same NIC.
626 * - RTE_ETH_HASH_FILTER_INPUT_SET_SELECT is for setting the global
627 * hash input set fields
629 enum rte_eth_hash_filter_info_type {
630 RTE_ETH_HASH_FILTER_INFO_TYPE_UNKNOWN = 0,
631 /** Symmetric hash enable per port */
632 RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT,
633 /** Configure globally for hash filter */
634 RTE_ETH_HASH_FILTER_GLOBAL_CONFIG,
635 /** Global Hash filter input set configuration */
636 RTE_ETH_HASH_FILTER_INPUT_SET_SELECT,
637 RTE_ETH_HASH_FILTER_INFO_TYPE_MAX,
640 #define RTE_SYM_HASH_MASK_ARRAY_SIZE \
641 (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT)
643 * A structure used to set or get global hash function configurations which
644 * include symmetric hash enable per flow type and hash function type.
645 * Each bit in sym_hash_enable_mask[] indicates if the symmetric hash of the
646 * corresponding flow type is enabled or not.
647 * Each bit in valid_bit_mask[] indicates if the corresponding bit in
648 * sym_hash_enable_mask[] is valid or not. For the configurations gotten, it
649 * also means if the flow type is supported by hardware or not.
651 struct rte_eth_hash_global_conf {
652 enum rte_eth_hash_function hash_func; /**< Hash function type */
653 /** Bit mask for symmetric hash enable per flow type */
654 uint64_t sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
655 /** Bit mask indicates if the corresponding bit is valid */
656 uint64_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE];
660 * A structure used to set or get hash filter information, to support filter
661 * type of 'RTE_ETH_FILTER_HASH' and its operations.
663 struct rte_eth_hash_filter_info {
664 enum rte_eth_hash_filter_info_type info_type; /**< Information type */
665 /** Details of hash filter information */
667 /** For RTE_ETH_HASH_FILTER_SYM_HASH_ENA_PER_PORT */
669 /** Global configurations of hash filter */
670 struct rte_eth_hash_global_conf global_conf;
671 /** Global configurations of hash filter input set */
672 struct rte_eth_input_set_conf input_set_conf;
677 * l2 tunnel configuration.
679 struct rte_eth_l2_tunnel_conf {
680 enum rte_eth_tunnel_type l2_tunnel_type;
681 uint16_t ether_type; /* ether type in l2 header */
682 uint32_t tunnel_id; /* port tag id for e-tag */
683 uint16_t vf_id; /* VF id for tag insertion */
684 uint32_t pool; /* destination pool for tag based forwarding */
691 #endif /* _RTE_ETH_CTRL_H_ */