1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
37 #include <rte_kvargs.h>
38 #include <rte_class.h>
39 #include <rte_ether.h>
40 #include <rte_telemetry.h>
42 #include "rte_ethdev_trace.h"
43 #include "rte_ethdev.h"
44 #include "rte_ethdev_driver.h"
45 #include "ethdev_profile.h"
46 #include "ethdev_private.h"
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
98 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
99 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
100 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
102 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
104 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
105 { DEV_RX_OFFLOAD_##_name, #_name }
107 static const struct {
110 } rte_rx_offload_names[] = {
111 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
112 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
113 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
116 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
117 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
120 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
122 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
123 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
124 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
125 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
126 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
127 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
128 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
159 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
160 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
162 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
165 #undef RTE_TX_OFFLOAD_BIT2STR
168 * The user application callback description.
170 * It contains callback address to be registered by user application,
171 * the pointer to the parameters for callback, and the event type.
173 struct rte_eth_dev_callback {
174 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
176 void *cb_arg; /**< Parameter for callback */
177 void *ret_param; /**< Return parameter */
178 enum rte_eth_event_type event; /**< Interrupt event type */
179 uint32_t active; /**< Callback is executing */
188 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
191 struct rte_devargs devargs = {.args = NULL};
192 const char *bus_param_key;
193 char *bus_str = NULL;
194 char *cls_str = NULL;
197 memset(iter, 0, sizeof(*iter));
200 * The devargs string may use various syntaxes:
201 * - 0000:08:00.0,representor=[1-3]
202 * - pci:0000:06:00.0,representor=[0,5]
203 * - class=eth,mac=00:11:22:33:44:55
204 * A new syntax is in development (not yet supported):
205 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
209 * Handle pure class filter (i.e. without any bus-level argument),
210 * from future new syntax.
211 * rte_devargs_parse() is not yet supporting the new syntax,
212 * that's why this simple case is temporarily parsed here.
214 #define iter_anybus_str "class=eth,"
215 if (strncmp(devargs_str, iter_anybus_str,
216 strlen(iter_anybus_str)) == 0) {
217 iter->cls_str = devargs_str + strlen(iter_anybus_str);
221 /* Split bus, device and parameters. */
222 ret = rte_devargs_parse(&devargs, devargs_str);
227 * Assume parameters of old syntax can match only at ethdev level.
228 * Extra parameters will be ignored, thanks to "+" prefix.
230 str_size = strlen(devargs.args) + 2;
231 cls_str = malloc(str_size);
232 if (cls_str == NULL) {
236 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
237 if (ret != str_size - 1) {
241 iter->cls_str = cls_str;
242 free(devargs.args); /* allocated by rte_devargs_parse() */
245 iter->bus = devargs.bus;
246 if (iter->bus->dev_iterate == NULL) {
251 /* Convert bus args to new syntax for use with new API dev_iterate. */
252 if (strcmp(iter->bus->name, "vdev") == 0) {
253 bus_param_key = "name";
254 } else if (strcmp(iter->bus->name, "pci") == 0) {
255 bus_param_key = "addr";
260 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
261 bus_str = malloc(str_size);
262 if (bus_str == NULL) {
266 ret = snprintf(bus_str, str_size, "%s=%s",
267 bus_param_key, devargs.name);
268 if (ret != str_size - 1) {
272 iter->bus_str = bus_str;
275 iter->cls = rte_class_find_by_name("eth");
280 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
289 rte_eth_iterator_next(struct rte_dev_iterator *iter)
291 if (iter->cls == NULL) /* invalid ethdev iterator */
292 return RTE_MAX_ETHPORTS;
294 do { /* loop to try all matching rte_device */
295 /* If not pure ethdev filter and */
296 if (iter->bus != NULL &&
297 /* not in middle of rte_eth_dev iteration, */
298 iter->class_device == NULL) {
299 /* get next rte_device to try. */
300 iter->device = iter->bus->dev_iterate(
301 iter->device, iter->bus_str, iter);
302 if (iter->device == NULL)
303 break; /* no more rte_device candidate */
305 /* A device is matching bus part, need to check ethdev part. */
306 iter->class_device = iter->cls->dev_iterate(
307 iter->class_device, iter->cls_str, iter);
308 if (iter->class_device != NULL)
309 return eth_dev_to_id(iter->class_device); /* match */
310 } while (iter->bus != NULL); /* need to try next rte_device */
312 /* No more ethdev port to iterate. */
313 rte_eth_iterator_cleanup(iter);
314 return RTE_MAX_ETHPORTS;
318 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
320 if (iter->bus_str == NULL)
321 return; /* nothing to free in pure class filter */
322 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
323 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
324 memset(iter, 0, sizeof(*iter));
328 rte_eth_find_next(uint16_t port_id)
330 while (port_id < RTE_MAX_ETHPORTS &&
331 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
334 if (port_id >= RTE_MAX_ETHPORTS)
335 return RTE_MAX_ETHPORTS;
341 * Macro to iterate over all valid ports for internal usage.
342 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
344 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
345 for (port_id = rte_eth_find_next(0); \
346 port_id < RTE_MAX_ETHPORTS; \
347 port_id = rte_eth_find_next(port_id + 1))
350 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
352 port_id = rte_eth_find_next(port_id);
353 while (port_id < RTE_MAX_ETHPORTS &&
354 rte_eth_devices[port_id].device != parent)
355 port_id = rte_eth_find_next(port_id + 1);
361 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
363 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
364 return rte_eth_find_next_of(port_id,
365 rte_eth_devices[ref_port_id].device);
369 rte_eth_dev_shared_data_prepare(void)
371 const unsigned flags = 0;
372 const struct rte_memzone *mz;
374 rte_spinlock_lock(&rte_eth_shared_data_lock);
376 if (rte_eth_dev_shared_data == NULL) {
377 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
378 /* Allocate port data and ownership shared memory. */
379 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
380 sizeof(*rte_eth_dev_shared_data),
381 rte_socket_id(), flags);
383 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
385 rte_panic("Cannot allocate ethdev shared data\n");
387 rte_eth_dev_shared_data = mz->addr;
388 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
389 rte_eth_dev_shared_data->next_owner_id =
390 RTE_ETH_DEV_NO_OWNER + 1;
391 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
392 memset(rte_eth_dev_shared_data->data, 0,
393 sizeof(rte_eth_dev_shared_data->data));
397 rte_spinlock_unlock(&rte_eth_shared_data_lock);
401 is_allocated(const struct rte_eth_dev *ethdev)
403 return ethdev->data->name[0] != '\0';
406 static struct rte_eth_dev *
407 _rte_eth_dev_allocated(const char *name)
411 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
412 if (rte_eth_devices[i].data != NULL &&
413 strcmp(rte_eth_devices[i].data->name, name) == 0)
414 return &rte_eth_devices[i];
420 rte_eth_dev_allocated(const char *name)
422 struct rte_eth_dev *ethdev;
424 rte_eth_dev_shared_data_prepare();
426 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
428 ethdev = _rte_eth_dev_allocated(name);
430 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
436 rte_eth_dev_find_free_port(void)
440 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 /* Using shared name field to find a free port. */
442 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
443 RTE_ASSERT(rte_eth_devices[i].state ==
448 return RTE_MAX_ETHPORTS;
451 static struct rte_eth_dev *
452 eth_dev_get(uint16_t port_id)
454 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
456 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
462 rte_eth_dev_allocate(const char *name)
465 struct rte_eth_dev *eth_dev = NULL;
468 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
470 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
474 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
475 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
479 rte_eth_dev_shared_data_prepare();
481 /* Synchronize port creation between primary and secondary threads. */
482 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
484 if (_rte_eth_dev_allocated(name) != NULL) {
486 "Ethernet device with name %s already allocated\n",
491 port_id = rte_eth_dev_find_free_port();
492 if (port_id == RTE_MAX_ETHPORTS) {
494 "Reached maximum number of Ethernet ports\n");
498 eth_dev = eth_dev_get(port_id);
499 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
500 eth_dev->data->port_id = port_id;
501 eth_dev->data->mtu = RTE_ETHER_MTU;
502 pthread_mutex_init(ð_dev->data->flow_ops_mutex, NULL);
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
558 eth_dev->device = NULL;
559 eth_dev->intr_handle = NULL;
561 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
562 rte_free(eth_dev->data->rx_queues);
563 rte_free(eth_dev->data->tx_queues);
564 rte_free(eth_dev->data->mac_addrs);
565 rte_free(eth_dev->data->hash_mac_addrs);
566 rte_free(eth_dev->data->dev_private);
567 pthread_mutex_destroy(ð_dev->data->flow_ops_mutex);
568 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
571 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
577 rte_eth_dev_is_valid_port(uint16_t port_id)
579 if (port_id >= RTE_MAX_ETHPORTS ||
580 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
587 rte_eth_is_valid_owner_id(uint64_t owner_id)
589 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
590 rte_eth_dev_shared_data->next_owner_id <= owner_id)
596 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
598 port_id = rte_eth_find_next(port_id);
599 while (port_id < RTE_MAX_ETHPORTS &&
600 rte_eth_devices[port_id].data->owner.id != owner_id)
601 port_id = rte_eth_find_next(port_id + 1);
607 rte_eth_dev_owner_new(uint64_t *owner_id)
609 rte_eth_dev_shared_data_prepare();
611 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
613 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
615 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
620 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
621 const struct rte_eth_dev_owner *new_owner)
623 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
624 struct rte_eth_dev_owner *port_owner;
626 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
627 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
632 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
633 !rte_eth_is_valid_owner_id(old_owner_id)) {
635 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
636 old_owner_id, new_owner->id);
640 port_owner = &rte_eth_devices[port_id].data->owner;
641 if (port_owner->id != old_owner_id) {
643 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
644 port_id, port_owner->name, port_owner->id);
648 /* can not truncate (same structure) */
649 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
651 port_owner->id = new_owner->id;
653 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
654 port_id, new_owner->name, new_owner->id);
660 rte_eth_dev_owner_set(const uint16_t port_id,
661 const struct rte_eth_dev_owner *owner)
665 rte_eth_dev_shared_data_prepare();
667 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
669 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
671 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
676 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
678 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
679 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
682 rte_eth_dev_shared_data_prepare();
684 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
686 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
688 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
693 rte_eth_dev_owner_delete(const uint64_t owner_id)
698 rte_eth_dev_shared_data_prepare();
700 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
702 if (rte_eth_is_valid_owner_id(owner_id)) {
703 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
704 if (rte_eth_devices[port_id].data->owner.id == owner_id)
705 memset(&rte_eth_devices[port_id].data->owner, 0,
706 sizeof(struct rte_eth_dev_owner));
707 RTE_ETHDEV_LOG(NOTICE,
708 "All port owners owned by %016"PRIx64" identifier have removed\n",
712 "Invalid owner id=%016"PRIx64"\n",
717 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
723 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
726 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
728 rte_eth_dev_shared_data_prepare();
730 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
732 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
733 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
737 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
740 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
745 rte_eth_dev_socket_id(uint16_t port_id)
747 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
748 return rte_eth_devices[port_id].data->numa_node;
752 rte_eth_dev_get_sec_ctx(uint16_t port_id)
754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
755 return rte_eth_devices[port_id].security_ctx;
759 rte_eth_dev_count_avail(void)
766 RTE_ETH_FOREACH_DEV(p)
773 rte_eth_dev_count_total(void)
775 uint16_t port, count = 0;
777 RTE_ETH_FOREACH_VALID_DEV(port)
784 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
791 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
795 /* shouldn't check 'rte_eth_devices[i].data',
796 * because it might be overwritten by VDEV PMD */
797 tmp = rte_eth_dev_shared_data->data[port_id].name;
803 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
808 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
812 RTE_ETH_FOREACH_VALID_DEV(pid)
813 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
822 eth_err(uint16_t port_id, int ret)
826 if (rte_eth_dev_is_removed(port_id))
832 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
834 uint16_t old_nb_queues = dev->data->nb_rx_queues;
838 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
839 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
840 sizeof(dev->data->rx_queues[0]) * nb_queues,
841 RTE_CACHE_LINE_SIZE);
842 if (dev->data->rx_queues == NULL) {
843 dev->data->nb_rx_queues = 0;
846 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
849 rxq = dev->data->rx_queues;
851 for (i = nb_queues; i < old_nb_queues; i++)
852 (*dev->dev_ops->rx_queue_release)(rxq[i]);
853 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
854 RTE_CACHE_LINE_SIZE);
857 if (nb_queues > old_nb_queues) {
858 uint16_t new_qs = nb_queues - old_nb_queues;
860 memset(rxq + old_nb_queues, 0,
861 sizeof(rxq[0]) * new_qs);
864 dev->data->rx_queues = rxq;
866 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
867 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
869 rxq = dev->data->rx_queues;
871 for (i = nb_queues; i < old_nb_queues; i++)
872 (*dev->dev_ops->rx_queue_release)(rxq[i]);
874 rte_free(dev->data->rx_queues);
875 dev->data->rx_queues = NULL;
877 dev->data->nb_rx_queues = nb_queues;
882 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
886 if (rx_queue_id >= dev->data->nb_rx_queues) {
887 port_id = dev->data->port_id;
889 "Invalid Rx queue_id=%u of device with port_id=%u\n",
890 rx_queue_id, port_id);
894 if (dev->data->rx_queues[rx_queue_id] == NULL) {
895 port_id = dev->data->port_id;
897 "Queue %u of device with port_id=%u has not been setup\n",
898 rx_queue_id, port_id);
906 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
910 if (tx_queue_id >= dev->data->nb_tx_queues) {
911 port_id = dev->data->port_id;
913 "Invalid Tx queue_id=%u of device with port_id=%u\n",
914 tx_queue_id, port_id);
918 if (dev->data->tx_queues[tx_queue_id] == NULL) {
919 port_id = dev->data->port_id;
921 "Queue %u of device with port_id=%u has not been setup\n",
922 tx_queue_id, port_id);
930 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
932 struct rte_eth_dev *dev;
935 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
937 dev = &rte_eth_devices[port_id];
938 if (!dev->data->dev_started) {
940 "Port %u must be started before start any queue\n",
945 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
949 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
951 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
953 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
954 rx_queue_id, port_id);
958 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
960 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
961 rx_queue_id, port_id);
965 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
971 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
973 struct rte_eth_dev *dev;
976 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
978 dev = &rte_eth_devices[port_id];
980 ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
986 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
988 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
989 rx_queue_id, port_id);
993 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
995 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
996 rx_queue_id, port_id);
1000 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1005 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1007 struct rte_eth_dev *dev;
1010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1012 dev = &rte_eth_devices[port_id];
1013 if (!dev->data->dev_started) {
1015 "Port %u must be started before start any queue\n",
1020 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1024 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1026 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1027 RTE_ETHDEV_LOG(INFO,
1028 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1029 tx_queue_id, port_id);
1033 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1034 RTE_ETHDEV_LOG(INFO,
1035 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1036 tx_queue_id, port_id);
1040 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1044 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1046 struct rte_eth_dev *dev;
1049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1051 dev = &rte_eth_devices[port_id];
1053 ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1057 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1059 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1060 RTE_ETHDEV_LOG(INFO,
1061 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1062 tx_queue_id, port_id);
1066 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1067 RTE_ETHDEV_LOG(INFO,
1068 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1069 tx_queue_id, port_id);
1073 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1078 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1080 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1084 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1085 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1086 sizeof(dev->data->tx_queues[0]) * nb_queues,
1087 RTE_CACHE_LINE_SIZE);
1088 if (dev->data->tx_queues == NULL) {
1089 dev->data->nb_tx_queues = 0;
1092 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1095 txq = dev->data->tx_queues;
1097 for (i = nb_queues; i < old_nb_queues; i++)
1098 (*dev->dev_ops->tx_queue_release)(txq[i]);
1099 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1100 RTE_CACHE_LINE_SIZE);
1103 if (nb_queues > old_nb_queues) {
1104 uint16_t new_qs = nb_queues - old_nb_queues;
1106 memset(txq + old_nb_queues, 0,
1107 sizeof(txq[0]) * new_qs);
1110 dev->data->tx_queues = txq;
1112 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1113 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1115 txq = dev->data->tx_queues;
1117 for (i = nb_queues; i < old_nb_queues; i++)
1118 (*dev->dev_ops->tx_queue_release)(txq[i]);
1120 rte_free(dev->data->tx_queues);
1121 dev->data->tx_queues = NULL;
1123 dev->data->nb_tx_queues = nb_queues;
1128 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1131 case ETH_SPEED_NUM_10M:
1132 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1133 case ETH_SPEED_NUM_100M:
1134 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1135 case ETH_SPEED_NUM_1G:
1136 return ETH_LINK_SPEED_1G;
1137 case ETH_SPEED_NUM_2_5G:
1138 return ETH_LINK_SPEED_2_5G;
1139 case ETH_SPEED_NUM_5G:
1140 return ETH_LINK_SPEED_5G;
1141 case ETH_SPEED_NUM_10G:
1142 return ETH_LINK_SPEED_10G;
1143 case ETH_SPEED_NUM_20G:
1144 return ETH_LINK_SPEED_20G;
1145 case ETH_SPEED_NUM_25G:
1146 return ETH_LINK_SPEED_25G;
1147 case ETH_SPEED_NUM_40G:
1148 return ETH_LINK_SPEED_40G;
1149 case ETH_SPEED_NUM_50G:
1150 return ETH_LINK_SPEED_50G;
1151 case ETH_SPEED_NUM_56G:
1152 return ETH_LINK_SPEED_56G;
1153 case ETH_SPEED_NUM_100G:
1154 return ETH_LINK_SPEED_100G;
1155 case ETH_SPEED_NUM_200G:
1156 return ETH_LINK_SPEED_200G;
1163 rte_eth_dev_rx_offload_name(uint64_t offload)
1165 const char *name = "UNKNOWN";
1168 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1169 if (offload == rte_rx_offload_names[i].offload) {
1170 name = rte_rx_offload_names[i].name;
1179 rte_eth_dev_tx_offload_name(uint64_t offload)
1181 const char *name = "UNKNOWN";
1184 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1185 if (offload == rte_tx_offload_names[i].offload) {
1186 name = rte_tx_offload_names[i].name;
1195 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1196 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1200 if (dev_info_size == 0) {
1201 if (config_size != max_rx_pkt_len) {
1202 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1203 " %u != %u is not allowed\n",
1204 port_id, config_size, max_rx_pkt_len);
1207 } else if (config_size > dev_info_size) {
1208 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1209 "> max allowed value %u\n", port_id, config_size,
1212 } else if (config_size < RTE_ETHER_MIN_LEN) {
1213 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1214 "< min allowed value %u\n", port_id, config_size,
1215 (unsigned int)RTE_ETHER_MIN_LEN);
1222 * Validate offloads that are requested through rte_eth_dev_configure against
1223 * the offloads successfully set by the ethernet device.
1226 * The port identifier of the Ethernet device.
1227 * @param req_offloads
1228 * The offloads that have been requested through `rte_eth_dev_configure`.
1229 * @param set_offloads
1230 * The offloads successfully set by the ethernet device.
1231 * @param offload_type
1232 * The offload type i.e. Rx/Tx string.
1233 * @param offload_name
1234 * The function that prints the offload name.
1236 * - (0) if validation successful.
1237 * - (-EINVAL) if requested offload has been silently disabled.
1241 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1242 uint64_t set_offloads, const char *offload_type,
1243 const char *(*offload_name)(uint64_t))
1245 uint64_t offloads_diff = req_offloads ^ set_offloads;
1249 while (offloads_diff != 0) {
1250 /* Check if any offload is requested but not enabled. */
1251 offload = 1ULL << __builtin_ctzll(offloads_diff);
1252 if (offload & req_offloads) {
1254 "Port %u failed to enable %s offload %s\n",
1255 port_id, offload_type, offload_name(offload));
1259 /* Check if offload couldn't be disabled. */
1260 if (offload & set_offloads) {
1261 RTE_ETHDEV_LOG(DEBUG,
1262 "Port %u %s offload %s is not requested but enabled\n",
1263 port_id, offload_type, offload_name(offload));
1266 offloads_diff &= ~offload;
1273 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1274 const struct rte_eth_conf *dev_conf)
1276 struct rte_eth_dev *dev;
1277 struct rte_eth_dev_info dev_info;
1278 struct rte_eth_conf orig_conf;
1282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1284 dev = &rte_eth_devices[port_id];
1286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1288 if (dev->data->dev_started) {
1290 "Port %u must be stopped to allow configuration\n",
1295 /* Store original config, as rollback required on failure */
1296 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1299 * Copy the dev_conf parameter into the dev structure.
1300 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1302 if (dev_conf != &dev->data->dev_conf)
1303 memcpy(&dev->data->dev_conf, dev_conf,
1304 sizeof(dev->data->dev_conf));
1306 ret = rte_eth_dev_info_get(port_id, &dev_info);
1310 /* If number of queues specified by application for both Rx and Tx is
1311 * zero, use driver preferred values. This cannot be done individually
1312 * as it is valid for either Tx or Rx (but not both) to be zero.
1313 * If driver does not provide any preferred valued, fall back on
1316 if (nb_rx_q == 0 && nb_tx_q == 0) {
1317 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1319 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1320 nb_tx_q = dev_info.default_txportconf.nb_queues;
1322 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1325 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1327 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1328 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1333 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1335 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1336 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1342 * Check that the numbers of RX and TX queues are not greater
1343 * than the maximum number of RX and TX queues supported by the
1344 * configured device.
1346 if (nb_rx_q > dev_info.max_rx_queues) {
1347 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1348 port_id, nb_rx_q, dev_info.max_rx_queues);
1353 if (nb_tx_q > dev_info.max_tx_queues) {
1354 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1355 port_id, nb_tx_q, dev_info.max_tx_queues);
1360 /* Check that the device supports requested interrupts */
1361 if ((dev_conf->intr_conf.lsc == 1) &&
1362 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1363 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1364 dev->device->driver->name);
1368 if ((dev_conf->intr_conf.rmv == 1) &&
1369 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1370 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1371 dev->device->driver->name);
1377 * If jumbo frames are enabled, check that the maximum RX packet
1378 * length is supported by the configured device.
1380 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1381 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1383 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1384 port_id, dev_conf->rxmode.max_rx_pkt_len,
1385 dev_info.max_rx_pktlen);
1388 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1390 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1391 port_id, dev_conf->rxmode.max_rx_pkt_len,
1392 (unsigned int)RTE_ETHER_MIN_LEN);
1397 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1398 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1399 /* Use default value */
1400 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1405 * If LRO is enabled, check that the maximum aggregated packet
1406 * size is supported by the configured device.
1408 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1409 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1410 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1411 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1412 ret = check_lro_pkt_size(port_id,
1413 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1414 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1415 dev_info.max_lro_pkt_size);
1420 /* Any requested offloading must be within its device capabilities */
1421 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1422 dev_conf->rxmode.offloads) {
1424 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1425 "capabilities 0x%"PRIx64" in %s()\n",
1426 port_id, dev_conf->rxmode.offloads,
1427 dev_info.rx_offload_capa,
1432 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1433 dev_conf->txmode.offloads) {
1435 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1436 "capabilities 0x%"PRIx64" in %s()\n",
1437 port_id, dev_conf->txmode.offloads,
1438 dev_info.tx_offload_capa,
1444 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1445 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1447 /* Check that device supports requested rss hash functions. */
1448 if ((dev_info.flow_type_rss_offloads |
1449 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1450 dev_info.flow_type_rss_offloads) {
1452 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1453 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1454 dev_info.flow_type_rss_offloads);
1459 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1460 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1461 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1463 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1465 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1471 * Setup new number of RX/TX queues and reconfigure device.
1473 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1476 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1482 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1485 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1487 rte_eth_dev_rx_queue_config(dev, 0);
1492 diag = (*dev->dev_ops->dev_configure)(dev);
1494 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1496 ret = eth_err(port_id, diag);
1500 /* Initialize Rx profiling if enabled at compilation time. */
1501 diag = __rte_eth_dev_profile_init(port_id, dev);
1503 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1505 ret = eth_err(port_id, diag);
1509 /* Validate Rx offloads. */
1510 diag = validate_offloads(port_id,
1511 dev_conf->rxmode.offloads,
1512 dev->data->dev_conf.rxmode.offloads, "Rx",
1513 rte_eth_dev_rx_offload_name);
1519 /* Validate Tx offloads. */
1520 diag = validate_offloads(port_id,
1521 dev_conf->txmode.offloads,
1522 dev->data->dev_conf.txmode.offloads, "Tx",
1523 rte_eth_dev_tx_offload_name);
1529 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1532 rte_eth_dev_rx_queue_config(dev, 0);
1533 rte_eth_dev_tx_queue_config(dev, 0);
1535 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1537 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1542 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1544 if (dev->data->dev_started) {
1545 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1546 dev->data->port_id);
1550 rte_eth_dev_rx_queue_config(dev, 0);
1551 rte_eth_dev_tx_queue_config(dev, 0);
1553 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1557 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1558 struct rte_eth_dev_info *dev_info)
1560 struct rte_ether_addr *addr;
1565 /* replay MAC address configuration including default MAC */
1566 addr = &dev->data->mac_addrs[0];
1567 if (*dev->dev_ops->mac_addr_set != NULL)
1568 (*dev->dev_ops->mac_addr_set)(dev, addr);
1569 else if (*dev->dev_ops->mac_addr_add != NULL)
1570 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1572 if (*dev->dev_ops->mac_addr_add != NULL) {
1573 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1574 addr = &dev->data->mac_addrs[i];
1576 /* skip zero address */
1577 if (rte_is_zero_ether_addr(addr))
1581 pool_mask = dev->data->mac_pool_sel[i];
1584 if (pool_mask & 1ULL)
1585 (*dev->dev_ops->mac_addr_add)(dev,
1589 } while (pool_mask);
1595 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1596 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1600 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1601 rte_eth_dev_mac_restore(dev, dev_info);
1603 /* replay promiscuous configuration */
1605 * use callbacks directly since we don't need port_id check and
1606 * would like to bypass the same value set
1608 if (rte_eth_promiscuous_get(port_id) == 1 &&
1609 *dev->dev_ops->promiscuous_enable != NULL) {
1610 ret = eth_err(port_id,
1611 (*dev->dev_ops->promiscuous_enable)(dev));
1612 if (ret != 0 && ret != -ENOTSUP) {
1614 "Failed to enable promiscuous mode for device (port %u): %s\n",
1615 port_id, rte_strerror(-ret));
1618 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1619 *dev->dev_ops->promiscuous_disable != NULL) {
1620 ret = eth_err(port_id,
1621 (*dev->dev_ops->promiscuous_disable)(dev));
1622 if (ret != 0 && ret != -ENOTSUP) {
1624 "Failed to disable promiscuous mode for device (port %u): %s\n",
1625 port_id, rte_strerror(-ret));
1630 /* replay all multicast configuration */
1632 * use callbacks directly since we don't need port_id check and
1633 * would like to bypass the same value set
1635 if (rte_eth_allmulticast_get(port_id) == 1 &&
1636 *dev->dev_ops->allmulticast_enable != NULL) {
1637 ret = eth_err(port_id,
1638 (*dev->dev_ops->allmulticast_enable)(dev));
1639 if (ret != 0 && ret != -ENOTSUP) {
1641 "Failed to enable allmulticast mode for device (port %u): %s\n",
1642 port_id, rte_strerror(-ret));
1645 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1646 *dev->dev_ops->allmulticast_disable != NULL) {
1647 ret = eth_err(port_id,
1648 (*dev->dev_ops->allmulticast_disable)(dev));
1649 if (ret != 0 && ret != -ENOTSUP) {
1651 "Failed to disable allmulticast mode for device (port %u): %s\n",
1652 port_id, rte_strerror(-ret));
1661 rte_eth_dev_start(uint16_t port_id)
1663 struct rte_eth_dev *dev;
1664 struct rte_eth_dev_info dev_info;
1668 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1670 dev = &rte_eth_devices[port_id];
1672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1674 if (dev->data->dev_started != 0) {
1675 RTE_ETHDEV_LOG(INFO,
1676 "Device with port_id=%"PRIu16" already started\n",
1681 ret = rte_eth_dev_info_get(port_id, &dev_info);
1685 /* Lets restore MAC now if device does not support live change */
1686 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1687 rte_eth_dev_mac_restore(dev, &dev_info);
1689 diag = (*dev->dev_ops->dev_start)(dev);
1691 dev->data->dev_started = 1;
1693 return eth_err(port_id, diag);
1695 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1698 "Error during restoring configuration for device (port %u): %s\n",
1699 port_id, rte_strerror(-ret));
1700 rte_eth_dev_stop(port_id);
1704 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1706 (*dev->dev_ops->link_update)(dev, 0);
1709 rte_ethdev_trace_start(port_id);
1714 rte_eth_dev_stop(uint16_t port_id)
1716 struct rte_eth_dev *dev;
1718 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1719 dev = &rte_eth_devices[port_id];
1721 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1723 if (dev->data->dev_started == 0) {
1724 RTE_ETHDEV_LOG(INFO,
1725 "Device with port_id=%"PRIu16" already stopped\n",
1730 dev->data->dev_started = 0;
1731 (*dev->dev_ops->dev_stop)(dev);
1732 rte_ethdev_trace_stop(port_id);
1736 rte_eth_dev_set_link_up(uint16_t port_id)
1738 struct rte_eth_dev *dev;
1740 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1742 dev = &rte_eth_devices[port_id];
1744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1745 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1749 rte_eth_dev_set_link_down(uint16_t port_id)
1751 struct rte_eth_dev *dev;
1753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1755 dev = &rte_eth_devices[port_id];
1757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1758 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1762 rte_eth_dev_close(uint16_t port_id)
1764 struct rte_eth_dev *dev;
1766 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1767 dev = &rte_eth_devices[port_id];
1769 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1770 dev->data->dev_started = 0;
1771 (*dev->dev_ops->dev_close)(dev);
1773 rte_ethdev_trace_close(port_id);
1774 rte_eth_dev_release_port(dev);
1778 rte_eth_dev_reset(uint16_t port_id)
1780 struct rte_eth_dev *dev;
1783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1784 dev = &rte_eth_devices[port_id];
1786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1788 rte_eth_dev_stop(port_id);
1789 ret = dev->dev_ops->dev_reset(dev);
1791 return eth_err(port_id, ret);
1795 rte_eth_dev_is_removed(uint16_t port_id)
1797 struct rte_eth_dev *dev;
1800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1802 dev = &rte_eth_devices[port_id];
1804 if (dev->state == RTE_ETH_DEV_REMOVED)
1807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1809 ret = dev->dev_ops->is_removed(dev);
1811 /* Device is physically removed. */
1812 dev->state = RTE_ETH_DEV_REMOVED;
1818 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1819 uint16_t nb_rx_desc, unsigned int socket_id,
1820 const struct rte_eth_rxconf *rx_conf,
1821 struct rte_mempool *mp)
1824 uint32_t mbp_buf_size;
1825 struct rte_eth_dev *dev;
1826 struct rte_eth_dev_info dev_info;
1827 struct rte_eth_rxconf local_conf;
1830 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1832 dev = &rte_eth_devices[port_id];
1833 if (rx_queue_id >= dev->data->nb_rx_queues) {
1834 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1839 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1843 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1846 * Check the size of the mbuf data buffer.
1847 * This value must be provided in the private data of the memory pool.
1848 * First check that the memory pool has a valid private data.
1850 ret = rte_eth_dev_info_get(port_id, &dev_info);
1854 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1855 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1856 mp->name, (int)mp->private_data_size,
1857 (int)sizeof(struct rte_pktmbuf_pool_private));
1860 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1862 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1864 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1865 mp->name, (int)mbp_buf_size,
1866 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1867 (int)RTE_PKTMBUF_HEADROOM,
1868 (int)dev_info.min_rx_bufsize);
1872 /* Use default specified by driver, if nb_rx_desc is zero */
1873 if (nb_rx_desc == 0) {
1874 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1875 /* If driver default is also zero, fall back on EAL default */
1876 if (nb_rx_desc == 0)
1877 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1880 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1881 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1882 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1885 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1886 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1887 dev_info.rx_desc_lim.nb_min,
1888 dev_info.rx_desc_lim.nb_align);
1892 if (dev->data->dev_started &&
1893 !(dev_info.dev_capa &
1894 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1897 if (dev->data->dev_started &&
1898 (dev->data->rx_queue_state[rx_queue_id] !=
1899 RTE_ETH_QUEUE_STATE_STOPPED))
1902 rxq = dev->data->rx_queues;
1903 if (rxq[rx_queue_id]) {
1904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1906 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1907 rxq[rx_queue_id] = NULL;
1910 if (rx_conf == NULL)
1911 rx_conf = &dev_info.default_rxconf;
1913 local_conf = *rx_conf;
1916 * If an offloading has already been enabled in
1917 * rte_eth_dev_configure(), it has been enabled on all queues,
1918 * so there is no need to enable it in this queue again.
1919 * The local_conf.offloads input to underlying PMD only carries
1920 * those offloadings which are only enabled on this queue and
1921 * not enabled on all queues.
1923 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1926 * New added offloadings for this queue are those not enabled in
1927 * rte_eth_dev_configure() and they must be per-queue type.
1928 * A pure per-port offloading can't be enabled on a queue while
1929 * disabled on another queue. A pure per-port offloading can't
1930 * be enabled for any queue as new added one if it hasn't been
1931 * enabled in rte_eth_dev_configure().
1933 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1934 local_conf.offloads) {
1936 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1937 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1938 port_id, rx_queue_id, local_conf.offloads,
1939 dev_info.rx_queue_offload_capa,
1945 * If LRO is enabled, check that the maximum aggregated packet
1946 * size is supported by the configured device.
1948 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1949 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1950 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1951 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1952 int ret = check_lro_pkt_size(port_id,
1953 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1954 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1955 dev_info.max_lro_pkt_size);
1960 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1961 socket_id, &local_conf, mp);
1963 if (!dev->data->min_rx_buf_size ||
1964 dev->data->min_rx_buf_size > mbp_buf_size)
1965 dev->data->min_rx_buf_size = mbp_buf_size;
1968 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1970 return eth_err(port_id, ret);
1974 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1975 uint16_t nb_rx_desc,
1976 const struct rte_eth_hairpin_conf *conf)
1979 struct rte_eth_dev *dev;
1980 struct rte_eth_hairpin_cap cap;
1985 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1987 dev = &rte_eth_devices[port_id];
1988 if (rx_queue_id >= dev->data->nb_rx_queues) {
1989 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1992 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1997 /* if nb_rx_desc is zero use max number of desc from the driver. */
1998 if (nb_rx_desc == 0)
1999 nb_rx_desc = cap.max_nb_desc;
2000 if (nb_rx_desc > cap.max_nb_desc) {
2002 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2003 nb_rx_desc, cap.max_nb_desc);
2006 if (conf->peer_count > cap.max_rx_2_tx) {
2008 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
2009 conf->peer_count, cap.max_rx_2_tx);
2012 if (conf->peer_count == 0) {
2014 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
2018 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2019 cap.max_nb_queues != UINT16_MAX; i++) {
2020 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2023 if (count > cap.max_nb_queues) {
2024 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2028 if (dev->data->dev_started)
2030 rxq = dev->data->rx_queues;
2031 if (rxq[rx_queue_id] != NULL) {
2032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2034 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2035 rxq[rx_queue_id] = NULL;
2037 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2040 dev->data->rx_queue_state[rx_queue_id] =
2041 RTE_ETH_QUEUE_STATE_HAIRPIN;
2042 return eth_err(port_id, ret);
2046 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2047 uint16_t nb_tx_desc, unsigned int socket_id,
2048 const struct rte_eth_txconf *tx_conf)
2050 struct rte_eth_dev *dev;
2051 struct rte_eth_dev_info dev_info;
2052 struct rte_eth_txconf local_conf;
2056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2058 dev = &rte_eth_devices[port_id];
2059 if (tx_queue_id >= dev->data->nb_tx_queues) {
2060 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2066 ret = rte_eth_dev_info_get(port_id, &dev_info);
2070 /* Use default specified by driver, if nb_tx_desc is zero */
2071 if (nb_tx_desc == 0) {
2072 nb_tx_desc = dev_info.default_txportconf.ring_size;
2073 /* If driver default is zero, fall back on EAL default */
2074 if (nb_tx_desc == 0)
2075 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2077 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2078 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2079 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2081 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2082 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2083 dev_info.tx_desc_lim.nb_min,
2084 dev_info.tx_desc_lim.nb_align);
2088 if (dev->data->dev_started &&
2089 !(dev_info.dev_capa &
2090 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2093 if (dev->data->dev_started &&
2094 (dev->data->tx_queue_state[tx_queue_id] !=
2095 RTE_ETH_QUEUE_STATE_STOPPED))
2098 txq = dev->data->tx_queues;
2099 if (txq[tx_queue_id]) {
2100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2102 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2103 txq[tx_queue_id] = NULL;
2106 if (tx_conf == NULL)
2107 tx_conf = &dev_info.default_txconf;
2109 local_conf = *tx_conf;
2112 * If an offloading has already been enabled in
2113 * rte_eth_dev_configure(), it has been enabled on all queues,
2114 * so there is no need to enable it in this queue again.
2115 * The local_conf.offloads input to underlying PMD only carries
2116 * those offloadings which are only enabled on this queue and
2117 * not enabled on all queues.
2119 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2122 * New added offloadings for this queue are those not enabled in
2123 * rte_eth_dev_configure() and they must be per-queue type.
2124 * A pure per-port offloading can't be enabled on a queue while
2125 * disabled on another queue. A pure per-port offloading can't
2126 * be enabled for any queue as new added one if it hasn't been
2127 * enabled in rte_eth_dev_configure().
2129 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2130 local_conf.offloads) {
2132 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2133 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2134 port_id, tx_queue_id, local_conf.offloads,
2135 dev_info.tx_queue_offload_capa,
2140 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2141 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2142 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2146 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2147 uint16_t nb_tx_desc,
2148 const struct rte_eth_hairpin_conf *conf)
2150 struct rte_eth_dev *dev;
2151 struct rte_eth_hairpin_cap cap;
2157 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2158 dev = &rte_eth_devices[port_id];
2159 if (tx_queue_id >= dev->data->nb_tx_queues) {
2160 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2163 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2168 /* if nb_rx_desc is zero use max number of desc from the driver. */
2169 if (nb_tx_desc == 0)
2170 nb_tx_desc = cap.max_nb_desc;
2171 if (nb_tx_desc > cap.max_nb_desc) {
2173 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2174 nb_tx_desc, cap.max_nb_desc);
2177 if (conf->peer_count > cap.max_tx_2_rx) {
2179 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2180 conf->peer_count, cap.max_tx_2_rx);
2183 if (conf->peer_count == 0) {
2185 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2189 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2190 cap.max_nb_queues != UINT16_MAX; i++) {
2191 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2194 if (count > cap.max_nb_queues) {
2195 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2199 if (dev->data->dev_started)
2201 txq = dev->data->tx_queues;
2202 if (txq[tx_queue_id] != NULL) {
2203 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2205 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2206 txq[tx_queue_id] = NULL;
2208 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2209 (dev, tx_queue_id, nb_tx_desc, conf);
2211 dev->data->tx_queue_state[tx_queue_id] =
2212 RTE_ETH_QUEUE_STATE_HAIRPIN;
2213 return eth_err(port_id, ret);
2217 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2218 void *userdata __rte_unused)
2220 rte_pktmbuf_free_bulk(pkts, unsent);
2224 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2227 uint64_t *count = userdata;
2229 rte_pktmbuf_free_bulk(pkts, unsent);
2234 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2235 buffer_tx_error_fn cbfn, void *userdata)
2237 buffer->error_callback = cbfn;
2238 buffer->error_userdata = userdata;
2243 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2250 buffer->size = size;
2251 if (buffer->error_callback == NULL) {
2252 ret = rte_eth_tx_buffer_set_err_callback(
2253 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2260 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2262 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2265 /* Validate Input Data. Bail if not valid or not supported. */
2266 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2269 /* Call driver to free pending mbufs. */
2270 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2272 return eth_err(port_id, ret);
2276 rte_eth_promiscuous_enable(uint16_t port_id)
2278 struct rte_eth_dev *dev;
2281 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2282 dev = &rte_eth_devices[port_id];
2284 if (dev->data->promiscuous == 1)
2287 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2289 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2290 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2292 return eth_err(port_id, diag);
2296 rte_eth_promiscuous_disable(uint16_t port_id)
2298 struct rte_eth_dev *dev;
2301 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302 dev = &rte_eth_devices[port_id];
2304 if (dev->data->promiscuous == 0)
2307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2309 dev->data->promiscuous = 0;
2310 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2312 dev->data->promiscuous = 1;
2314 return eth_err(port_id, diag);
2318 rte_eth_promiscuous_get(uint16_t port_id)
2320 struct rte_eth_dev *dev;
2322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2324 dev = &rte_eth_devices[port_id];
2325 return dev->data->promiscuous;
2329 rte_eth_allmulticast_enable(uint16_t port_id)
2331 struct rte_eth_dev *dev;
2334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2335 dev = &rte_eth_devices[port_id];
2337 if (dev->data->all_multicast == 1)
2340 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2341 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2342 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2344 return eth_err(port_id, diag);
2348 rte_eth_allmulticast_disable(uint16_t port_id)
2350 struct rte_eth_dev *dev;
2353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2354 dev = &rte_eth_devices[port_id];
2356 if (dev->data->all_multicast == 0)
2359 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2360 dev->data->all_multicast = 0;
2361 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2363 dev->data->all_multicast = 1;
2365 return eth_err(port_id, diag);
2369 rte_eth_allmulticast_get(uint16_t port_id)
2371 struct rte_eth_dev *dev;
2373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2375 dev = &rte_eth_devices[port_id];
2376 return dev->data->all_multicast;
2380 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2382 struct rte_eth_dev *dev;
2384 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2385 dev = &rte_eth_devices[port_id];
2387 if (dev->data->dev_conf.intr_conf.lsc &&
2388 dev->data->dev_started)
2389 rte_eth_linkstatus_get(dev, eth_link);
2391 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2392 (*dev->dev_ops->link_update)(dev, 1);
2393 *eth_link = dev->data->dev_link;
2400 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2402 struct rte_eth_dev *dev;
2404 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2405 dev = &rte_eth_devices[port_id];
2407 if (dev->data->dev_conf.intr_conf.lsc &&
2408 dev->data->dev_started)
2409 rte_eth_linkstatus_get(dev, eth_link);
2411 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2412 (*dev->dev_ops->link_update)(dev, 0);
2413 *eth_link = dev->data->dev_link;
2420 rte_eth_link_speed_to_str(uint32_t link_speed)
2422 switch (link_speed) {
2423 case ETH_SPEED_NUM_NONE: return "None";
2424 case ETH_SPEED_NUM_10M: return "10 Mbps";
2425 case ETH_SPEED_NUM_100M: return "100 Mbps";
2426 case ETH_SPEED_NUM_1G: return "1 Gbps";
2427 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2428 case ETH_SPEED_NUM_5G: return "5 Gbps";
2429 case ETH_SPEED_NUM_10G: return "10 Gbps";
2430 case ETH_SPEED_NUM_20G: return "20 Gbps";
2431 case ETH_SPEED_NUM_25G: return "25 Gbps";
2432 case ETH_SPEED_NUM_40G: return "40 Gbps";
2433 case ETH_SPEED_NUM_50G: return "50 Gbps";
2434 case ETH_SPEED_NUM_56G: return "56 Gbps";
2435 case ETH_SPEED_NUM_100G: return "100 Gbps";
2436 case ETH_SPEED_NUM_200G: return "200 Gbps";
2437 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2438 default: return "Invalid";
2443 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2445 if (eth_link->link_status == ETH_LINK_DOWN)
2446 return snprintf(str, len, "Link down");
2448 return snprintf(str, len, "Link up at %s %s %s",
2449 rte_eth_link_speed_to_str(eth_link->link_speed),
2450 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2452 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2453 "Autoneg" : "Fixed");
2457 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2459 struct rte_eth_dev *dev;
2461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2463 dev = &rte_eth_devices[port_id];
2464 memset(stats, 0, sizeof(*stats));
2466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2467 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2468 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2472 rte_eth_stats_reset(uint16_t port_id)
2474 struct rte_eth_dev *dev;
2477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2478 dev = &rte_eth_devices[port_id];
2480 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2481 ret = (*dev->dev_ops->stats_reset)(dev);
2483 return eth_err(port_id, ret);
2485 dev->data->rx_mbuf_alloc_failed = 0;
2491 get_xstats_basic_count(struct rte_eth_dev *dev)
2493 uint16_t nb_rxqs, nb_txqs;
2496 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2497 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2499 count = RTE_NB_STATS;
2500 count += nb_rxqs * RTE_NB_RXQ_STATS;
2501 count += nb_txqs * RTE_NB_TXQ_STATS;
2507 get_xstats_count(uint16_t port_id)
2509 struct rte_eth_dev *dev;
2512 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2513 dev = &rte_eth_devices[port_id];
2514 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2515 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2518 return eth_err(port_id, count);
2520 if (dev->dev_ops->xstats_get_names != NULL) {
2521 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2523 return eth_err(port_id, count);
2528 count += get_xstats_basic_count(dev);
2534 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2537 int cnt_xstats, idx_xstat;
2539 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2542 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2547 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2552 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2553 if (cnt_xstats < 0) {
2554 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2558 /* Get id-name lookup table */
2559 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2561 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2562 port_id, xstats_names, cnt_xstats, NULL)) {
2563 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2567 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2568 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2577 /* retrieve basic stats names */
2579 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2580 struct rte_eth_xstat_name *xstats_names)
2582 int cnt_used_entries = 0;
2583 uint32_t idx, id_queue;
2586 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2587 strlcpy(xstats_names[cnt_used_entries].name,
2588 rte_stats_strings[idx].name,
2589 sizeof(xstats_names[0].name));
2592 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2593 for (id_queue = 0; id_queue < num_q; id_queue++) {
2594 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2595 snprintf(xstats_names[cnt_used_entries].name,
2596 sizeof(xstats_names[0].name),
2598 id_queue, rte_rxq_stats_strings[idx].name);
2603 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2604 for (id_queue = 0; id_queue < num_q; id_queue++) {
2605 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2606 snprintf(xstats_names[cnt_used_entries].name,
2607 sizeof(xstats_names[0].name),
2609 id_queue, rte_txq_stats_strings[idx].name);
2613 return cnt_used_entries;
2616 /* retrieve ethdev extended statistics names */
2618 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2619 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2622 struct rte_eth_xstat_name *xstats_names_copy;
2623 unsigned int no_basic_stat_requested = 1;
2624 unsigned int no_ext_stat_requested = 1;
2625 unsigned int expected_entries;
2626 unsigned int basic_count;
2627 struct rte_eth_dev *dev;
2631 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2632 dev = &rte_eth_devices[port_id];
2634 basic_count = get_xstats_basic_count(dev);
2635 ret = get_xstats_count(port_id);
2638 expected_entries = (unsigned int)ret;
2640 /* Return max number of stats if no ids given */
2643 return expected_entries;
2644 else if (xstats_names && size < expected_entries)
2645 return expected_entries;
2648 if (ids && !xstats_names)
2651 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2652 uint64_t ids_copy[size];
2654 for (i = 0; i < size; i++) {
2655 if (ids[i] < basic_count) {
2656 no_basic_stat_requested = 0;
2661 * Convert ids to xstats ids that PMD knows.
2662 * ids known by user are basic + extended stats.
2664 ids_copy[i] = ids[i] - basic_count;
2667 if (no_basic_stat_requested)
2668 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2669 xstats_names, ids_copy, size);
2672 /* Retrieve all stats */
2674 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2676 if (num_stats < 0 || num_stats > (int)expected_entries)
2679 return expected_entries;
2682 xstats_names_copy = calloc(expected_entries,
2683 sizeof(struct rte_eth_xstat_name));
2685 if (!xstats_names_copy) {
2686 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2691 for (i = 0; i < size; i++) {
2692 if (ids[i] >= basic_count) {
2693 no_ext_stat_requested = 0;
2699 /* Fill xstats_names_copy structure */
2700 if (ids && no_ext_stat_requested) {
2701 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2703 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2706 free(xstats_names_copy);
2712 for (i = 0; i < size; i++) {
2713 if (ids[i] >= expected_entries) {
2714 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2715 free(xstats_names_copy);
2718 xstats_names[i] = xstats_names_copy[ids[i]];
2721 free(xstats_names_copy);
2726 rte_eth_xstats_get_names(uint16_t port_id,
2727 struct rte_eth_xstat_name *xstats_names,
2730 struct rte_eth_dev *dev;
2731 int cnt_used_entries;
2732 int cnt_expected_entries;
2733 int cnt_driver_entries;
2735 cnt_expected_entries = get_xstats_count(port_id);
2736 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2737 (int)size < cnt_expected_entries)
2738 return cnt_expected_entries;
2740 /* port_id checked in get_xstats_count() */
2741 dev = &rte_eth_devices[port_id];
2743 cnt_used_entries = rte_eth_basic_stats_get_names(
2746 if (dev->dev_ops->xstats_get_names != NULL) {
2747 /* If there are any driver-specific xstats, append them
2750 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2752 xstats_names + cnt_used_entries,
2753 size - cnt_used_entries);
2754 if (cnt_driver_entries < 0)
2755 return eth_err(port_id, cnt_driver_entries);
2756 cnt_used_entries += cnt_driver_entries;
2759 return cnt_used_entries;
2764 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2766 struct rte_eth_dev *dev;
2767 struct rte_eth_stats eth_stats;
2768 unsigned int count = 0, i, q;
2769 uint64_t val, *stats_ptr;
2770 uint16_t nb_rxqs, nb_txqs;
2773 ret = rte_eth_stats_get(port_id, ð_stats);
2777 dev = &rte_eth_devices[port_id];
2779 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2780 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2783 for (i = 0; i < RTE_NB_STATS; i++) {
2784 stats_ptr = RTE_PTR_ADD(ð_stats,
2785 rte_stats_strings[i].offset);
2787 xstats[count++].value = val;
2791 for (q = 0; q < nb_rxqs; q++) {
2792 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2793 stats_ptr = RTE_PTR_ADD(ð_stats,
2794 rte_rxq_stats_strings[i].offset +
2795 q * sizeof(uint64_t));
2797 xstats[count++].value = val;
2802 for (q = 0; q < nb_txqs; q++) {
2803 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2804 stats_ptr = RTE_PTR_ADD(ð_stats,
2805 rte_txq_stats_strings[i].offset +
2806 q * sizeof(uint64_t));
2808 xstats[count++].value = val;
2814 /* retrieve ethdev extended statistics */
2816 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2817 uint64_t *values, unsigned int size)
2819 unsigned int no_basic_stat_requested = 1;
2820 unsigned int no_ext_stat_requested = 1;
2821 unsigned int num_xstats_filled;
2822 unsigned int basic_count;
2823 uint16_t expected_entries;
2824 struct rte_eth_dev *dev;
2828 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2829 ret = get_xstats_count(port_id);
2832 expected_entries = (uint16_t)ret;
2833 struct rte_eth_xstat xstats[expected_entries];
2834 dev = &rte_eth_devices[port_id];
2835 basic_count = get_xstats_basic_count(dev);
2837 /* Return max number of stats if no ids given */
2840 return expected_entries;
2841 else if (values && size < expected_entries)
2842 return expected_entries;
2848 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2849 unsigned int basic_count = get_xstats_basic_count(dev);
2850 uint64_t ids_copy[size];
2852 for (i = 0; i < size; i++) {
2853 if (ids[i] < basic_count) {
2854 no_basic_stat_requested = 0;
2859 * Convert ids to xstats ids that PMD knows.
2860 * ids known by user are basic + extended stats.
2862 ids_copy[i] = ids[i] - basic_count;
2865 if (no_basic_stat_requested)
2866 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2871 for (i = 0; i < size; i++) {
2872 if (ids[i] >= basic_count) {
2873 no_ext_stat_requested = 0;
2879 /* Fill the xstats structure */
2880 if (ids && no_ext_stat_requested)
2881 ret = rte_eth_basic_stats_get(port_id, xstats);
2883 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2887 num_xstats_filled = (unsigned int)ret;
2889 /* Return all stats */
2891 for (i = 0; i < num_xstats_filled; i++)
2892 values[i] = xstats[i].value;
2893 return expected_entries;
2897 for (i = 0; i < size; i++) {
2898 if (ids[i] >= expected_entries) {
2899 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2902 values[i] = xstats[ids[i]].value;
2908 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2911 struct rte_eth_dev *dev;
2912 unsigned int count = 0, i;
2913 signed int xcount = 0;
2914 uint16_t nb_rxqs, nb_txqs;
2917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2919 dev = &rte_eth_devices[port_id];
2921 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2922 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2924 /* Return generic statistics */
2925 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2926 (nb_txqs * RTE_NB_TXQ_STATS);
2928 /* implemented by the driver */
2929 if (dev->dev_ops->xstats_get != NULL) {
2930 /* Retrieve the xstats from the driver at the end of the
2933 xcount = (*dev->dev_ops->xstats_get)(dev,
2934 xstats ? xstats + count : NULL,
2935 (n > count) ? n - count : 0);
2938 return eth_err(port_id, xcount);
2941 if (n < count + xcount || xstats == NULL)
2942 return count + xcount;
2944 /* now fill the xstats structure */
2945 ret = rte_eth_basic_stats_get(port_id, xstats);
2950 for (i = 0; i < count; i++)
2952 /* add an offset to driver-specific stats */
2953 for ( ; i < count + xcount; i++)
2954 xstats[i].id += count;
2956 return count + xcount;
2959 /* reset ethdev extended statistics */
2961 rte_eth_xstats_reset(uint16_t port_id)
2963 struct rte_eth_dev *dev;
2965 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2966 dev = &rte_eth_devices[port_id];
2968 /* implemented by the driver */
2969 if (dev->dev_ops->xstats_reset != NULL)
2970 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2972 /* fallback to default */
2973 return rte_eth_stats_reset(port_id);
2977 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2980 struct rte_eth_dev *dev;
2982 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2984 dev = &rte_eth_devices[port_id];
2986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2988 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2991 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2994 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2997 return (*dev->dev_ops->queue_stats_mapping_set)
2998 (dev, queue_id, stat_idx, is_rx);
3003 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3006 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
3007 stat_idx, STAT_QMAP_TX));
3012 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3015 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
3016 stat_idx, STAT_QMAP_RX));
3020 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3022 struct rte_eth_dev *dev;
3024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3025 dev = &rte_eth_devices[port_id];
3027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3028 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3029 fw_version, fw_size));
3033 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3035 struct rte_eth_dev *dev;
3036 const struct rte_eth_desc_lim lim = {
3037 .nb_max = UINT16_MAX,
3040 .nb_seg_max = UINT16_MAX,
3041 .nb_mtu_seg_max = UINT16_MAX,
3046 * Init dev_info before port_id check since caller does not have
3047 * return status and does not know if get is successful or not.
3049 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3050 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3053 dev = &rte_eth_devices[port_id];
3055 dev_info->rx_desc_lim = lim;
3056 dev_info->tx_desc_lim = lim;
3057 dev_info->device = dev->device;
3058 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3059 dev_info->max_mtu = UINT16_MAX;
3061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3062 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3064 /* Cleanup already filled in device information */
3065 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3066 return eth_err(port_id, diag);
3069 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3070 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3071 RTE_MAX_QUEUES_PER_PORT);
3072 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3073 RTE_MAX_QUEUES_PER_PORT);
3075 dev_info->driver_name = dev->device->driver->name;
3076 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3077 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3079 dev_info->dev_flags = &dev->data->dev_flags;
3085 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3086 uint32_t *ptypes, int num)
3089 struct rte_eth_dev *dev;
3090 const uint32_t *all_ptypes;
3092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3093 dev = &rte_eth_devices[port_id];
3094 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3095 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3100 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3101 if (all_ptypes[i] & ptype_mask) {
3103 ptypes[j] = all_ptypes[i];
3111 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3112 uint32_t *set_ptypes, unsigned int num)
3114 const uint32_t valid_ptype_masks[] = {
3118 RTE_PTYPE_TUNNEL_MASK,
3119 RTE_PTYPE_INNER_L2_MASK,
3120 RTE_PTYPE_INNER_L3_MASK,
3121 RTE_PTYPE_INNER_L4_MASK,
3123 const uint32_t *all_ptypes;
3124 struct rte_eth_dev *dev;
3125 uint32_t unused_mask;
3129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 dev = &rte_eth_devices[port_id];
3132 if (num > 0 && set_ptypes == NULL)
3135 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3136 *dev->dev_ops->dev_ptypes_set == NULL) {
3141 if (ptype_mask == 0) {
3142 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3147 unused_mask = ptype_mask;
3148 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3149 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3150 if (mask && mask != valid_ptype_masks[i]) {
3154 unused_mask &= ~valid_ptype_masks[i];
3162 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3163 if (all_ptypes == NULL) {
3169 * Accommodate as many set_ptypes as possible. If the supplied
3170 * set_ptypes array is insufficient fill it partially.
3172 for (i = 0, j = 0; set_ptypes != NULL &&
3173 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3174 if (ptype_mask & all_ptypes[i]) {
3176 set_ptypes[j] = all_ptypes[i];
3184 if (set_ptypes != NULL && j < num)
3185 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3187 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3191 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3197 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3199 struct rte_eth_dev *dev;
3201 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3202 dev = &rte_eth_devices[port_id];
3203 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3209 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3211 struct rte_eth_dev *dev;
3213 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3215 dev = &rte_eth_devices[port_id];
3216 *mtu = dev->data->mtu;
3221 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3224 struct rte_eth_dev_info dev_info;
3225 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3228 dev = &rte_eth_devices[port_id];
3229 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3232 * Check if the device supports dev_infos_get, if it does not
3233 * skip min_mtu/max_mtu validation here as this requires values
3234 * that are populated within the call to rte_eth_dev_info_get()
3235 * which relies on dev->dev_ops->dev_infos_get.
3237 if (*dev->dev_ops->dev_infos_get != NULL) {
3238 ret = rte_eth_dev_info_get(port_id, &dev_info);
3242 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3246 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3248 dev->data->mtu = mtu;
3250 return eth_err(port_id, ret);
3254 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3256 struct rte_eth_dev *dev;
3259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3260 dev = &rte_eth_devices[port_id];
3261 if (!(dev->data->dev_conf.rxmode.offloads &
3262 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3263 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3268 if (vlan_id > 4095) {
3269 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3273 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3275 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3277 struct rte_vlan_filter_conf *vfc;
3281 vfc = &dev->data->vlan_filter_conf;
3282 vidx = vlan_id / 64;
3283 vbit = vlan_id % 64;
3286 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3288 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3291 return eth_err(port_id, ret);
3295 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3298 struct rte_eth_dev *dev;
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3301 dev = &rte_eth_devices[port_id];
3302 if (rx_queue_id >= dev->data->nb_rx_queues) {
3303 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3307 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3308 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3314 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3315 enum rte_vlan_type vlan_type,
3318 struct rte_eth_dev *dev;
3320 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3321 dev = &rte_eth_devices[port_id];
3322 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3324 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3329 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3331 struct rte_eth_dev_info dev_info;
3332 struct rte_eth_dev *dev;
3336 uint64_t orig_offloads;
3337 uint64_t dev_offloads;
3338 uint64_t new_offloads;
3340 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3341 dev = &rte_eth_devices[port_id];
3343 /* save original values in case of failure */
3344 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3345 dev_offloads = orig_offloads;
3347 /* check which option changed by application */
3348 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3349 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3352 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3354 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3355 mask |= ETH_VLAN_STRIP_MASK;
3358 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3359 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3362 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3364 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3365 mask |= ETH_VLAN_FILTER_MASK;
3368 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3369 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3372 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3374 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3375 mask |= ETH_VLAN_EXTEND_MASK;
3378 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3379 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3382 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3384 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3385 mask |= ETH_QINQ_STRIP_MASK;
3392 ret = rte_eth_dev_info_get(port_id, &dev_info);
3396 /* Rx VLAN offloading must be within its device capabilities */
3397 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3398 new_offloads = dev_offloads & ~orig_offloads;
3400 "Ethdev port_id=%u requested new added VLAN offloads "
3401 "0x%" PRIx64 " must be within Rx offloads capabilities "
3402 "0x%" PRIx64 " in %s()\n",
3403 port_id, new_offloads, dev_info.rx_offload_capa,
3408 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3409 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3410 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3412 /* hit an error restore original values */
3413 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3416 return eth_err(port_id, ret);
3420 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3422 struct rte_eth_dev *dev;
3423 uint64_t *dev_offloads;
3426 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3427 dev = &rte_eth_devices[port_id];
3428 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3430 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3431 ret |= ETH_VLAN_STRIP_OFFLOAD;
3433 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3434 ret |= ETH_VLAN_FILTER_OFFLOAD;
3436 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3437 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3439 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3440 ret |= ETH_QINQ_STRIP_OFFLOAD;
3446 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3448 struct rte_eth_dev *dev;
3450 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3451 dev = &rte_eth_devices[port_id];
3452 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3454 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3458 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3460 struct rte_eth_dev *dev;
3462 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3463 dev = &rte_eth_devices[port_id];
3464 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3465 memset(fc_conf, 0, sizeof(*fc_conf));
3466 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3470 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3472 struct rte_eth_dev *dev;
3474 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3475 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3476 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3480 dev = &rte_eth_devices[port_id];
3481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3482 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3486 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3487 struct rte_eth_pfc_conf *pfc_conf)
3489 struct rte_eth_dev *dev;
3491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3492 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3493 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3497 dev = &rte_eth_devices[port_id];
3498 /* High water, low water validation are device specific */
3499 if (*dev->dev_ops->priority_flow_ctrl_set)
3500 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3506 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3514 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3515 for (i = 0; i < num; i++) {
3516 if (reta_conf[i].mask)
3524 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3528 uint16_t i, idx, shift;
3534 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3538 for (i = 0; i < reta_size; i++) {
3539 idx = i / RTE_RETA_GROUP_SIZE;
3540 shift = i % RTE_RETA_GROUP_SIZE;
3541 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3542 (reta_conf[idx].reta[shift] >= max_rxq)) {
3544 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3546 reta_conf[idx].reta[shift], max_rxq);
3555 rte_eth_dev_rss_reta_update(uint16_t port_id,
3556 struct rte_eth_rss_reta_entry64 *reta_conf,
3559 struct rte_eth_dev *dev;
3562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3563 /* Check mask bits */
3564 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3568 dev = &rte_eth_devices[port_id];
3570 /* Check entry value */
3571 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3572 dev->data->nb_rx_queues);
3576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3577 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3582 rte_eth_dev_rss_reta_query(uint16_t port_id,
3583 struct rte_eth_rss_reta_entry64 *reta_conf,
3586 struct rte_eth_dev *dev;
3589 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3591 /* Check mask bits */
3592 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3596 dev = &rte_eth_devices[port_id];
3597 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3598 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3603 rte_eth_dev_rss_hash_update(uint16_t port_id,
3604 struct rte_eth_rss_conf *rss_conf)
3606 struct rte_eth_dev *dev;
3607 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3610 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3612 ret = rte_eth_dev_info_get(port_id, &dev_info);
3616 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3618 dev = &rte_eth_devices[port_id];
3619 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3620 dev_info.flow_type_rss_offloads) {
3622 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3623 port_id, rss_conf->rss_hf,
3624 dev_info.flow_type_rss_offloads);
3627 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3628 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3633 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3634 struct rte_eth_rss_conf *rss_conf)
3636 struct rte_eth_dev *dev;
3638 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3639 dev = &rte_eth_devices[port_id];
3640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3641 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3646 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3647 struct rte_eth_udp_tunnel *udp_tunnel)
3649 struct rte_eth_dev *dev;
3651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3652 if (udp_tunnel == NULL) {
3653 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3657 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3658 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3662 dev = &rte_eth_devices[port_id];
3663 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3664 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3669 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3670 struct rte_eth_udp_tunnel *udp_tunnel)
3672 struct rte_eth_dev *dev;
3674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3675 dev = &rte_eth_devices[port_id];
3677 if (udp_tunnel == NULL) {
3678 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3682 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3683 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3687 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3688 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3693 rte_eth_led_on(uint16_t port_id)
3695 struct rte_eth_dev *dev;
3697 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3698 dev = &rte_eth_devices[port_id];
3699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3700 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3704 rte_eth_led_off(uint16_t port_id)
3706 struct rte_eth_dev *dev;
3708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3709 dev = &rte_eth_devices[port_id];
3710 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3711 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3715 rte_eth_fec_get_capability(uint16_t port_id,
3716 struct rte_eth_fec_capa *speed_fec_capa,
3719 struct rte_eth_dev *dev;
3722 if (speed_fec_capa == NULL && num > 0)
3725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3726 dev = &rte_eth_devices[port_id];
3727 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
3728 ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
3734 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
3736 struct rte_eth_dev *dev;
3738 if (fec_capa == NULL)
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3742 dev = &rte_eth_devices[port_id];
3743 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
3744 return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
3748 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
3750 struct rte_eth_dev *dev;
3752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3753 dev = &rte_eth_devices[port_id];
3754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
3755 return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
3759 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3763 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3765 struct rte_eth_dev_info dev_info;
3766 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3770 ret = rte_eth_dev_info_get(port_id, &dev_info);
3774 for (i = 0; i < dev_info.max_mac_addrs; i++)
3775 if (memcmp(addr, &dev->data->mac_addrs[i],
3776 RTE_ETHER_ADDR_LEN) == 0)
3782 static const struct rte_ether_addr null_mac_addr;
3785 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3788 struct rte_eth_dev *dev;
3793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3794 dev = &rte_eth_devices[port_id];
3795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3797 if (rte_is_zero_ether_addr(addr)) {
3798 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3802 if (pool >= ETH_64_POOLS) {
3803 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3807 index = get_mac_addr_index(port_id, addr);
3809 index = get_mac_addr_index(port_id, &null_mac_addr);
3811 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3816 pool_mask = dev->data->mac_pool_sel[index];
3818 /* Check if both MAC address and pool is already there, and do nothing */
3819 if (pool_mask & (1ULL << pool))
3824 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3827 /* Update address in NIC data structure */
3828 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3830 /* Update pool bitmap in NIC data structure */
3831 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3834 return eth_err(port_id, ret);
3838 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3840 struct rte_eth_dev *dev;
3843 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3844 dev = &rte_eth_devices[port_id];
3845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3847 index = get_mac_addr_index(port_id, addr);
3850 "Port %u: Cannot remove default MAC address\n",
3853 } else if (index < 0)
3854 return 0; /* Do nothing if address wasn't found */
3857 (*dev->dev_ops->mac_addr_remove)(dev, index);
3859 /* Update address in NIC data structure */
3860 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3862 /* reset pool bitmap */
3863 dev->data->mac_pool_sel[index] = 0;
3869 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3871 struct rte_eth_dev *dev;
3874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3876 if (!rte_is_valid_assigned_ether_addr(addr))
3879 dev = &rte_eth_devices[port_id];
3880 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3882 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3886 /* Update default address in NIC data structure */
3887 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3894 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3898 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3900 struct rte_eth_dev_info dev_info;
3901 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3905 ret = rte_eth_dev_info_get(port_id, &dev_info);
3909 if (!dev->data->hash_mac_addrs)
3912 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3913 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3914 RTE_ETHER_ADDR_LEN) == 0)
3921 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3930 dev = &rte_eth_devices[port_id];
3931 if (rte_is_zero_ether_addr(addr)) {
3932 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3937 index = get_hash_mac_addr_index(port_id, addr);
3938 /* Check if it's already there, and do nothing */
3939 if ((index >= 0) && on)
3945 "Port %u: the MAC address was not set in UTA\n",
3950 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3952 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3959 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3961 /* Update address in NIC data structure */
3963 rte_ether_addr_copy(addr,
3964 &dev->data->hash_mac_addrs[index]);
3966 rte_ether_addr_copy(&null_mac_addr,
3967 &dev->data->hash_mac_addrs[index]);
3970 return eth_err(port_id, ret);
3974 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3976 struct rte_eth_dev *dev;
3978 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3980 dev = &rte_eth_devices[port_id];
3982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3983 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3987 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3990 struct rte_eth_dev *dev;
3991 struct rte_eth_dev_info dev_info;
3992 struct rte_eth_link link;
3995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3997 ret = rte_eth_dev_info_get(port_id, &dev_info);
4001 dev = &rte_eth_devices[port_id];
4002 link = dev->data->dev_link;
4004 if (queue_idx > dev_info.max_tx_queues) {
4006 "Set queue rate limit:port %u: invalid queue id=%u\n",
4007 port_id, queue_idx);
4011 if (tx_rate > link.link_speed) {
4013 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4014 tx_rate, link.link_speed);
4018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4019 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4020 queue_idx, tx_rate));
4024 rte_eth_mirror_rule_set(uint16_t port_id,
4025 struct rte_eth_mirror_conf *mirror_conf,
4026 uint8_t rule_id, uint8_t on)
4028 struct rte_eth_dev *dev;
4030 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4031 if (mirror_conf->rule_type == 0) {
4032 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4036 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4037 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4042 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4043 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4044 (mirror_conf->pool_mask == 0)) {
4046 "Invalid mirror pool, pool mask can not be 0\n");
4050 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4051 mirror_conf->vlan.vlan_mask == 0) {
4053 "Invalid vlan mask, vlan mask can not be 0\n");
4057 dev = &rte_eth_devices[port_id];
4058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4060 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4061 mirror_conf, rule_id, on));
4065 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4067 struct rte_eth_dev *dev;
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4071 dev = &rte_eth_devices[port_id];
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4074 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4078 RTE_INIT(eth_dev_init_cb_lists)
4082 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4083 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4087 rte_eth_dev_callback_register(uint16_t port_id,
4088 enum rte_eth_event_type event,
4089 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4091 struct rte_eth_dev *dev;
4092 struct rte_eth_dev_callback *user_cb;
4093 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4099 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4100 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4104 if (port_id == RTE_ETH_ALL) {
4106 last_port = RTE_MAX_ETHPORTS - 1;
4108 next_port = last_port = port_id;
4111 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4114 dev = &rte_eth_devices[next_port];
4116 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4117 if (user_cb->cb_fn == cb_fn &&
4118 user_cb->cb_arg == cb_arg &&
4119 user_cb->event == event) {
4124 /* create a new callback. */
4125 if (user_cb == NULL) {
4126 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4127 sizeof(struct rte_eth_dev_callback), 0);
4128 if (user_cb != NULL) {
4129 user_cb->cb_fn = cb_fn;
4130 user_cb->cb_arg = cb_arg;
4131 user_cb->event = event;
4132 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4135 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4136 rte_eth_dev_callback_unregister(port_id, event,
4142 } while (++next_port <= last_port);
4144 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4149 rte_eth_dev_callback_unregister(uint16_t port_id,
4150 enum rte_eth_event_type event,
4151 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4154 struct rte_eth_dev *dev;
4155 struct rte_eth_dev_callback *cb, *next;
4156 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4162 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4163 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4167 if (port_id == RTE_ETH_ALL) {
4169 last_port = RTE_MAX_ETHPORTS - 1;
4171 next_port = last_port = port_id;
4174 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4177 dev = &rte_eth_devices[next_port];
4179 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4182 next = TAILQ_NEXT(cb, next);
4184 if (cb->cb_fn != cb_fn || cb->event != event ||
4185 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4189 * if this callback is not executing right now,
4192 if (cb->active == 0) {
4193 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4199 } while (++next_port <= last_port);
4201 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4206 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4207 enum rte_eth_event_type event, void *ret_param)
4209 struct rte_eth_dev_callback *cb_lst;
4210 struct rte_eth_dev_callback dev_cb;
4213 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4214 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4215 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4219 if (ret_param != NULL)
4220 dev_cb.ret_param = ret_param;
4222 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4223 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4224 dev_cb.cb_arg, dev_cb.ret_param);
4225 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4228 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4233 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4238 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4240 dev->state = RTE_ETH_DEV_ATTACHED;
4244 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4247 struct rte_eth_dev *dev;
4248 struct rte_intr_handle *intr_handle;
4252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4254 dev = &rte_eth_devices[port_id];
4256 if (!dev->intr_handle) {
4257 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4261 intr_handle = dev->intr_handle;
4262 if (!intr_handle->intr_vec) {
4263 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4267 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4268 vec = intr_handle->intr_vec[qid];
4269 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4270 if (rc && rc != -EEXIST) {
4272 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4273 port_id, qid, op, epfd, vec);
4281 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4283 struct rte_intr_handle *intr_handle;
4284 struct rte_eth_dev *dev;
4285 unsigned int efd_idx;
4289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4291 dev = &rte_eth_devices[port_id];
4293 if (queue_id >= dev->data->nb_rx_queues) {
4294 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4298 if (!dev->intr_handle) {
4299 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4303 intr_handle = dev->intr_handle;
4304 if (!intr_handle->intr_vec) {
4305 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4309 vec = intr_handle->intr_vec[queue_id];
4310 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4311 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4312 fd = intr_handle->efds[efd_idx];
4318 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4319 const char *ring_name)
4321 return snprintf(name, len, "eth_p%d_q%d_%s",
4322 port_id, queue_id, ring_name);
4325 const struct rte_memzone *
4326 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4327 uint16_t queue_id, size_t size, unsigned align,
4330 char z_name[RTE_MEMZONE_NAMESIZE];
4331 const struct rte_memzone *mz;
4334 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4335 queue_id, ring_name);
4336 if (rc >= RTE_MEMZONE_NAMESIZE) {
4337 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4338 rte_errno = ENAMETOOLONG;
4342 mz = rte_memzone_lookup(z_name);
4344 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4346 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4348 "memzone %s does not justify the requested attributes\n",
4356 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4357 RTE_MEMZONE_IOVA_CONTIG, align);
4361 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4364 char z_name[RTE_MEMZONE_NAMESIZE];
4365 const struct rte_memzone *mz;
4368 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4369 queue_id, ring_name);
4370 if (rc >= RTE_MEMZONE_NAMESIZE) {
4371 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4372 return -ENAMETOOLONG;
4375 mz = rte_memzone_lookup(z_name);
4377 rc = rte_memzone_free(mz);
4385 rte_eth_dev_create(struct rte_device *device, const char *name,
4386 size_t priv_data_size,
4387 ethdev_bus_specific_init ethdev_bus_specific_init,
4388 void *bus_init_params,
4389 ethdev_init_t ethdev_init, void *init_params)
4391 struct rte_eth_dev *ethdev;
4394 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4396 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4397 ethdev = rte_eth_dev_allocate(name);
4401 if (priv_data_size) {
4402 ethdev->data->dev_private = rte_zmalloc_socket(
4403 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4406 if (!ethdev->data->dev_private) {
4408 "failed to allocate private data\n");
4414 ethdev = rte_eth_dev_attach_secondary(name);
4417 "secondary process attach failed, ethdev doesn't exist\n");
4422 ethdev->device = device;
4424 if (ethdev_bus_specific_init) {
4425 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4428 "ethdev bus specific initialisation failed\n");
4433 retval = ethdev_init(ethdev, init_params);
4435 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4439 rte_eth_dev_probing_finish(ethdev);
4444 rte_eth_dev_release_port(ethdev);
4449 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4450 ethdev_uninit_t ethdev_uninit)
4454 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4458 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4460 ret = ethdev_uninit(ethdev);
4464 return rte_eth_dev_release_port(ethdev);
4468 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4469 int epfd, int op, void *data)
4472 struct rte_eth_dev *dev;
4473 struct rte_intr_handle *intr_handle;
4476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4478 dev = &rte_eth_devices[port_id];
4479 if (queue_id >= dev->data->nb_rx_queues) {
4480 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4484 if (!dev->intr_handle) {
4485 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4489 intr_handle = dev->intr_handle;
4490 if (!intr_handle->intr_vec) {
4491 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4495 vec = intr_handle->intr_vec[queue_id];
4496 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4497 if (rc && rc != -EEXIST) {
4499 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4500 port_id, queue_id, op, epfd, vec);
4508 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4511 struct rte_eth_dev *dev;
4514 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4516 dev = &rte_eth_devices[port_id];
4518 ret = eth_dev_validate_rx_queue(dev, queue_id);
4522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4523 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4528 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4531 struct rte_eth_dev *dev;
4534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4536 dev = &rte_eth_devices[port_id];
4538 ret = eth_dev_validate_rx_queue(dev, queue_id);
4542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4543 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4549 rte_eth_dev_filter_supported(uint16_t port_id,
4550 enum rte_filter_type filter_type)
4552 struct rte_eth_dev *dev;
4554 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4556 dev = &rte_eth_devices[port_id];
4557 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4558 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4559 RTE_ETH_FILTER_NOP, NULL);
4563 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4564 enum rte_filter_op filter_op, void *arg)
4566 struct rte_eth_dev *dev;
4568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4570 dev = &rte_eth_devices[port_id];
4571 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4572 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4576 const struct rte_eth_rxtx_callback *
4577 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4578 rte_rx_callback_fn fn, void *user_param)
4580 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4581 rte_errno = ENOTSUP;
4584 struct rte_eth_dev *dev;
4586 /* check input parameters */
4587 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4588 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4592 dev = &rte_eth_devices[port_id];
4593 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4597 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4605 cb->param = user_param;
4607 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4608 /* Add the callbacks in fifo order. */
4609 struct rte_eth_rxtx_callback *tail =
4610 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4613 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4620 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4625 const struct rte_eth_rxtx_callback *
4626 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4627 rte_rx_callback_fn fn, void *user_param)
4629 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4630 rte_errno = ENOTSUP;
4633 /* check input parameters */
4634 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4635 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4640 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4648 cb->param = user_param;
4650 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4651 /* Add the callbacks at first position */
4652 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4653 /* Stores to cb->fn, cb->param and cb->next should complete before
4654 * cb is visible to data plane threads.
4657 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4658 cb, __ATOMIC_RELEASE);
4659 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4664 const struct rte_eth_rxtx_callback *
4665 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4666 rte_tx_callback_fn fn, void *user_param)
4668 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4669 rte_errno = ENOTSUP;
4672 struct rte_eth_dev *dev;
4674 /* check input parameters */
4675 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4676 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4681 dev = &rte_eth_devices[port_id];
4682 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4687 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4695 cb->param = user_param;
4697 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4698 /* Add the callbacks in fifo order. */
4699 struct rte_eth_rxtx_callback *tail =
4700 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4703 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4710 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4716 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4717 const struct rte_eth_rxtx_callback *user_cb)
4719 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4722 /* Check input parameters. */
4723 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4724 if (user_cb == NULL ||
4725 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4728 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4729 struct rte_eth_rxtx_callback *cb;
4730 struct rte_eth_rxtx_callback **prev_cb;
4733 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4734 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4735 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4737 if (cb == user_cb) {
4738 /* Remove the user cb from the callback list. */
4739 *prev_cb = cb->next;
4744 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4750 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4751 const struct rte_eth_rxtx_callback *user_cb)
4753 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4756 /* Check input parameters. */
4757 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4758 if (user_cb == NULL ||
4759 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4762 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4764 struct rte_eth_rxtx_callback *cb;
4765 struct rte_eth_rxtx_callback **prev_cb;
4767 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4768 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4769 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4771 if (cb == user_cb) {
4772 /* Remove the user cb from the callback list. */
4773 *prev_cb = cb->next;
4778 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4784 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4785 struct rte_eth_rxq_info *qinfo)
4787 struct rte_eth_dev *dev;
4789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4794 dev = &rte_eth_devices[port_id];
4795 if (queue_id >= dev->data->nb_rx_queues) {
4796 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4800 if (dev->data->rx_queues == NULL ||
4801 dev->data->rx_queues[queue_id] == NULL) {
4803 "Rx queue %"PRIu16" of device with port_id=%"
4804 PRIu16" has not been setup\n",
4809 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4810 RTE_ETHDEV_LOG(INFO,
4811 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4816 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4818 memset(qinfo, 0, sizeof(*qinfo));
4819 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4824 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4825 struct rte_eth_txq_info *qinfo)
4827 struct rte_eth_dev *dev;
4829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4834 dev = &rte_eth_devices[port_id];
4835 if (queue_id >= dev->data->nb_tx_queues) {
4836 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4840 if (dev->data->tx_queues == NULL ||
4841 dev->data->tx_queues[queue_id] == NULL) {
4843 "Tx queue %"PRIu16" of device with port_id=%"
4844 PRIu16" has not been setup\n",
4849 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4850 RTE_ETHDEV_LOG(INFO,
4851 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4858 memset(qinfo, 0, sizeof(*qinfo));
4859 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4865 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4866 struct rte_eth_burst_mode *mode)
4868 struct rte_eth_dev *dev;
4870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4875 dev = &rte_eth_devices[port_id];
4877 if (queue_id >= dev->data->nb_rx_queues) {
4878 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4883 memset(mode, 0, sizeof(*mode));
4884 return eth_err(port_id,
4885 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4889 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4890 struct rte_eth_burst_mode *mode)
4892 struct rte_eth_dev *dev;
4894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4899 dev = &rte_eth_devices[port_id];
4901 if (queue_id >= dev->data->nb_tx_queues) {
4902 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4907 memset(mode, 0, sizeof(*mode));
4908 return eth_err(port_id,
4909 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4913 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4914 struct rte_ether_addr *mc_addr_set,
4915 uint32_t nb_mc_addr)
4917 struct rte_eth_dev *dev;
4919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4921 dev = &rte_eth_devices[port_id];
4922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4923 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4924 mc_addr_set, nb_mc_addr));
4928 rte_eth_timesync_enable(uint16_t port_id)
4930 struct rte_eth_dev *dev;
4932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4933 dev = &rte_eth_devices[port_id];
4935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4936 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4940 rte_eth_timesync_disable(uint16_t port_id)
4942 struct rte_eth_dev *dev;
4944 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4945 dev = &rte_eth_devices[port_id];
4947 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4948 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4952 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4955 struct rte_eth_dev *dev;
4957 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4958 dev = &rte_eth_devices[port_id];
4960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4961 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4962 (dev, timestamp, flags));
4966 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4967 struct timespec *timestamp)
4969 struct rte_eth_dev *dev;
4971 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4972 dev = &rte_eth_devices[port_id];
4974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4975 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4980 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4982 struct rte_eth_dev *dev;
4984 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4985 dev = &rte_eth_devices[port_id];
4987 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4988 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4993 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4995 struct rte_eth_dev *dev;
4997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4998 dev = &rte_eth_devices[port_id];
5000 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5001 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5006 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5008 struct rte_eth_dev *dev;
5010 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5011 dev = &rte_eth_devices[port_id];
5013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5014 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5019 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5021 struct rte_eth_dev *dev;
5023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5024 dev = &rte_eth_devices[port_id];
5026 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5027 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5031 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5033 struct rte_eth_dev *dev;
5035 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5037 dev = &rte_eth_devices[port_id];
5038 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5039 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5043 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5045 struct rte_eth_dev *dev;
5047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5049 dev = &rte_eth_devices[port_id];
5050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5051 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5055 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5057 struct rte_eth_dev *dev;
5059 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5061 dev = &rte_eth_devices[port_id];
5062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5063 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5067 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5069 struct rte_eth_dev *dev;
5071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5073 dev = &rte_eth_devices[port_id];
5074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5075 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5079 rte_eth_dev_get_module_info(uint16_t port_id,
5080 struct rte_eth_dev_module_info *modinfo)
5082 struct rte_eth_dev *dev;
5084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5086 dev = &rte_eth_devices[port_id];
5087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5088 return (*dev->dev_ops->get_module_info)(dev, modinfo);
5092 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5093 struct rte_dev_eeprom_info *info)
5095 struct rte_eth_dev *dev;
5097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5099 dev = &rte_eth_devices[port_id];
5100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5101 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5105 rte_eth_dev_get_dcb_info(uint16_t port_id,
5106 struct rte_eth_dcb_info *dcb_info)
5108 struct rte_eth_dev *dev;
5110 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5112 dev = &rte_eth_devices[port_id];
5113 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5116 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5120 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5121 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5123 struct rte_eth_dev *dev;
5125 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5126 if (l2_tunnel == NULL) {
5127 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5131 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5132 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5136 dev = &rte_eth_devices[port_id];
5137 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5139 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5144 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5145 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5149 struct rte_eth_dev *dev;
5151 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5153 if (l2_tunnel == NULL) {
5154 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5158 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5159 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5164 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5168 dev = &rte_eth_devices[port_id];
5169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5171 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5172 l2_tunnel, mask, en));
5176 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5177 const struct rte_eth_desc_lim *desc_lim)
5179 if (desc_lim->nb_align != 0)
5180 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5182 if (desc_lim->nb_max != 0)
5183 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5185 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5189 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5190 uint16_t *nb_rx_desc,
5191 uint16_t *nb_tx_desc)
5193 struct rte_eth_dev_info dev_info;
5196 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5198 ret = rte_eth_dev_info_get(port_id, &dev_info);
5202 if (nb_rx_desc != NULL)
5203 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5205 if (nb_tx_desc != NULL)
5206 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5212 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5213 struct rte_eth_hairpin_cap *cap)
5215 struct rte_eth_dev *dev;
5217 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5219 dev = &rte_eth_devices[port_id];
5220 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5221 memset(cap, 0, sizeof(*cap));
5222 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5226 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5228 if (dev->data->rx_queue_state[queue_id] ==
5229 RTE_ETH_QUEUE_STATE_HAIRPIN)
5235 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5237 if (dev->data->tx_queue_state[queue_id] ==
5238 RTE_ETH_QUEUE_STATE_HAIRPIN)
5244 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5246 struct rte_eth_dev *dev;
5248 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5253 dev = &rte_eth_devices[port_id];
5255 if (*dev->dev_ops->pool_ops_supported == NULL)
5256 return 1; /* all pools are supported */
5258 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5262 * A set of values to describe the possible states of a switch domain.
5264 enum rte_eth_switch_domain_state {
5265 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5266 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5270 * Array of switch domains available for allocation. Array is sized to
5271 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5272 * ethdev ports in a single process.
5274 static struct rte_eth_dev_switch {
5275 enum rte_eth_switch_domain_state state;
5276 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5279 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5283 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5285 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5286 if (rte_eth_switch_domains[i].state ==
5287 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5288 rte_eth_switch_domains[i].state =
5289 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5299 rte_eth_switch_domain_free(uint16_t domain_id)
5301 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5302 domain_id >= RTE_MAX_ETHPORTS)
5305 if (rte_eth_switch_domains[domain_id].state !=
5306 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5309 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5315 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5318 struct rte_kvargs_pair *pair;
5321 arglist->str = strdup(str_in);
5322 if (arglist->str == NULL)
5325 letter = arglist->str;
5328 pair = &arglist->pairs[0];
5331 case 0: /* Initial */
5334 else if (*letter == '\0')
5341 case 1: /* Parsing key */
5342 if (*letter == '=') {
5344 pair->value = letter + 1;
5346 } else if (*letter == ',' || *letter == '\0')
5351 case 2: /* Parsing value */
5354 else if (*letter == ',') {
5357 pair = &arglist->pairs[arglist->count];
5359 } else if (*letter == '\0') {
5362 pair = &arglist->pairs[arglist->count];
5367 case 3: /* Parsing list */
5370 else if (*letter == '\0')
5379 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5381 struct rte_kvargs args;
5382 struct rte_kvargs_pair *pair;
5386 memset(eth_da, 0, sizeof(*eth_da));
5388 result = rte_eth_devargs_tokenise(&args, dargs);
5392 for (i = 0; i < args.count; i++) {
5393 pair = &args.pairs[i];
5394 if (strcmp("representor", pair->key) == 0) {
5395 result = rte_eth_devargs_parse_list(pair->value,
5396 rte_eth_devargs_parse_representor_ports,
5411 handle_port_list(const char *cmd __rte_unused,
5412 const char *params __rte_unused,
5413 struct rte_tel_data *d)
5417 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5418 RTE_ETH_FOREACH_DEV(port_id)
5419 rte_tel_data_add_array_int(d, port_id);
5424 add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5425 const char *stat_name)
5428 struct rte_tel_data *q_data = rte_tel_data_alloc();
5429 rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5430 for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5431 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5432 rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5435 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5438 handle_port_stats(const char *cmd __rte_unused,
5440 struct rte_tel_data *d)
5442 struct rte_eth_stats stats;
5445 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5448 port_id = atoi(params);
5449 if (!rte_eth_dev_is_valid_port(port_id))
5452 ret = rte_eth_stats_get(port_id, &stats);
5456 rte_tel_data_start_dict(d);
5457 ADD_DICT_STAT(stats, ipackets);
5458 ADD_DICT_STAT(stats, opackets);
5459 ADD_DICT_STAT(stats, ibytes);
5460 ADD_DICT_STAT(stats, obytes);
5461 ADD_DICT_STAT(stats, imissed);
5462 ADD_DICT_STAT(stats, ierrors);
5463 ADD_DICT_STAT(stats, oerrors);
5464 ADD_DICT_STAT(stats, rx_nombuf);
5465 add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5466 add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5467 add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5468 add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5469 add_port_queue_stats(d, stats.q_errors, "q_errors");
5475 handle_port_xstats(const char *cmd __rte_unused,
5477 struct rte_tel_data *d)
5479 struct rte_eth_xstat *eth_xstats;
5480 struct rte_eth_xstat_name *xstat_names;
5481 int port_id, num_xstats;
5485 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5488 port_id = strtoul(params, &end_param, 0);
5489 if (*end_param != '\0')
5490 RTE_ETHDEV_LOG(NOTICE,
5491 "Extra parameters passed to ethdev telemetry command, ignoring");
5492 if (!rte_eth_dev_is_valid_port(port_id))
5495 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5499 /* use one malloc for both names and stats */
5500 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5501 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5502 if (eth_xstats == NULL)
5504 xstat_names = (void *)ð_xstats[num_xstats];
5506 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5507 if (ret < 0 || ret > num_xstats) {
5512 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5513 if (ret < 0 || ret > num_xstats) {
5518 rte_tel_data_start_dict(d);
5519 for (i = 0; i < num_xstats; i++)
5520 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5521 eth_xstats[i].value);
5526 handle_port_link_status(const char *cmd __rte_unused,
5528 struct rte_tel_data *d)
5530 static const char *status_str = "status";
5532 struct rte_eth_link link;
5535 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5538 port_id = strtoul(params, &end_param, 0);
5539 if (*end_param != '\0')
5540 RTE_ETHDEV_LOG(NOTICE,
5541 "Extra parameters passed to ethdev telemetry command, ignoring");
5542 if (!rte_eth_dev_is_valid_port(port_id))
5545 ret = rte_eth_link_get(port_id, &link);
5549 rte_tel_data_start_dict(d);
5550 if (!link.link_status) {
5551 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5554 rte_tel_data_add_dict_string(d, status_str, "UP");
5555 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5556 rte_tel_data_add_dict_string(d, "duplex",
5557 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5558 "full-duplex" : "half-duplex");
5562 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5564 RTE_INIT(ethdev_init_telemetry)
5566 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5567 "Returns list of available ethdev ports. Takes no parameters");
5568 rte_telemetry_register_cmd("/ethdev/stats", handle_port_stats,
5569 "Returns the common stats for a port. Parameters: int port_id");
5570 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5571 "Returns the extended stats for a port. Parameters: int port_id");
5572 rte_telemetry_register_cmd("/ethdev/link_status",
5573 handle_port_link_status,
5574 "Returns the link status for a port. Parameters: int port_id");