1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
41 #include "rte_ether.h"
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
47 int rte_eth_dev_logtype;
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51 static uint16_t eth_dev_last_created_port;
53 /* spinlock for eth device callbacks */
54 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
56 /* spinlock for add/remove rx callbacks */
57 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
59 /* spinlock for add/remove tx callbacks */
60 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
62 /* spinlock for shared data allocation */
63 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
65 /* store statistics names and its offset in stats structure */
66 struct rte_eth_xstats_name_off {
67 char name[RTE_ETH_XSTATS_NAME_SIZE];
71 /* Shared memory between primary and secondary processes. */
73 uint64_t next_owner_id;
74 rte_spinlock_t ownership_lock;
75 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
76 } *rte_eth_dev_shared_data;
78 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
79 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
80 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
81 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
82 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
83 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
84 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
85 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
86 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
90 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
92 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
93 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
94 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
95 {"errors", offsetof(struct rte_eth_stats, q_errors)},
98 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
99 sizeof(rte_rxq_stats_strings[0]))
101 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
102 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
103 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
105 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
106 sizeof(rte_txq_stats_strings[0]))
108 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
109 { DEV_RX_OFFLOAD_##_name, #_name }
111 static const struct {
114 } rte_rx_offload_names[] = {
115 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
116 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
120 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
122 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
123 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
125 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
126 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
130 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
131 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
132 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
135 #undef RTE_RX_OFFLOAD_BIT2STR
137 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
138 { DEV_TX_OFFLOAD_##_name, #_name }
140 static const struct {
143 } rte_tx_offload_names[] = {
144 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 RTE_TX_OFFLOAD_BIT2STR(MATCH_METADATA),
168 #undef RTE_TX_OFFLOAD_BIT2STR
171 * The user application callback description.
173 * It contains callback address to be registered by user application,
174 * the pointer to the parameters for callback, and the event type.
176 struct rte_eth_dev_callback {
177 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
178 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
179 void *cb_arg; /**< Parameter for callback */
180 void *ret_param; /**< Return parameter */
181 enum rte_eth_event_type event; /**< Interrupt event type */
182 uint32_t active; /**< Callback is executing */
190 int __rte_experimental
191 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
194 struct rte_devargs devargs = {.args = NULL};
195 const char *bus_param_key;
196 char *bus_str = NULL;
197 char *cls_str = NULL;
200 memset(iter, 0, sizeof(*iter));
203 * The devargs string may use various syntaxes:
204 * - 0000:08:00.0,representor=[1-3]
205 * - pci:0000:06:00.0,representor=[0,5]
206 * - class=eth,mac=00:11:22:33:44:55
207 * A new syntax is in development (not yet supported):
208 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
212 * Handle pure class filter (i.e. without any bus-level argument),
213 * from future new syntax.
214 * rte_devargs_parse() is not yet supporting the new syntax,
215 * that's why this simple case is temporarily parsed here.
217 #define iter_anybus_str "class=eth,"
218 if (strncmp(devargs_str, iter_anybus_str,
219 strlen(iter_anybus_str)) == 0) {
220 iter->cls_str = devargs_str + strlen(iter_anybus_str);
224 /* Split bus, device and parameters. */
225 ret = rte_devargs_parse(&devargs, devargs_str);
230 * Assume parameters of old syntax can match only at ethdev level.
231 * Extra parameters will be ignored, thanks to "+" prefix.
233 str_size = strlen(devargs.args) + 2;
234 cls_str = malloc(str_size);
235 if (cls_str == NULL) {
239 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
240 if (ret != str_size - 1) {
244 iter->cls_str = cls_str;
245 free(devargs.args); /* allocated by rte_devargs_parse() */
248 iter->bus = devargs.bus;
249 if (iter->bus->dev_iterate == NULL) {
254 /* Convert bus args to new syntax for use with new API dev_iterate. */
255 if (strcmp(iter->bus->name, "vdev") == 0) {
256 bus_param_key = "name";
257 } else if (strcmp(iter->bus->name, "pci") == 0) {
258 bus_param_key = "addr";
263 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
264 bus_str = malloc(str_size);
265 if (bus_str == NULL) {
269 ret = snprintf(bus_str, str_size, "%s=%s",
270 bus_param_key, devargs.name);
271 if (ret != str_size - 1) {
275 iter->bus_str = bus_str;
278 iter->cls = rte_class_find_by_name("eth");
283 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
291 uint16_t __rte_experimental
292 rte_eth_iterator_next(struct rte_dev_iterator *iter)
294 if (iter->cls == NULL) /* invalid ethdev iterator */
295 return RTE_MAX_ETHPORTS;
297 do { /* loop to try all matching rte_device */
298 /* If not pure ethdev filter and */
299 if (iter->bus != NULL &&
300 /* not in middle of rte_eth_dev iteration, */
301 iter->class_device == NULL) {
302 /* get next rte_device to try. */
303 iter->device = iter->bus->dev_iterate(
304 iter->device, iter->bus_str, iter);
305 if (iter->device == NULL)
306 break; /* no more rte_device candidate */
308 /* A device is matching bus part, need to check ethdev part. */
309 iter->class_device = iter->cls->dev_iterate(
310 iter->class_device, iter->cls_str, iter);
311 if (iter->class_device != NULL)
312 return eth_dev_to_id(iter->class_device); /* match */
313 } while (iter->bus != NULL); /* need to try next rte_device */
315 /* No more ethdev port to iterate. */
316 rte_eth_iterator_cleanup(iter);
317 return RTE_MAX_ETHPORTS;
320 void __rte_experimental
321 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
323 if (iter->bus_str == NULL)
324 return; /* nothing to free in pure class filter */
325 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
326 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
327 memset(iter, 0, sizeof(*iter));
331 rte_eth_find_next(uint16_t port_id)
333 while (port_id < RTE_MAX_ETHPORTS &&
334 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
335 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
338 if (port_id >= RTE_MAX_ETHPORTS)
339 return RTE_MAX_ETHPORTS;
345 rte_eth_dev_shared_data_prepare(void)
347 const unsigned flags = 0;
348 const struct rte_memzone *mz;
350 rte_spinlock_lock(&rte_eth_shared_data_lock);
352 if (rte_eth_dev_shared_data == NULL) {
353 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
354 /* Allocate port data and ownership shared memory. */
355 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
356 sizeof(*rte_eth_dev_shared_data),
357 rte_socket_id(), flags);
359 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
361 rte_panic("Cannot allocate ethdev shared data\n");
363 rte_eth_dev_shared_data = mz->addr;
364 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
365 rte_eth_dev_shared_data->next_owner_id =
366 RTE_ETH_DEV_NO_OWNER + 1;
367 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
368 memset(rte_eth_dev_shared_data->data, 0,
369 sizeof(rte_eth_dev_shared_data->data));
373 rte_spinlock_unlock(&rte_eth_shared_data_lock);
377 is_allocated(const struct rte_eth_dev *ethdev)
379 return ethdev->data->name[0] != '\0';
382 static struct rte_eth_dev *
383 _rte_eth_dev_allocated(const char *name)
387 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
388 if (rte_eth_devices[i].data != NULL &&
389 strcmp(rte_eth_devices[i].data->name, name) == 0)
390 return &rte_eth_devices[i];
396 rte_eth_dev_allocated(const char *name)
398 struct rte_eth_dev *ethdev;
400 rte_eth_dev_shared_data_prepare();
402 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
404 ethdev = _rte_eth_dev_allocated(name);
406 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
412 rte_eth_dev_find_free_port(void)
416 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
417 /* Using shared name field to find a free port. */
418 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
419 RTE_ASSERT(rte_eth_devices[i].state ==
424 return RTE_MAX_ETHPORTS;
427 static struct rte_eth_dev *
428 eth_dev_get(uint16_t port_id)
430 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
432 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
434 eth_dev_last_created_port = port_id;
440 rte_eth_dev_allocate(const char *name)
443 struct rte_eth_dev *eth_dev = NULL;
445 rte_eth_dev_shared_data_prepare();
447 /* Synchronize port creation between primary and secondary threads. */
448 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
450 if (_rte_eth_dev_allocated(name) != NULL) {
452 "Ethernet device with name %s already allocated\n",
457 port_id = rte_eth_dev_find_free_port();
458 if (port_id == RTE_MAX_ETHPORTS) {
460 "Reached maximum number of Ethernet ports\n");
464 eth_dev = eth_dev_get(port_id);
465 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
466 eth_dev->data->port_id = port_id;
467 eth_dev->data->mtu = ETHER_MTU;
470 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
476 * Attach to a port already registered by the primary process, which
477 * makes sure that the same device would have the same port id both
478 * in the primary and secondary process.
481 rte_eth_dev_attach_secondary(const char *name)
484 struct rte_eth_dev *eth_dev = NULL;
486 rte_eth_dev_shared_data_prepare();
488 /* Synchronize port attachment to primary port creation and release. */
489 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
491 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
492 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
495 if (i == RTE_MAX_ETHPORTS) {
497 "Device %s is not driven by the primary process\n",
500 eth_dev = eth_dev_get(i);
501 RTE_ASSERT(eth_dev->data->port_id == i);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
509 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
514 rte_eth_dev_shared_data_prepare();
516 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
517 _rte_eth_dev_callback_process(eth_dev,
518 RTE_ETH_EVENT_DESTROY, NULL);
520 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
522 eth_dev->state = RTE_ETH_DEV_UNUSED;
524 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
525 rte_free(eth_dev->data->rx_queues);
526 rte_free(eth_dev->data->tx_queues);
527 rte_free(eth_dev->data->mac_addrs);
528 rte_free(eth_dev->data->hash_mac_addrs);
529 rte_free(eth_dev->data->dev_private);
530 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
533 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
539 rte_eth_dev_is_valid_port(uint16_t port_id)
541 if (port_id >= RTE_MAX_ETHPORTS ||
542 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
549 rte_eth_is_valid_owner_id(uint64_t owner_id)
551 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
552 rte_eth_dev_shared_data->next_owner_id <= owner_id)
558 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
560 while (port_id < RTE_MAX_ETHPORTS &&
561 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
562 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
563 rte_eth_devices[port_id].data->owner.id != owner_id))
566 if (port_id >= RTE_MAX_ETHPORTS)
567 return RTE_MAX_ETHPORTS;
572 int __rte_experimental
573 rte_eth_dev_owner_new(uint64_t *owner_id)
575 rte_eth_dev_shared_data_prepare();
577 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
579 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
581 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
586 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
587 const struct rte_eth_dev_owner *new_owner)
589 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
590 struct rte_eth_dev_owner *port_owner;
593 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
594 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
599 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
600 !rte_eth_is_valid_owner_id(old_owner_id)) {
602 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
603 old_owner_id, new_owner->id);
607 port_owner = &rte_eth_devices[port_id].data->owner;
608 if (port_owner->id != old_owner_id) {
610 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
611 port_id, port_owner->name, port_owner->id);
615 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
617 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
618 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
621 port_owner->id = new_owner->id;
623 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
624 port_id, new_owner->name, new_owner->id);
629 int __rte_experimental
630 rte_eth_dev_owner_set(const uint16_t port_id,
631 const struct rte_eth_dev_owner *owner)
635 rte_eth_dev_shared_data_prepare();
637 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
639 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
641 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
645 int __rte_experimental
646 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
648 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
649 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
652 rte_eth_dev_shared_data_prepare();
654 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
656 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
658 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
662 void __rte_experimental
663 rte_eth_dev_owner_delete(const uint64_t owner_id)
667 rte_eth_dev_shared_data_prepare();
669 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
671 if (rte_eth_is_valid_owner_id(owner_id)) {
672 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
673 if (rte_eth_devices[port_id].data->owner.id == owner_id)
674 memset(&rte_eth_devices[port_id].data->owner, 0,
675 sizeof(struct rte_eth_dev_owner));
676 RTE_ETHDEV_LOG(NOTICE,
677 "All port owners owned by %016"PRIx64" identifier have removed\n",
681 "Invalid owner id=%016"PRIx64"\n",
685 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
688 int __rte_experimental
689 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
692 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
694 rte_eth_dev_shared_data_prepare();
696 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
698 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
699 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
703 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
706 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
711 rte_eth_dev_socket_id(uint16_t port_id)
713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
714 return rte_eth_devices[port_id].data->numa_node;
718 rte_eth_dev_get_sec_ctx(uint16_t port_id)
720 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
721 return rte_eth_devices[port_id].security_ctx;
725 rte_eth_dev_count(void)
727 return rte_eth_dev_count_avail();
731 rte_eth_dev_count_avail(void)
738 RTE_ETH_FOREACH_DEV(p)
744 uint16_t __rte_experimental
745 rte_eth_dev_count_total(void)
747 uint16_t port, count = 0;
749 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
750 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
757 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
761 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
764 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
768 /* shouldn't check 'rte_eth_devices[i].data',
769 * because it might be overwritten by VDEV PMD */
770 tmp = rte_eth_dev_shared_data->data[port_id].name;
776 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
781 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
785 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
786 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
787 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
797 eth_err(uint16_t port_id, int ret)
801 if (rte_eth_dev_is_removed(port_id))
807 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
809 uint16_t old_nb_queues = dev->data->nb_rx_queues;
813 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
814 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
815 sizeof(dev->data->rx_queues[0]) * nb_queues,
816 RTE_CACHE_LINE_SIZE);
817 if (dev->data->rx_queues == NULL) {
818 dev->data->nb_rx_queues = 0;
821 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
824 rxq = dev->data->rx_queues;
826 for (i = nb_queues; i < old_nb_queues; i++)
827 (*dev->dev_ops->rx_queue_release)(rxq[i]);
828 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
829 RTE_CACHE_LINE_SIZE);
832 if (nb_queues > old_nb_queues) {
833 uint16_t new_qs = nb_queues - old_nb_queues;
835 memset(rxq + old_nb_queues, 0,
836 sizeof(rxq[0]) * new_qs);
839 dev->data->rx_queues = rxq;
841 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
844 rxq = dev->data->rx_queues;
846 for (i = nb_queues; i < old_nb_queues; i++)
847 (*dev->dev_ops->rx_queue_release)(rxq[i]);
849 rte_free(dev->data->rx_queues);
850 dev->data->rx_queues = NULL;
852 dev->data->nb_rx_queues = nb_queues;
857 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
859 struct rte_eth_dev *dev;
861 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
863 dev = &rte_eth_devices[port_id];
864 if (!dev->data->dev_started) {
866 "Port %u must be started before start any queue\n",
871 if (rx_queue_id >= dev->data->nb_rx_queues) {
872 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
878 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
880 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
881 rx_queue_id, port_id);
885 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
891 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
893 struct rte_eth_dev *dev;
895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
897 dev = &rte_eth_devices[port_id];
898 if (rx_queue_id >= dev->data->nb_rx_queues) {
899 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
903 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
905 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
907 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
908 rx_queue_id, port_id);
912 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
917 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
919 struct rte_eth_dev *dev;
921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
923 dev = &rte_eth_devices[port_id];
924 if (!dev->data->dev_started) {
926 "Port %u must be started before start any queue\n",
931 if (tx_queue_id >= dev->data->nb_tx_queues) {
932 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
936 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
938 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
940 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
941 tx_queue_id, port_id);
945 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
949 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
951 struct rte_eth_dev *dev;
953 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
955 dev = &rte_eth_devices[port_id];
956 if (tx_queue_id >= dev->data->nb_tx_queues) {
957 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
963 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
965 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
966 tx_queue_id, port_id);
970 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
975 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
977 uint16_t old_nb_queues = dev->data->nb_tx_queues;
981 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
982 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
983 sizeof(dev->data->tx_queues[0]) * nb_queues,
984 RTE_CACHE_LINE_SIZE);
985 if (dev->data->tx_queues == NULL) {
986 dev->data->nb_tx_queues = 0;
989 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
992 txq = dev->data->tx_queues;
994 for (i = nb_queues; i < old_nb_queues; i++)
995 (*dev->dev_ops->tx_queue_release)(txq[i]);
996 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
997 RTE_CACHE_LINE_SIZE);
1000 if (nb_queues > old_nb_queues) {
1001 uint16_t new_qs = nb_queues - old_nb_queues;
1003 memset(txq + old_nb_queues, 0,
1004 sizeof(txq[0]) * new_qs);
1007 dev->data->tx_queues = txq;
1009 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1012 txq = dev->data->tx_queues;
1014 for (i = nb_queues; i < old_nb_queues; i++)
1015 (*dev->dev_ops->tx_queue_release)(txq[i]);
1017 rte_free(dev->data->tx_queues);
1018 dev->data->tx_queues = NULL;
1020 dev->data->nb_tx_queues = nb_queues;
1025 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1028 case ETH_SPEED_NUM_10M:
1029 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1030 case ETH_SPEED_NUM_100M:
1031 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1032 case ETH_SPEED_NUM_1G:
1033 return ETH_LINK_SPEED_1G;
1034 case ETH_SPEED_NUM_2_5G:
1035 return ETH_LINK_SPEED_2_5G;
1036 case ETH_SPEED_NUM_5G:
1037 return ETH_LINK_SPEED_5G;
1038 case ETH_SPEED_NUM_10G:
1039 return ETH_LINK_SPEED_10G;
1040 case ETH_SPEED_NUM_20G:
1041 return ETH_LINK_SPEED_20G;
1042 case ETH_SPEED_NUM_25G:
1043 return ETH_LINK_SPEED_25G;
1044 case ETH_SPEED_NUM_40G:
1045 return ETH_LINK_SPEED_40G;
1046 case ETH_SPEED_NUM_50G:
1047 return ETH_LINK_SPEED_50G;
1048 case ETH_SPEED_NUM_56G:
1049 return ETH_LINK_SPEED_56G;
1050 case ETH_SPEED_NUM_100G:
1051 return ETH_LINK_SPEED_100G;
1058 rte_eth_dev_rx_offload_name(uint64_t offload)
1060 const char *name = "UNKNOWN";
1063 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1064 if (offload == rte_rx_offload_names[i].offload) {
1065 name = rte_rx_offload_names[i].name;
1074 rte_eth_dev_tx_offload_name(uint64_t offload)
1076 const char *name = "UNKNOWN";
1079 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1080 if (offload == rte_tx_offload_names[i].offload) {
1081 name = rte_tx_offload_names[i].name;
1090 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1091 const struct rte_eth_conf *dev_conf)
1093 struct rte_eth_dev *dev;
1094 struct rte_eth_dev_info dev_info;
1095 struct rte_eth_conf local_conf = *dev_conf;
1098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1100 dev = &rte_eth_devices[port_id];
1102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1103 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1105 rte_eth_dev_info_get(port_id, &dev_info);
1107 /* If number of queues specified by application for both Rx and Tx is
1108 * zero, use driver preferred values. This cannot be done individually
1109 * as it is valid for either Tx or Rx (but not both) to be zero.
1110 * If driver does not provide any preferred valued, fall back on
1113 if (nb_rx_q == 0 && nb_tx_q == 0) {
1114 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1116 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1117 nb_tx_q = dev_info.default_txportconf.nb_queues;
1119 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1122 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1124 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1125 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1129 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1131 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1132 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1136 if (dev->data->dev_started) {
1138 "Port %u must be stopped to allow configuration\n",
1143 /* Copy the dev_conf parameter into the dev structure */
1144 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1147 * Check that the numbers of RX and TX queues are not greater
1148 * than the maximum number of RX and TX queues supported by the
1149 * configured device.
1151 if (nb_rx_q > dev_info.max_rx_queues) {
1152 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1153 port_id, nb_rx_q, dev_info.max_rx_queues);
1157 if (nb_tx_q > dev_info.max_tx_queues) {
1158 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1159 port_id, nb_tx_q, dev_info.max_tx_queues);
1163 /* Check that the device supports requested interrupts */
1164 if ((dev_conf->intr_conf.lsc == 1) &&
1165 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1166 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1167 dev->device->driver->name);
1170 if ((dev_conf->intr_conf.rmv == 1) &&
1171 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1172 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1173 dev->device->driver->name);
1178 * If jumbo frames are enabled, check that the maximum RX packet
1179 * length is supported by the configured device.
1181 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1182 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1184 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1185 port_id, dev_conf->rxmode.max_rx_pkt_len,
1186 dev_info.max_rx_pktlen);
1188 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1190 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1191 port_id, dev_conf->rxmode.max_rx_pkt_len,
1192 (unsigned)ETHER_MIN_LEN);
1196 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1197 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1198 /* Use default value */
1199 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1203 /* Any requested offloading must be within its device capabilities */
1204 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1205 local_conf.rxmode.offloads) {
1207 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1208 "capabilities 0x%"PRIx64" in %s()\n",
1209 port_id, local_conf.rxmode.offloads,
1210 dev_info.rx_offload_capa,
1214 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1215 local_conf.txmode.offloads) {
1217 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1218 "capabilities 0x%"PRIx64" in %s()\n",
1219 port_id, local_conf.txmode.offloads,
1220 dev_info.tx_offload_capa,
1225 /* Check that device supports requested rss hash functions. */
1226 if ((dev_info.flow_type_rss_offloads |
1227 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1228 dev_info.flow_type_rss_offloads) {
1230 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1231 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1232 dev_info.flow_type_rss_offloads);
1237 * Setup new number of RX/TX queues and reconfigure device.
1239 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1242 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1247 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1250 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1252 rte_eth_dev_rx_queue_config(dev, 0);
1256 diag = (*dev->dev_ops->dev_configure)(dev);
1258 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1260 rte_eth_dev_rx_queue_config(dev, 0);
1261 rte_eth_dev_tx_queue_config(dev, 0);
1262 return eth_err(port_id, diag);
1265 /* Initialize Rx profiling if enabled at compilation time. */
1266 diag = __rte_eth_dev_profile_init(port_id, dev);
1268 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1270 rte_eth_dev_rx_queue_config(dev, 0);
1271 rte_eth_dev_tx_queue_config(dev, 0);
1272 return eth_err(port_id, diag);
1279 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1281 if (dev->data->dev_started) {
1282 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1283 dev->data->port_id);
1287 rte_eth_dev_rx_queue_config(dev, 0);
1288 rte_eth_dev_tx_queue_config(dev, 0);
1290 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1294 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1295 struct rte_eth_dev_info *dev_info)
1297 struct ether_addr *addr;
1302 /* replay MAC address configuration including default MAC */
1303 addr = &dev->data->mac_addrs[0];
1304 if (*dev->dev_ops->mac_addr_set != NULL)
1305 (*dev->dev_ops->mac_addr_set)(dev, addr);
1306 else if (*dev->dev_ops->mac_addr_add != NULL)
1307 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1309 if (*dev->dev_ops->mac_addr_add != NULL) {
1310 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1311 addr = &dev->data->mac_addrs[i];
1313 /* skip zero address */
1314 if (is_zero_ether_addr(addr))
1318 pool_mask = dev->data->mac_pool_sel[i];
1321 if (pool_mask & 1ULL)
1322 (*dev->dev_ops->mac_addr_add)(dev,
1326 } while (pool_mask);
1332 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1333 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1335 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1336 rte_eth_dev_mac_restore(dev, dev_info);
1338 /* replay promiscuous configuration */
1339 if (rte_eth_promiscuous_get(port_id) == 1)
1340 rte_eth_promiscuous_enable(port_id);
1341 else if (rte_eth_promiscuous_get(port_id) == 0)
1342 rte_eth_promiscuous_disable(port_id);
1344 /* replay all multicast configuration */
1345 if (rte_eth_allmulticast_get(port_id) == 1)
1346 rte_eth_allmulticast_enable(port_id);
1347 else if (rte_eth_allmulticast_get(port_id) == 0)
1348 rte_eth_allmulticast_disable(port_id);
1352 rte_eth_dev_start(uint16_t port_id)
1354 struct rte_eth_dev *dev;
1355 struct rte_eth_dev_info dev_info;
1358 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1360 dev = &rte_eth_devices[port_id];
1362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1364 if (dev->data->dev_started != 0) {
1365 RTE_ETHDEV_LOG(INFO,
1366 "Device with port_id=%"PRIu16" already started\n",
1371 rte_eth_dev_info_get(port_id, &dev_info);
1373 /* Lets restore MAC now if device does not support live change */
1374 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1375 rte_eth_dev_mac_restore(dev, &dev_info);
1377 diag = (*dev->dev_ops->dev_start)(dev);
1379 dev->data->dev_started = 1;
1381 return eth_err(port_id, diag);
1383 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1385 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1386 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1387 (*dev->dev_ops->link_update)(dev, 0);
1393 rte_eth_dev_stop(uint16_t port_id)
1395 struct rte_eth_dev *dev;
1397 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1398 dev = &rte_eth_devices[port_id];
1400 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1402 if (dev->data->dev_started == 0) {
1403 RTE_ETHDEV_LOG(INFO,
1404 "Device with port_id=%"PRIu16" already stopped\n",
1409 dev->data->dev_started = 0;
1410 (*dev->dev_ops->dev_stop)(dev);
1414 rte_eth_dev_set_link_up(uint16_t port_id)
1416 struct rte_eth_dev *dev;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1420 dev = &rte_eth_devices[port_id];
1422 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1423 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1427 rte_eth_dev_set_link_down(uint16_t port_id)
1429 struct rte_eth_dev *dev;
1431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1433 dev = &rte_eth_devices[port_id];
1435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1436 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1440 rte_eth_dev_close(uint16_t port_id)
1442 struct rte_eth_dev *dev;
1444 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1445 dev = &rte_eth_devices[port_id];
1447 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1448 dev->data->dev_started = 0;
1449 (*dev->dev_ops->dev_close)(dev);
1451 /* check behaviour flag - temporary for PMD migration */
1452 if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1453 /* new behaviour: send event + reset state + free all data */
1454 rte_eth_dev_release_port(dev);
1457 RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1458 "The driver %s should migrate to the new behaviour.\n",
1459 dev->device->driver->name);
1460 /* old behaviour: only free queue arrays */
1461 dev->data->nb_rx_queues = 0;
1462 rte_free(dev->data->rx_queues);
1463 dev->data->rx_queues = NULL;
1464 dev->data->nb_tx_queues = 0;
1465 rte_free(dev->data->tx_queues);
1466 dev->data->tx_queues = NULL;
1470 rte_eth_dev_reset(uint16_t port_id)
1472 struct rte_eth_dev *dev;
1475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1476 dev = &rte_eth_devices[port_id];
1478 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1480 rte_eth_dev_stop(port_id);
1481 ret = dev->dev_ops->dev_reset(dev);
1483 return eth_err(port_id, ret);
1486 int __rte_experimental
1487 rte_eth_dev_is_removed(uint16_t port_id)
1489 struct rte_eth_dev *dev;
1492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1494 dev = &rte_eth_devices[port_id];
1496 if (dev->state == RTE_ETH_DEV_REMOVED)
1499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1501 ret = dev->dev_ops->is_removed(dev);
1503 /* Device is physically removed. */
1504 dev->state = RTE_ETH_DEV_REMOVED;
1510 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1511 uint16_t nb_rx_desc, unsigned int socket_id,
1512 const struct rte_eth_rxconf *rx_conf,
1513 struct rte_mempool *mp)
1516 uint32_t mbp_buf_size;
1517 struct rte_eth_dev *dev;
1518 struct rte_eth_dev_info dev_info;
1519 struct rte_eth_rxconf local_conf;
1522 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1524 dev = &rte_eth_devices[port_id];
1525 if (rx_queue_id >= dev->data->nb_rx_queues) {
1526 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1530 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1534 * Check the size of the mbuf data buffer.
1535 * This value must be provided in the private data of the memory pool.
1536 * First check that the memory pool has a valid private data.
1538 rte_eth_dev_info_get(port_id, &dev_info);
1539 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1540 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1541 mp->name, (int)mp->private_data_size,
1542 (int)sizeof(struct rte_pktmbuf_pool_private));
1545 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1547 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1549 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1550 mp->name, (int)mbp_buf_size,
1551 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1552 (int)RTE_PKTMBUF_HEADROOM,
1553 (int)dev_info.min_rx_bufsize);
1557 /* Use default specified by driver, if nb_rx_desc is zero */
1558 if (nb_rx_desc == 0) {
1559 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1560 /* If driver default is also zero, fall back on EAL default */
1561 if (nb_rx_desc == 0)
1562 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1565 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1566 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1567 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1570 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1571 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1572 dev_info.rx_desc_lim.nb_min,
1573 dev_info.rx_desc_lim.nb_align);
1577 if (dev->data->dev_started &&
1578 !(dev_info.dev_capa &
1579 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1582 if (dev->data->dev_started &&
1583 (dev->data->rx_queue_state[rx_queue_id] !=
1584 RTE_ETH_QUEUE_STATE_STOPPED))
1587 rxq = dev->data->rx_queues;
1588 if (rxq[rx_queue_id]) {
1589 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1591 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1592 rxq[rx_queue_id] = NULL;
1595 if (rx_conf == NULL)
1596 rx_conf = &dev_info.default_rxconf;
1598 local_conf = *rx_conf;
1601 * If an offloading has already been enabled in
1602 * rte_eth_dev_configure(), it has been enabled on all queues,
1603 * so there is no need to enable it in this queue again.
1604 * The local_conf.offloads input to underlying PMD only carries
1605 * those offloadings which are only enabled on this queue and
1606 * not enabled on all queues.
1608 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1611 * New added offloadings for this queue are those not enabled in
1612 * rte_eth_dev_configure() and they must be per-queue type.
1613 * A pure per-port offloading can't be enabled on a queue while
1614 * disabled on another queue. A pure per-port offloading can't
1615 * be enabled for any queue as new added one if it hasn't been
1616 * enabled in rte_eth_dev_configure().
1618 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1619 local_conf.offloads) {
1621 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1622 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1623 port_id, rx_queue_id, local_conf.offloads,
1624 dev_info.rx_queue_offload_capa,
1629 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1630 socket_id, &local_conf, mp);
1632 if (!dev->data->min_rx_buf_size ||
1633 dev->data->min_rx_buf_size > mbp_buf_size)
1634 dev->data->min_rx_buf_size = mbp_buf_size;
1637 return eth_err(port_id, ret);
1641 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1642 uint16_t nb_tx_desc, unsigned int socket_id,
1643 const struct rte_eth_txconf *tx_conf)
1645 struct rte_eth_dev *dev;
1646 struct rte_eth_dev_info dev_info;
1647 struct rte_eth_txconf local_conf;
1650 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1652 dev = &rte_eth_devices[port_id];
1653 if (tx_queue_id >= dev->data->nb_tx_queues) {
1654 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1658 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1659 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1661 rte_eth_dev_info_get(port_id, &dev_info);
1663 /* Use default specified by driver, if nb_tx_desc is zero */
1664 if (nb_tx_desc == 0) {
1665 nb_tx_desc = dev_info.default_txportconf.ring_size;
1666 /* If driver default is zero, fall back on EAL default */
1667 if (nb_tx_desc == 0)
1668 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1670 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1671 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1672 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1674 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1675 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1676 dev_info.tx_desc_lim.nb_min,
1677 dev_info.tx_desc_lim.nb_align);
1681 if (dev->data->dev_started &&
1682 !(dev_info.dev_capa &
1683 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1686 if (dev->data->dev_started &&
1687 (dev->data->tx_queue_state[tx_queue_id] !=
1688 RTE_ETH_QUEUE_STATE_STOPPED))
1691 txq = dev->data->tx_queues;
1692 if (txq[tx_queue_id]) {
1693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1695 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1696 txq[tx_queue_id] = NULL;
1699 if (tx_conf == NULL)
1700 tx_conf = &dev_info.default_txconf;
1702 local_conf = *tx_conf;
1705 * If an offloading has already been enabled in
1706 * rte_eth_dev_configure(), it has been enabled on all queues,
1707 * so there is no need to enable it in this queue again.
1708 * The local_conf.offloads input to underlying PMD only carries
1709 * those offloadings which are only enabled on this queue and
1710 * not enabled on all queues.
1712 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1715 * New added offloadings for this queue are those not enabled in
1716 * rte_eth_dev_configure() and they must be per-queue type.
1717 * A pure per-port offloading can't be enabled on a queue while
1718 * disabled on another queue. A pure per-port offloading can't
1719 * be enabled for any queue as new added one if it hasn't been
1720 * enabled in rte_eth_dev_configure().
1722 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1723 local_conf.offloads) {
1725 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1726 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1727 port_id, tx_queue_id, local_conf.offloads,
1728 dev_info.tx_queue_offload_capa,
1733 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1734 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1738 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1739 void *userdata __rte_unused)
1743 for (i = 0; i < unsent; i++)
1744 rte_pktmbuf_free(pkts[i]);
1748 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1751 uint64_t *count = userdata;
1754 for (i = 0; i < unsent; i++)
1755 rte_pktmbuf_free(pkts[i]);
1761 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1762 buffer_tx_error_fn cbfn, void *userdata)
1764 buffer->error_callback = cbfn;
1765 buffer->error_userdata = userdata;
1770 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1777 buffer->size = size;
1778 if (buffer->error_callback == NULL) {
1779 ret = rte_eth_tx_buffer_set_err_callback(
1780 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1787 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1789 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1792 /* Validate Input Data. Bail if not valid or not supported. */
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1796 /* Call driver to free pending mbufs. */
1797 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1799 return eth_err(port_id, ret);
1803 rte_eth_promiscuous_enable(uint16_t port_id)
1805 struct rte_eth_dev *dev;
1807 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1808 dev = &rte_eth_devices[port_id];
1810 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1811 (*dev->dev_ops->promiscuous_enable)(dev);
1812 dev->data->promiscuous = 1;
1816 rte_eth_promiscuous_disable(uint16_t port_id)
1818 struct rte_eth_dev *dev;
1820 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1821 dev = &rte_eth_devices[port_id];
1823 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1824 dev->data->promiscuous = 0;
1825 (*dev->dev_ops->promiscuous_disable)(dev);
1829 rte_eth_promiscuous_get(uint16_t port_id)
1831 struct rte_eth_dev *dev;
1833 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1835 dev = &rte_eth_devices[port_id];
1836 return dev->data->promiscuous;
1840 rte_eth_allmulticast_enable(uint16_t port_id)
1842 struct rte_eth_dev *dev;
1844 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1845 dev = &rte_eth_devices[port_id];
1847 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1848 (*dev->dev_ops->allmulticast_enable)(dev);
1849 dev->data->all_multicast = 1;
1853 rte_eth_allmulticast_disable(uint16_t port_id)
1855 struct rte_eth_dev *dev;
1857 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1858 dev = &rte_eth_devices[port_id];
1860 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1861 dev->data->all_multicast = 0;
1862 (*dev->dev_ops->allmulticast_disable)(dev);
1866 rte_eth_allmulticast_get(uint16_t port_id)
1868 struct rte_eth_dev *dev;
1870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1872 dev = &rte_eth_devices[port_id];
1873 return dev->data->all_multicast;
1877 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1879 struct rte_eth_dev *dev;
1881 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1882 dev = &rte_eth_devices[port_id];
1884 if (dev->data->dev_conf.intr_conf.lsc &&
1885 dev->data->dev_started)
1886 rte_eth_linkstatus_get(dev, eth_link);
1888 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1889 (*dev->dev_ops->link_update)(dev, 1);
1890 *eth_link = dev->data->dev_link;
1895 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1897 struct rte_eth_dev *dev;
1899 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1900 dev = &rte_eth_devices[port_id];
1902 if (dev->data->dev_conf.intr_conf.lsc &&
1903 dev->data->dev_started)
1904 rte_eth_linkstatus_get(dev, eth_link);
1906 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1907 (*dev->dev_ops->link_update)(dev, 0);
1908 *eth_link = dev->data->dev_link;
1913 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1915 struct rte_eth_dev *dev;
1917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1919 dev = &rte_eth_devices[port_id];
1920 memset(stats, 0, sizeof(*stats));
1922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1923 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1924 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1928 rte_eth_stats_reset(uint16_t port_id)
1930 struct rte_eth_dev *dev;
1932 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1933 dev = &rte_eth_devices[port_id];
1935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1936 (*dev->dev_ops->stats_reset)(dev);
1937 dev->data->rx_mbuf_alloc_failed = 0;
1943 get_xstats_basic_count(struct rte_eth_dev *dev)
1945 uint16_t nb_rxqs, nb_txqs;
1948 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1949 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1951 count = RTE_NB_STATS;
1952 count += nb_rxqs * RTE_NB_RXQ_STATS;
1953 count += nb_txqs * RTE_NB_TXQ_STATS;
1959 get_xstats_count(uint16_t port_id)
1961 struct rte_eth_dev *dev;
1964 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1965 dev = &rte_eth_devices[port_id];
1966 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1967 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1970 return eth_err(port_id, count);
1972 if (dev->dev_ops->xstats_get_names != NULL) {
1973 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1975 return eth_err(port_id, count);
1980 count += get_xstats_basic_count(dev);
1986 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1989 int cnt_xstats, idx_xstat;
1991 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1994 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1999 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2004 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2005 if (cnt_xstats < 0) {
2006 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2010 /* Get id-name lookup table */
2011 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2013 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2014 port_id, xstats_names, cnt_xstats, NULL)) {
2015 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2019 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2020 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2029 /* retrieve basic stats names */
2031 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2032 struct rte_eth_xstat_name *xstats_names)
2034 int cnt_used_entries = 0;
2035 uint32_t idx, id_queue;
2038 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2039 snprintf(xstats_names[cnt_used_entries].name,
2040 sizeof(xstats_names[0].name),
2041 "%s", rte_stats_strings[idx].name);
2044 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2045 for (id_queue = 0; id_queue < num_q; id_queue++) {
2046 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2047 snprintf(xstats_names[cnt_used_entries].name,
2048 sizeof(xstats_names[0].name),
2050 id_queue, rte_rxq_stats_strings[idx].name);
2055 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2056 for (id_queue = 0; id_queue < num_q; id_queue++) {
2057 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2058 snprintf(xstats_names[cnt_used_entries].name,
2059 sizeof(xstats_names[0].name),
2061 id_queue, rte_txq_stats_strings[idx].name);
2065 return cnt_used_entries;
2068 /* retrieve ethdev extended statistics names */
2070 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2071 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2074 struct rte_eth_xstat_name *xstats_names_copy;
2075 unsigned int no_basic_stat_requested = 1;
2076 unsigned int no_ext_stat_requested = 1;
2077 unsigned int expected_entries;
2078 unsigned int basic_count;
2079 struct rte_eth_dev *dev;
2083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2084 dev = &rte_eth_devices[port_id];
2086 basic_count = get_xstats_basic_count(dev);
2087 ret = get_xstats_count(port_id);
2090 expected_entries = (unsigned int)ret;
2092 /* Return max number of stats if no ids given */
2095 return expected_entries;
2096 else if (xstats_names && size < expected_entries)
2097 return expected_entries;
2100 if (ids && !xstats_names)
2103 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2104 uint64_t ids_copy[size];
2106 for (i = 0; i < size; i++) {
2107 if (ids[i] < basic_count) {
2108 no_basic_stat_requested = 0;
2113 * Convert ids to xstats ids that PMD knows.
2114 * ids known by user are basic + extended stats.
2116 ids_copy[i] = ids[i] - basic_count;
2119 if (no_basic_stat_requested)
2120 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2121 xstats_names, ids_copy, size);
2124 /* Retrieve all stats */
2126 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2128 if (num_stats < 0 || num_stats > (int)expected_entries)
2131 return expected_entries;
2134 xstats_names_copy = calloc(expected_entries,
2135 sizeof(struct rte_eth_xstat_name));
2137 if (!xstats_names_copy) {
2138 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2143 for (i = 0; i < size; i++) {
2144 if (ids[i] >= basic_count) {
2145 no_ext_stat_requested = 0;
2151 /* Fill xstats_names_copy structure */
2152 if (ids && no_ext_stat_requested) {
2153 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2155 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2158 free(xstats_names_copy);
2164 for (i = 0; i < size; i++) {
2165 if (ids[i] >= expected_entries) {
2166 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2167 free(xstats_names_copy);
2170 xstats_names[i] = xstats_names_copy[ids[i]];
2173 free(xstats_names_copy);
2178 rte_eth_xstats_get_names(uint16_t port_id,
2179 struct rte_eth_xstat_name *xstats_names,
2182 struct rte_eth_dev *dev;
2183 int cnt_used_entries;
2184 int cnt_expected_entries;
2185 int cnt_driver_entries;
2187 cnt_expected_entries = get_xstats_count(port_id);
2188 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2189 (int)size < cnt_expected_entries)
2190 return cnt_expected_entries;
2192 /* port_id checked in get_xstats_count() */
2193 dev = &rte_eth_devices[port_id];
2195 cnt_used_entries = rte_eth_basic_stats_get_names(
2198 if (dev->dev_ops->xstats_get_names != NULL) {
2199 /* If there are any driver-specific xstats, append them
2202 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2204 xstats_names + cnt_used_entries,
2205 size - cnt_used_entries);
2206 if (cnt_driver_entries < 0)
2207 return eth_err(port_id, cnt_driver_entries);
2208 cnt_used_entries += cnt_driver_entries;
2211 return cnt_used_entries;
2216 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2218 struct rte_eth_dev *dev;
2219 struct rte_eth_stats eth_stats;
2220 unsigned int count = 0, i, q;
2221 uint64_t val, *stats_ptr;
2222 uint16_t nb_rxqs, nb_txqs;
2225 ret = rte_eth_stats_get(port_id, ð_stats);
2229 dev = &rte_eth_devices[port_id];
2231 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2232 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2235 for (i = 0; i < RTE_NB_STATS; i++) {
2236 stats_ptr = RTE_PTR_ADD(ð_stats,
2237 rte_stats_strings[i].offset);
2239 xstats[count++].value = val;
2243 for (q = 0; q < nb_rxqs; q++) {
2244 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2245 stats_ptr = RTE_PTR_ADD(ð_stats,
2246 rte_rxq_stats_strings[i].offset +
2247 q * sizeof(uint64_t));
2249 xstats[count++].value = val;
2254 for (q = 0; q < nb_txqs; q++) {
2255 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2256 stats_ptr = RTE_PTR_ADD(ð_stats,
2257 rte_txq_stats_strings[i].offset +
2258 q * sizeof(uint64_t));
2260 xstats[count++].value = val;
2266 /* retrieve ethdev extended statistics */
2268 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2269 uint64_t *values, unsigned int size)
2271 unsigned int no_basic_stat_requested = 1;
2272 unsigned int no_ext_stat_requested = 1;
2273 unsigned int num_xstats_filled;
2274 unsigned int basic_count;
2275 uint16_t expected_entries;
2276 struct rte_eth_dev *dev;
2280 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2281 ret = get_xstats_count(port_id);
2284 expected_entries = (uint16_t)ret;
2285 struct rte_eth_xstat xstats[expected_entries];
2286 dev = &rte_eth_devices[port_id];
2287 basic_count = get_xstats_basic_count(dev);
2289 /* Return max number of stats if no ids given */
2292 return expected_entries;
2293 else if (values && size < expected_entries)
2294 return expected_entries;
2300 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2301 unsigned int basic_count = get_xstats_basic_count(dev);
2302 uint64_t ids_copy[size];
2304 for (i = 0; i < size; i++) {
2305 if (ids[i] < basic_count) {
2306 no_basic_stat_requested = 0;
2311 * Convert ids to xstats ids that PMD knows.
2312 * ids known by user are basic + extended stats.
2314 ids_copy[i] = ids[i] - basic_count;
2317 if (no_basic_stat_requested)
2318 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2323 for (i = 0; i < size; i++) {
2324 if (ids[i] >= basic_count) {
2325 no_ext_stat_requested = 0;
2331 /* Fill the xstats structure */
2332 if (ids && no_ext_stat_requested)
2333 ret = rte_eth_basic_stats_get(port_id, xstats);
2335 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2339 num_xstats_filled = (unsigned int)ret;
2341 /* Return all stats */
2343 for (i = 0; i < num_xstats_filled; i++)
2344 values[i] = xstats[i].value;
2345 return expected_entries;
2349 for (i = 0; i < size; i++) {
2350 if (ids[i] >= expected_entries) {
2351 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2354 values[i] = xstats[ids[i]].value;
2360 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2363 struct rte_eth_dev *dev;
2364 unsigned int count = 0, i;
2365 signed int xcount = 0;
2366 uint16_t nb_rxqs, nb_txqs;
2369 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2371 dev = &rte_eth_devices[port_id];
2373 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2374 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2376 /* Return generic statistics */
2377 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2378 (nb_txqs * RTE_NB_TXQ_STATS);
2380 /* implemented by the driver */
2381 if (dev->dev_ops->xstats_get != NULL) {
2382 /* Retrieve the xstats from the driver at the end of the
2385 xcount = (*dev->dev_ops->xstats_get)(dev,
2386 xstats ? xstats + count : NULL,
2387 (n > count) ? n - count : 0);
2390 return eth_err(port_id, xcount);
2393 if (n < count + xcount || xstats == NULL)
2394 return count + xcount;
2396 /* now fill the xstats structure */
2397 ret = rte_eth_basic_stats_get(port_id, xstats);
2402 for (i = 0; i < count; i++)
2404 /* add an offset to driver-specific stats */
2405 for ( ; i < count + xcount; i++)
2406 xstats[i].id += count;
2408 return count + xcount;
2411 /* reset ethdev extended statistics */
2413 rte_eth_xstats_reset(uint16_t port_id)
2415 struct rte_eth_dev *dev;
2417 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2418 dev = &rte_eth_devices[port_id];
2420 /* implemented by the driver */
2421 if (dev->dev_ops->xstats_reset != NULL) {
2422 (*dev->dev_ops->xstats_reset)(dev);
2426 /* fallback to default */
2427 rte_eth_stats_reset(port_id);
2431 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2434 struct rte_eth_dev *dev;
2436 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2438 dev = &rte_eth_devices[port_id];
2440 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2442 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2445 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2448 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2451 return (*dev->dev_ops->queue_stats_mapping_set)
2452 (dev, queue_id, stat_idx, is_rx);
2457 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2460 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2461 stat_idx, STAT_QMAP_TX));
2466 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2469 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2470 stat_idx, STAT_QMAP_RX));
2474 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2476 struct rte_eth_dev *dev;
2478 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2479 dev = &rte_eth_devices[port_id];
2481 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2482 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2483 fw_version, fw_size));
2487 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2489 struct rte_eth_dev *dev;
2490 const struct rte_eth_desc_lim lim = {
2491 .nb_max = UINT16_MAX,
2496 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2497 dev = &rte_eth_devices[port_id];
2499 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2500 dev_info->rx_desc_lim = lim;
2501 dev_info->tx_desc_lim = lim;
2502 dev_info->device = dev->device;
2504 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2505 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2506 dev_info->driver_name = dev->device->driver->name;
2507 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2508 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2510 dev_info->dev_flags = &dev->data->dev_flags;
2514 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2515 uint32_t *ptypes, int num)
2518 struct rte_eth_dev *dev;
2519 const uint32_t *all_ptypes;
2521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2522 dev = &rte_eth_devices[port_id];
2523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2524 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2529 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2530 if (all_ptypes[i] & ptype_mask) {
2532 ptypes[j] = all_ptypes[i];
2540 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2542 struct rte_eth_dev *dev;
2544 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2545 dev = &rte_eth_devices[port_id];
2546 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2551 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2553 struct rte_eth_dev *dev;
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2557 dev = &rte_eth_devices[port_id];
2558 *mtu = dev->data->mtu;
2563 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2566 struct rte_eth_dev *dev;
2568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2569 dev = &rte_eth_devices[port_id];
2570 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2572 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2574 dev->data->mtu = mtu;
2576 return eth_err(port_id, ret);
2580 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2582 struct rte_eth_dev *dev;
2585 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2586 dev = &rte_eth_devices[port_id];
2587 if (!(dev->data->dev_conf.rxmode.offloads &
2588 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2589 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2594 if (vlan_id > 4095) {
2595 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2599 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2601 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2603 struct rte_vlan_filter_conf *vfc;
2607 vfc = &dev->data->vlan_filter_conf;
2608 vidx = vlan_id / 64;
2609 vbit = vlan_id % 64;
2612 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2614 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2617 return eth_err(port_id, ret);
2621 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2624 struct rte_eth_dev *dev;
2626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2627 dev = &rte_eth_devices[port_id];
2628 if (rx_queue_id >= dev->data->nb_rx_queues) {
2629 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2634 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2640 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2641 enum rte_vlan_type vlan_type,
2644 struct rte_eth_dev *dev;
2646 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2647 dev = &rte_eth_devices[port_id];
2648 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2650 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2655 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2657 struct rte_eth_dev *dev;
2661 uint64_t orig_offloads;
2663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2664 dev = &rte_eth_devices[port_id];
2666 /* save original values in case of failure */
2667 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2669 /*check which option changed by application*/
2670 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2671 org = !!(dev->data->dev_conf.rxmode.offloads &
2672 DEV_RX_OFFLOAD_VLAN_STRIP);
2675 dev->data->dev_conf.rxmode.offloads |=
2676 DEV_RX_OFFLOAD_VLAN_STRIP;
2678 dev->data->dev_conf.rxmode.offloads &=
2679 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2680 mask |= ETH_VLAN_STRIP_MASK;
2683 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2684 org = !!(dev->data->dev_conf.rxmode.offloads &
2685 DEV_RX_OFFLOAD_VLAN_FILTER);
2688 dev->data->dev_conf.rxmode.offloads |=
2689 DEV_RX_OFFLOAD_VLAN_FILTER;
2691 dev->data->dev_conf.rxmode.offloads &=
2692 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2693 mask |= ETH_VLAN_FILTER_MASK;
2696 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2697 org = !!(dev->data->dev_conf.rxmode.offloads &
2698 DEV_RX_OFFLOAD_VLAN_EXTEND);
2701 dev->data->dev_conf.rxmode.offloads |=
2702 DEV_RX_OFFLOAD_VLAN_EXTEND;
2704 dev->data->dev_conf.rxmode.offloads &=
2705 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2706 mask |= ETH_VLAN_EXTEND_MASK;
2713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2714 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2716 /* hit an error restore original values */
2717 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2720 return eth_err(port_id, ret);
2724 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2726 struct rte_eth_dev *dev;
2729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2730 dev = &rte_eth_devices[port_id];
2732 if (dev->data->dev_conf.rxmode.offloads &
2733 DEV_RX_OFFLOAD_VLAN_STRIP)
2734 ret |= ETH_VLAN_STRIP_OFFLOAD;
2736 if (dev->data->dev_conf.rxmode.offloads &
2737 DEV_RX_OFFLOAD_VLAN_FILTER)
2738 ret |= ETH_VLAN_FILTER_OFFLOAD;
2740 if (dev->data->dev_conf.rxmode.offloads &
2741 DEV_RX_OFFLOAD_VLAN_EXTEND)
2742 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2748 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2750 struct rte_eth_dev *dev;
2752 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2753 dev = &rte_eth_devices[port_id];
2754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2756 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2760 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2766 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2767 memset(fc_conf, 0, sizeof(*fc_conf));
2768 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2772 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2774 struct rte_eth_dev *dev;
2776 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2777 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2778 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2782 dev = &rte_eth_devices[port_id];
2783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2784 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2788 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2789 struct rte_eth_pfc_conf *pfc_conf)
2791 struct rte_eth_dev *dev;
2793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2795 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2799 dev = &rte_eth_devices[port_id];
2800 /* High water, low water validation are device specific */
2801 if (*dev->dev_ops->priority_flow_ctrl_set)
2802 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2808 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2816 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2817 for (i = 0; i < num; i++) {
2818 if (reta_conf[i].mask)
2826 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2830 uint16_t i, idx, shift;
2836 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2840 for (i = 0; i < reta_size; i++) {
2841 idx = i / RTE_RETA_GROUP_SIZE;
2842 shift = i % RTE_RETA_GROUP_SIZE;
2843 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2844 (reta_conf[idx].reta[shift] >= max_rxq)) {
2846 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2848 reta_conf[idx].reta[shift], max_rxq);
2857 rte_eth_dev_rss_reta_update(uint16_t port_id,
2858 struct rte_eth_rss_reta_entry64 *reta_conf,
2861 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 /* Check mask bits */
2866 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2870 dev = &rte_eth_devices[port_id];
2872 /* Check entry value */
2873 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2874 dev->data->nb_rx_queues);
2878 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2879 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2884 rte_eth_dev_rss_reta_query(uint16_t port_id,
2885 struct rte_eth_rss_reta_entry64 *reta_conf,
2888 struct rte_eth_dev *dev;
2891 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2893 /* Check mask bits */
2894 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2898 dev = &rte_eth_devices[port_id];
2899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2900 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2905 rte_eth_dev_rss_hash_update(uint16_t port_id,
2906 struct rte_eth_rss_conf *rss_conf)
2908 struct rte_eth_dev *dev;
2909 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2911 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2912 dev = &rte_eth_devices[port_id];
2913 rte_eth_dev_info_get(port_id, &dev_info);
2914 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2915 dev_info.flow_type_rss_offloads) {
2917 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2918 port_id, rss_conf->rss_hf,
2919 dev_info.flow_type_rss_offloads);
2922 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2923 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2928 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2929 struct rte_eth_rss_conf *rss_conf)
2931 struct rte_eth_dev *dev;
2933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2934 dev = &rte_eth_devices[port_id];
2935 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2936 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2941 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2942 struct rte_eth_udp_tunnel *udp_tunnel)
2944 struct rte_eth_dev *dev;
2946 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2947 if (udp_tunnel == NULL) {
2948 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2952 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2953 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2957 dev = &rte_eth_devices[port_id];
2958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2959 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2964 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2965 struct rte_eth_udp_tunnel *udp_tunnel)
2967 struct rte_eth_dev *dev;
2969 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2970 dev = &rte_eth_devices[port_id];
2972 if (udp_tunnel == NULL) {
2973 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2977 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2978 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2983 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2988 rte_eth_led_on(uint16_t port_id)
2990 struct rte_eth_dev *dev;
2992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2993 dev = &rte_eth_devices[port_id];
2994 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2995 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2999 rte_eth_led_off(uint16_t port_id)
3001 struct rte_eth_dev *dev;
3003 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3004 dev = &rte_eth_devices[port_id];
3005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3006 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3010 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3014 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3016 struct rte_eth_dev_info dev_info;
3017 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3021 rte_eth_dev_info_get(port_id, &dev_info);
3023 for (i = 0; i < dev_info.max_mac_addrs; i++)
3024 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
3030 static const struct ether_addr null_mac_addr;
3033 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
3036 struct rte_eth_dev *dev;
3041 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3042 dev = &rte_eth_devices[port_id];
3043 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3045 if (is_zero_ether_addr(addr)) {
3046 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3050 if (pool >= ETH_64_POOLS) {
3051 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3055 index = get_mac_addr_index(port_id, addr);
3057 index = get_mac_addr_index(port_id, &null_mac_addr);
3059 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3064 pool_mask = dev->data->mac_pool_sel[index];
3066 /* Check if both MAC address and pool is already there, and do nothing */
3067 if (pool_mask & (1ULL << pool))
3072 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3075 /* Update address in NIC data structure */
3076 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3078 /* Update pool bitmap in NIC data structure */
3079 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3082 return eth_err(port_id, ret);
3086 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3088 struct rte_eth_dev *dev;
3091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3092 dev = &rte_eth_devices[port_id];
3093 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3095 index = get_mac_addr_index(port_id, addr);
3098 "Port %u: Cannot remove default MAC address\n",
3101 } else if (index < 0)
3102 return 0; /* Do nothing if address wasn't found */
3105 (*dev->dev_ops->mac_addr_remove)(dev, index);
3107 /* Update address in NIC data structure */
3108 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3110 /* reset pool bitmap */
3111 dev->data->mac_pool_sel[index] = 0;
3117 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3119 struct rte_eth_dev *dev;
3122 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3124 if (!is_valid_assigned_ether_addr(addr))
3127 dev = &rte_eth_devices[port_id];
3128 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3130 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3134 /* Update default address in NIC data structure */
3135 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3142 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3146 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3148 struct rte_eth_dev_info dev_info;
3149 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3152 rte_eth_dev_info_get(port_id, &dev_info);
3153 if (!dev->data->hash_mac_addrs)
3156 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3157 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3158 ETHER_ADDR_LEN) == 0)
3165 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3170 struct rte_eth_dev *dev;
3172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174 dev = &rte_eth_devices[port_id];
3175 if (is_zero_ether_addr(addr)) {
3176 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3181 index = get_hash_mac_addr_index(port_id, addr);
3182 /* Check if it's already there, and do nothing */
3183 if ((index >= 0) && on)
3189 "Port %u: the MAC address was not set in UTA\n",
3194 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3196 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3203 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3205 /* Update address in NIC data structure */
3207 ether_addr_copy(addr,
3208 &dev->data->hash_mac_addrs[index]);
3210 ether_addr_copy(&null_mac_addr,
3211 &dev->data->hash_mac_addrs[index]);
3214 return eth_err(port_id, ret);
3218 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3220 struct rte_eth_dev *dev;
3222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3224 dev = &rte_eth_devices[port_id];
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3227 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3231 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3234 struct rte_eth_dev *dev;
3235 struct rte_eth_dev_info dev_info;
3236 struct rte_eth_link link;
3238 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3240 dev = &rte_eth_devices[port_id];
3241 rte_eth_dev_info_get(port_id, &dev_info);
3242 link = dev->data->dev_link;
3244 if (queue_idx > dev_info.max_tx_queues) {
3246 "Set queue rate limit:port %u: invalid queue id=%u\n",
3247 port_id, queue_idx);
3251 if (tx_rate > link.link_speed) {
3253 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3254 tx_rate, link.link_speed);
3258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3259 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3260 queue_idx, tx_rate));
3264 rte_eth_mirror_rule_set(uint16_t port_id,
3265 struct rte_eth_mirror_conf *mirror_conf,
3266 uint8_t rule_id, uint8_t on)
3268 struct rte_eth_dev *dev;
3270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3271 if (mirror_conf->rule_type == 0) {
3272 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3276 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3277 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3282 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3283 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3284 (mirror_conf->pool_mask == 0)) {
3286 "Invalid mirror pool, pool mask can not be 0\n");
3290 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3291 mirror_conf->vlan.vlan_mask == 0) {
3293 "Invalid vlan mask, vlan mask can not be 0\n");
3297 dev = &rte_eth_devices[port_id];
3298 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3300 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3301 mirror_conf, rule_id, on));
3305 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3307 struct rte_eth_dev *dev;
3309 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3311 dev = &rte_eth_devices[port_id];
3312 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3314 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3318 RTE_INIT(eth_dev_init_cb_lists)
3322 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3323 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3327 rte_eth_dev_callback_register(uint16_t port_id,
3328 enum rte_eth_event_type event,
3329 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3331 struct rte_eth_dev *dev;
3332 struct rte_eth_dev_callback *user_cb;
3333 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3339 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3340 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3344 if (port_id == RTE_ETH_ALL) {
3346 last_port = RTE_MAX_ETHPORTS - 1;
3348 next_port = last_port = port_id;
3351 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3354 dev = &rte_eth_devices[next_port];
3356 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3357 if (user_cb->cb_fn == cb_fn &&
3358 user_cb->cb_arg == cb_arg &&
3359 user_cb->event == event) {
3364 /* create a new callback. */
3365 if (user_cb == NULL) {
3366 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3367 sizeof(struct rte_eth_dev_callback), 0);
3368 if (user_cb != NULL) {
3369 user_cb->cb_fn = cb_fn;
3370 user_cb->cb_arg = cb_arg;
3371 user_cb->event = event;
3372 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3375 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3376 rte_eth_dev_callback_unregister(port_id, event,
3382 } while (++next_port <= last_port);
3384 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3389 rte_eth_dev_callback_unregister(uint16_t port_id,
3390 enum rte_eth_event_type event,
3391 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3394 struct rte_eth_dev *dev;
3395 struct rte_eth_dev_callback *cb, *next;
3396 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3402 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3403 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3407 if (port_id == RTE_ETH_ALL) {
3409 last_port = RTE_MAX_ETHPORTS - 1;
3411 next_port = last_port = port_id;
3414 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3417 dev = &rte_eth_devices[next_port];
3419 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3422 next = TAILQ_NEXT(cb, next);
3424 if (cb->cb_fn != cb_fn || cb->event != event ||
3425 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3429 * if this callback is not executing right now,
3432 if (cb->active == 0) {
3433 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3439 } while (++next_port <= last_port);
3441 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3446 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3447 enum rte_eth_event_type event, void *ret_param)
3449 struct rte_eth_dev_callback *cb_lst;
3450 struct rte_eth_dev_callback dev_cb;
3453 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3454 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3455 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3459 if (ret_param != NULL)
3460 dev_cb.ret_param = ret_param;
3462 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3463 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3464 dev_cb.cb_arg, dev_cb.ret_param);
3465 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3468 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3473 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3478 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3480 dev->state = RTE_ETH_DEV_ATTACHED;
3484 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3487 struct rte_eth_dev *dev;
3488 struct rte_intr_handle *intr_handle;
3492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3494 dev = &rte_eth_devices[port_id];
3496 if (!dev->intr_handle) {
3497 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3501 intr_handle = dev->intr_handle;
3502 if (!intr_handle->intr_vec) {
3503 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3507 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3508 vec = intr_handle->intr_vec[qid];
3509 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3510 if (rc && rc != -EEXIST) {
3512 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3513 port_id, qid, op, epfd, vec);
3520 int __rte_experimental
3521 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
3523 struct rte_intr_handle *intr_handle;
3524 struct rte_eth_dev *dev;
3525 unsigned int efd_idx;
3529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
3531 dev = &rte_eth_devices[port_id];
3533 if (queue_id >= dev->data->nb_rx_queues) {
3534 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3538 if (!dev->intr_handle) {
3539 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3543 intr_handle = dev->intr_handle;
3544 if (!intr_handle->intr_vec) {
3545 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3549 vec = intr_handle->intr_vec[queue_id];
3550 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
3551 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
3552 fd = intr_handle->efds[efd_idx];
3557 const struct rte_memzone *
3558 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3559 uint16_t queue_id, size_t size, unsigned align,
3562 char z_name[RTE_MEMZONE_NAMESIZE];
3563 const struct rte_memzone *mz;
3565 snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
3566 dev->data->port_id, queue_id, ring_name);
3568 mz = rte_memzone_lookup(z_name);
3572 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3573 RTE_MEMZONE_IOVA_CONTIG, align);
3576 int __rte_experimental
3577 rte_eth_dev_create(struct rte_device *device, const char *name,
3578 size_t priv_data_size,
3579 ethdev_bus_specific_init ethdev_bus_specific_init,
3580 void *bus_init_params,
3581 ethdev_init_t ethdev_init, void *init_params)
3583 struct rte_eth_dev *ethdev;
3586 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3588 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3589 ethdev = rte_eth_dev_allocate(name);
3593 if (priv_data_size) {
3594 ethdev->data->dev_private = rte_zmalloc_socket(
3595 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3598 if (!ethdev->data->dev_private) {
3599 RTE_LOG(ERR, EAL, "failed to allocate private data");
3605 ethdev = rte_eth_dev_attach_secondary(name);
3607 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3608 "ethdev doesn't exist");
3613 ethdev->device = device;
3615 if (ethdev_bus_specific_init) {
3616 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3619 "ethdev bus specific initialisation failed");
3624 retval = ethdev_init(ethdev, init_params);
3626 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3630 rte_eth_dev_probing_finish(ethdev);
3635 rte_eth_dev_release_port(ethdev);
3639 int __rte_experimental
3640 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3641 ethdev_uninit_t ethdev_uninit)
3645 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3649 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3651 ret = ethdev_uninit(ethdev);
3655 return rte_eth_dev_release_port(ethdev);
3659 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3660 int epfd, int op, void *data)
3663 struct rte_eth_dev *dev;
3664 struct rte_intr_handle *intr_handle;
3667 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3669 dev = &rte_eth_devices[port_id];
3670 if (queue_id >= dev->data->nb_rx_queues) {
3671 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3675 if (!dev->intr_handle) {
3676 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3680 intr_handle = dev->intr_handle;
3681 if (!intr_handle->intr_vec) {
3682 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3686 vec = intr_handle->intr_vec[queue_id];
3687 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3688 if (rc && rc != -EEXIST) {
3690 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3691 port_id, queue_id, op, epfd, vec);
3699 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3702 struct rte_eth_dev *dev;
3704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3706 dev = &rte_eth_devices[port_id];
3708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3709 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3714 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3717 struct rte_eth_dev *dev;
3719 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3721 dev = &rte_eth_devices[port_id];
3723 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3724 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3730 rte_eth_dev_filter_supported(uint16_t port_id,
3731 enum rte_filter_type filter_type)
3733 struct rte_eth_dev *dev;
3735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3737 dev = &rte_eth_devices[port_id];
3738 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3739 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3740 RTE_ETH_FILTER_NOP, NULL);
3744 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3745 enum rte_filter_op filter_op, void *arg)
3747 struct rte_eth_dev *dev;
3749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3751 dev = &rte_eth_devices[port_id];
3752 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3753 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3757 const struct rte_eth_rxtx_callback *
3758 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3759 rte_rx_callback_fn fn, void *user_param)
3761 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3762 rte_errno = ENOTSUP;
3765 /* check input parameters */
3766 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3767 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3771 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3779 cb->param = user_param;
3781 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3782 /* Add the callbacks in fifo order. */
3783 struct rte_eth_rxtx_callback *tail =
3784 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3787 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3794 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3799 const struct rte_eth_rxtx_callback *
3800 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3801 rte_rx_callback_fn fn, void *user_param)
3803 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3804 rte_errno = ENOTSUP;
3807 /* check input parameters */
3808 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3809 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3814 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3822 cb->param = user_param;
3824 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3825 /* Add the callbacks at fisrt position*/
3826 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3828 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3829 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3834 const struct rte_eth_rxtx_callback *
3835 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3836 rte_tx_callback_fn fn, void *user_param)
3838 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3839 rte_errno = ENOTSUP;
3842 /* check input parameters */
3843 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3844 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3849 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3857 cb->param = user_param;
3859 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3860 /* Add the callbacks in fifo order. */
3861 struct rte_eth_rxtx_callback *tail =
3862 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3865 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3872 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3878 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3879 const struct rte_eth_rxtx_callback *user_cb)
3881 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3884 /* Check input parameters. */
3885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3886 if (user_cb == NULL ||
3887 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3890 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3891 struct rte_eth_rxtx_callback *cb;
3892 struct rte_eth_rxtx_callback **prev_cb;
3895 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3896 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3897 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3899 if (cb == user_cb) {
3900 /* Remove the user cb from the callback list. */
3901 *prev_cb = cb->next;
3906 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3912 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3913 const struct rte_eth_rxtx_callback *user_cb)
3915 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3918 /* Check input parameters. */
3919 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3920 if (user_cb == NULL ||
3921 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3924 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3926 struct rte_eth_rxtx_callback *cb;
3927 struct rte_eth_rxtx_callback **prev_cb;
3929 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3930 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3931 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3933 if (cb == user_cb) {
3934 /* Remove the user cb from the callback list. */
3935 *prev_cb = cb->next;
3940 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3946 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3947 struct rte_eth_rxq_info *qinfo)
3949 struct rte_eth_dev *dev;
3951 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3956 dev = &rte_eth_devices[port_id];
3957 if (queue_id >= dev->data->nb_rx_queues) {
3958 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3962 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3964 memset(qinfo, 0, sizeof(*qinfo));
3965 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3970 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3971 struct rte_eth_txq_info *qinfo)
3973 struct rte_eth_dev *dev;
3975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3980 dev = &rte_eth_devices[port_id];
3981 if (queue_id >= dev->data->nb_tx_queues) {
3982 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3986 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3988 memset(qinfo, 0, sizeof(*qinfo));
3989 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3995 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3996 struct ether_addr *mc_addr_set,
3997 uint32_t nb_mc_addr)
3999 struct rte_eth_dev *dev;
4001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4003 dev = &rte_eth_devices[port_id];
4004 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4005 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4006 mc_addr_set, nb_mc_addr));
4010 rte_eth_timesync_enable(uint16_t port_id)
4012 struct rte_eth_dev *dev;
4014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4015 dev = &rte_eth_devices[port_id];
4017 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4018 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4022 rte_eth_timesync_disable(uint16_t port_id)
4024 struct rte_eth_dev *dev;
4026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4027 dev = &rte_eth_devices[port_id];
4029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4030 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4034 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4037 struct rte_eth_dev *dev;
4039 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4040 dev = &rte_eth_devices[port_id];
4042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4043 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4044 (dev, timestamp, flags));
4048 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4049 struct timespec *timestamp)
4051 struct rte_eth_dev *dev;
4053 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4054 dev = &rte_eth_devices[port_id];
4056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4057 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4062 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4064 struct rte_eth_dev *dev;
4066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4067 dev = &rte_eth_devices[port_id];
4069 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4070 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4075 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4077 struct rte_eth_dev *dev;
4079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4080 dev = &rte_eth_devices[port_id];
4082 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4083 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4088 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4090 struct rte_eth_dev *dev;
4092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4093 dev = &rte_eth_devices[port_id];
4095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4096 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4101 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4103 struct rte_eth_dev *dev;
4105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4107 dev = &rte_eth_devices[port_id];
4108 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4109 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4113 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4115 struct rte_eth_dev *dev;
4117 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4119 dev = &rte_eth_devices[port_id];
4120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4121 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4125 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4127 struct rte_eth_dev *dev;
4129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4131 dev = &rte_eth_devices[port_id];
4132 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4133 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4137 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4139 struct rte_eth_dev *dev;
4141 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4143 dev = &rte_eth_devices[port_id];
4144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4145 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4148 int __rte_experimental
4149 rte_eth_dev_get_module_info(uint16_t port_id,
4150 struct rte_eth_dev_module_info *modinfo)
4152 struct rte_eth_dev *dev;
4154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4156 dev = &rte_eth_devices[port_id];
4157 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4158 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4161 int __rte_experimental
4162 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4163 struct rte_dev_eeprom_info *info)
4165 struct rte_eth_dev *dev;
4167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4169 dev = &rte_eth_devices[port_id];
4170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4171 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4175 rte_eth_dev_get_dcb_info(uint16_t port_id,
4176 struct rte_eth_dcb_info *dcb_info)
4178 struct rte_eth_dev *dev;
4180 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4182 dev = &rte_eth_devices[port_id];
4183 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4185 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4186 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4190 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4191 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4193 struct rte_eth_dev *dev;
4195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4196 if (l2_tunnel == NULL) {
4197 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4201 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4202 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4206 dev = &rte_eth_devices[port_id];
4207 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4209 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4214 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4215 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4219 struct rte_eth_dev *dev;
4221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4223 if (l2_tunnel == NULL) {
4224 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4228 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4229 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4234 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4238 dev = &rte_eth_devices[port_id];
4239 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4241 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4242 l2_tunnel, mask, en));
4246 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4247 const struct rte_eth_desc_lim *desc_lim)
4249 if (desc_lim->nb_align != 0)
4250 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4252 if (desc_lim->nb_max != 0)
4253 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4255 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4259 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4260 uint16_t *nb_rx_desc,
4261 uint16_t *nb_tx_desc)
4263 struct rte_eth_dev *dev;
4264 struct rte_eth_dev_info dev_info;
4266 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4268 dev = &rte_eth_devices[port_id];
4269 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4271 rte_eth_dev_info_get(port_id, &dev_info);
4273 if (nb_rx_desc != NULL)
4274 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4276 if (nb_tx_desc != NULL)
4277 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4283 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4285 struct rte_eth_dev *dev;
4287 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4292 dev = &rte_eth_devices[port_id];
4294 if (*dev->dev_ops->pool_ops_supported == NULL)
4295 return 1; /* all pools are supported */
4297 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4301 * A set of values to describe the possible states of a switch domain.
4303 enum rte_eth_switch_domain_state {
4304 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4305 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4309 * Array of switch domains available for allocation. Array is sized to
4310 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4311 * ethdev ports in a single process.
4313 static struct rte_eth_dev_switch {
4314 enum rte_eth_switch_domain_state state;
4315 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4317 int __rte_experimental
4318 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4322 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4324 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4325 i < RTE_MAX_ETHPORTS; i++) {
4326 if (rte_eth_switch_domains[i].state ==
4327 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4328 rte_eth_switch_domains[i].state =
4329 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4338 int __rte_experimental
4339 rte_eth_switch_domain_free(uint16_t domain_id)
4341 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4342 domain_id >= RTE_MAX_ETHPORTS)
4345 if (rte_eth_switch_domains[domain_id].state !=
4346 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4349 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4355 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4358 struct rte_kvargs_pair *pair;
4361 arglist->str = strdup(str_in);
4362 if (arglist->str == NULL)
4365 letter = arglist->str;
4368 pair = &arglist->pairs[0];
4371 case 0: /* Initial */
4374 else if (*letter == '\0')
4381 case 1: /* Parsing key */
4382 if (*letter == '=') {
4384 pair->value = letter + 1;
4386 } else if (*letter == ',' || *letter == '\0')
4391 case 2: /* Parsing value */
4394 else if (*letter == ',') {
4397 pair = &arglist->pairs[arglist->count];
4399 } else if (*letter == '\0') {
4402 pair = &arglist->pairs[arglist->count];
4407 case 3: /* Parsing list */
4410 else if (*letter == '\0')
4418 int __rte_experimental
4419 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4421 struct rte_kvargs args;
4422 struct rte_kvargs_pair *pair;
4426 memset(eth_da, 0, sizeof(*eth_da));
4428 result = rte_eth_devargs_tokenise(&args, dargs);
4432 for (i = 0; i < args.count; i++) {
4433 pair = &args.pairs[i];
4434 if (strcmp("representor", pair->key) == 0) {
4435 result = rte_eth_devargs_parse_list(pair->value,
4436 rte_eth_devargs_parse_representor_ports,
4450 RTE_INIT(ethdev_init_log)
4452 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4453 if (rte_eth_dev_logtype >= 0)
4454 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);