1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
159 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
160 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
163 #undef RTE_TX_OFFLOAD_BIT2STR
166 * The user application callback description.
168 * It contains callback address to be registered by user application,
169 * the pointer to the parameters for callback, and the event type.
171 struct rte_eth_dev_callback {
172 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
173 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
174 void *cb_arg; /**< Parameter for callback */
175 void *ret_param; /**< Return parameter */
176 enum rte_eth_event_type event; /**< Interrupt event type */
177 uint32_t active; /**< Callback is executing */
186 rte_eth_find_next(uint16_t port_id)
188 while (port_id < RTE_MAX_ETHPORTS &&
189 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
190 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
193 if (port_id >= RTE_MAX_ETHPORTS)
194 return RTE_MAX_ETHPORTS;
200 rte_eth_dev_shared_data_prepare(void)
202 const unsigned flags = 0;
203 const struct rte_memzone *mz;
205 rte_spinlock_lock(&rte_eth_shared_data_lock);
207 if (rte_eth_dev_shared_data == NULL) {
208 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
209 /* Allocate port data and ownership shared memory. */
210 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
211 sizeof(*rte_eth_dev_shared_data),
212 rte_socket_id(), flags);
214 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
216 rte_panic("Cannot allocate ethdev shared data\n");
218 rte_eth_dev_shared_data = mz->addr;
219 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
220 rte_eth_dev_shared_data->next_owner_id =
221 RTE_ETH_DEV_NO_OWNER + 1;
222 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
223 memset(rte_eth_dev_shared_data->data, 0,
224 sizeof(rte_eth_dev_shared_data->data));
228 rte_spinlock_unlock(&rte_eth_shared_data_lock);
232 is_allocated(const struct rte_eth_dev *ethdev)
234 return ethdev->data->name[0] != '\0';
237 static struct rte_eth_dev *
238 _rte_eth_dev_allocated(const char *name)
242 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
243 if (rte_eth_devices[i].data != NULL &&
244 strcmp(rte_eth_devices[i].data->name, name) == 0)
245 return &rte_eth_devices[i];
251 rte_eth_dev_allocated(const char *name)
253 struct rte_eth_dev *ethdev;
255 rte_eth_dev_shared_data_prepare();
257 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
259 ethdev = _rte_eth_dev_allocated(name);
261 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
267 rte_eth_dev_find_free_port(void)
271 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
272 /* Using shared name field to find a free port. */
273 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
274 RTE_ASSERT(rte_eth_devices[i].state ==
279 return RTE_MAX_ETHPORTS;
282 static struct rte_eth_dev *
283 eth_dev_get(uint16_t port_id)
285 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
287 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
289 eth_dev_last_created_port = port_id;
295 rte_eth_dev_allocate(const char *name)
298 struct rte_eth_dev *eth_dev = NULL;
300 rte_eth_dev_shared_data_prepare();
302 /* Synchronize port creation between primary and secondary threads. */
303 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
305 if (_rte_eth_dev_allocated(name) != NULL) {
307 "Ethernet device with name %s already allocated\n",
312 port_id = rte_eth_dev_find_free_port();
313 if (port_id == RTE_MAX_ETHPORTS) {
315 "Reached maximum number of Ethernet ports\n");
319 eth_dev = eth_dev_get(port_id);
320 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
321 eth_dev->data->port_id = port_id;
322 eth_dev->data->mtu = ETHER_MTU;
325 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
331 * Attach to a port already registered by the primary process, which
332 * makes sure that the same device would have the same port id both
333 * in the primary and secondary process.
336 rte_eth_dev_attach_secondary(const char *name)
339 struct rte_eth_dev *eth_dev = NULL;
341 rte_eth_dev_shared_data_prepare();
343 /* Synchronize port attachment to primary port creation and release. */
344 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
346 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
347 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
350 if (i == RTE_MAX_ETHPORTS) {
352 "Device %s is not driven by the primary process\n",
355 eth_dev = eth_dev_get(i);
356 RTE_ASSERT(eth_dev->data->port_id == i);
359 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
364 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
369 rte_eth_dev_shared_data_prepare();
371 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
373 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
375 eth_dev->state = RTE_ETH_DEV_UNUSED;
377 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
379 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
385 rte_eth_dev_is_valid_port(uint16_t port_id)
387 if (port_id >= RTE_MAX_ETHPORTS ||
388 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
395 rte_eth_is_valid_owner_id(uint64_t owner_id)
397 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
398 rte_eth_dev_shared_data->next_owner_id <= owner_id)
404 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
406 while (port_id < RTE_MAX_ETHPORTS &&
407 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
408 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
409 rte_eth_devices[port_id].data->owner.id != owner_id))
412 if (port_id >= RTE_MAX_ETHPORTS)
413 return RTE_MAX_ETHPORTS;
418 int __rte_experimental
419 rte_eth_dev_owner_new(uint64_t *owner_id)
421 rte_eth_dev_shared_data_prepare();
423 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
425 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
427 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
432 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
433 const struct rte_eth_dev_owner *new_owner)
435 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
436 struct rte_eth_dev_owner *port_owner;
439 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
440 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
445 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
446 !rte_eth_is_valid_owner_id(old_owner_id)) {
448 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
449 old_owner_id, new_owner->id);
453 port_owner = &rte_eth_devices[port_id].data->owner;
454 if (port_owner->id != old_owner_id) {
456 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
457 port_id, port_owner->name, port_owner->id);
461 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
463 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
464 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
467 port_owner->id = new_owner->id;
469 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
470 port_id, new_owner->name, new_owner->id);
475 int __rte_experimental
476 rte_eth_dev_owner_set(const uint16_t port_id,
477 const struct rte_eth_dev_owner *owner)
481 rte_eth_dev_shared_data_prepare();
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
487 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
491 int __rte_experimental
492 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
494 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
495 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
498 rte_eth_dev_shared_data_prepare();
500 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
502 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
504 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
508 void __rte_experimental
509 rte_eth_dev_owner_delete(const uint64_t owner_id)
513 rte_eth_dev_shared_data_prepare();
515 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
517 if (rte_eth_is_valid_owner_id(owner_id)) {
518 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
519 if (rte_eth_devices[port_id].data->owner.id == owner_id)
520 memset(&rte_eth_devices[port_id].data->owner, 0,
521 sizeof(struct rte_eth_dev_owner));
522 RTE_ETHDEV_LOG(NOTICE,
523 "All port owners owned by %016"PRIx64" identifier have removed\n",
527 "Invalid owner id=%016"PRIx64"\n",
531 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
534 int __rte_experimental
535 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
538 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
540 rte_eth_dev_shared_data_prepare();
542 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
544 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
545 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
549 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
552 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
557 rte_eth_dev_socket_id(uint16_t port_id)
559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
560 return rte_eth_devices[port_id].data->numa_node;
564 rte_eth_dev_get_sec_ctx(uint16_t port_id)
566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
567 return rte_eth_devices[port_id].security_ctx;
571 rte_eth_dev_count(void)
573 return rte_eth_dev_count_avail();
577 rte_eth_dev_count_avail(void)
584 RTE_ETH_FOREACH_DEV(p)
590 uint16_t __rte_experimental
591 rte_eth_dev_count_total(void)
593 uint16_t port, count = 0;
595 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
596 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
603 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
607 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
610 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
614 /* shouldn't check 'rte_eth_devices[i].data',
615 * because it might be overwritten by VDEV PMD */
616 tmp = rte_eth_dev_shared_data->data[port_id].name;
622 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
627 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
631 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
632 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
633 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
643 eth_err(uint16_t port_id, int ret)
647 if (rte_eth_dev_is_removed(port_id))
652 /* attach the new device, then store port_id of the device */
654 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
656 int current = rte_eth_dev_count_total();
657 struct rte_devargs da;
660 memset(&da, 0, sizeof(da));
662 if ((devargs == NULL) || (port_id == NULL)) {
668 if (rte_devargs_parse(&da, devargs))
671 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
675 /* no point looking at the port count if no port exists */
676 if (!rte_eth_dev_count_total()) {
677 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
682 /* if nothing happened, there is a bug here, since some driver told us
683 * it did attach a device, but did not create a port.
684 * FIXME: race condition in case of plug-out of another device
686 if (current == rte_eth_dev_count_total()) {
691 *port_id = eth_dev_last_created_port;
699 /* detach the device, then store the name of the device */
701 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
703 struct rte_device *dev;
708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
710 dev_flags = rte_eth_devices[port_id].data->dev_flags;
711 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
713 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
717 dev = rte_eth_devices[port_id].device;
721 bus = rte_bus_find_by_device(dev);
725 ret = rte_eal_hotplug_remove(bus->name, dev->name);
729 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
734 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
736 uint16_t old_nb_queues = dev->data->nb_rx_queues;
740 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
741 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
742 sizeof(dev->data->rx_queues[0]) * nb_queues,
743 RTE_CACHE_LINE_SIZE);
744 if (dev->data->rx_queues == NULL) {
745 dev->data->nb_rx_queues = 0;
748 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
749 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
751 rxq = dev->data->rx_queues;
753 for (i = nb_queues; i < old_nb_queues; i++)
754 (*dev->dev_ops->rx_queue_release)(rxq[i]);
755 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
756 RTE_CACHE_LINE_SIZE);
759 if (nb_queues > old_nb_queues) {
760 uint16_t new_qs = nb_queues - old_nb_queues;
762 memset(rxq + old_nb_queues, 0,
763 sizeof(rxq[0]) * new_qs);
766 dev->data->rx_queues = rxq;
768 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
771 rxq = dev->data->rx_queues;
773 for (i = nb_queues; i < old_nb_queues; i++)
774 (*dev->dev_ops->rx_queue_release)(rxq[i]);
776 rte_free(dev->data->rx_queues);
777 dev->data->rx_queues = NULL;
779 dev->data->nb_rx_queues = nb_queues;
784 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
786 struct rte_eth_dev *dev;
788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
790 dev = &rte_eth_devices[port_id];
791 if (!dev->data->dev_started) {
793 "Port %u must be started before start any queue\n",
798 if (rx_queue_id >= dev->data->nb_rx_queues) {
799 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
805 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
807 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
808 rx_queue_id, port_id);
812 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
818 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
820 struct rte_eth_dev *dev;
822 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
824 dev = &rte_eth_devices[port_id];
825 if (rx_queue_id >= dev->data->nb_rx_queues) {
826 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
832 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
834 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
835 rx_queue_id, port_id);
839 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
844 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
846 struct rte_eth_dev *dev;
848 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
850 dev = &rte_eth_devices[port_id];
851 if (!dev->data->dev_started) {
853 "Port %u must be started before start any queue\n",
858 if (tx_queue_id >= dev->data->nb_tx_queues) {
859 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
865 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
867 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
868 tx_queue_id, port_id);
872 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
876 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
878 struct rte_eth_dev *dev;
880 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
882 dev = &rte_eth_devices[port_id];
883 if (tx_queue_id >= dev->data->nb_tx_queues) {
884 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
890 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
892 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
893 tx_queue_id, port_id);
897 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
902 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
904 uint16_t old_nb_queues = dev->data->nb_tx_queues;
908 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
909 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
910 sizeof(dev->data->tx_queues[0]) * nb_queues,
911 RTE_CACHE_LINE_SIZE);
912 if (dev->data->tx_queues == NULL) {
913 dev->data->nb_tx_queues = 0;
916 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
917 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
919 txq = dev->data->tx_queues;
921 for (i = nb_queues; i < old_nb_queues; i++)
922 (*dev->dev_ops->tx_queue_release)(txq[i]);
923 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
924 RTE_CACHE_LINE_SIZE);
927 if (nb_queues > old_nb_queues) {
928 uint16_t new_qs = nb_queues - old_nb_queues;
930 memset(txq + old_nb_queues, 0,
931 sizeof(txq[0]) * new_qs);
934 dev->data->tx_queues = txq;
936 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
939 txq = dev->data->tx_queues;
941 for (i = nb_queues; i < old_nb_queues; i++)
942 (*dev->dev_ops->tx_queue_release)(txq[i]);
944 rte_free(dev->data->tx_queues);
945 dev->data->tx_queues = NULL;
947 dev->data->nb_tx_queues = nb_queues;
952 rte_eth_speed_bitflag(uint32_t speed, int duplex)
955 case ETH_SPEED_NUM_10M:
956 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
957 case ETH_SPEED_NUM_100M:
958 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
959 case ETH_SPEED_NUM_1G:
960 return ETH_LINK_SPEED_1G;
961 case ETH_SPEED_NUM_2_5G:
962 return ETH_LINK_SPEED_2_5G;
963 case ETH_SPEED_NUM_5G:
964 return ETH_LINK_SPEED_5G;
965 case ETH_SPEED_NUM_10G:
966 return ETH_LINK_SPEED_10G;
967 case ETH_SPEED_NUM_20G:
968 return ETH_LINK_SPEED_20G;
969 case ETH_SPEED_NUM_25G:
970 return ETH_LINK_SPEED_25G;
971 case ETH_SPEED_NUM_40G:
972 return ETH_LINK_SPEED_40G;
973 case ETH_SPEED_NUM_50G:
974 return ETH_LINK_SPEED_50G;
975 case ETH_SPEED_NUM_56G:
976 return ETH_LINK_SPEED_56G;
977 case ETH_SPEED_NUM_100G:
978 return ETH_LINK_SPEED_100G;
984 const char * __rte_experimental
985 rte_eth_dev_rx_offload_name(uint64_t offload)
987 const char *name = "UNKNOWN";
990 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
991 if (offload == rte_rx_offload_names[i].offload) {
992 name = rte_rx_offload_names[i].name;
1000 const char * __rte_experimental
1001 rte_eth_dev_tx_offload_name(uint64_t offload)
1003 const char *name = "UNKNOWN";
1006 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1007 if (offload == rte_tx_offload_names[i].offload) {
1008 name = rte_tx_offload_names[i].name;
1017 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1018 const struct rte_eth_conf *dev_conf)
1020 struct rte_eth_dev *dev;
1021 struct rte_eth_dev_info dev_info;
1022 struct rte_eth_conf local_conf = *dev_conf;
1025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1027 dev = &rte_eth_devices[port_id];
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1032 rte_eth_dev_info_get(port_id, &dev_info);
1034 /* If number of queues specified by application for both Rx and Tx is
1035 * zero, use driver preferred values. This cannot be done individually
1036 * as it is valid for either Tx or Rx (but not both) to be zero.
1037 * If driver does not provide any preferred valued, fall back on
1040 if (nb_rx_q == 0 && nb_tx_q == 0) {
1041 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1043 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1044 nb_tx_q = dev_info.default_txportconf.nb_queues;
1046 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1049 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1052 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1056 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1058 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1059 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1063 if (dev->data->dev_started) {
1065 "Port %u must be stopped to allow configuration\n",
1070 /* Copy the dev_conf parameter into the dev structure */
1071 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1074 * Check that the numbers of RX and TX queues are not greater
1075 * than the maximum number of RX and TX queues supported by the
1076 * configured device.
1078 if (nb_rx_q > dev_info.max_rx_queues) {
1079 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1080 port_id, nb_rx_q, dev_info.max_rx_queues);
1084 if (nb_tx_q > dev_info.max_tx_queues) {
1085 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1086 port_id, nb_tx_q, dev_info.max_tx_queues);
1090 /* Check that the device supports requested interrupts */
1091 if ((dev_conf->intr_conf.lsc == 1) &&
1092 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1093 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1094 dev->device->driver->name);
1097 if ((dev_conf->intr_conf.rmv == 1) &&
1098 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1099 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1100 dev->device->driver->name);
1105 * If jumbo frames are enabled, check that the maximum RX packet
1106 * length is supported by the configured device.
1108 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1109 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1111 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1112 port_id, dev_conf->rxmode.max_rx_pkt_len,
1113 dev_info.max_rx_pktlen);
1115 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1117 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1118 port_id, dev_conf->rxmode.max_rx_pkt_len,
1119 (unsigned)ETHER_MIN_LEN);
1123 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1124 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1125 /* Use default value */
1126 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1130 /* Any requested offloading must be within its device capabilities */
1131 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1132 local_conf.rxmode.offloads) {
1134 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1135 "capabilities 0x%"PRIx64" in %s()\n",
1136 port_id, local_conf.rxmode.offloads,
1137 dev_info.rx_offload_capa,
1141 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1142 local_conf.txmode.offloads) {
1144 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1145 "capabilities 0x%"PRIx64" in %s()\n",
1146 port_id, local_conf.txmode.offloads,
1147 dev_info.tx_offload_capa,
1152 if ((local_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP) &&
1153 (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
1155 "Port id=%u not allowed to set both CRC STRIP and KEEP CRC offload flags\n",
1160 /* Check that device supports requested rss hash functions. */
1161 if ((dev_info.flow_type_rss_offloads |
1162 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1163 dev_info.flow_type_rss_offloads) {
1165 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1166 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1167 dev_info.flow_type_rss_offloads);
1172 * Setup new number of RX/TX queues and reconfigure device.
1174 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1177 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1182 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1185 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1187 rte_eth_dev_rx_queue_config(dev, 0);
1191 diag = (*dev->dev_ops->dev_configure)(dev);
1193 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1195 rte_eth_dev_rx_queue_config(dev, 0);
1196 rte_eth_dev_tx_queue_config(dev, 0);
1197 return eth_err(port_id, diag);
1200 /* Initialize Rx profiling if enabled at compilation time. */
1201 diag = __rte_eth_dev_profile_init(port_id, dev);
1203 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1205 rte_eth_dev_rx_queue_config(dev, 0);
1206 rte_eth_dev_tx_queue_config(dev, 0);
1207 return eth_err(port_id, diag);
1214 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1216 if (dev->data->dev_started) {
1217 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1218 dev->data->port_id);
1222 rte_eth_dev_rx_queue_config(dev, 0);
1223 rte_eth_dev_tx_queue_config(dev, 0);
1225 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1229 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1230 struct rte_eth_dev_info *dev_info)
1232 struct ether_addr *addr;
1237 /* replay MAC address configuration including default MAC */
1238 addr = &dev->data->mac_addrs[0];
1239 if (*dev->dev_ops->mac_addr_set != NULL)
1240 (*dev->dev_ops->mac_addr_set)(dev, addr);
1241 else if (*dev->dev_ops->mac_addr_add != NULL)
1242 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1244 if (*dev->dev_ops->mac_addr_add != NULL) {
1245 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1246 addr = &dev->data->mac_addrs[i];
1248 /* skip zero address */
1249 if (is_zero_ether_addr(addr))
1253 pool_mask = dev->data->mac_pool_sel[i];
1256 if (pool_mask & 1ULL)
1257 (*dev->dev_ops->mac_addr_add)(dev,
1261 } while (pool_mask);
1267 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1268 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1270 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1271 rte_eth_dev_mac_restore(dev, dev_info);
1273 /* replay promiscuous configuration */
1274 if (rte_eth_promiscuous_get(port_id) == 1)
1275 rte_eth_promiscuous_enable(port_id);
1276 else if (rte_eth_promiscuous_get(port_id) == 0)
1277 rte_eth_promiscuous_disable(port_id);
1279 /* replay all multicast configuration */
1280 if (rte_eth_allmulticast_get(port_id) == 1)
1281 rte_eth_allmulticast_enable(port_id);
1282 else if (rte_eth_allmulticast_get(port_id) == 0)
1283 rte_eth_allmulticast_disable(port_id);
1287 rte_eth_dev_start(uint16_t port_id)
1289 struct rte_eth_dev *dev;
1290 struct rte_eth_dev_info dev_info;
1293 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1295 dev = &rte_eth_devices[port_id];
1297 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1299 if (dev->data->dev_started != 0) {
1300 RTE_ETHDEV_LOG(INFO,
1301 "Device with port_id=%"PRIu16" already started\n",
1306 rte_eth_dev_info_get(port_id, &dev_info);
1308 /* Lets restore MAC now if device does not support live change */
1309 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1310 rte_eth_dev_mac_restore(dev, &dev_info);
1312 diag = (*dev->dev_ops->dev_start)(dev);
1314 dev->data->dev_started = 1;
1316 return eth_err(port_id, diag);
1318 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1320 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1322 (*dev->dev_ops->link_update)(dev, 0);
1328 rte_eth_dev_stop(uint16_t port_id)
1330 struct rte_eth_dev *dev;
1332 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1333 dev = &rte_eth_devices[port_id];
1335 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1337 if (dev->data->dev_started == 0) {
1338 RTE_ETHDEV_LOG(INFO,
1339 "Device with port_id=%"PRIu16" already stopped\n",
1344 dev->data->dev_started = 0;
1345 (*dev->dev_ops->dev_stop)(dev);
1349 rte_eth_dev_set_link_up(uint16_t port_id)
1351 struct rte_eth_dev *dev;
1353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1355 dev = &rte_eth_devices[port_id];
1357 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1358 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1362 rte_eth_dev_set_link_down(uint16_t port_id)
1364 struct rte_eth_dev *dev;
1366 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1368 dev = &rte_eth_devices[port_id];
1370 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1371 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1375 rte_eth_dev_close(uint16_t port_id)
1377 struct rte_eth_dev *dev;
1379 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1380 dev = &rte_eth_devices[port_id];
1382 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1383 dev->data->dev_started = 0;
1384 (*dev->dev_ops->dev_close)(dev);
1386 dev->data->nb_rx_queues = 0;
1387 rte_free(dev->data->rx_queues);
1388 dev->data->rx_queues = NULL;
1389 dev->data->nb_tx_queues = 0;
1390 rte_free(dev->data->tx_queues);
1391 dev->data->tx_queues = NULL;
1395 rte_eth_dev_reset(uint16_t port_id)
1397 struct rte_eth_dev *dev;
1400 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1401 dev = &rte_eth_devices[port_id];
1403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1405 rte_eth_dev_stop(port_id);
1406 ret = dev->dev_ops->dev_reset(dev);
1408 return eth_err(port_id, ret);
1411 int __rte_experimental
1412 rte_eth_dev_is_removed(uint16_t port_id)
1414 struct rte_eth_dev *dev;
1417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1419 dev = &rte_eth_devices[port_id];
1421 if (dev->state == RTE_ETH_DEV_REMOVED)
1424 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1426 ret = dev->dev_ops->is_removed(dev);
1428 /* Device is physically removed. */
1429 dev->state = RTE_ETH_DEV_REMOVED;
1435 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1436 uint16_t nb_rx_desc, unsigned int socket_id,
1437 const struct rte_eth_rxconf *rx_conf,
1438 struct rte_mempool *mp)
1441 uint32_t mbp_buf_size;
1442 struct rte_eth_dev *dev;
1443 struct rte_eth_dev_info dev_info;
1444 struct rte_eth_rxconf local_conf;
1447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1449 dev = &rte_eth_devices[port_id];
1450 if (rx_queue_id >= dev->data->nb_rx_queues) {
1451 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1455 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1456 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1459 * Check the size of the mbuf data buffer.
1460 * This value must be provided in the private data of the memory pool.
1461 * First check that the memory pool has a valid private data.
1463 rte_eth_dev_info_get(port_id, &dev_info);
1464 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1465 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1466 mp->name, (int)mp->private_data_size,
1467 (int)sizeof(struct rte_pktmbuf_pool_private));
1470 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1472 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1474 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1475 mp->name, (int)mbp_buf_size,
1476 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1477 (int)RTE_PKTMBUF_HEADROOM,
1478 (int)dev_info.min_rx_bufsize);
1482 /* Use default specified by driver, if nb_rx_desc is zero */
1483 if (nb_rx_desc == 0) {
1484 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1485 /* If driver default is also zero, fall back on EAL default */
1486 if (nb_rx_desc == 0)
1487 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1490 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1491 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1492 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1495 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1496 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1497 dev_info.rx_desc_lim.nb_min,
1498 dev_info.rx_desc_lim.nb_align);
1502 if (dev->data->dev_started &&
1503 !(dev_info.dev_capa &
1504 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1507 if (dev->data->dev_started &&
1508 (dev->data->rx_queue_state[rx_queue_id] !=
1509 RTE_ETH_QUEUE_STATE_STOPPED))
1512 rxq = dev->data->rx_queues;
1513 if (rxq[rx_queue_id]) {
1514 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1516 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1517 rxq[rx_queue_id] = NULL;
1520 if (rx_conf == NULL)
1521 rx_conf = &dev_info.default_rxconf;
1523 local_conf = *rx_conf;
1526 * If an offloading has already been enabled in
1527 * rte_eth_dev_configure(), it has been enabled on all queues,
1528 * so there is no need to enable it in this queue again.
1529 * The local_conf.offloads input to underlying PMD only carries
1530 * those offloadings which are only enabled on this queue and
1531 * not enabled on all queues.
1533 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1536 * New added offloadings for this queue are those not enabled in
1537 * rte_eth_dev_configure() and they must be per-queue type.
1538 * A pure per-port offloading can't be enabled on a queue while
1539 * disabled on another queue. A pure per-port offloading can't
1540 * be enabled for any queue as new added one if it hasn't been
1541 * enabled in rte_eth_dev_configure().
1543 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1544 local_conf.offloads) {
1546 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1547 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1548 port_id, rx_queue_id, local_conf.offloads,
1549 dev_info.rx_queue_offload_capa,
1554 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1555 socket_id, &local_conf, mp);
1557 if (!dev->data->min_rx_buf_size ||
1558 dev->data->min_rx_buf_size > mbp_buf_size)
1559 dev->data->min_rx_buf_size = mbp_buf_size;
1562 return eth_err(port_id, ret);
1566 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1567 uint16_t nb_tx_desc, unsigned int socket_id,
1568 const struct rte_eth_txconf *tx_conf)
1570 struct rte_eth_dev *dev;
1571 struct rte_eth_dev_info dev_info;
1572 struct rte_eth_txconf local_conf;
1575 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1577 dev = &rte_eth_devices[port_id];
1578 if (tx_queue_id >= dev->data->nb_tx_queues) {
1579 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1584 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1586 rte_eth_dev_info_get(port_id, &dev_info);
1588 /* Use default specified by driver, if nb_tx_desc is zero */
1589 if (nb_tx_desc == 0) {
1590 nb_tx_desc = dev_info.default_txportconf.ring_size;
1591 /* If driver default is zero, fall back on EAL default */
1592 if (nb_tx_desc == 0)
1593 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1595 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1596 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1597 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1599 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1600 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1601 dev_info.tx_desc_lim.nb_min,
1602 dev_info.tx_desc_lim.nb_align);
1606 if (dev->data->dev_started &&
1607 !(dev_info.dev_capa &
1608 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1611 if (dev->data->dev_started &&
1612 (dev->data->tx_queue_state[tx_queue_id] !=
1613 RTE_ETH_QUEUE_STATE_STOPPED))
1616 txq = dev->data->tx_queues;
1617 if (txq[tx_queue_id]) {
1618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1620 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1621 txq[tx_queue_id] = NULL;
1624 if (tx_conf == NULL)
1625 tx_conf = &dev_info.default_txconf;
1627 local_conf = *tx_conf;
1630 * If an offloading has already been enabled in
1631 * rte_eth_dev_configure(), it has been enabled on all queues,
1632 * so there is no need to enable it in this queue again.
1633 * The local_conf.offloads input to underlying PMD only carries
1634 * those offloadings which are only enabled on this queue and
1635 * not enabled on all queues.
1637 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1640 * New added offloadings for this queue are those not enabled in
1641 * rte_eth_dev_configure() and they must be per-queue type.
1642 * A pure per-port offloading can't be enabled on a queue while
1643 * disabled on another queue. A pure per-port offloading can't
1644 * be enabled for any queue as new added one if it hasn't been
1645 * enabled in rte_eth_dev_configure().
1647 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1648 local_conf.offloads) {
1650 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1651 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1652 port_id, tx_queue_id, local_conf.offloads,
1653 dev_info.tx_queue_offload_capa,
1658 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1659 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1663 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1664 void *userdata __rte_unused)
1668 for (i = 0; i < unsent; i++)
1669 rte_pktmbuf_free(pkts[i]);
1673 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1676 uint64_t *count = userdata;
1679 for (i = 0; i < unsent; i++)
1680 rte_pktmbuf_free(pkts[i]);
1686 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1687 buffer_tx_error_fn cbfn, void *userdata)
1689 buffer->error_callback = cbfn;
1690 buffer->error_userdata = userdata;
1695 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1702 buffer->size = size;
1703 if (buffer->error_callback == NULL) {
1704 ret = rte_eth_tx_buffer_set_err_callback(
1705 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1712 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1714 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1717 /* Validate Input Data. Bail if not valid or not supported. */
1718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1719 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1721 /* Call driver to free pending mbufs. */
1722 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1724 return eth_err(port_id, ret);
1728 rte_eth_promiscuous_enable(uint16_t port_id)
1730 struct rte_eth_dev *dev;
1732 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1733 dev = &rte_eth_devices[port_id];
1735 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1736 (*dev->dev_ops->promiscuous_enable)(dev);
1737 dev->data->promiscuous = 1;
1741 rte_eth_promiscuous_disable(uint16_t port_id)
1743 struct rte_eth_dev *dev;
1745 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1746 dev = &rte_eth_devices[port_id];
1748 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1749 dev->data->promiscuous = 0;
1750 (*dev->dev_ops->promiscuous_disable)(dev);
1754 rte_eth_promiscuous_get(uint16_t port_id)
1756 struct rte_eth_dev *dev;
1758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1760 dev = &rte_eth_devices[port_id];
1761 return dev->data->promiscuous;
1765 rte_eth_allmulticast_enable(uint16_t port_id)
1767 struct rte_eth_dev *dev;
1769 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1770 dev = &rte_eth_devices[port_id];
1772 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1773 (*dev->dev_ops->allmulticast_enable)(dev);
1774 dev->data->all_multicast = 1;
1778 rte_eth_allmulticast_disable(uint16_t port_id)
1780 struct rte_eth_dev *dev;
1782 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1783 dev = &rte_eth_devices[port_id];
1785 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1786 dev->data->all_multicast = 0;
1787 (*dev->dev_ops->allmulticast_disable)(dev);
1791 rte_eth_allmulticast_get(uint16_t port_id)
1793 struct rte_eth_dev *dev;
1795 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1797 dev = &rte_eth_devices[port_id];
1798 return dev->data->all_multicast;
1802 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1804 struct rte_eth_dev *dev;
1806 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1807 dev = &rte_eth_devices[port_id];
1809 if (dev->data->dev_conf.intr_conf.lsc &&
1810 dev->data->dev_started)
1811 rte_eth_linkstatus_get(dev, eth_link);
1813 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1814 (*dev->dev_ops->link_update)(dev, 1);
1815 *eth_link = dev->data->dev_link;
1820 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1822 struct rte_eth_dev *dev;
1824 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1825 dev = &rte_eth_devices[port_id];
1827 if (dev->data->dev_conf.intr_conf.lsc &&
1828 dev->data->dev_started)
1829 rte_eth_linkstatus_get(dev, eth_link);
1831 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1832 (*dev->dev_ops->link_update)(dev, 0);
1833 *eth_link = dev->data->dev_link;
1838 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1840 struct rte_eth_dev *dev;
1842 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1844 dev = &rte_eth_devices[port_id];
1845 memset(stats, 0, sizeof(*stats));
1847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1848 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1849 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1853 rte_eth_stats_reset(uint16_t port_id)
1855 struct rte_eth_dev *dev;
1857 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1858 dev = &rte_eth_devices[port_id];
1860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1861 (*dev->dev_ops->stats_reset)(dev);
1862 dev->data->rx_mbuf_alloc_failed = 0;
1868 get_xstats_basic_count(struct rte_eth_dev *dev)
1870 uint16_t nb_rxqs, nb_txqs;
1873 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1874 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1876 count = RTE_NB_STATS;
1877 count += nb_rxqs * RTE_NB_RXQ_STATS;
1878 count += nb_txqs * RTE_NB_TXQ_STATS;
1884 get_xstats_count(uint16_t port_id)
1886 struct rte_eth_dev *dev;
1889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1890 dev = &rte_eth_devices[port_id];
1891 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1892 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1895 return eth_err(port_id, count);
1897 if (dev->dev_ops->xstats_get_names != NULL) {
1898 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1900 return eth_err(port_id, count);
1905 count += get_xstats_basic_count(dev);
1911 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1914 int cnt_xstats, idx_xstat;
1916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1919 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1924 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1929 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1930 if (cnt_xstats < 0) {
1931 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1935 /* Get id-name lookup table */
1936 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1938 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1939 port_id, xstats_names, cnt_xstats, NULL)) {
1940 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1944 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1945 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1954 /* retrieve basic stats names */
1956 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1957 struct rte_eth_xstat_name *xstats_names)
1959 int cnt_used_entries = 0;
1960 uint32_t idx, id_queue;
1963 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1964 snprintf(xstats_names[cnt_used_entries].name,
1965 sizeof(xstats_names[0].name),
1966 "%s", rte_stats_strings[idx].name);
1969 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1970 for (id_queue = 0; id_queue < num_q; id_queue++) {
1971 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1972 snprintf(xstats_names[cnt_used_entries].name,
1973 sizeof(xstats_names[0].name),
1975 id_queue, rte_rxq_stats_strings[idx].name);
1980 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1981 for (id_queue = 0; id_queue < num_q; id_queue++) {
1982 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1983 snprintf(xstats_names[cnt_used_entries].name,
1984 sizeof(xstats_names[0].name),
1986 id_queue, rte_txq_stats_strings[idx].name);
1990 return cnt_used_entries;
1993 /* retrieve ethdev extended statistics names */
1995 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1996 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1999 struct rte_eth_xstat_name *xstats_names_copy;
2000 unsigned int no_basic_stat_requested = 1;
2001 unsigned int no_ext_stat_requested = 1;
2002 unsigned int expected_entries;
2003 unsigned int basic_count;
2004 struct rte_eth_dev *dev;
2008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2009 dev = &rte_eth_devices[port_id];
2011 basic_count = get_xstats_basic_count(dev);
2012 ret = get_xstats_count(port_id);
2015 expected_entries = (unsigned int)ret;
2017 /* Return max number of stats if no ids given */
2020 return expected_entries;
2021 else if (xstats_names && size < expected_entries)
2022 return expected_entries;
2025 if (ids && !xstats_names)
2028 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2029 uint64_t ids_copy[size];
2031 for (i = 0; i < size; i++) {
2032 if (ids[i] < basic_count) {
2033 no_basic_stat_requested = 0;
2038 * Convert ids to xstats ids that PMD knows.
2039 * ids known by user are basic + extended stats.
2041 ids_copy[i] = ids[i] - basic_count;
2044 if (no_basic_stat_requested)
2045 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2046 xstats_names, ids_copy, size);
2049 /* Retrieve all stats */
2051 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2053 if (num_stats < 0 || num_stats > (int)expected_entries)
2056 return expected_entries;
2059 xstats_names_copy = calloc(expected_entries,
2060 sizeof(struct rte_eth_xstat_name));
2062 if (!xstats_names_copy) {
2063 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2068 for (i = 0; i < size; i++) {
2069 if (ids[i] >= basic_count) {
2070 no_ext_stat_requested = 0;
2076 /* Fill xstats_names_copy structure */
2077 if (ids && no_ext_stat_requested) {
2078 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2080 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2083 free(xstats_names_copy);
2089 for (i = 0; i < size; i++) {
2090 if (ids[i] >= expected_entries) {
2091 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2092 free(xstats_names_copy);
2095 xstats_names[i] = xstats_names_copy[ids[i]];
2098 free(xstats_names_copy);
2103 rte_eth_xstats_get_names(uint16_t port_id,
2104 struct rte_eth_xstat_name *xstats_names,
2107 struct rte_eth_dev *dev;
2108 int cnt_used_entries;
2109 int cnt_expected_entries;
2110 int cnt_driver_entries;
2112 cnt_expected_entries = get_xstats_count(port_id);
2113 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2114 (int)size < cnt_expected_entries)
2115 return cnt_expected_entries;
2117 /* port_id checked in get_xstats_count() */
2118 dev = &rte_eth_devices[port_id];
2120 cnt_used_entries = rte_eth_basic_stats_get_names(
2123 if (dev->dev_ops->xstats_get_names != NULL) {
2124 /* If there are any driver-specific xstats, append them
2127 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2129 xstats_names + cnt_used_entries,
2130 size - cnt_used_entries);
2131 if (cnt_driver_entries < 0)
2132 return eth_err(port_id, cnt_driver_entries);
2133 cnt_used_entries += cnt_driver_entries;
2136 return cnt_used_entries;
2141 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2143 struct rte_eth_dev *dev;
2144 struct rte_eth_stats eth_stats;
2145 unsigned int count = 0, i, q;
2146 uint64_t val, *stats_ptr;
2147 uint16_t nb_rxqs, nb_txqs;
2150 ret = rte_eth_stats_get(port_id, ð_stats);
2154 dev = &rte_eth_devices[port_id];
2156 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2157 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2160 for (i = 0; i < RTE_NB_STATS; i++) {
2161 stats_ptr = RTE_PTR_ADD(ð_stats,
2162 rte_stats_strings[i].offset);
2164 xstats[count++].value = val;
2168 for (q = 0; q < nb_rxqs; q++) {
2169 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2170 stats_ptr = RTE_PTR_ADD(ð_stats,
2171 rte_rxq_stats_strings[i].offset +
2172 q * sizeof(uint64_t));
2174 xstats[count++].value = val;
2179 for (q = 0; q < nb_txqs; q++) {
2180 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2181 stats_ptr = RTE_PTR_ADD(ð_stats,
2182 rte_txq_stats_strings[i].offset +
2183 q * sizeof(uint64_t));
2185 xstats[count++].value = val;
2191 /* retrieve ethdev extended statistics */
2193 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2194 uint64_t *values, unsigned int size)
2196 unsigned int no_basic_stat_requested = 1;
2197 unsigned int no_ext_stat_requested = 1;
2198 unsigned int num_xstats_filled;
2199 unsigned int basic_count;
2200 uint16_t expected_entries;
2201 struct rte_eth_dev *dev;
2205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2206 ret = get_xstats_count(port_id);
2209 expected_entries = (uint16_t)ret;
2210 struct rte_eth_xstat xstats[expected_entries];
2211 dev = &rte_eth_devices[port_id];
2212 basic_count = get_xstats_basic_count(dev);
2214 /* Return max number of stats if no ids given */
2217 return expected_entries;
2218 else if (values && size < expected_entries)
2219 return expected_entries;
2225 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2226 unsigned int basic_count = get_xstats_basic_count(dev);
2227 uint64_t ids_copy[size];
2229 for (i = 0; i < size; i++) {
2230 if (ids[i] < basic_count) {
2231 no_basic_stat_requested = 0;
2236 * Convert ids to xstats ids that PMD knows.
2237 * ids known by user are basic + extended stats.
2239 ids_copy[i] = ids[i] - basic_count;
2242 if (no_basic_stat_requested)
2243 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2248 for (i = 0; i < size; i++) {
2249 if (ids[i] >= basic_count) {
2250 no_ext_stat_requested = 0;
2256 /* Fill the xstats structure */
2257 if (ids && no_ext_stat_requested)
2258 ret = rte_eth_basic_stats_get(port_id, xstats);
2260 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2264 num_xstats_filled = (unsigned int)ret;
2266 /* Return all stats */
2268 for (i = 0; i < num_xstats_filled; i++)
2269 values[i] = xstats[i].value;
2270 return expected_entries;
2274 for (i = 0; i < size; i++) {
2275 if (ids[i] >= expected_entries) {
2276 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2279 values[i] = xstats[ids[i]].value;
2285 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2288 struct rte_eth_dev *dev;
2289 unsigned int count = 0, i;
2290 signed int xcount = 0;
2291 uint16_t nb_rxqs, nb_txqs;
2294 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2296 dev = &rte_eth_devices[port_id];
2298 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2299 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2301 /* Return generic statistics */
2302 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2303 (nb_txqs * RTE_NB_TXQ_STATS);
2305 /* implemented by the driver */
2306 if (dev->dev_ops->xstats_get != NULL) {
2307 /* Retrieve the xstats from the driver at the end of the
2310 xcount = (*dev->dev_ops->xstats_get)(dev,
2311 xstats ? xstats + count : NULL,
2312 (n > count) ? n - count : 0);
2315 return eth_err(port_id, xcount);
2318 if (n < count + xcount || xstats == NULL)
2319 return count + xcount;
2321 /* now fill the xstats structure */
2322 ret = rte_eth_basic_stats_get(port_id, xstats);
2327 for (i = 0; i < count; i++)
2329 /* add an offset to driver-specific stats */
2330 for ( ; i < count + xcount; i++)
2331 xstats[i].id += count;
2333 return count + xcount;
2336 /* reset ethdev extended statistics */
2338 rte_eth_xstats_reset(uint16_t port_id)
2340 struct rte_eth_dev *dev;
2342 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2343 dev = &rte_eth_devices[port_id];
2345 /* implemented by the driver */
2346 if (dev->dev_ops->xstats_reset != NULL) {
2347 (*dev->dev_ops->xstats_reset)(dev);
2351 /* fallback to default */
2352 rte_eth_stats_reset(port_id);
2356 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2359 struct rte_eth_dev *dev;
2361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2363 dev = &rte_eth_devices[port_id];
2365 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2367 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2370 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2373 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2376 return (*dev->dev_ops->queue_stats_mapping_set)
2377 (dev, queue_id, stat_idx, is_rx);
2382 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2385 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2386 stat_idx, STAT_QMAP_TX));
2391 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2394 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2395 stat_idx, STAT_QMAP_RX));
2399 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2401 struct rte_eth_dev *dev;
2403 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2404 dev = &rte_eth_devices[port_id];
2406 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2407 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2408 fw_version, fw_size));
2412 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2414 struct rte_eth_dev *dev;
2415 const struct rte_eth_desc_lim lim = {
2416 .nb_max = UINT16_MAX,
2421 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2422 dev = &rte_eth_devices[port_id];
2424 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2425 dev_info->rx_desc_lim = lim;
2426 dev_info->tx_desc_lim = lim;
2427 dev_info->device = dev->device;
2429 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2430 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2431 dev_info->driver_name = dev->device->driver->name;
2432 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2433 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2435 dev_info->dev_flags = &dev->data->dev_flags;
2439 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2440 uint32_t *ptypes, int num)
2443 struct rte_eth_dev *dev;
2444 const uint32_t *all_ptypes;
2446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2447 dev = &rte_eth_devices[port_id];
2448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2449 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2454 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2455 if (all_ptypes[i] & ptype_mask) {
2457 ptypes[j] = all_ptypes[i];
2465 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2467 struct rte_eth_dev *dev;
2469 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2470 dev = &rte_eth_devices[port_id];
2471 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2476 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2478 struct rte_eth_dev *dev;
2480 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2482 dev = &rte_eth_devices[port_id];
2483 *mtu = dev->data->mtu;
2488 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2491 struct rte_eth_dev *dev;
2493 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2494 dev = &rte_eth_devices[port_id];
2495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2497 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2499 dev->data->mtu = mtu;
2501 return eth_err(port_id, ret);
2505 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2507 struct rte_eth_dev *dev;
2510 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2511 dev = &rte_eth_devices[port_id];
2512 if (!(dev->data->dev_conf.rxmode.offloads &
2513 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2514 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2519 if (vlan_id > 4095) {
2520 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2524 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2526 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2528 struct rte_vlan_filter_conf *vfc;
2532 vfc = &dev->data->vlan_filter_conf;
2533 vidx = vlan_id / 64;
2534 vbit = vlan_id % 64;
2537 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2539 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2542 return eth_err(port_id, ret);
2546 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2549 struct rte_eth_dev *dev;
2551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2552 dev = &rte_eth_devices[port_id];
2553 if (rx_queue_id >= dev->data->nb_rx_queues) {
2554 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2558 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2559 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2565 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2566 enum rte_vlan_type vlan_type,
2569 struct rte_eth_dev *dev;
2571 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2572 dev = &rte_eth_devices[port_id];
2573 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2575 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2580 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2582 struct rte_eth_dev *dev;
2586 uint64_t orig_offloads;
2588 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2589 dev = &rte_eth_devices[port_id];
2591 /* save original values in case of failure */
2592 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2594 /*check which option changed by application*/
2595 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2596 org = !!(dev->data->dev_conf.rxmode.offloads &
2597 DEV_RX_OFFLOAD_VLAN_STRIP);
2600 dev->data->dev_conf.rxmode.offloads |=
2601 DEV_RX_OFFLOAD_VLAN_STRIP;
2603 dev->data->dev_conf.rxmode.offloads &=
2604 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2605 mask |= ETH_VLAN_STRIP_MASK;
2608 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2609 org = !!(dev->data->dev_conf.rxmode.offloads &
2610 DEV_RX_OFFLOAD_VLAN_FILTER);
2613 dev->data->dev_conf.rxmode.offloads |=
2614 DEV_RX_OFFLOAD_VLAN_FILTER;
2616 dev->data->dev_conf.rxmode.offloads &=
2617 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2618 mask |= ETH_VLAN_FILTER_MASK;
2621 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2622 org = !!(dev->data->dev_conf.rxmode.offloads &
2623 DEV_RX_OFFLOAD_VLAN_EXTEND);
2626 dev->data->dev_conf.rxmode.offloads |=
2627 DEV_RX_OFFLOAD_VLAN_EXTEND;
2629 dev->data->dev_conf.rxmode.offloads &=
2630 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2631 mask |= ETH_VLAN_EXTEND_MASK;
2638 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2639 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2641 /* hit an error restore original values */
2642 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2645 return eth_err(port_id, ret);
2649 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2651 struct rte_eth_dev *dev;
2654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2655 dev = &rte_eth_devices[port_id];
2657 if (dev->data->dev_conf.rxmode.offloads &
2658 DEV_RX_OFFLOAD_VLAN_STRIP)
2659 ret |= ETH_VLAN_STRIP_OFFLOAD;
2661 if (dev->data->dev_conf.rxmode.offloads &
2662 DEV_RX_OFFLOAD_VLAN_FILTER)
2663 ret |= ETH_VLAN_FILTER_OFFLOAD;
2665 if (dev->data->dev_conf.rxmode.offloads &
2666 DEV_RX_OFFLOAD_VLAN_EXTEND)
2667 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2673 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2675 struct rte_eth_dev *dev;
2677 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2678 dev = &rte_eth_devices[port_id];
2679 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2681 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2685 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2687 struct rte_eth_dev *dev;
2689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2690 dev = &rte_eth_devices[port_id];
2691 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2692 memset(fc_conf, 0, sizeof(*fc_conf));
2693 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2697 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2699 struct rte_eth_dev *dev;
2701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2702 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2703 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2707 dev = &rte_eth_devices[port_id];
2708 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2709 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2713 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2714 struct rte_eth_pfc_conf *pfc_conf)
2716 struct rte_eth_dev *dev;
2718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2719 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2720 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2724 dev = &rte_eth_devices[port_id];
2725 /* High water, low water validation are device specific */
2726 if (*dev->dev_ops->priority_flow_ctrl_set)
2727 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2733 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2741 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2742 for (i = 0; i < num; i++) {
2743 if (reta_conf[i].mask)
2751 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2755 uint16_t i, idx, shift;
2761 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2765 for (i = 0; i < reta_size; i++) {
2766 idx = i / RTE_RETA_GROUP_SIZE;
2767 shift = i % RTE_RETA_GROUP_SIZE;
2768 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2769 (reta_conf[idx].reta[shift] >= max_rxq)) {
2771 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2773 reta_conf[idx].reta[shift], max_rxq);
2782 rte_eth_dev_rss_reta_update(uint16_t port_id,
2783 struct rte_eth_rss_reta_entry64 *reta_conf,
2786 struct rte_eth_dev *dev;
2789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2790 /* Check mask bits */
2791 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2795 dev = &rte_eth_devices[port_id];
2797 /* Check entry value */
2798 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2799 dev->data->nb_rx_queues);
2803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2804 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2809 rte_eth_dev_rss_reta_query(uint16_t port_id,
2810 struct rte_eth_rss_reta_entry64 *reta_conf,
2813 struct rte_eth_dev *dev;
2816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2818 /* Check mask bits */
2819 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2823 dev = &rte_eth_devices[port_id];
2824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2825 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2830 rte_eth_dev_rss_hash_update(uint16_t port_id,
2831 struct rte_eth_rss_conf *rss_conf)
2833 struct rte_eth_dev *dev;
2834 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2836 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2837 dev = &rte_eth_devices[port_id];
2838 rte_eth_dev_info_get(port_id, &dev_info);
2839 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2840 dev_info.flow_type_rss_offloads) {
2842 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2843 port_id, rss_conf->rss_hf,
2844 dev_info.flow_type_rss_offloads);
2847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2848 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2853 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2854 struct rte_eth_rss_conf *rss_conf)
2856 struct rte_eth_dev *dev;
2858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2859 dev = &rte_eth_devices[port_id];
2860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2861 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2866 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2867 struct rte_eth_udp_tunnel *udp_tunnel)
2869 struct rte_eth_dev *dev;
2871 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2872 if (udp_tunnel == NULL) {
2873 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2877 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2878 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2882 dev = &rte_eth_devices[port_id];
2883 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2884 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2889 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2890 struct rte_eth_udp_tunnel *udp_tunnel)
2892 struct rte_eth_dev *dev;
2894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2895 dev = &rte_eth_devices[port_id];
2897 if (udp_tunnel == NULL) {
2898 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2902 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2903 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2908 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2913 rte_eth_led_on(uint16_t port_id)
2915 struct rte_eth_dev *dev;
2917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2918 dev = &rte_eth_devices[port_id];
2919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2920 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2924 rte_eth_led_off(uint16_t port_id)
2926 struct rte_eth_dev *dev;
2928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2929 dev = &rte_eth_devices[port_id];
2930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2931 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2935 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2939 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2941 struct rte_eth_dev_info dev_info;
2942 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2945 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2946 rte_eth_dev_info_get(port_id, &dev_info);
2948 for (i = 0; i < dev_info.max_mac_addrs; i++)
2949 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2955 static const struct ether_addr null_mac_addr;
2958 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2961 struct rte_eth_dev *dev;
2966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2967 dev = &rte_eth_devices[port_id];
2968 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2970 if (is_zero_ether_addr(addr)) {
2971 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2975 if (pool >= ETH_64_POOLS) {
2976 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2980 index = get_mac_addr_index(port_id, addr);
2982 index = get_mac_addr_index(port_id, &null_mac_addr);
2984 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2989 pool_mask = dev->data->mac_pool_sel[index];
2991 /* Check if both MAC address and pool is already there, and do nothing */
2992 if (pool_mask & (1ULL << pool))
2997 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3000 /* Update address in NIC data structure */
3001 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3003 /* Update pool bitmap in NIC data structure */
3004 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3007 return eth_err(port_id, ret);
3011 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3013 struct rte_eth_dev *dev;
3016 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3017 dev = &rte_eth_devices[port_id];
3018 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3020 index = get_mac_addr_index(port_id, addr);
3023 "Port %u: Cannot remove default MAC address\n",
3026 } else if (index < 0)
3027 return 0; /* Do nothing if address wasn't found */
3030 (*dev->dev_ops->mac_addr_remove)(dev, index);
3032 /* Update address in NIC data structure */
3033 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3035 /* reset pool bitmap */
3036 dev->data->mac_pool_sel[index] = 0;
3042 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3044 struct rte_eth_dev *dev;
3047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3049 if (!is_valid_assigned_ether_addr(addr))
3052 dev = &rte_eth_devices[port_id];
3053 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3055 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3059 /* Update default address in NIC data structure */
3060 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3067 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3071 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3073 struct rte_eth_dev_info dev_info;
3074 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3077 rte_eth_dev_info_get(port_id, &dev_info);
3078 if (!dev->data->hash_mac_addrs)
3081 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3082 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3083 ETHER_ADDR_LEN) == 0)
3090 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3095 struct rte_eth_dev *dev;
3097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3099 dev = &rte_eth_devices[port_id];
3100 if (is_zero_ether_addr(addr)) {
3101 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3106 index = get_hash_mac_addr_index(port_id, addr);
3107 /* Check if it's already there, and do nothing */
3108 if ((index >= 0) && on)
3114 "Port %u: the MAC address was not set in UTA\n",
3119 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3121 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3127 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3128 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3130 /* Update address in NIC data structure */
3132 ether_addr_copy(addr,
3133 &dev->data->hash_mac_addrs[index]);
3135 ether_addr_copy(&null_mac_addr,
3136 &dev->data->hash_mac_addrs[index]);
3139 return eth_err(port_id, ret);
3143 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3145 struct rte_eth_dev *dev;
3147 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3149 dev = &rte_eth_devices[port_id];
3151 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3152 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3156 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3159 struct rte_eth_dev *dev;
3160 struct rte_eth_dev_info dev_info;
3161 struct rte_eth_link link;
3163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3165 dev = &rte_eth_devices[port_id];
3166 rte_eth_dev_info_get(port_id, &dev_info);
3167 link = dev->data->dev_link;
3169 if (queue_idx > dev_info.max_tx_queues) {
3171 "Set queue rate limit:port %u: invalid queue id=%u\n",
3172 port_id, queue_idx);
3176 if (tx_rate > link.link_speed) {
3178 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3179 tx_rate, link.link_speed);
3183 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3184 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3185 queue_idx, tx_rate));
3189 rte_eth_mirror_rule_set(uint16_t port_id,
3190 struct rte_eth_mirror_conf *mirror_conf,
3191 uint8_t rule_id, uint8_t on)
3193 struct rte_eth_dev *dev;
3195 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3196 if (mirror_conf->rule_type == 0) {
3197 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3201 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3202 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3207 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3208 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3209 (mirror_conf->pool_mask == 0)) {
3211 "Invalid mirror pool, pool mask can not be 0\n");
3215 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3216 mirror_conf->vlan.vlan_mask == 0) {
3218 "Invalid vlan mask, vlan mask can not be 0\n");
3222 dev = &rte_eth_devices[port_id];
3223 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3225 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3226 mirror_conf, rule_id, on));
3230 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3232 struct rte_eth_dev *dev;
3234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3236 dev = &rte_eth_devices[port_id];
3237 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3239 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3243 RTE_INIT(eth_dev_init_cb_lists)
3247 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3248 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3252 rte_eth_dev_callback_register(uint16_t port_id,
3253 enum rte_eth_event_type event,
3254 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3256 struct rte_eth_dev *dev;
3257 struct rte_eth_dev_callback *user_cb;
3258 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3264 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3265 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3269 if (port_id == RTE_ETH_ALL) {
3271 last_port = RTE_MAX_ETHPORTS - 1;
3273 next_port = last_port = port_id;
3276 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3279 dev = &rte_eth_devices[next_port];
3281 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3282 if (user_cb->cb_fn == cb_fn &&
3283 user_cb->cb_arg == cb_arg &&
3284 user_cb->event == event) {
3289 /* create a new callback. */
3290 if (user_cb == NULL) {
3291 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3292 sizeof(struct rte_eth_dev_callback), 0);
3293 if (user_cb != NULL) {
3294 user_cb->cb_fn = cb_fn;
3295 user_cb->cb_arg = cb_arg;
3296 user_cb->event = event;
3297 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3300 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3301 rte_eth_dev_callback_unregister(port_id, event,
3307 } while (++next_port <= last_port);
3309 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3314 rte_eth_dev_callback_unregister(uint16_t port_id,
3315 enum rte_eth_event_type event,
3316 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3319 struct rte_eth_dev *dev;
3320 struct rte_eth_dev_callback *cb, *next;
3321 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3327 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3328 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3332 if (port_id == RTE_ETH_ALL) {
3334 last_port = RTE_MAX_ETHPORTS - 1;
3336 next_port = last_port = port_id;
3339 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3342 dev = &rte_eth_devices[next_port];
3344 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3347 next = TAILQ_NEXT(cb, next);
3349 if (cb->cb_fn != cb_fn || cb->event != event ||
3350 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3354 * if this callback is not executing right now,
3357 if (cb->active == 0) {
3358 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3364 } while (++next_port <= last_port);
3366 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3371 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3372 enum rte_eth_event_type event, void *ret_param)
3374 struct rte_eth_dev_callback *cb_lst;
3375 struct rte_eth_dev_callback dev_cb;
3378 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3379 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3380 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3384 if (ret_param != NULL)
3385 dev_cb.ret_param = ret_param;
3387 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3388 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3389 dev_cb.cb_arg, dev_cb.ret_param);
3390 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3393 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3398 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3403 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3405 dev->state = RTE_ETH_DEV_ATTACHED;
3409 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3412 struct rte_eth_dev *dev;
3413 struct rte_intr_handle *intr_handle;
3417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3419 dev = &rte_eth_devices[port_id];
3421 if (!dev->intr_handle) {
3422 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3426 intr_handle = dev->intr_handle;
3427 if (!intr_handle->intr_vec) {
3428 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3432 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3433 vec = intr_handle->intr_vec[qid];
3434 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3435 if (rc && rc != -EEXIST) {
3437 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3438 port_id, qid, op, epfd, vec);
3445 const struct rte_memzone *
3446 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3447 uint16_t queue_id, size_t size, unsigned align,
3450 char z_name[RTE_MEMZONE_NAMESIZE];
3451 const struct rte_memzone *mz;
3453 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3454 dev->device->driver->name, ring_name,
3455 dev->data->port_id, queue_id);
3457 mz = rte_memzone_lookup(z_name);
3461 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3462 RTE_MEMZONE_IOVA_CONTIG, align);
3465 int __rte_experimental
3466 rte_eth_dev_create(struct rte_device *device, const char *name,
3467 size_t priv_data_size,
3468 ethdev_bus_specific_init ethdev_bus_specific_init,
3469 void *bus_init_params,
3470 ethdev_init_t ethdev_init, void *init_params)
3472 struct rte_eth_dev *ethdev;
3475 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3477 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3478 ethdev = rte_eth_dev_allocate(name);
3484 if (priv_data_size) {
3485 ethdev->data->dev_private = rte_zmalloc_socket(
3486 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3489 if (!ethdev->data->dev_private) {
3490 RTE_LOG(ERR, EAL, "failed to allocate private data");
3496 ethdev = rte_eth_dev_attach_secondary(name);
3498 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3499 "ethdev doesn't exist");
3505 ethdev->device = device;
3507 if (ethdev_bus_specific_init) {
3508 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3511 "ethdev bus specific initialisation failed");
3516 retval = ethdev_init(ethdev, init_params);
3518 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3522 rte_eth_dev_probing_finish(ethdev);
3526 /* free ports private data if primary process */
3527 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3528 rte_free(ethdev->data->dev_private);
3530 rte_eth_dev_release_port(ethdev);
3535 int __rte_experimental
3536 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3537 ethdev_uninit_t ethdev_uninit)
3541 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3545 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3546 if (ethdev_uninit) {
3547 ret = ethdev_uninit(ethdev);
3552 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3553 rte_free(ethdev->data->dev_private);
3555 ethdev->data->dev_private = NULL;
3557 return rte_eth_dev_release_port(ethdev);
3561 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3562 int epfd, int op, void *data)
3565 struct rte_eth_dev *dev;
3566 struct rte_intr_handle *intr_handle;
3569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3571 dev = &rte_eth_devices[port_id];
3572 if (queue_id >= dev->data->nb_rx_queues) {
3573 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3577 if (!dev->intr_handle) {
3578 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3582 intr_handle = dev->intr_handle;
3583 if (!intr_handle->intr_vec) {
3584 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3588 vec = intr_handle->intr_vec[queue_id];
3589 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3590 if (rc && rc != -EEXIST) {
3592 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3593 port_id, queue_id, op, epfd, vec);
3601 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3604 struct rte_eth_dev *dev;
3606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3608 dev = &rte_eth_devices[port_id];
3610 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3611 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3616 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3619 struct rte_eth_dev *dev;
3621 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3623 dev = &rte_eth_devices[port_id];
3625 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3626 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3632 rte_eth_dev_filter_supported(uint16_t port_id,
3633 enum rte_filter_type filter_type)
3635 struct rte_eth_dev *dev;
3637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3639 dev = &rte_eth_devices[port_id];
3640 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3641 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3642 RTE_ETH_FILTER_NOP, NULL);
3646 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3647 enum rte_filter_op filter_op, void *arg)
3649 struct rte_eth_dev *dev;
3651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3653 dev = &rte_eth_devices[port_id];
3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3655 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3659 const struct rte_eth_rxtx_callback *
3660 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3661 rte_rx_callback_fn fn, void *user_param)
3663 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3664 rte_errno = ENOTSUP;
3667 /* check input parameters */
3668 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3669 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3673 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3681 cb->param = user_param;
3683 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3684 /* Add the callbacks in fifo order. */
3685 struct rte_eth_rxtx_callback *tail =
3686 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3689 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3696 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3701 const struct rte_eth_rxtx_callback *
3702 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3703 rte_rx_callback_fn fn, void *user_param)
3705 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3706 rte_errno = ENOTSUP;
3709 /* check input parameters */
3710 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3711 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3716 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3724 cb->param = user_param;
3726 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3727 /* Add the callbacks at fisrt position*/
3728 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3730 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3731 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3736 const struct rte_eth_rxtx_callback *
3737 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3738 rte_tx_callback_fn fn, void *user_param)
3740 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3741 rte_errno = ENOTSUP;
3744 /* check input parameters */
3745 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3746 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3751 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3759 cb->param = user_param;
3761 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3762 /* Add the callbacks in fifo order. */
3763 struct rte_eth_rxtx_callback *tail =
3764 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3767 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3774 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3780 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3781 const struct rte_eth_rxtx_callback *user_cb)
3783 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3786 /* Check input parameters. */
3787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3788 if (user_cb == NULL ||
3789 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3792 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3793 struct rte_eth_rxtx_callback *cb;
3794 struct rte_eth_rxtx_callback **prev_cb;
3797 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3798 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3799 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3801 if (cb == user_cb) {
3802 /* Remove the user cb from the callback list. */
3803 *prev_cb = cb->next;
3808 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3814 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3815 const struct rte_eth_rxtx_callback *user_cb)
3817 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3820 /* Check input parameters. */
3821 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3822 if (user_cb == NULL ||
3823 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3826 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3828 struct rte_eth_rxtx_callback *cb;
3829 struct rte_eth_rxtx_callback **prev_cb;
3831 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3832 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3833 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3835 if (cb == user_cb) {
3836 /* Remove the user cb from the callback list. */
3837 *prev_cb = cb->next;
3842 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3848 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3849 struct rte_eth_rxq_info *qinfo)
3851 struct rte_eth_dev *dev;
3853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3858 dev = &rte_eth_devices[port_id];
3859 if (queue_id >= dev->data->nb_rx_queues) {
3860 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3864 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3866 memset(qinfo, 0, sizeof(*qinfo));
3867 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3872 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3873 struct rte_eth_txq_info *qinfo)
3875 struct rte_eth_dev *dev;
3877 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3882 dev = &rte_eth_devices[port_id];
3883 if (queue_id >= dev->data->nb_tx_queues) {
3884 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3890 memset(qinfo, 0, sizeof(*qinfo));
3891 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3897 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3898 struct ether_addr *mc_addr_set,
3899 uint32_t nb_mc_addr)
3901 struct rte_eth_dev *dev;
3903 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3905 dev = &rte_eth_devices[port_id];
3906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3907 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3908 mc_addr_set, nb_mc_addr));
3912 rte_eth_timesync_enable(uint16_t port_id)
3914 struct rte_eth_dev *dev;
3916 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3917 dev = &rte_eth_devices[port_id];
3919 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3920 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3924 rte_eth_timesync_disable(uint16_t port_id)
3926 struct rte_eth_dev *dev;
3928 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3929 dev = &rte_eth_devices[port_id];
3931 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3932 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3936 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3939 struct rte_eth_dev *dev;
3941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3942 dev = &rte_eth_devices[port_id];
3944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3945 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3946 (dev, timestamp, flags));
3950 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3951 struct timespec *timestamp)
3953 struct rte_eth_dev *dev;
3955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3956 dev = &rte_eth_devices[port_id];
3958 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3959 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3964 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3966 struct rte_eth_dev *dev;
3968 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3969 dev = &rte_eth_devices[port_id];
3971 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3972 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3977 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3979 struct rte_eth_dev *dev;
3981 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3984 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3985 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3990 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3992 struct rte_eth_dev *dev;
3994 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3995 dev = &rte_eth_devices[port_id];
3997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3998 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4003 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4005 struct rte_eth_dev *dev;
4007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4009 dev = &rte_eth_devices[port_id];
4010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4011 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4015 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4017 struct rte_eth_dev *dev;
4019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4021 dev = &rte_eth_devices[port_id];
4022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4023 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4027 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4029 struct rte_eth_dev *dev;
4031 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4033 dev = &rte_eth_devices[port_id];
4034 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4035 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4039 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4041 struct rte_eth_dev *dev;
4043 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4045 dev = &rte_eth_devices[port_id];
4046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4047 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4050 int __rte_experimental
4051 rte_eth_dev_get_module_info(uint16_t port_id,
4052 struct rte_eth_dev_module_info *modinfo)
4054 struct rte_eth_dev *dev;
4056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4058 dev = &rte_eth_devices[port_id];
4059 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4060 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4063 int __rte_experimental
4064 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4065 struct rte_dev_eeprom_info *info)
4067 struct rte_eth_dev *dev;
4069 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4071 dev = &rte_eth_devices[port_id];
4072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4073 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4077 rte_eth_dev_get_dcb_info(uint16_t port_id,
4078 struct rte_eth_dcb_info *dcb_info)
4080 struct rte_eth_dev *dev;
4082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4084 dev = &rte_eth_devices[port_id];
4085 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4087 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4088 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4092 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4093 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4095 struct rte_eth_dev *dev;
4097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4098 if (l2_tunnel == NULL) {
4099 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4103 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4104 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4108 dev = &rte_eth_devices[port_id];
4109 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4111 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4116 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4117 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4121 struct rte_eth_dev *dev;
4123 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4125 if (l2_tunnel == NULL) {
4126 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4130 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4131 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4136 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4140 dev = &rte_eth_devices[port_id];
4141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4143 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4144 l2_tunnel, mask, en));
4148 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4149 const struct rte_eth_desc_lim *desc_lim)
4151 if (desc_lim->nb_align != 0)
4152 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4154 if (desc_lim->nb_max != 0)
4155 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4157 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4161 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4162 uint16_t *nb_rx_desc,
4163 uint16_t *nb_tx_desc)
4165 struct rte_eth_dev *dev;
4166 struct rte_eth_dev_info dev_info;
4168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4170 dev = &rte_eth_devices[port_id];
4171 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4173 rte_eth_dev_info_get(port_id, &dev_info);
4175 if (nb_rx_desc != NULL)
4176 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4178 if (nb_tx_desc != NULL)
4179 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4185 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4187 struct rte_eth_dev *dev;
4189 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4194 dev = &rte_eth_devices[port_id];
4196 if (*dev->dev_ops->pool_ops_supported == NULL)
4197 return 1; /* all pools are supported */
4199 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4203 * A set of values to describe the possible states of a switch domain.
4205 enum rte_eth_switch_domain_state {
4206 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4207 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4211 * Array of switch domains available for allocation. Array is sized to
4212 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4213 * ethdev ports in a single process.
4215 struct rte_eth_dev_switch {
4216 enum rte_eth_switch_domain_state state;
4217 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4219 int __rte_experimental
4220 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4224 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4226 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4227 i < RTE_MAX_ETHPORTS; i++) {
4228 if (rte_eth_switch_domains[i].state ==
4229 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4230 rte_eth_switch_domains[i].state =
4231 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4240 int __rte_experimental
4241 rte_eth_switch_domain_free(uint16_t domain_id)
4243 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4244 domain_id >= RTE_MAX_ETHPORTS)
4247 if (rte_eth_switch_domains[domain_id].state !=
4248 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4251 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4256 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4259 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4262 struct rte_kvargs_pair *pair;
4265 arglist->str = strdup(str_in);
4266 if (arglist->str == NULL)
4269 letter = arglist->str;
4272 pair = &arglist->pairs[0];
4275 case 0: /* Initial */
4278 else if (*letter == '\0')
4285 case 1: /* Parsing key */
4286 if (*letter == '=') {
4288 pair->value = letter + 1;
4290 } else if (*letter == ',' || *letter == '\0')
4295 case 2: /* Parsing value */
4298 else if (*letter == ',') {
4301 pair = &arglist->pairs[arglist->count];
4303 } else if (*letter == '\0') {
4306 pair = &arglist->pairs[arglist->count];
4311 case 3: /* Parsing list */
4314 else if (*letter == '\0')
4323 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4331 /* Single element, not a list */
4332 return callback(str, data);
4334 /* Sanity check, then strip the brackets */
4335 str_start = &str[strlen(str) - 1];
4336 if (*str_start != ']') {
4337 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4343 /* Process list elements */
4353 } else if (state == 1) {
4354 if (*str == ',' || *str == '\0') {
4355 if (str > str_start) {
4356 /* Non-empty string fragment */
4358 result = callback(str_start, data);
4371 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4372 const uint16_t max_list)
4374 uint16_t lo, hi, val;
4377 result = sscanf(str, "%hu-%hu", &lo, &hi);
4379 if (*len_list >= max_list)
4381 list[(*len_list)++] = lo;
4382 } else if (result == 2) {
4383 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4385 for (val = lo; val <= hi; val++) {
4386 if (*len_list >= max_list)
4388 list[(*len_list)++] = val;
4397 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4399 struct rte_eth_devargs *eth_da = data;
4401 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4402 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4405 int __rte_experimental
4406 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4408 struct rte_kvargs args;
4409 struct rte_kvargs_pair *pair;
4413 memset(eth_da, 0, sizeof(*eth_da));
4415 result = rte_eth_devargs_tokenise(&args, dargs);
4419 for (i = 0; i < args.count; i++) {
4420 pair = &args.pairs[i];
4421 if (strcmp("representor", pair->key) == 0) {
4422 result = rte_eth_devargs_parse_list(pair->value,
4423 rte_eth_devargs_parse_representor_ports,
4437 RTE_INIT(ethdev_init_log)
4439 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4440 if (rte_eth_dev_logtype >= 0)
4441 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);