ring: use custom element for fixed size API
[dpdk.git] / lib / librte_ethdev / rte_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4
5 #include <sys/types.h>
6 #include <sys/queue.h>
7 #include <ctype.h>
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <string.h>
11 #include <stdarg.h>
12 #include <errno.h>
13 #include <stdbool.h>
14 #include <stdint.h>
15 #include <inttypes.h>
16 #include <netinet/in.h>
17
18 #include <rte_byteorder.h>
19 #include <rte_log.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
26 #include <rte_eal.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
34 #include <rte_mbuf.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
42
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
48
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63
64 /* store statistics names and its offset in stats structure  */
65 struct rte_eth_xstats_name_off {
66         char name[RTE_ETH_XSTATS_NAME_SIZE];
67         unsigned offset;
68 };
69
70 /* Shared memory between primary and secondary processes. */
71 static struct {
72         uint64_t next_owner_id;
73         rte_spinlock_t ownership_lock;
74         struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
76
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78         {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79         {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80         {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81         {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82         {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83         {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84         {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85         {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
86                 rx_nombuf)},
87 };
88
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
90
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92         {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93         {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94         {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 };
96
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
98
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100         {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101         {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
102 };
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
104
105 #define RTE_RX_OFFLOAD_BIT2STR(_name)   \
106         { DEV_RX_OFFLOAD_##_name, #_name }
107
108 static const struct {
109         uint64_t offload;
110         const char *name;
111 } rte_rx_offload_names[] = {
112         RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113         RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114         RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115         RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116         RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117         RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118         RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119         RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120         RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121         RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122         RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123         RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124         RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125         RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126         RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127         RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128         RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129         RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130         RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
131 };
132
133 #undef RTE_RX_OFFLOAD_BIT2STR
134
135 #define RTE_TX_OFFLOAD_BIT2STR(_name)   \
136         { DEV_TX_OFFLOAD_##_name, #_name }
137
138 static const struct {
139         uint64_t offload;
140         const char *name;
141 } rte_tx_offload_names[] = {
142         RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143         RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144         RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145         RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146         RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147         RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148         RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149         RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150         RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151         RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152         RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153         RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154         RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155         RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156         RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157         RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158         RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159         RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160         RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161         RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162         RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 };
164
165 #undef RTE_TX_OFFLOAD_BIT2STR
166
167 /**
168  * The user application callback description.
169  *
170  * It contains callback address to be registered by user application,
171  * the pointer to the parameters for callback, and the event type.
172  */
173 struct rte_eth_dev_callback {
174         TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
175         rte_eth_dev_cb_fn cb_fn;                /**< Callback address */
176         void *cb_arg;                           /**< Parameter for callback */
177         void *ret_param;                        /**< Return parameter */
178         enum rte_eth_event_type event;          /**< Interrupt event type */
179         uint32_t active;                        /**< Callback is executing */
180 };
181
182 enum {
183         STAT_QMAP_TX = 0,
184         STAT_QMAP_RX
185 };
186
187 int
188 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
189 {
190         int ret;
191         struct rte_devargs devargs = {.args = NULL};
192         const char *bus_param_key;
193         char *bus_str = NULL;
194         char *cls_str = NULL;
195         int str_size;
196
197         memset(iter, 0, sizeof(*iter));
198
199         /*
200          * The devargs string may use various syntaxes:
201          *   - 0000:08:00.0,representor=[1-3]
202          *   - pci:0000:06:00.0,representor=[0,5]
203          *   - class=eth,mac=00:11:22:33:44:55
204          * A new syntax is in development (not yet supported):
205          *   - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
206          */
207
208         /*
209          * Handle pure class filter (i.e. without any bus-level argument),
210          * from future new syntax.
211          * rte_devargs_parse() is not yet supporting the new syntax,
212          * that's why this simple case is temporarily parsed here.
213          */
214 #define iter_anybus_str "class=eth,"
215         if (strncmp(devargs_str, iter_anybus_str,
216                         strlen(iter_anybus_str)) == 0) {
217                 iter->cls_str = devargs_str + strlen(iter_anybus_str);
218                 goto end;
219         }
220
221         /* Split bus, device and parameters. */
222         ret = rte_devargs_parse(&devargs, devargs_str);
223         if (ret != 0)
224                 goto error;
225
226         /*
227          * Assume parameters of old syntax can match only at ethdev level.
228          * Extra parameters will be ignored, thanks to "+" prefix.
229          */
230         str_size = strlen(devargs.args) + 2;
231         cls_str = malloc(str_size);
232         if (cls_str == NULL) {
233                 ret = -ENOMEM;
234                 goto error;
235         }
236         ret = snprintf(cls_str, str_size, "+%s", devargs.args);
237         if (ret != str_size - 1) {
238                 ret = -EINVAL;
239                 goto error;
240         }
241         iter->cls_str = cls_str;
242         free(devargs.args); /* allocated by rte_devargs_parse() */
243         devargs.args = NULL;
244
245         iter->bus = devargs.bus;
246         if (iter->bus->dev_iterate == NULL) {
247                 ret = -ENOTSUP;
248                 goto error;
249         }
250
251         /* Convert bus args to new syntax for use with new API dev_iterate. */
252         if (strcmp(iter->bus->name, "vdev") == 0) {
253                 bus_param_key = "name";
254         } else if (strcmp(iter->bus->name, "pci") == 0) {
255                 bus_param_key = "addr";
256         } else {
257                 ret = -ENOTSUP;
258                 goto error;
259         }
260         str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
261         bus_str = malloc(str_size);
262         if (bus_str == NULL) {
263                 ret = -ENOMEM;
264                 goto error;
265         }
266         ret = snprintf(bus_str, str_size, "%s=%s",
267                         bus_param_key, devargs.name);
268         if (ret != str_size - 1) {
269                 ret = -EINVAL;
270                 goto error;
271         }
272         iter->bus_str = bus_str;
273
274 end:
275         iter->cls = rte_class_find_by_name("eth");
276         return 0;
277
278 error:
279         if (ret == -ENOTSUP)
280                 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
281                                 iter->bus->name);
282         free(devargs.args);
283         free(bus_str);
284         free(cls_str);
285         return ret;
286 }
287
288 uint16_t
289 rte_eth_iterator_next(struct rte_dev_iterator *iter)
290 {
291         if (iter->cls == NULL) /* invalid ethdev iterator */
292                 return RTE_MAX_ETHPORTS;
293
294         do { /* loop to try all matching rte_device */
295                 /* If not pure ethdev filter and */
296                 if (iter->bus != NULL &&
297                                 /* not in middle of rte_eth_dev iteration, */
298                                 iter->class_device == NULL) {
299                         /* get next rte_device to try. */
300                         iter->device = iter->bus->dev_iterate(
301                                         iter->device, iter->bus_str, iter);
302                         if (iter->device == NULL)
303                                 break; /* no more rte_device candidate */
304                 }
305                 /* A device is matching bus part, need to check ethdev part. */
306                 iter->class_device = iter->cls->dev_iterate(
307                                 iter->class_device, iter->cls_str, iter);
308                 if (iter->class_device != NULL)
309                         return eth_dev_to_id(iter->class_device); /* match */
310         } while (iter->bus != NULL); /* need to try next rte_device */
311
312         /* No more ethdev port to iterate. */
313         rte_eth_iterator_cleanup(iter);
314         return RTE_MAX_ETHPORTS;
315 }
316
317 void
318 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
319 {
320         if (iter->bus_str == NULL)
321                 return; /* nothing to free in pure class filter */
322         free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
323         free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
324         memset(iter, 0, sizeof(*iter));
325 }
326
327 uint16_t
328 rte_eth_find_next(uint16_t port_id)
329 {
330         while (port_id < RTE_MAX_ETHPORTS &&
331                         rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
332                 port_id++;
333
334         if (port_id >= RTE_MAX_ETHPORTS)
335                 return RTE_MAX_ETHPORTS;
336
337         return port_id;
338 }
339
340 /*
341  * Macro to iterate over all valid ports for internal usage.
342  * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
343  */
344 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
345         for (port_id = rte_eth_find_next(0); \
346              port_id < RTE_MAX_ETHPORTS; \
347              port_id = rte_eth_find_next(port_id + 1))
348
349 uint16_t
350 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
351 {
352         port_id = rte_eth_find_next(port_id);
353         while (port_id < RTE_MAX_ETHPORTS &&
354                         rte_eth_devices[port_id].device != parent)
355                 port_id = rte_eth_find_next(port_id + 1);
356
357         return port_id;
358 }
359
360 uint16_t
361 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
362 {
363         RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
364         return rte_eth_find_next_of(port_id,
365                         rte_eth_devices[ref_port_id].device);
366 }
367
368 static void
369 rte_eth_dev_shared_data_prepare(void)
370 {
371         const unsigned flags = 0;
372         const struct rte_memzone *mz;
373
374         rte_spinlock_lock(&rte_eth_shared_data_lock);
375
376         if (rte_eth_dev_shared_data == NULL) {
377                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
378                         /* Allocate port data and ownership shared memory. */
379                         mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
380                                         sizeof(*rte_eth_dev_shared_data),
381                                         rte_socket_id(), flags);
382                 } else
383                         mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
384                 if (mz == NULL)
385                         rte_panic("Cannot allocate ethdev shared data\n");
386
387                 rte_eth_dev_shared_data = mz->addr;
388                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
389                         rte_eth_dev_shared_data->next_owner_id =
390                                         RTE_ETH_DEV_NO_OWNER + 1;
391                         rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
392                         memset(rte_eth_dev_shared_data->data, 0,
393                                sizeof(rte_eth_dev_shared_data->data));
394                 }
395         }
396
397         rte_spinlock_unlock(&rte_eth_shared_data_lock);
398 }
399
400 static bool
401 is_allocated(const struct rte_eth_dev *ethdev)
402 {
403         return ethdev->data->name[0] != '\0';
404 }
405
406 static struct rte_eth_dev *
407 _rte_eth_dev_allocated(const char *name)
408 {
409         unsigned i;
410
411         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
412                 if (rte_eth_devices[i].data != NULL &&
413                     strcmp(rte_eth_devices[i].data->name, name) == 0)
414                         return &rte_eth_devices[i];
415         }
416         return NULL;
417 }
418
419 struct rte_eth_dev *
420 rte_eth_dev_allocated(const char *name)
421 {
422         struct rte_eth_dev *ethdev;
423
424         rte_eth_dev_shared_data_prepare();
425
426         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
427
428         ethdev = _rte_eth_dev_allocated(name);
429
430         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
431
432         return ethdev;
433 }
434
435 static uint16_t
436 rte_eth_dev_find_free_port(void)
437 {
438         unsigned i;
439
440         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441                 /* Using shared name field to find a free port. */
442                 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
443                         RTE_ASSERT(rte_eth_devices[i].state ==
444                                    RTE_ETH_DEV_UNUSED);
445                         return i;
446                 }
447         }
448         return RTE_MAX_ETHPORTS;
449 }
450
451 static struct rte_eth_dev *
452 eth_dev_get(uint16_t port_id)
453 {
454         struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
455
456         eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
457
458         return eth_dev;
459 }
460
461 struct rte_eth_dev *
462 rte_eth_dev_allocate(const char *name)
463 {
464         uint16_t port_id;
465         struct rte_eth_dev *eth_dev = NULL;
466         size_t name_len;
467
468         name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
469         if (name_len == 0) {
470                 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
471                 return NULL;
472         }
473
474         if (name_len >= RTE_ETH_NAME_MAX_LEN) {
475                 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
476                 return NULL;
477         }
478
479         rte_eth_dev_shared_data_prepare();
480
481         /* Synchronize port creation between primary and secondary threads. */
482         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
483
484         if (_rte_eth_dev_allocated(name) != NULL) {
485                 RTE_ETHDEV_LOG(ERR,
486                         "Ethernet device with name %s already allocated\n",
487                         name);
488                 goto unlock;
489         }
490
491         port_id = rte_eth_dev_find_free_port();
492         if (port_id == RTE_MAX_ETHPORTS) {
493                 RTE_ETHDEV_LOG(ERR,
494                         "Reached maximum number of Ethernet ports\n");
495                 goto unlock;
496         }
497
498         eth_dev = eth_dev_get(port_id);
499         strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
500         eth_dev->data->port_id = port_id;
501         eth_dev->data->mtu = RTE_ETHER_MTU;
502
503 unlock:
504         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
505
506         return eth_dev;
507 }
508
509 /*
510  * Attach to a port already registered by the primary process, which
511  * makes sure that the same device would have the same port id both
512  * in the primary and secondary process.
513  */
514 struct rte_eth_dev *
515 rte_eth_dev_attach_secondary(const char *name)
516 {
517         uint16_t i;
518         struct rte_eth_dev *eth_dev = NULL;
519
520         rte_eth_dev_shared_data_prepare();
521
522         /* Synchronize port attachment to primary port creation and release. */
523         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
524
525         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
526                 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
527                         break;
528         }
529         if (i == RTE_MAX_ETHPORTS) {
530                 RTE_ETHDEV_LOG(ERR,
531                         "Device %s is not driven by the primary process\n",
532                         name);
533         } else {
534                 eth_dev = eth_dev_get(i);
535                 RTE_ASSERT(eth_dev->data->port_id == i);
536         }
537
538         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
539         return eth_dev;
540 }
541
542 int
543 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
544 {
545         if (eth_dev == NULL)
546                 return -EINVAL;
547
548         rte_eth_dev_shared_data_prepare();
549
550         if (eth_dev->state != RTE_ETH_DEV_UNUSED)
551                 _rte_eth_dev_callback_process(eth_dev,
552                                 RTE_ETH_EVENT_DESTROY, NULL);
553
554         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
555
556         eth_dev->state = RTE_ETH_DEV_UNUSED;
557
558         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
559                 rte_free(eth_dev->data->rx_queues);
560                 rte_free(eth_dev->data->tx_queues);
561                 rte_free(eth_dev->data->mac_addrs);
562                 rte_free(eth_dev->data->hash_mac_addrs);
563                 rte_free(eth_dev->data->dev_private);
564                 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
565         }
566
567         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
568
569         return 0;
570 }
571
572 int
573 rte_eth_dev_is_valid_port(uint16_t port_id)
574 {
575         if (port_id >= RTE_MAX_ETHPORTS ||
576             (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
577                 return 0;
578         else
579                 return 1;
580 }
581
582 static int
583 rte_eth_is_valid_owner_id(uint64_t owner_id)
584 {
585         if (owner_id == RTE_ETH_DEV_NO_OWNER ||
586             rte_eth_dev_shared_data->next_owner_id <= owner_id)
587                 return 0;
588         return 1;
589 }
590
591 uint64_t
592 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
593 {
594         port_id = rte_eth_find_next(port_id);
595         while (port_id < RTE_MAX_ETHPORTS &&
596                         rte_eth_devices[port_id].data->owner.id != owner_id)
597                 port_id = rte_eth_find_next(port_id + 1);
598
599         return port_id;
600 }
601
602 int
603 rte_eth_dev_owner_new(uint64_t *owner_id)
604 {
605         rte_eth_dev_shared_data_prepare();
606
607         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
608
609         *owner_id = rte_eth_dev_shared_data->next_owner_id++;
610
611         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
612         return 0;
613 }
614
615 static int
616 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
617                        const struct rte_eth_dev_owner *new_owner)
618 {
619         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
620         struct rte_eth_dev_owner *port_owner;
621
622         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
623                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
624                         port_id);
625                 return -ENODEV;
626         }
627
628         if (!rte_eth_is_valid_owner_id(new_owner->id) &&
629             !rte_eth_is_valid_owner_id(old_owner_id)) {
630                 RTE_ETHDEV_LOG(ERR,
631                         "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
632                        old_owner_id, new_owner->id);
633                 return -EINVAL;
634         }
635
636         port_owner = &rte_eth_devices[port_id].data->owner;
637         if (port_owner->id != old_owner_id) {
638                 RTE_ETHDEV_LOG(ERR,
639                         "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
640                         port_id, port_owner->name, port_owner->id);
641                 return -EPERM;
642         }
643
644         /* can not truncate (same structure) */
645         strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
646
647         port_owner->id = new_owner->id;
648
649         RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
650                 port_id, new_owner->name, new_owner->id);
651
652         return 0;
653 }
654
655 int
656 rte_eth_dev_owner_set(const uint16_t port_id,
657                       const struct rte_eth_dev_owner *owner)
658 {
659         int ret;
660
661         rte_eth_dev_shared_data_prepare();
662
663         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
664
665         ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
666
667         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
668         return ret;
669 }
670
671 int
672 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
673 {
674         const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
675                         {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
676         int ret;
677
678         rte_eth_dev_shared_data_prepare();
679
680         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
681
682         ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
683
684         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
685         return ret;
686 }
687
688 int
689 rte_eth_dev_owner_delete(const uint64_t owner_id)
690 {
691         uint16_t port_id;
692         int ret = 0;
693
694         rte_eth_dev_shared_data_prepare();
695
696         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
697
698         if (rte_eth_is_valid_owner_id(owner_id)) {
699                 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
700                         if (rte_eth_devices[port_id].data->owner.id == owner_id)
701                                 memset(&rte_eth_devices[port_id].data->owner, 0,
702                                        sizeof(struct rte_eth_dev_owner));
703                 RTE_ETHDEV_LOG(NOTICE,
704                         "All port owners owned by %016"PRIx64" identifier have removed\n",
705                         owner_id);
706         } else {
707                 RTE_ETHDEV_LOG(ERR,
708                                "Invalid owner id=%016"PRIx64"\n",
709                                owner_id);
710                 ret = -EINVAL;
711         }
712
713         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
714
715         return ret;
716 }
717
718 int
719 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
720 {
721         int ret = 0;
722         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
723
724         rte_eth_dev_shared_data_prepare();
725
726         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
727
728         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
729                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
730                         port_id);
731                 ret = -ENODEV;
732         } else {
733                 rte_memcpy(owner, &ethdev->data->owner, sizeof(*owner));
734         }
735
736         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
737         return ret;
738 }
739
740 int
741 rte_eth_dev_socket_id(uint16_t port_id)
742 {
743         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
744         return rte_eth_devices[port_id].data->numa_node;
745 }
746
747 void *
748 rte_eth_dev_get_sec_ctx(uint16_t port_id)
749 {
750         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
751         return rte_eth_devices[port_id].security_ctx;
752 }
753
754 uint16_t
755 rte_eth_dev_count_avail(void)
756 {
757         uint16_t p;
758         uint16_t count;
759
760         count = 0;
761
762         RTE_ETH_FOREACH_DEV(p)
763                 count++;
764
765         return count;
766 }
767
768 uint16_t
769 rte_eth_dev_count_total(void)
770 {
771         uint16_t port, count = 0;
772
773         RTE_ETH_FOREACH_VALID_DEV(port)
774                 count++;
775
776         return count;
777 }
778
779 int
780 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
781 {
782         char *tmp;
783
784         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
785
786         if (name == NULL) {
787                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
788                 return -EINVAL;
789         }
790
791         /* shouldn't check 'rte_eth_devices[i].data',
792          * because it might be overwritten by VDEV PMD */
793         tmp = rte_eth_dev_shared_data->data[port_id].name;
794         strcpy(name, tmp);
795         return 0;
796 }
797
798 int
799 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
800 {
801         uint32_t pid;
802
803         if (name == NULL) {
804                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
805                 return -EINVAL;
806         }
807
808         RTE_ETH_FOREACH_VALID_DEV(pid)
809                 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
810                         *port_id = pid;
811                         return 0;
812                 }
813
814         return -ENODEV;
815 }
816
817 static int
818 eth_err(uint16_t port_id, int ret)
819 {
820         if (ret == 0)
821                 return 0;
822         if (rte_eth_dev_is_removed(port_id))
823                 return -EIO;
824         return ret;
825 }
826
827 static int
828 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
829 {
830         uint16_t old_nb_queues = dev->data->nb_rx_queues;
831         void **rxq;
832         unsigned i;
833
834         if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
835                 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
836                                 sizeof(dev->data->rx_queues[0]) * nb_queues,
837                                 RTE_CACHE_LINE_SIZE);
838                 if (dev->data->rx_queues == NULL) {
839                         dev->data->nb_rx_queues = 0;
840                         return -(ENOMEM);
841                 }
842         } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
843                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
844
845                 rxq = dev->data->rx_queues;
846
847                 for (i = nb_queues; i < old_nb_queues; i++)
848                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
849                 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
850                                 RTE_CACHE_LINE_SIZE);
851                 if (rxq == NULL)
852                         return -(ENOMEM);
853                 if (nb_queues > old_nb_queues) {
854                         uint16_t new_qs = nb_queues - old_nb_queues;
855
856                         memset(rxq + old_nb_queues, 0,
857                                 sizeof(rxq[0]) * new_qs);
858                 }
859
860                 dev->data->rx_queues = rxq;
861
862         } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
863                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
864
865                 rxq = dev->data->rx_queues;
866
867                 for (i = nb_queues; i < old_nb_queues; i++)
868                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
869
870                 rte_free(dev->data->rx_queues);
871                 dev->data->rx_queues = NULL;
872         }
873         dev->data->nb_rx_queues = nb_queues;
874         return 0;
875 }
876
877 int
878 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
879 {
880         struct rte_eth_dev *dev;
881
882         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
883
884         dev = &rte_eth_devices[port_id];
885         if (!dev->data->dev_started) {
886                 RTE_ETHDEV_LOG(ERR,
887                         "Port %u must be started before start any queue\n",
888                         port_id);
889                 return -EINVAL;
890         }
891
892         if (rx_queue_id >= dev->data->nb_rx_queues) {
893                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
894                 return -EINVAL;
895         }
896
897         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
898
899         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
900                 RTE_ETHDEV_LOG(INFO,
901                         "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
902                         rx_queue_id, port_id);
903                 return -EINVAL;
904         }
905
906         if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
907                 RTE_ETHDEV_LOG(INFO,
908                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
909                         rx_queue_id, port_id);
910                 return 0;
911         }
912
913         return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
914                                                              rx_queue_id));
915
916 }
917
918 int
919 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
920 {
921         struct rte_eth_dev *dev;
922
923         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
924
925         dev = &rte_eth_devices[port_id];
926         if (rx_queue_id >= dev->data->nb_rx_queues) {
927                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
928                 return -EINVAL;
929         }
930
931         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
932
933         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
934                 RTE_ETHDEV_LOG(INFO,
935                         "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
936                         rx_queue_id, port_id);
937                 return -EINVAL;
938         }
939
940         if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
941                 RTE_ETHDEV_LOG(INFO,
942                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
943                         rx_queue_id, port_id);
944                 return 0;
945         }
946
947         return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
948
949 }
950
951 int
952 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
953 {
954         struct rte_eth_dev *dev;
955
956         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
957
958         dev = &rte_eth_devices[port_id];
959         if (!dev->data->dev_started) {
960                 RTE_ETHDEV_LOG(ERR,
961                         "Port %u must be started before start any queue\n",
962                         port_id);
963                 return -EINVAL;
964         }
965
966         if (tx_queue_id >= dev->data->nb_tx_queues) {
967                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
968                 return -EINVAL;
969         }
970
971         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
972
973         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
974                 RTE_ETHDEV_LOG(INFO,
975                         "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
976                         tx_queue_id, port_id);
977                 return -EINVAL;
978         }
979
980         if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
981                 RTE_ETHDEV_LOG(INFO,
982                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
983                         tx_queue_id, port_id);
984                 return 0;
985         }
986
987         return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
988 }
989
990 int
991 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
992 {
993         struct rte_eth_dev *dev;
994
995         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
996
997         dev = &rte_eth_devices[port_id];
998         if (tx_queue_id >= dev->data->nb_tx_queues) {
999                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1000                 return -EINVAL;
1001         }
1002
1003         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1004
1005         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1006                 RTE_ETHDEV_LOG(INFO,
1007                         "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1008                         tx_queue_id, port_id);
1009                 return -EINVAL;
1010         }
1011
1012         if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1013                 RTE_ETHDEV_LOG(INFO,
1014                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1015                         tx_queue_id, port_id);
1016                 return 0;
1017         }
1018
1019         return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1020
1021 }
1022
1023 static int
1024 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1025 {
1026         uint16_t old_nb_queues = dev->data->nb_tx_queues;
1027         void **txq;
1028         unsigned i;
1029
1030         if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1031                 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1032                                                    sizeof(dev->data->tx_queues[0]) * nb_queues,
1033                                                    RTE_CACHE_LINE_SIZE);
1034                 if (dev->data->tx_queues == NULL) {
1035                         dev->data->nb_tx_queues = 0;
1036                         return -(ENOMEM);
1037                 }
1038         } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1039                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1040
1041                 txq = dev->data->tx_queues;
1042
1043                 for (i = nb_queues; i < old_nb_queues; i++)
1044                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1045                 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1046                                   RTE_CACHE_LINE_SIZE);
1047                 if (txq == NULL)
1048                         return -ENOMEM;
1049                 if (nb_queues > old_nb_queues) {
1050                         uint16_t new_qs = nb_queues - old_nb_queues;
1051
1052                         memset(txq + old_nb_queues, 0,
1053                                sizeof(txq[0]) * new_qs);
1054                 }
1055
1056                 dev->data->tx_queues = txq;
1057
1058         } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1059                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1060
1061                 txq = dev->data->tx_queues;
1062
1063                 for (i = nb_queues; i < old_nb_queues; i++)
1064                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1065
1066                 rte_free(dev->data->tx_queues);
1067                 dev->data->tx_queues = NULL;
1068         }
1069         dev->data->nb_tx_queues = nb_queues;
1070         return 0;
1071 }
1072
1073 uint32_t
1074 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1075 {
1076         switch (speed) {
1077         case ETH_SPEED_NUM_10M:
1078                 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1079         case ETH_SPEED_NUM_100M:
1080                 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1081         case ETH_SPEED_NUM_1G:
1082                 return ETH_LINK_SPEED_1G;
1083         case ETH_SPEED_NUM_2_5G:
1084                 return ETH_LINK_SPEED_2_5G;
1085         case ETH_SPEED_NUM_5G:
1086                 return ETH_LINK_SPEED_5G;
1087         case ETH_SPEED_NUM_10G:
1088                 return ETH_LINK_SPEED_10G;
1089         case ETH_SPEED_NUM_20G:
1090                 return ETH_LINK_SPEED_20G;
1091         case ETH_SPEED_NUM_25G:
1092                 return ETH_LINK_SPEED_25G;
1093         case ETH_SPEED_NUM_40G:
1094                 return ETH_LINK_SPEED_40G;
1095         case ETH_SPEED_NUM_50G:
1096                 return ETH_LINK_SPEED_50G;
1097         case ETH_SPEED_NUM_56G:
1098                 return ETH_LINK_SPEED_56G;
1099         case ETH_SPEED_NUM_100G:
1100                 return ETH_LINK_SPEED_100G;
1101         case ETH_SPEED_NUM_200G:
1102                 return ETH_LINK_SPEED_200G;
1103         default:
1104                 return 0;
1105         }
1106 }
1107
1108 const char *
1109 rte_eth_dev_rx_offload_name(uint64_t offload)
1110 {
1111         const char *name = "UNKNOWN";
1112         unsigned int i;
1113
1114         for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1115                 if (offload == rte_rx_offload_names[i].offload) {
1116                         name = rte_rx_offload_names[i].name;
1117                         break;
1118                 }
1119         }
1120
1121         return name;
1122 }
1123
1124 const char *
1125 rte_eth_dev_tx_offload_name(uint64_t offload)
1126 {
1127         const char *name = "UNKNOWN";
1128         unsigned int i;
1129
1130         for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1131                 if (offload == rte_tx_offload_names[i].offload) {
1132                         name = rte_tx_offload_names[i].name;
1133                         break;
1134                 }
1135         }
1136
1137         return name;
1138 }
1139
1140 static inline int
1141 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1142                    uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1143 {
1144         int ret = 0;
1145
1146         if (dev_info_size == 0) {
1147                 if (config_size != max_rx_pkt_len) {
1148                         RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1149                                        " %u != %u is not allowed\n",
1150                                        port_id, config_size, max_rx_pkt_len);
1151                         ret = -EINVAL;
1152                 }
1153         } else if (config_size > dev_info_size) {
1154                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1155                                "> max allowed value %u\n", port_id, config_size,
1156                                dev_info_size);
1157                 ret = -EINVAL;
1158         } else if (config_size < RTE_ETHER_MIN_LEN) {
1159                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1160                                "< min allowed value %u\n", port_id, config_size,
1161                                (unsigned int)RTE_ETHER_MIN_LEN);
1162                 ret = -EINVAL;
1163         }
1164         return ret;
1165 }
1166
1167 /*
1168  * Validate offloads that are requested through rte_eth_dev_configure against
1169  * the offloads successfully set by the ethernet device.
1170  *
1171  * @param port_id
1172  *   The port identifier of the Ethernet device.
1173  * @param req_offloads
1174  *   The offloads that have been requested through `rte_eth_dev_configure`.
1175  * @param set_offloads
1176  *   The offloads successfully set by the ethernet device.
1177  * @param offload_type
1178  *   The offload type i.e. Rx/Tx string.
1179  * @param offload_name
1180  *   The function that prints the offload name.
1181  * @return
1182  *   - (0) if validation successful.
1183  *   - (-EINVAL) if requested offload has been silently disabled.
1184  *
1185  */
1186 static int
1187 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1188                   uint64_t set_offloads, const char *offload_type,
1189                   const char *(*offload_name)(uint64_t))
1190 {
1191         uint64_t offloads_diff = req_offloads ^ set_offloads;
1192         uint64_t offload;
1193         int ret = 0;
1194
1195         while (offloads_diff != 0) {
1196                 /* Check if any offload is requested but not enabled. */
1197                 offload = 1ULL << __builtin_ctzll(offloads_diff);
1198                 if (offload & req_offloads) {
1199                         RTE_ETHDEV_LOG(ERR,
1200                                 "Port %u failed to enable %s offload %s\n",
1201                                 port_id, offload_type, offload_name(offload));
1202                         ret = -EINVAL;
1203                 }
1204
1205                 /* Check if offload couldn't be disabled. */
1206                 if (offload & set_offloads) {
1207                         RTE_ETHDEV_LOG(DEBUG,
1208                                 "Port %u %s offload %s is not requested but enabled\n",
1209                                 port_id, offload_type, offload_name(offload));
1210                 }
1211
1212                 offloads_diff &= ~offload;
1213         }
1214
1215         return ret;
1216 }
1217
1218 int
1219 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1220                       const struct rte_eth_conf *dev_conf)
1221 {
1222         struct rte_eth_dev *dev;
1223         struct rte_eth_dev_info dev_info;
1224         struct rte_eth_conf orig_conf;
1225         int diag;
1226         int ret;
1227
1228         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1229
1230         dev = &rte_eth_devices[port_id];
1231
1232         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1233
1234         if (dev->data->dev_started) {
1235                 RTE_ETHDEV_LOG(ERR,
1236                         "Port %u must be stopped to allow configuration\n",
1237                         port_id);
1238                 return -EBUSY;
1239         }
1240
1241          /* Store original config, as rollback required on failure */
1242         memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1243
1244         /*
1245          * Copy the dev_conf parameter into the dev structure.
1246          * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1247          */
1248         if (dev_conf != &dev->data->dev_conf)
1249                 memcpy(&dev->data->dev_conf, dev_conf,
1250                        sizeof(dev->data->dev_conf));
1251
1252         ret = rte_eth_dev_info_get(port_id, &dev_info);
1253         if (ret != 0)
1254                 goto rollback;
1255
1256         /* If number of queues specified by application for both Rx and Tx is
1257          * zero, use driver preferred values. This cannot be done individually
1258          * as it is valid for either Tx or Rx (but not both) to be zero.
1259          * If driver does not provide any preferred valued, fall back on
1260          * EAL defaults.
1261          */
1262         if (nb_rx_q == 0 && nb_tx_q == 0) {
1263                 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1264                 if (nb_rx_q == 0)
1265                         nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1266                 nb_tx_q = dev_info.default_txportconf.nb_queues;
1267                 if (nb_tx_q == 0)
1268                         nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1269         }
1270
1271         if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1272                 RTE_ETHDEV_LOG(ERR,
1273                         "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1274                         nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1275                 ret = -EINVAL;
1276                 goto rollback;
1277         }
1278
1279         if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1280                 RTE_ETHDEV_LOG(ERR,
1281                         "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1282                         nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1283                 ret = -EINVAL;
1284                 goto rollback;
1285         }
1286
1287         /*
1288          * Check that the numbers of RX and TX queues are not greater
1289          * than the maximum number of RX and TX queues supported by the
1290          * configured device.
1291          */
1292         if (nb_rx_q > dev_info.max_rx_queues) {
1293                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1294                         port_id, nb_rx_q, dev_info.max_rx_queues);
1295                 ret = -EINVAL;
1296                 goto rollback;
1297         }
1298
1299         if (nb_tx_q > dev_info.max_tx_queues) {
1300                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1301                         port_id, nb_tx_q, dev_info.max_tx_queues);
1302                 ret = -EINVAL;
1303                 goto rollback;
1304         }
1305
1306         /* Check that the device supports requested interrupts */
1307         if ((dev_conf->intr_conf.lsc == 1) &&
1308                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1309                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1310                         dev->device->driver->name);
1311                 ret = -EINVAL;
1312                 goto rollback;
1313         }
1314         if ((dev_conf->intr_conf.rmv == 1) &&
1315                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1316                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1317                         dev->device->driver->name);
1318                 ret = -EINVAL;
1319                 goto rollback;
1320         }
1321
1322         /*
1323          * If jumbo frames are enabled, check that the maximum RX packet
1324          * length is supported by the configured device.
1325          */
1326         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1327                 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1328                         RTE_ETHDEV_LOG(ERR,
1329                                 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1330                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1331                                 dev_info.max_rx_pktlen);
1332                         ret = -EINVAL;
1333                         goto rollback;
1334                 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1335                         RTE_ETHDEV_LOG(ERR,
1336                                 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1337                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1338                                 (unsigned int)RTE_ETHER_MIN_LEN);
1339                         ret = -EINVAL;
1340                         goto rollback;
1341                 }
1342         } else {
1343                 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1344                         dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1345                         /* Use default value */
1346                         dev->data->dev_conf.rxmode.max_rx_pkt_len =
1347                                                         RTE_ETHER_MAX_LEN;
1348         }
1349
1350         /*
1351          * If LRO is enabled, check that the maximum aggregated packet
1352          * size is supported by the configured device.
1353          */
1354         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1355                 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1356                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
1357                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1358                 ret = check_lro_pkt_size(port_id,
1359                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1360                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1361                                 dev_info.max_lro_pkt_size);
1362                 if (ret != 0)
1363                         goto rollback;
1364         }
1365
1366         /* Any requested offloading must be within its device capabilities */
1367         if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1368              dev_conf->rxmode.offloads) {
1369                 RTE_ETHDEV_LOG(ERR,
1370                         "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1371                         "capabilities 0x%"PRIx64" in %s()\n",
1372                         port_id, dev_conf->rxmode.offloads,
1373                         dev_info.rx_offload_capa,
1374                         __func__);
1375                 ret = -EINVAL;
1376                 goto rollback;
1377         }
1378         if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1379              dev_conf->txmode.offloads) {
1380                 RTE_ETHDEV_LOG(ERR,
1381                         "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1382                         "capabilities 0x%"PRIx64" in %s()\n",
1383                         port_id, dev_conf->txmode.offloads,
1384                         dev_info.tx_offload_capa,
1385                         __func__);
1386                 ret = -EINVAL;
1387                 goto rollback;
1388         }
1389
1390         dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1391                 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1392
1393         /* Check that device supports requested rss hash functions. */
1394         if ((dev_info.flow_type_rss_offloads |
1395              dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1396             dev_info.flow_type_rss_offloads) {
1397                 RTE_ETHDEV_LOG(ERR,
1398                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1399                         port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1400                         dev_info.flow_type_rss_offloads);
1401                 ret = -EINVAL;
1402                 goto rollback;
1403         }
1404
1405         /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1406         if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1407             (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1408                 RTE_ETHDEV_LOG(ERR,
1409                         "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1410                         port_id,
1411                         rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1412                 ret = -EINVAL;
1413                 goto rollback;
1414         }
1415
1416         /*
1417          * Setup new number of RX/TX queues and reconfigure device.
1418          */
1419         diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1420         if (diag != 0) {
1421                 RTE_ETHDEV_LOG(ERR,
1422                         "Port%u rte_eth_dev_rx_queue_config = %d\n",
1423                         port_id, diag);
1424                 ret = diag;
1425                 goto rollback;
1426         }
1427
1428         diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1429         if (diag != 0) {
1430                 RTE_ETHDEV_LOG(ERR,
1431                         "Port%u rte_eth_dev_tx_queue_config = %d\n",
1432                         port_id, diag);
1433                 rte_eth_dev_rx_queue_config(dev, 0);
1434                 ret = diag;
1435                 goto rollback;
1436         }
1437
1438         diag = (*dev->dev_ops->dev_configure)(dev);
1439         if (diag != 0) {
1440                 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1441                         port_id, diag);
1442                 ret = eth_err(port_id, diag);
1443                 goto reset_queues;
1444         }
1445
1446         /* Initialize Rx profiling if enabled at compilation time. */
1447         diag = __rte_eth_dev_profile_init(port_id, dev);
1448         if (diag != 0) {
1449                 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1450                         port_id, diag);
1451                 ret = eth_err(port_id, diag);
1452                 goto reset_queues;
1453         }
1454
1455         /* Validate Rx offloads. */
1456         diag = validate_offloads(port_id,
1457                         dev_conf->rxmode.offloads,
1458                         dev->data->dev_conf.rxmode.offloads, "Rx",
1459                         rte_eth_dev_rx_offload_name);
1460         if (diag != 0) {
1461                 ret = diag;
1462                 goto reset_queues;
1463         }
1464
1465         /* Validate Tx offloads. */
1466         diag = validate_offloads(port_id,
1467                         dev_conf->txmode.offloads,
1468                         dev->data->dev_conf.txmode.offloads, "Tx",
1469                         rte_eth_dev_tx_offload_name);
1470         if (diag != 0) {
1471                 ret = diag;
1472                 goto reset_queues;
1473         }
1474
1475         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1476         return 0;
1477 reset_queues:
1478         rte_eth_dev_rx_queue_config(dev, 0);
1479         rte_eth_dev_tx_queue_config(dev, 0);
1480 rollback:
1481         memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1482
1483         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1484         return ret;
1485 }
1486
1487 void
1488 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1489 {
1490         if (dev->data->dev_started) {
1491                 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1492                         dev->data->port_id);
1493                 return;
1494         }
1495
1496         rte_eth_dev_rx_queue_config(dev, 0);
1497         rte_eth_dev_tx_queue_config(dev, 0);
1498
1499         memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1500 }
1501
1502 static void
1503 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1504                         struct rte_eth_dev_info *dev_info)
1505 {
1506         struct rte_ether_addr *addr;
1507         uint16_t i;
1508         uint32_t pool = 0;
1509         uint64_t pool_mask;
1510
1511         /* replay MAC address configuration including default MAC */
1512         addr = &dev->data->mac_addrs[0];
1513         if (*dev->dev_ops->mac_addr_set != NULL)
1514                 (*dev->dev_ops->mac_addr_set)(dev, addr);
1515         else if (*dev->dev_ops->mac_addr_add != NULL)
1516                 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1517
1518         if (*dev->dev_ops->mac_addr_add != NULL) {
1519                 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1520                         addr = &dev->data->mac_addrs[i];
1521
1522                         /* skip zero address */
1523                         if (rte_is_zero_ether_addr(addr))
1524                                 continue;
1525
1526                         pool = 0;
1527                         pool_mask = dev->data->mac_pool_sel[i];
1528
1529                         do {
1530                                 if (pool_mask & 1ULL)
1531                                         (*dev->dev_ops->mac_addr_add)(dev,
1532                                                 addr, i, pool);
1533                                 pool_mask >>= 1;
1534                                 pool++;
1535                         } while (pool_mask);
1536                 }
1537         }
1538 }
1539
1540 static int
1541 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1542                            struct rte_eth_dev_info *dev_info, uint16_t port_id)
1543 {
1544         int ret;
1545
1546         if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1547                 rte_eth_dev_mac_restore(dev, dev_info);
1548
1549         /* replay promiscuous configuration */
1550         /*
1551          * use callbacks directly since we don't need port_id check and
1552          * would like to bypass the same value set
1553          */
1554         if (rte_eth_promiscuous_get(port_id) == 1 &&
1555             *dev->dev_ops->promiscuous_enable != NULL) {
1556                 ret = eth_err(port_id,
1557                               (*dev->dev_ops->promiscuous_enable)(dev));
1558                 if (ret != 0 && ret != -ENOTSUP) {
1559                         RTE_ETHDEV_LOG(ERR,
1560                                 "Failed to enable promiscuous mode for device (port %u): %s\n",
1561                                 port_id, rte_strerror(-ret));
1562                         return ret;
1563                 }
1564         } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1565                    *dev->dev_ops->promiscuous_disable != NULL) {
1566                 ret = eth_err(port_id,
1567                               (*dev->dev_ops->promiscuous_disable)(dev));
1568                 if (ret != 0 && ret != -ENOTSUP) {
1569                         RTE_ETHDEV_LOG(ERR,
1570                                 "Failed to disable promiscuous mode for device (port %u): %s\n",
1571                                 port_id, rte_strerror(-ret));
1572                         return ret;
1573                 }
1574         }
1575
1576         /* replay all multicast configuration */
1577         /*
1578          * use callbacks directly since we don't need port_id check and
1579          * would like to bypass the same value set
1580          */
1581         if (rte_eth_allmulticast_get(port_id) == 1 &&
1582             *dev->dev_ops->allmulticast_enable != NULL) {
1583                 ret = eth_err(port_id,
1584                               (*dev->dev_ops->allmulticast_enable)(dev));
1585                 if (ret != 0 && ret != -ENOTSUP) {
1586                         RTE_ETHDEV_LOG(ERR,
1587                                 "Failed to enable allmulticast mode for device (port %u): %s\n",
1588                                 port_id, rte_strerror(-ret));
1589                         return ret;
1590                 }
1591         } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1592                    *dev->dev_ops->allmulticast_disable != NULL) {
1593                 ret = eth_err(port_id,
1594                               (*dev->dev_ops->allmulticast_disable)(dev));
1595                 if (ret != 0 && ret != -ENOTSUP) {
1596                         RTE_ETHDEV_LOG(ERR,
1597                                 "Failed to disable allmulticast mode for device (port %u): %s\n",
1598                                 port_id, rte_strerror(-ret));
1599                         return ret;
1600                 }
1601         }
1602
1603         return 0;
1604 }
1605
1606 int
1607 rte_eth_dev_start(uint16_t port_id)
1608 {
1609         struct rte_eth_dev *dev;
1610         struct rte_eth_dev_info dev_info;
1611         int diag;
1612         int ret;
1613
1614         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1615
1616         dev = &rte_eth_devices[port_id];
1617
1618         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1619
1620         if (dev->data->dev_started != 0) {
1621                 RTE_ETHDEV_LOG(INFO,
1622                         "Device with port_id=%"PRIu16" already started\n",
1623                         port_id);
1624                 return 0;
1625         }
1626
1627         ret = rte_eth_dev_info_get(port_id, &dev_info);
1628         if (ret != 0)
1629                 return ret;
1630
1631         /* Lets restore MAC now if device does not support live change */
1632         if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1633                 rte_eth_dev_mac_restore(dev, &dev_info);
1634
1635         diag = (*dev->dev_ops->dev_start)(dev);
1636         if (diag == 0)
1637                 dev->data->dev_started = 1;
1638         else
1639                 return eth_err(port_id, diag);
1640
1641         ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1642         if (ret != 0) {
1643                 RTE_ETHDEV_LOG(ERR,
1644                         "Error during restoring configuration for device (port %u): %s\n",
1645                         port_id, rte_strerror(-ret));
1646                 rte_eth_dev_stop(port_id);
1647                 return ret;
1648         }
1649
1650         if (dev->data->dev_conf.intr_conf.lsc == 0) {
1651                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1652                 (*dev->dev_ops->link_update)(dev, 0);
1653         }
1654
1655         rte_ethdev_trace_start(port_id);
1656         return 0;
1657 }
1658
1659 void
1660 rte_eth_dev_stop(uint16_t port_id)
1661 {
1662         struct rte_eth_dev *dev;
1663
1664         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1665         dev = &rte_eth_devices[port_id];
1666
1667         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1668
1669         if (dev->data->dev_started == 0) {
1670                 RTE_ETHDEV_LOG(INFO,
1671                         "Device with port_id=%"PRIu16" already stopped\n",
1672                         port_id);
1673                 return;
1674         }
1675
1676         dev->data->dev_started = 0;
1677         (*dev->dev_ops->dev_stop)(dev);
1678         rte_ethdev_trace_stop(port_id);
1679 }
1680
1681 int
1682 rte_eth_dev_set_link_up(uint16_t port_id)
1683 {
1684         struct rte_eth_dev *dev;
1685
1686         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1687
1688         dev = &rte_eth_devices[port_id];
1689
1690         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1691         return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1692 }
1693
1694 int
1695 rte_eth_dev_set_link_down(uint16_t port_id)
1696 {
1697         struct rte_eth_dev *dev;
1698
1699         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1700
1701         dev = &rte_eth_devices[port_id];
1702
1703         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1704         return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1705 }
1706
1707 void
1708 rte_eth_dev_close(uint16_t port_id)
1709 {
1710         struct rte_eth_dev *dev;
1711
1712         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1713         dev = &rte_eth_devices[port_id];
1714
1715         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1716         dev->data->dev_started = 0;
1717         (*dev->dev_ops->dev_close)(dev);
1718
1719         rte_ethdev_trace_close(port_id);
1720         /* check behaviour flag - temporary for PMD migration */
1721         if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1722                 /* new behaviour: send event + reset state + free all data */
1723                 rte_eth_dev_release_port(dev);
1724                 return;
1725         }
1726         RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1727                         "The driver %s should migrate to the new behaviour.\n",
1728                         dev->device->driver->name);
1729         /* old behaviour: only free queue arrays */
1730         dev->data->nb_rx_queues = 0;
1731         rte_free(dev->data->rx_queues);
1732         dev->data->rx_queues = NULL;
1733         dev->data->nb_tx_queues = 0;
1734         rte_free(dev->data->tx_queues);
1735         dev->data->tx_queues = NULL;
1736 }
1737
1738 int
1739 rte_eth_dev_reset(uint16_t port_id)
1740 {
1741         struct rte_eth_dev *dev;
1742         int ret;
1743
1744         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1745         dev = &rte_eth_devices[port_id];
1746
1747         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1748
1749         rte_eth_dev_stop(port_id);
1750         ret = dev->dev_ops->dev_reset(dev);
1751
1752         return eth_err(port_id, ret);
1753 }
1754
1755 int
1756 rte_eth_dev_is_removed(uint16_t port_id)
1757 {
1758         struct rte_eth_dev *dev;
1759         int ret;
1760
1761         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1762
1763         dev = &rte_eth_devices[port_id];
1764
1765         if (dev->state == RTE_ETH_DEV_REMOVED)
1766                 return 1;
1767
1768         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1769
1770         ret = dev->dev_ops->is_removed(dev);
1771         if (ret != 0)
1772                 /* Device is physically removed. */
1773                 dev->state = RTE_ETH_DEV_REMOVED;
1774
1775         return ret;
1776 }
1777
1778 int
1779 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1780                        uint16_t nb_rx_desc, unsigned int socket_id,
1781                        const struct rte_eth_rxconf *rx_conf,
1782                        struct rte_mempool *mp)
1783 {
1784         int ret;
1785         uint32_t mbp_buf_size;
1786         struct rte_eth_dev *dev;
1787         struct rte_eth_dev_info dev_info;
1788         struct rte_eth_rxconf local_conf;
1789         void **rxq;
1790
1791         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1792
1793         dev = &rte_eth_devices[port_id];
1794         if (rx_queue_id >= dev->data->nb_rx_queues) {
1795                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1796                 return -EINVAL;
1797         }
1798
1799         if (mp == NULL) {
1800                 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1801                 return -EINVAL;
1802         }
1803
1804         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1805
1806         /*
1807          * Check the size of the mbuf data buffer.
1808          * This value must be provided in the private data of the memory pool.
1809          * First check that the memory pool has a valid private data.
1810          */
1811         ret = rte_eth_dev_info_get(port_id, &dev_info);
1812         if (ret != 0)
1813                 return ret;
1814
1815         if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1816                 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1817                         mp->name, (int)mp->private_data_size,
1818                         (int)sizeof(struct rte_pktmbuf_pool_private));
1819                 return -ENOSPC;
1820         }
1821         mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1822
1823         if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1824                 RTE_ETHDEV_LOG(ERR,
1825                         "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1826                         mp->name, (int)mbp_buf_size,
1827                         (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1828                         (int)RTE_PKTMBUF_HEADROOM,
1829                         (int)dev_info.min_rx_bufsize);
1830                 return -EINVAL;
1831         }
1832
1833         /* Use default specified by driver, if nb_rx_desc is zero */
1834         if (nb_rx_desc == 0) {
1835                 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1836                 /* If driver default is also zero, fall back on EAL default */
1837                 if (nb_rx_desc == 0)
1838                         nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1839         }
1840
1841         if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1842                         nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1843                         nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1844
1845                 RTE_ETHDEV_LOG(ERR,
1846                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1847                         nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1848                         dev_info.rx_desc_lim.nb_min,
1849                         dev_info.rx_desc_lim.nb_align);
1850                 return -EINVAL;
1851         }
1852
1853         if (dev->data->dev_started &&
1854                 !(dev_info.dev_capa &
1855                         RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1856                 return -EBUSY;
1857
1858         if (dev->data->dev_started &&
1859                 (dev->data->rx_queue_state[rx_queue_id] !=
1860                         RTE_ETH_QUEUE_STATE_STOPPED))
1861                 return -EBUSY;
1862
1863         rxq = dev->data->rx_queues;
1864         if (rxq[rx_queue_id]) {
1865                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1866                                         -ENOTSUP);
1867                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1868                 rxq[rx_queue_id] = NULL;
1869         }
1870
1871         if (rx_conf == NULL)
1872                 rx_conf = &dev_info.default_rxconf;
1873
1874         local_conf = *rx_conf;
1875
1876         /*
1877          * If an offloading has already been enabled in
1878          * rte_eth_dev_configure(), it has been enabled on all queues,
1879          * so there is no need to enable it in this queue again.
1880          * The local_conf.offloads input to underlying PMD only carries
1881          * those offloadings which are only enabled on this queue and
1882          * not enabled on all queues.
1883          */
1884         local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1885
1886         /*
1887          * New added offloadings for this queue are those not enabled in
1888          * rte_eth_dev_configure() and they must be per-queue type.
1889          * A pure per-port offloading can't be enabled on a queue while
1890          * disabled on another queue. A pure per-port offloading can't
1891          * be enabled for any queue as new added one if it hasn't been
1892          * enabled in rte_eth_dev_configure().
1893          */
1894         if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1895              local_conf.offloads) {
1896                 RTE_ETHDEV_LOG(ERR,
1897                         "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1898                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1899                         port_id, rx_queue_id, local_conf.offloads,
1900                         dev_info.rx_queue_offload_capa,
1901                         __func__);
1902                 return -EINVAL;
1903         }
1904
1905         /*
1906          * If LRO is enabled, check that the maximum aggregated packet
1907          * size is supported by the configured device.
1908          */
1909         if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1910                 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1911                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
1912                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1913                 int ret = check_lro_pkt_size(port_id,
1914                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1915                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1916                                 dev_info.max_lro_pkt_size);
1917                 if (ret != 0)
1918                         return ret;
1919         }
1920
1921         ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1922                                               socket_id, &local_conf, mp);
1923         if (!ret) {
1924                 if (!dev->data->min_rx_buf_size ||
1925                     dev->data->min_rx_buf_size > mbp_buf_size)
1926                         dev->data->min_rx_buf_size = mbp_buf_size;
1927         }
1928
1929         rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1930                 rx_conf, ret);
1931         return eth_err(port_id, ret);
1932 }
1933
1934 int
1935 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1936                                uint16_t nb_rx_desc,
1937                                const struct rte_eth_hairpin_conf *conf)
1938 {
1939         int ret;
1940         struct rte_eth_dev *dev;
1941         struct rte_eth_hairpin_cap cap;
1942         void **rxq;
1943         int i;
1944         int count;
1945
1946         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1947
1948         dev = &rte_eth_devices[port_id];
1949         if (rx_queue_id >= dev->data->nb_rx_queues) {
1950                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1951                 return -EINVAL;
1952         }
1953         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1954         if (ret != 0)
1955                 return ret;
1956         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1957                                 -ENOTSUP);
1958         /* if nb_rx_desc is zero use max number of desc from the driver. */
1959         if (nb_rx_desc == 0)
1960                 nb_rx_desc = cap.max_nb_desc;
1961         if (nb_rx_desc > cap.max_nb_desc) {
1962                 RTE_ETHDEV_LOG(ERR,
1963                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1964                         nb_rx_desc, cap.max_nb_desc);
1965                 return -EINVAL;
1966         }
1967         if (conf->peer_count > cap.max_rx_2_tx) {
1968                 RTE_ETHDEV_LOG(ERR,
1969                         "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1970                         conf->peer_count, cap.max_rx_2_tx);
1971                 return -EINVAL;
1972         }
1973         if (conf->peer_count == 0) {
1974                 RTE_ETHDEV_LOG(ERR,
1975                         "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1976                         conf->peer_count);
1977                 return -EINVAL;
1978         }
1979         for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1980              cap.max_nb_queues != UINT16_MAX; i++) {
1981                 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1982                         count++;
1983         }
1984         if (count > cap.max_nb_queues) {
1985                 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1986                 cap.max_nb_queues);
1987                 return -EINVAL;
1988         }
1989         if (dev->data->dev_started)
1990                 return -EBUSY;
1991         rxq = dev->data->rx_queues;
1992         if (rxq[rx_queue_id] != NULL) {
1993                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1994                                         -ENOTSUP);
1995                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1996                 rxq[rx_queue_id] = NULL;
1997         }
1998         ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1999                                                       nb_rx_desc, conf);
2000         if (ret == 0)
2001                 dev->data->rx_queue_state[rx_queue_id] =
2002                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2003         return eth_err(port_id, ret);
2004 }
2005
2006 int
2007 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2008                        uint16_t nb_tx_desc, unsigned int socket_id,
2009                        const struct rte_eth_txconf *tx_conf)
2010 {
2011         struct rte_eth_dev *dev;
2012         struct rte_eth_dev_info dev_info;
2013         struct rte_eth_txconf local_conf;
2014         void **txq;
2015         int ret;
2016
2017         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2018
2019         dev = &rte_eth_devices[port_id];
2020         if (tx_queue_id >= dev->data->nb_tx_queues) {
2021                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2022                 return -EINVAL;
2023         }
2024
2025         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2026
2027         ret = rte_eth_dev_info_get(port_id, &dev_info);
2028         if (ret != 0)
2029                 return ret;
2030
2031         /* Use default specified by driver, if nb_tx_desc is zero */
2032         if (nb_tx_desc == 0) {
2033                 nb_tx_desc = dev_info.default_txportconf.ring_size;
2034                 /* If driver default is zero, fall back on EAL default */
2035                 if (nb_tx_desc == 0)
2036                         nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2037         }
2038         if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2039             nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2040             nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2041                 RTE_ETHDEV_LOG(ERR,
2042                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2043                         nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2044                         dev_info.tx_desc_lim.nb_min,
2045                         dev_info.tx_desc_lim.nb_align);
2046                 return -EINVAL;
2047         }
2048
2049         if (dev->data->dev_started &&
2050                 !(dev_info.dev_capa &
2051                         RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2052                 return -EBUSY;
2053
2054         if (dev->data->dev_started &&
2055                 (dev->data->tx_queue_state[tx_queue_id] !=
2056                         RTE_ETH_QUEUE_STATE_STOPPED))
2057                 return -EBUSY;
2058
2059         txq = dev->data->tx_queues;
2060         if (txq[tx_queue_id]) {
2061                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2062                                         -ENOTSUP);
2063                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2064                 txq[tx_queue_id] = NULL;
2065         }
2066
2067         if (tx_conf == NULL)
2068                 tx_conf = &dev_info.default_txconf;
2069
2070         local_conf = *tx_conf;
2071
2072         /*
2073          * If an offloading has already been enabled in
2074          * rte_eth_dev_configure(), it has been enabled on all queues,
2075          * so there is no need to enable it in this queue again.
2076          * The local_conf.offloads input to underlying PMD only carries
2077          * those offloadings which are only enabled on this queue and
2078          * not enabled on all queues.
2079          */
2080         local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2081
2082         /*
2083          * New added offloadings for this queue are those not enabled in
2084          * rte_eth_dev_configure() and they must be per-queue type.
2085          * A pure per-port offloading can't be enabled on a queue while
2086          * disabled on another queue. A pure per-port offloading can't
2087          * be enabled for any queue as new added one if it hasn't been
2088          * enabled in rte_eth_dev_configure().
2089          */
2090         if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2091              local_conf.offloads) {
2092                 RTE_ETHDEV_LOG(ERR,
2093                         "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2094                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2095                         port_id, tx_queue_id, local_conf.offloads,
2096                         dev_info.tx_queue_offload_capa,
2097                         __func__);
2098                 return -EINVAL;
2099         }
2100
2101         rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2102         return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2103                        tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2104 }
2105
2106 int
2107 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2108                                uint16_t nb_tx_desc,
2109                                const struct rte_eth_hairpin_conf *conf)
2110 {
2111         struct rte_eth_dev *dev;
2112         struct rte_eth_hairpin_cap cap;
2113         void **txq;
2114         int i;
2115         int count;
2116         int ret;
2117
2118         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2119         dev = &rte_eth_devices[port_id];
2120         if (tx_queue_id >= dev->data->nb_tx_queues) {
2121                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2122                 return -EINVAL;
2123         }
2124         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2125         if (ret != 0)
2126                 return ret;
2127         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2128                                 -ENOTSUP);
2129         /* if nb_rx_desc is zero use max number of desc from the driver. */
2130         if (nb_tx_desc == 0)
2131                 nb_tx_desc = cap.max_nb_desc;
2132         if (nb_tx_desc > cap.max_nb_desc) {
2133                 RTE_ETHDEV_LOG(ERR,
2134                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2135                         nb_tx_desc, cap.max_nb_desc);
2136                 return -EINVAL;
2137         }
2138         if (conf->peer_count > cap.max_tx_2_rx) {
2139                 RTE_ETHDEV_LOG(ERR,
2140                         "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2141                         conf->peer_count, cap.max_tx_2_rx);
2142                 return -EINVAL;
2143         }
2144         if (conf->peer_count == 0) {
2145                 RTE_ETHDEV_LOG(ERR,
2146                         "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2147                         conf->peer_count);
2148                 return -EINVAL;
2149         }
2150         for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2151              cap.max_nb_queues != UINT16_MAX; i++) {
2152                 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2153                         count++;
2154         }
2155         if (count > cap.max_nb_queues) {
2156                 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2157                 cap.max_nb_queues);
2158                 return -EINVAL;
2159         }
2160         if (dev->data->dev_started)
2161                 return -EBUSY;
2162         txq = dev->data->tx_queues;
2163         if (txq[tx_queue_id] != NULL) {
2164                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2165                                         -ENOTSUP);
2166                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2167                 txq[tx_queue_id] = NULL;
2168         }
2169         ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2170                 (dev, tx_queue_id, nb_tx_desc, conf);
2171         if (ret == 0)
2172                 dev->data->tx_queue_state[tx_queue_id] =
2173                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2174         return eth_err(port_id, ret);
2175 }
2176
2177 void
2178 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2179                 void *userdata __rte_unused)
2180 {
2181         unsigned i;
2182
2183         for (i = 0; i < unsent; i++)
2184                 rte_pktmbuf_free(pkts[i]);
2185 }
2186
2187 void
2188 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2189                 void *userdata)
2190 {
2191         uint64_t *count = userdata;
2192         unsigned i;
2193
2194         for (i = 0; i < unsent; i++)
2195                 rte_pktmbuf_free(pkts[i]);
2196
2197         *count += unsent;
2198 }
2199
2200 int
2201 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2202                 buffer_tx_error_fn cbfn, void *userdata)
2203 {
2204         buffer->error_callback = cbfn;
2205         buffer->error_userdata = userdata;
2206         return 0;
2207 }
2208
2209 int
2210 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2211 {
2212         int ret = 0;
2213
2214         if (buffer == NULL)
2215                 return -EINVAL;
2216
2217         buffer->size = size;
2218         if (buffer->error_callback == NULL) {
2219                 ret = rte_eth_tx_buffer_set_err_callback(
2220                         buffer, rte_eth_tx_buffer_drop_callback, NULL);
2221         }
2222
2223         return ret;
2224 }
2225
2226 int
2227 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2228 {
2229         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2230         int ret;
2231
2232         /* Validate Input Data. Bail if not valid or not supported. */
2233         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2234         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2235
2236         /* Call driver to free pending mbufs. */
2237         ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2238                                                free_cnt);
2239         return eth_err(port_id, ret);
2240 }
2241
2242 int
2243 rte_eth_promiscuous_enable(uint16_t port_id)
2244 {
2245         struct rte_eth_dev *dev;
2246         int diag = 0;
2247
2248         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2249         dev = &rte_eth_devices[port_id];
2250
2251         if (dev->data->promiscuous == 1)
2252                 return 0;
2253
2254         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2255
2256         diag = (*dev->dev_ops->promiscuous_enable)(dev);
2257         dev->data->promiscuous = (diag == 0) ? 1 : 0;
2258
2259         return eth_err(port_id, diag);
2260 }
2261
2262 int
2263 rte_eth_promiscuous_disable(uint16_t port_id)
2264 {
2265         struct rte_eth_dev *dev;
2266         int diag = 0;
2267
2268         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2269         dev = &rte_eth_devices[port_id];
2270
2271         if (dev->data->promiscuous == 0)
2272                 return 0;
2273
2274         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2275
2276         dev->data->promiscuous = 0;
2277         diag = (*dev->dev_ops->promiscuous_disable)(dev);
2278         if (diag != 0)
2279                 dev->data->promiscuous = 1;
2280
2281         return eth_err(port_id, diag);
2282 }
2283
2284 int
2285 rte_eth_promiscuous_get(uint16_t port_id)
2286 {
2287         struct rte_eth_dev *dev;
2288
2289         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2290
2291         dev = &rte_eth_devices[port_id];
2292         return dev->data->promiscuous;
2293 }
2294
2295 int
2296 rte_eth_allmulticast_enable(uint16_t port_id)
2297 {
2298         struct rte_eth_dev *dev;
2299         int diag;
2300
2301         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302         dev = &rte_eth_devices[port_id];
2303
2304         if (dev->data->all_multicast == 1)
2305                 return 0;
2306
2307         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2308         diag = (*dev->dev_ops->allmulticast_enable)(dev);
2309         dev->data->all_multicast = (diag == 0) ? 1 : 0;
2310
2311         return eth_err(port_id, diag);
2312 }
2313
2314 int
2315 rte_eth_allmulticast_disable(uint16_t port_id)
2316 {
2317         struct rte_eth_dev *dev;
2318         int diag;
2319
2320         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2321         dev = &rte_eth_devices[port_id];
2322
2323         if (dev->data->all_multicast == 0)
2324                 return 0;
2325
2326         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2327         dev->data->all_multicast = 0;
2328         diag = (*dev->dev_ops->allmulticast_disable)(dev);
2329         if (diag != 0)
2330                 dev->data->all_multicast = 1;
2331
2332         return eth_err(port_id, diag);
2333 }
2334
2335 int
2336 rte_eth_allmulticast_get(uint16_t port_id)
2337 {
2338         struct rte_eth_dev *dev;
2339
2340         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2341
2342         dev = &rte_eth_devices[port_id];
2343         return dev->data->all_multicast;
2344 }
2345
2346 int
2347 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2348 {
2349         struct rte_eth_dev *dev;
2350
2351         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2352         dev = &rte_eth_devices[port_id];
2353
2354         if (dev->data->dev_conf.intr_conf.lsc &&
2355             dev->data->dev_started)
2356                 rte_eth_linkstatus_get(dev, eth_link);
2357         else {
2358                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2359                 (*dev->dev_ops->link_update)(dev, 1);
2360                 *eth_link = dev->data->dev_link;
2361         }
2362
2363         return 0;
2364 }
2365
2366 int
2367 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2368 {
2369         struct rte_eth_dev *dev;
2370
2371         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2372         dev = &rte_eth_devices[port_id];
2373
2374         if (dev->data->dev_conf.intr_conf.lsc &&
2375             dev->data->dev_started)
2376                 rte_eth_linkstatus_get(dev, eth_link);
2377         else {
2378                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2379                 (*dev->dev_ops->link_update)(dev, 0);
2380                 *eth_link = dev->data->dev_link;
2381         }
2382
2383         return 0;
2384 }
2385
2386 int
2387 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2388 {
2389         struct rte_eth_dev *dev;
2390
2391         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2392
2393         dev = &rte_eth_devices[port_id];
2394         memset(stats, 0, sizeof(*stats));
2395
2396         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2397         stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2398         return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2399 }
2400
2401 int
2402 rte_eth_stats_reset(uint16_t port_id)
2403 {
2404         struct rte_eth_dev *dev;
2405         int ret;
2406
2407         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2408         dev = &rte_eth_devices[port_id];
2409
2410         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2411         ret = (*dev->dev_ops->stats_reset)(dev);
2412         if (ret != 0)
2413                 return eth_err(port_id, ret);
2414
2415         dev->data->rx_mbuf_alloc_failed = 0;
2416
2417         return 0;
2418 }
2419
2420 static inline int
2421 get_xstats_basic_count(struct rte_eth_dev *dev)
2422 {
2423         uint16_t nb_rxqs, nb_txqs;
2424         int count;
2425
2426         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2427         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2428
2429         count = RTE_NB_STATS;
2430         count += nb_rxqs * RTE_NB_RXQ_STATS;
2431         count += nb_txqs * RTE_NB_TXQ_STATS;
2432
2433         return count;
2434 }
2435
2436 static int
2437 get_xstats_count(uint16_t port_id)
2438 {
2439         struct rte_eth_dev *dev;
2440         int count;
2441
2442         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2443         dev = &rte_eth_devices[port_id];
2444         if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2445                 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2446                                 NULL, 0);
2447                 if (count < 0)
2448                         return eth_err(port_id, count);
2449         }
2450         if (dev->dev_ops->xstats_get_names != NULL) {
2451                 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2452                 if (count < 0)
2453                         return eth_err(port_id, count);
2454         } else
2455                 count = 0;
2456
2457
2458         count += get_xstats_basic_count(dev);
2459
2460         return count;
2461 }
2462
2463 int
2464 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2465                 uint64_t *id)
2466 {
2467         int cnt_xstats, idx_xstat;
2468
2469         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2470
2471         if (!id) {
2472                 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2473                 return -ENOMEM;
2474         }
2475
2476         if (!xstat_name) {
2477                 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2478                 return -ENOMEM;
2479         }
2480
2481         /* Get count */
2482         cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2483         if (cnt_xstats  < 0) {
2484                 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2485                 return -ENODEV;
2486         }
2487
2488         /* Get id-name lookup table */
2489         struct rte_eth_xstat_name xstats_names[cnt_xstats];
2490
2491         if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2492                         port_id, xstats_names, cnt_xstats, NULL)) {
2493                 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2494                 return -1;
2495         }
2496
2497         for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2498                 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2499                         *id = idx_xstat;
2500                         return 0;
2501                 };
2502         }
2503
2504         return -EINVAL;
2505 }
2506
2507 /* retrieve basic stats names */
2508 static int
2509 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2510         struct rte_eth_xstat_name *xstats_names)
2511 {
2512         int cnt_used_entries = 0;
2513         uint32_t idx, id_queue;
2514         uint16_t num_q;
2515
2516         for (idx = 0; idx < RTE_NB_STATS; idx++) {
2517                 strlcpy(xstats_names[cnt_used_entries].name,
2518                         rte_stats_strings[idx].name,
2519                         sizeof(xstats_names[0].name));
2520                 cnt_used_entries++;
2521         }
2522         num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2523         for (id_queue = 0; id_queue < num_q; id_queue++) {
2524                 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2525                         snprintf(xstats_names[cnt_used_entries].name,
2526                                 sizeof(xstats_names[0].name),
2527                                 "rx_q%u%s",
2528                                 id_queue, rte_rxq_stats_strings[idx].name);
2529                         cnt_used_entries++;
2530                 }
2531
2532         }
2533         num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2534         for (id_queue = 0; id_queue < num_q; id_queue++) {
2535                 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2536                         snprintf(xstats_names[cnt_used_entries].name,
2537                                 sizeof(xstats_names[0].name),
2538                                 "tx_q%u%s",
2539                                 id_queue, rte_txq_stats_strings[idx].name);
2540                         cnt_used_entries++;
2541                 }
2542         }
2543         return cnt_used_entries;
2544 }
2545
2546 /* retrieve ethdev extended statistics names */
2547 int
2548 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2549         struct rte_eth_xstat_name *xstats_names, unsigned int size,
2550         uint64_t *ids)
2551 {
2552         struct rte_eth_xstat_name *xstats_names_copy;
2553         unsigned int no_basic_stat_requested = 1;
2554         unsigned int no_ext_stat_requested = 1;
2555         unsigned int expected_entries;
2556         unsigned int basic_count;
2557         struct rte_eth_dev *dev;
2558         unsigned int i;
2559         int ret;
2560
2561         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2562         dev = &rte_eth_devices[port_id];
2563
2564         basic_count = get_xstats_basic_count(dev);
2565         ret = get_xstats_count(port_id);
2566         if (ret < 0)
2567                 return ret;
2568         expected_entries = (unsigned int)ret;
2569
2570         /* Return max number of stats if no ids given */
2571         if (!ids) {
2572                 if (!xstats_names)
2573                         return expected_entries;
2574                 else if (xstats_names && size < expected_entries)
2575                         return expected_entries;
2576         }
2577
2578         if (ids && !xstats_names)
2579                 return -EINVAL;
2580
2581         if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2582                 uint64_t ids_copy[size];
2583
2584                 for (i = 0; i < size; i++) {
2585                         if (ids[i] < basic_count) {
2586                                 no_basic_stat_requested = 0;
2587                                 break;
2588                         }
2589
2590                         /*
2591                          * Convert ids to xstats ids that PMD knows.
2592                          * ids known by user are basic + extended stats.
2593                          */
2594                         ids_copy[i] = ids[i] - basic_count;
2595                 }
2596
2597                 if (no_basic_stat_requested)
2598                         return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2599                                         xstats_names, ids_copy, size);
2600         }
2601
2602         /* Retrieve all stats */
2603         if (!ids) {
2604                 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2605                                 expected_entries);
2606                 if (num_stats < 0 || num_stats > (int)expected_entries)
2607                         return num_stats;
2608                 else
2609                         return expected_entries;
2610         }
2611
2612         xstats_names_copy = calloc(expected_entries,
2613                 sizeof(struct rte_eth_xstat_name));
2614
2615         if (!xstats_names_copy) {
2616                 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2617                 return -ENOMEM;
2618         }
2619
2620         if (ids) {
2621                 for (i = 0; i < size; i++) {
2622                         if (ids[i] >= basic_count) {
2623                                 no_ext_stat_requested = 0;
2624                                 break;
2625                         }
2626                 }
2627         }
2628
2629         /* Fill xstats_names_copy structure */
2630         if (ids && no_ext_stat_requested) {
2631                 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2632         } else {
2633                 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2634                         expected_entries);
2635                 if (ret < 0) {
2636                         free(xstats_names_copy);
2637                         return ret;
2638                 }
2639         }
2640
2641         /* Filter stats */
2642         for (i = 0; i < size; i++) {
2643                 if (ids[i] >= expected_entries) {
2644                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2645                         free(xstats_names_copy);
2646                         return -1;
2647                 }
2648                 xstats_names[i] = xstats_names_copy[ids[i]];
2649         }
2650
2651         free(xstats_names_copy);
2652         return size;
2653 }
2654
2655 int
2656 rte_eth_xstats_get_names(uint16_t port_id,
2657         struct rte_eth_xstat_name *xstats_names,
2658         unsigned int size)
2659 {
2660         struct rte_eth_dev *dev;
2661         int cnt_used_entries;
2662         int cnt_expected_entries;
2663         int cnt_driver_entries;
2664
2665         cnt_expected_entries = get_xstats_count(port_id);
2666         if (xstats_names == NULL || cnt_expected_entries < 0 ||
2667                         (int)size < cnt_expected_entries)
2668                 return cnt_expected_entries;
2669
2670         /* port_id checked in get_xstats_count() */
2671         dev = &rte_eth_devices[port_id];
2672
2673         cnt_used_entries = rte_eth_basic_stats_get_names(
2674                 dev, xstats_names);
2675
2676         if (dev->dev_ops->xstats_get_names != NULL) {
2677                 /* If there are any driver-specific xstats, append them
2678                  * to end of list.
2679                  */
2680                 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2681                         dev,
2682                         xstats_names + cnt_used_entries,
2683                         size - cnt_used_entries);
2684                 if (cnt_driver_entries < 0)
2685                         return eth_err(port_id, cnt_driver_entries);
2686                 cnt_used_entries += cnt_driver_entries;
2687         }
2688
2689         return cnt_used_entries;
2690 }
2691
2692
2693 static int
2694 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2695 {
2696         struct rte_eth_dev *dev;
2697         struct rte_eth_stats eth_stats;
2698         unsigned int count = 0, i, q;
2699         uint64_t val, *stats_ptr;
2700         uint16_t nb_rxqs, nb_txqs;
2701         int ret;
2702
2703         ret = rte_eth_stats_get(port_id, &eth_stats);
2704         if (ret < 0)
2705                 return ret;
2706
2707         dev = &rte_eth_devices[port_id];
2708
2709         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2710         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2711
2712         /* global stats */
2713         for (i = 0; i < RTE_NB_STATS; i++) {
2714                 stats_ptr = RTE_PTR_ADD(&eth_stats,
2715                                         rte_stats_strings[i].offset);
2716                 val = *stats_ptr;
2717                 xstats[count++].value = val;
2718         }
2719
2720         /* per-rxq stats */
2721         for (q = 0; q < nb_rxqs; q++) {
2722                 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2723                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2724                                         rte_rxq_stats_strings[i].offset +
2725                                         q * sizeof(uint64_t));
2726                         val = *stats_ptr;
2727                         xstats[count++].value = val;
2728                 }
2729         }
2730
2731         /* per-txq stats */
2732         for (q = 0; q < nb_txqs; q++) {
2733                 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2734                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2735                                         rte_txq_stats_strings[i].offset +
2736                                         q * sizeof(uint64_t));
2737                         val = *stats_ptr;
2738                         xstats[count++].value = val;
2739                 }
2740         }
2741         return count;
2742 }
2743
2744 /* retrieve ethdev extended statistics */
2745 int
2746 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2747                          uint64_t *values, unsigned int size)
2748 {
2749         unsigned int no_basic_stat_requested = 1;
2750         unsigned int no_ext_stat_requested = 1;
2751         unsigned int num_xstats_filled;
2752         unsigned int basic_count;
2753         uint16_t expected_entries;
2754         struct rte_eth_dev *dev;
2755         unsigned int i;
2756         int ret;
2757
2758         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2759         ret = get_xstats_count(port_id);
2760         if (ret < 0)
2761                 return ret;
2762         expected_entries = (uint16_t)ret;
2763         struct rte_eth_xstat xstats[expected_entries];
2764         dev = &rte_eth_devices[port_id];
2765         basic_count = get_xstats_basic_count(dev);
2766
2767         /* Return max number of stats if no ids given */
2768         if (!ids) {
2769                 if (!values)
2770                         return expected_entries;
2771                 else if (values && size < expected_entries)
2772                         return expected_entries;
2773         }
2774
2775         if (ids && !values)
2776                 return -EINVAL;
2777
2778         if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2779                 unsigned int basic_count = get_xstats_basic_count(dev);
2780                 uint64_t ids_copy[size];
2781
2782                 for (i = 0; i < size; i++) {
2783                         if (ids[i] < basic_count) {
2784                                 no_basic_stat_requested = 0;
2785                                 break;
2786                         }
2787
2788                         /*
2789                          * Convert ids to xstats ids that PMD knows.
2790                          * ids known by user are basic + extended stats.
2791                          */
2792                         ids_copy[i] = ids[i] - basic_count;
2793                 }
2794
2795                 if (no_basic_stat_requested)
2796                         return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2797                                         values, size);
2798         }
2799
2800         if (ids) {
2801                 for (i = 0; i < size; i++) {
2802                         if (ids[i] >= basic_count) {
2803                                 no_ext_stat_requested = 0;
2804                                 break;
2805                         }
2806                 }
2807         }
2808
2809         /* Fill the xstats structure */
2810         if (ids && no_ext_stat_requested)
2811                 ret = rte_eth_basic_stats_get(port_id, xstats);
2812         else
2813                 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2814
2815         if (ret < 0)
2816                 return ret;
2817         num_xstats_filled = (unsigned int)ret;
2818
2819         /* Return all stats */
2820         if (!ids) {
2821                 for (i = 0; i < num_xstats_filled; i++)
2822                         values[i] = xstats[i].value;
2823                 return expected_entries;
2824         }
2825
2826         /* Filter stats */
2827         for (i = 0; i < size; i++) {
2828                 if (ids[i] >= expected_entries) {
2829                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2830                         return -1;
2831                 }
2832                 values[i] = xstats[ids[i]].value;
2833         }
2834         return size;
2835 }
2836
2837 int
2838 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2839         unsigned int n)
2840 {
2841         struct rte_eth_dev *dev;
2842         unsigned int count = 0, i;
2843         signed int xcount = 0;
2844         uint16_t nb_rxqs, nb_txqs;
2845         int ret;
2846
2847         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2848
2849         dev = &rte_eth_devices[port_id];
2850
2851         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2852         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2853
2854         /* Return generic statistics */
2855         count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2856                 (nb_txqs * RTE_NB_TXQ_STATS);
2857
2858         /* implemented by the driver */
2859         if (dev->dev_ops->xstats_get != NULL) {
2860                 /* Retrieve the xstats from the driver at the end of the
2861                  * xstats struct.
2862                  */
2863                 xcount = (*dev->dev_ops->xstats_get)(dev,
2864                                      xstats ? xstats + count : NULL,
2865                                      (n > count) ? n - count : 0);
2866
2867                 if (xcount < 0)
2868                         return eth_err(port_id, xcount);
2869         }
2870
2871         if (n < count + xcount || xstats == NULL)
2872                 return count + xcount;
2873
2874         /* now fill the xstats structure */
2875         ret = rte_eth_basic_stats_get(port_id, xstats);
2876         if (ret < 0)
2877                 return ret;
2878         count = ret;
2879
2880         for (i = 0; i < count; i++)
2881                 xstats[i].id = i;
2882         /* add an offset to driver-specific stats */
2883         for ( ; i < count + xcount; i++)
2884                 xstats[i].id += count;
2885
2886         return count + xcount;
2887 }
2888
2889 /* reset ethdev extended statistics */
2890 int
2891 rte_eth_xstats_reset(uint16_t port_id)
2892 {
2893         struct rte_eth_dev *dev;
2894
2895         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2896         dev = &rte_eth_devices[port_id];
2897
2898         /* implemented by the driver */
2899         if (dev->dev_ops->xstats_reset != NULL)
2900                 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2901
2902         /* fallback to default */
2903         return rte_eth_stats_reset(port_id);
2904 }
2905
2906 static int
2907 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2908                 uint8_t is_rx)
2909 {
2910         struct rte_eth_dev *dev;
2911
2912         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2913
2914         dev = &rte_eth_devices[port_id];
2915
2916         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2917
2918         if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2919                 return -EINVAL;
2920
2921         if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2922                 return -EINVAL;
2923
2924         if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2925                 return -EINVAL;
2926
2927         return (*dev->dev_ops->queue_stats_mapping_set)
2928                         (dev, queue_id, stat_idx, is_rx);
2929 }
2930
2931
2932 int
2933 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2934                 uint8_t stat_idx)
2935 {
2936         return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2937                                                 stat_idx, STAT_QMAP_TX));
2938 }
2939
2940
2941 int
2942 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2943                 uint8_t stat_idx)
2944 {
2945         return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2946                                                 stat_idx, STAT_QMAP_RX));
2947 }
2948
2949 int
2950 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2951 {
2952         struct rte_eth_dev *dev;
2953
2954         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2955         dev = &rte_eth_devices[port_id];
2956
2957         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2958         return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2959                                                         fw_version, fw_size));
2960 }
2961
2962 int
2963 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2964 {
2965         struct rte_eth_dev *dev;
2966         const struct rte_eth_desc_lim lim = {
2967                 .nb_max = UINT16_MAX,
2968                 .nb_min = 0,
2969                 .nb_align = 1,
2970                 .nb_seg_max = UINT16_MAX,
2971                 .nb_mtu_seg_max = UINT16_MAX,
2972         };
2973         int diag;
2974
2975         /*
2976          * Init dev_info before port_id check since caller does not have
2977          * return status and does not know if get is successful or not.
2978          */
2979         memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2980         dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
2981
2982         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2983         dev = &rte_eth_devices[port_id];
2984
2985         dev_info->rx_desc_lim = lim;
2986         dev_info->tx_desc_lim = lim;
2987         dev_info->device = dev->device;
2988         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2989         dev_info->max_mtu = UINT16_MAX;
2990
2991         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2992         diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2993         if (diag != 0) {
2994                 /* Cleanup already filled in device information */
2995                 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2996                 return eth_err(port_id, diag);
2997         }
2998
2999         /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3000         dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3001                         RTE_MAX_QUEUES_PER_PORT);
3002         dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3003                         RTE_MAX_QUEUES_PER_PORT);
3004
3005         dev_info->driver_name = dev->device->driver->name;
3006         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3007         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3008
3009         dev_info->dev_flags = &dev->data->dev_flags;
3010
3011         return 0;
3012 }
3013
3014 int
3015 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3016                                  uint32_t *ptypes, int num)
3017 {
3018         int i, j;
3019         struct rte_eth_dev *dev;
3020         const uint32_t *all_ptypes;
3021
3022         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3023         dev = &rte_eth_devices[port_id];
3024         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3025         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3026
3027         if (!all_ptypes)
3028                 return 0;
3029
3030         for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3031                 if (all_ptypes[i] & ptype_mask) {
3032                         if (j < num)
3033                                 ptypes[j] = all_ptypes[i];
3034                         j++;
3035                 }
3036
3037         return j;
3038 }
3039
3040 int
3041 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3042                                  uint32_t *set_ptypes, unsigned int num)
3043 {
3044         const uint32_t valid_ptype_masks[] = {
3045                 RTE_PTYPE_L2_MASK,
3046                 RTE_PTYPE_L3_MASK,
3047                 RTE_PTYPE_L4_MASK,
3048                 RTE_PTYPE_TUNNEL_MASK,
3049                 RTE_PTYPE_INNER_L2_MASK,
3050                 RTE_PTYPE_INNER_L3_MASK,
3051                 RTE_PTYPE_INNER_L4_MASK,
3052         };
3053         const uint32_t *all_ptypes;
3054         struct rte_eth_dev *dev;
3055         uint32_t unused_mask;
3056         unsigned int i, j;
3057         int ret;
3058
3059         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3060         dev = &rte_eth_devices[port_id];
3061
3062         if (num > 0 && set_ptypes == NULL)
3063                 return -EINVAL;
3064
3065         if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3066                         *dev->dev_ops->dev_ptypes_set == NULL) {
3067                 ret = 0;
3068                 goto ptype_unknown;
3069         }
3070
3071         if (ptype_mask == 0) {
3072                 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3073                                 ptype_mask);
3074                 goto ptype_unknown;
3075         }
3076
3077         unused_mask = ptype_mask;
3078         for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3079                 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3080                 if (mask && mask != valid_ptype_masks[i]) {
3081                         ret = -EINVAL;
3082                         goto ptype_unknown;
3083                 }
3084                 unused_mask &= ~valid_ptype_masks[i];
3085         }
3086
3087         if (unused_mask) {
3088                 ret = -EINVAL;
3089                 goto ptype_unknown;
3090         }
3091
3092         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3093         if (all_ptypes == NULL) {
3094                 ret = 0;
3095                 goto ptype_unknown;
3096         }
3097
3098         /*
3099          * Accommodate as many set_ptypes as possible. If the supplied
3100          * set_ptypes array is insufficient fill it partially.
3101          */
3102         for (i = 0, j = 0; set_ptypes != NULL &&
3103                                 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3104                 if (ptype_mask & all_ptypes[i]) {
3105                         if (j < num - 1) {
3106                                 set_ptypes[j] = all_ptypes[i];
3107                                 j++;
3108                                 continue;
3109                         }
3110                         break;
3111                 }
3112         }
3113
3114         if (set_ptypes != NULL && j < num)
3115                 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3116
3117         return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3118
3119 ptype_unknown:
3120         if (num > 0)
3121                 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3122
3123         return ret;
3124 }
3125
3126 int
3127 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3128 {
3129         struct rte_eth_dev *dev;
3130
3131         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132         dev = &rte_eth_devices[port_id];
3133         rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3134
3135         return 0;
3136 }
3137
3138 int
3139 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3140 {
3141         struct rte_eth_dev *dev;
3142
3143         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144
3145         dev = &rte_eth_devices[port_id];
3146         *mtu = dev->data->mtu;
3147         return 0;
3148 }
3149
3150 int
3151 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3152 {
3153         int ret;
3154         struct rte_eth_dev_info dev_info;
3155         struct rte_eth_dev *dev;
3156
3157         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3158         dev = &rte_eth_devices[port_id];
3159         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3160
3161         /*
3162          * Check if the device supports dev_infos_get, if it does not
3163          * skip min_mtu/max_mtu validation here as this requires values
3164          * that are populated within the call to rte_eth_dev_info_get()
3165          * which relies on dev->dev_ops->dev_infos_get.
3166          */
3167         if (*dev->dev_ops->dev_infos_get != NULL) {
3168                 ret = rte_eth_dev_info_get(port_id, &dev_info);
3169                 if (ret != 0)
3170                         return ret;
3171
3172                 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3173                         return -EINVAL;
3174         }
3175
3176         ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3177         if (!ret)
3178                 dev->data->mtu = mtu;
3179
3180         return eth_err(port_id, ret);
3181 }
3182
3183 int
3184 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3185 {
3186         struct rte_eth_dev *dev;
3187         int ret;
3188
3189         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3190         dev = &rte_eth_devices[port_id];
3191         if (!(dev->data->dev_conf.rxmode.offloads &
3192               DEV_RX_OFFLOAD_VLAN_FILTER)) {
3193                 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3194                         port_id);
3195                 return -ENOSYS;
3196         }
3197
3198         if (vlan_id > 4095) {
3199                 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3200                         port_id, vlan_id);
3201                 return -EINVAL;
3202         }
3203         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3204
3205         ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3206         if (ret == 0) {
3207                 struct rte_vlan_filter_conf *vfc;
3208                 int vidx;
3209                 int vbit;
3210
3211                 vfc = &dev->data->vlan_filter_conf;
3212                 vidx = vlan_id / 64;
3213                 vbit = vlan_id % 64;
3214
3215                 if (on)
3216                         vfc->ids[vidx] |= UINT64_C(1) << vbit;
3217                 else
3218                         vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3219         }
3220
3221         return eth_err(port_id, ret);
3222 }
3223
3224 int
3225 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3226                                     int on)
3227 {
3228         struct rte_eth_dev *dev;
3229
3230         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3231         dev = &rte_eth_devices[port_id];
3232         if (rx_queue_id >= dev->data->nb_rx_queues) {
3233                 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3234                 return -EINVAL;
3235         }
3236
3237         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3238         (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3239
3240         return 0;
3241 }
3242
3243 int
3244 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3245                                 enum rte_vlan_type vlan_type,
3246                                 uint16_t tpid)
3247 {
3248         struct rte_eth_dev *dev;
3249
3250         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3251         dev = &rte_eth_devices[port_id];
3252         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3253
3254         return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3255                                                                tpid));
3256 }
3257
3258 int
3259 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3260 {
3261         struct rte_eth_dev *dev;
3262         int ret = 0;
3263         int mask = 0;
3264         int cur, org = 0;
3265         uint64_t orig_offloads;
3266         uint64_t dev_offloads;
3267
3268         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3269         dev = &rte_eth_devices[port_id];
3270
3271         /* save original values in case of failure */
3272         orig_offloads = dev->data->dev_conf.rxmode.offloads;
3273         dev_offloads = orig_offloads;
3274
3275         /* check which option changed by application */
3276         cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3277         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3278         if (cur != org) {
3279                 if (cur)
3280                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3281                 else
3282                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3283                 mask |= ETH_VLAN_STRIP_MASK;
3284         }
3285
3286         cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3287         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3288         if (cur != org) {
3289                 if (cur)
3290                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3291                 else
3292                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3293                 mask |= ETH_VLAN_FILTER_MASK;
3294         }
3295
3296         cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3297         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3298         if (cur != org) {
3299                 if (cur)
3300                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3301                 else
3302                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3303                 mask |= ETH_VLAN_EXTEND_MASK;
3304         }
3305
3306         cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3307         org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3308         if (cur != org) {
3309                 if (cur)
3310                         dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3311                 else
3312                         dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3313                 mask |= ETH_QINQ_STRIP_MASK;
3314         }
3315
3316         /*no change*/
3317         if (mask == 0)
3318                 return ret;
3319
3320         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3321         dev->data->dev_conf.rxmode.offloads = dev_offloads;
3322         ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3323         if (ret) {
3324                 /* hit an error restore  original values */
3325                 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3326         }
3327
3328         return eth_err(port_id, ret);
3329 }
3330
3331 int
3332 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3333 {
3334         struct rte_eth_dev *dev;
3335         uint64_t *dev_offloads;
3336         int ret = 0;
3337
3338         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3339         dev = &rte_eth_devices[port_id];
3340         dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3341
3342         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3343                 ret |= ETH_VLAN_STRIP_OFFLOAD;
3344
3345         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3346                 ret |= ETH_VLAN_FILTER_OFFLOAD;
3347
3348         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3349                 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3350
3351         if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3352                 ret |= ETH_QINQ_STRIP_OFFLOAD;
3353
3354         return ret;
3355 }
3356
3357 int
3358 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3359 {
3360         struct rte_eth_dev *dev;
3361
3362         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3363         dev = &rte_eth_devices[port_id];
3364         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3365
3366         return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3367 }
3368
3369 int
3370 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3371 {
3372         struct rte_eth_dev *dev;
3373
3374         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3375         dev = &rte_eth_devices[port_id];
3376         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3377         memset(fc_conf, 0, sizeof(*fc_conf));
3378         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3379 }
3380
3381 int
3382 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3383 {
3384         struct rte_eth_dev *dev;
3385
3386         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387         if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3388                 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3389                 return -EINVAL;
3390         }
3391
3392         dev = &rte_eth_devices[port_id];
3393         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3394         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3395 }
3396
3397 int
3398 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3399                                    struct rte_eth_pfc_conf *pfc_conf)
3400 {
3401         struct rte_eth_dev *dev;
3402
3403         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3404         if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3405                 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3406                 return -EINVAL;
3407         }
3408
3409         dev = &rte_eth_devices[port_id];
3410         /* High water, low water validation are device specific */
3411         if  (*dev->dev_ops->priority_flow_ctrl_set)
3412                 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3413                                         (dev, pfc_conf));
3414         return -ENOTSUP;
3415 }
3416
3417 static int
3418 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3419                         uint16_t reta_size)
3420 {
3421         uint16_t i, num;
3422
3423         if (!reta_conf)
3424                 return -EINVAL;
3425
3426         num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3427         for (i = 0; i < num; i++) {
3428                 if (reta_conf[i].mask)
3429                         return 0;
3430         }
3431
3432         return -EINVAL;
3433 }
3434
3435 static int
3436 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3437                          uint16_t reta_size,
3438                          uint16_t max_rxq)
3439 {
3440         uint16_t i, idx, shift;
3441
3442         if (!reta_conf)
3443                 return -EINVAL;
3444
3445         if (max_rxq == 0) {
3446                 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3447                 return -EINVAL;
3448         }
3449
3450         for (i = 0; i < reta_size; i++) {
3451                 idx = i / RTE_RETA_GROUP_SIZE;
3452                 shift = i % RTE_RETA_GROUP_SIZE;
3453                 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3454                         (reta_conf[idx].reta[shift] >= max_rxq)) {
3455                         RTE_ETHDEV_LOG(ERR,
3456                                 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3457                                 idx, shift,
3458                                 reta_conf[idx].reta[shift], max_rxq);
3459                         return -EINVAL;
3460                 }
3461         }
3462
3463         return 0;
3464 }
3465
3466 int
3467 rte_eth_dev_rss_reta_update(uint16_t port_id,
3468                             struct rte_eth_rss_reta_entry64 *reta_conf,
3469                             uint16_t reta_size)
3470 {
3471         struct rte_eth_dev *dev;
3472         int ret;
3473
3474         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3475         /* Check mask bits */
3476         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3477         if (ret < 0)
3478                 return ret;
3479
3480         dev = &rte_eth_devices[port_id];
3481
3482         /* Check entry value */
3483         ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3484                                 dev->data->nb_rx_queues);
3485         if (ret < 0)
3486                 return ret;
3487
3488         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3489         return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3490                                                              reta_size));
3491 }
3492
3493 int
3494 rte_eth_dev_rss_reta_query(uint16_t port_id,
3495                            struct rte_eth_rss_reta_entry64 *reta_conf,
3496                            uint16_t reta_size)
3497 {
3498         struct rte_eth_dev *dev;
3499         int ret;
3500
3501         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3502
3503         /* Check mask bits */
3504         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3505         if (ret < 0)
3506                 return ret;
3507
3508         dev = &rte_eth_devices[port_id];
3509         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3510         return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3511                                                             reta_size));
3512 }
3513
3514 int
3515 rte_eth_dev_rss_hash_update(uint16_t port_id,
3516                             struct rte_eth_rss_conf *rss_conf)
3517 {
3518         struct rte_eth_dev *dev;
3519         struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3520         int ret;
3521
3522         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3523
3524         ret = rte_eth_dev_info_get(port_id, &dev_info);
3525         if (ret != 0)
3526                 return ret;
3527
3528         rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3529
3530         dev = &rte_eth_devices[port_id];
3531         if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3532             dev_info.flow_type_rss_offloads) {
3533                 RTE_ETHDEV_LOG(ERR,
3534                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3535                         port_id, rss_conf->rss_hf,
3536                         dev_info.flow_type_rss_offloads);
3537                 return -EINVAL;
3538         }
3539         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3540         return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3541                                                                  rss_conf));
3542 }
3543
3544 int
3545 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3546                               struct rte_eth_rss_conf *rss_conf)
3547 {
3548         struct rte_eth_dev *dev;
3549
3550         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3551         dev = &rte_eth_devices[port_id];
3552         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3553         return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3554                                                                    rss_conf));
3555 }
3556
3557 int
3558 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3559                                 struct rte_eth_udp_tunnel *udp_tunnel)
3560 {
3561         struct rte_eth_dev *dev;
3562
3563         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564         if (udp_tunnel == NULL) {
3565                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3566                 return -EINVAL;
3567         }
3568
3569         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3570                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3571                 return -EINVAL;
3572         }
3573
3574         dev = &rte_eth_devices[port_id];
3575         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3576         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3577                                                                 udp_tunnel));
3578 }
3579
3580 int
3581 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3582                                    struct rte_eth_udp_tunnel *udp_tunnel)
3583 {
3584         struct rte_eth_dev *dev;
3585
3586         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3587         dev = &rte_eth_devices[port_id];
3588
3589         if (udp_tunnel == NULL) {
3590                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3591                 return -EINVAL;
3592         }
3593
3594         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3595                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3596                 return -EINVAL;
3597         }
3598
3599         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3600         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3601                                                                 udp_tunnel));
3602 }
3603
3604 int
3605 rte_eth_led_on(uint16_t port_id)
3606 {
3607         struct rte_eth_dev *dev;
3608
3609         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3610         dev = &rte_eth_devices[port_id];
3611         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3612         return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3613 }
3614
3615 int
3616 rte_eth_led_off(uint16_t port_id)
3617 {
3618         struct rte_eth_dev *dev;
3619
3620         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3621         dev = &rte_eth_devices[port_id];
3622         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3623         return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3624 }
3625
3626 /*
3627  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3628  * an empty spot.
3629  */
3630 static int
3631 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3632 {
3633         struct rte_eth_dev_info dev_info;
3634         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3635         unsigned i;
3636         int ret;
3637
3638         ret = rte_eth_dev_info_get(port_id, &dev_info);
3639         if (ret != 0)
3640                 return -1;
3641
3642         for (i = 0; i < dev_info.max_mac_addrs; i++)
3643                 if (memcmp(addr, &dev->data->mac_addrs[i],
3644                                 RTE_ETHER_ADDR_LEN) == 0)
3645                         return i;
3646
3647         return -1;
3648 }
3649
3650 static const struct rte_ether_addr null_mac_addr;
3651
3652 int
3653 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3654                         uint32_t pool)
3655 {
3656         struct rte_eth_dev *dev;
3657         int index;
3658         uint64_t pool_mask;
3659         int ret;
3660
3661         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3662         dev = &rte_eth_devices[port_id];
3663         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3664
3665         if (rte_is_zero_ether_addr(addr)) {
3666                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3667                         port_id);
3668                 return -EINVAL;
3669         }
3670         if (pool >= ETH_64_POOLS) {
3671                 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3672                 return -EINVAL;
3673         }
3674
3675         index = get_mac_addr_index(port_id, addr);
3676         if (index < 0) {
3677                 index = get_mac_addr_index(port_id, &null_mac_addr);
3678                 if (index < 0) {
3679                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3680                                 port_id);
3681                         return -ENOSPC;
3682                 }
3683         } else {
3684                 pool_mask = dev->data->mac_pool_sel[index];
3685
3686                 /* Check if both MAC address and pool is already there, and do nothing */
3687                 if (pool_mask & (1ULL << pool))
3688                         return 0;
3689         }
3690
3691         /* Update NIC */
3692         ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3693
3694         if (ret == 0) {
3695                 /* Update address in NIC data structure */
3696                 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3697
3698                 /* Update pool bitmap in NIC data structure */
3699                 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3700         }
3701
3702         return eth_err(port_id, ret);
3703 }
3704
3705 int
3706 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3707 {
3708         struct rte_eth_dev *dev;
3709         int index;
3710
3711         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3712         dev = &rte_eth_devices[port_id];
3713         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3714
3715         index = get_mac_addr_index(port_id, addr);
3716         if (index == 0) {
3717                 RTE_ETHDEV_LOG(ERR,
3718                         "Port %u: Cannot remove default MAC address\n",
3719                         port_id);
3720                 return -EADDRINUSE;
3721         } else if (index < 0)
3722                 return 0;  /* Do nothing if address wasn't found */
3723
3724         /* Update NIC */
3725         (*dev->dev_ops->mac_addr_remove)(dev, index);
3726
3727         /* Update address in NIC data structure */
3728         rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3729
3730         /* reset pool bitmap */
3731         dev->data->mac_pool_sel[index] = 0;
3732
3733         return 0;
3734 }
3735
3736 int
3737 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3738 {
3739         struct rte_eth_dev *dev;
3740         int ret;
3741
3742         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3743
3744         if (!rte_is_valid_assigned_ether_addr(addr))
3745                 return -EINVAL;
3746
3747         dev = &rte_eth_devices[port_id];
3748         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3749
3750         ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3751         if (ret < 0)
3752                 return ret;
3753
3754         /* Update default address in NIC data structure */
3755         rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3756
3757         return 0;
3758 }
3759
3760
3761 /*
3762  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3763  * an empty spot.
3764  */
3765 static int
3766 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3767 {
3768         struct rte_eth_dev_info dev_info;
3769         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3770         unsigned i;
3771         int ret;
3772
3773         ret = rte_eth_dev_info_get(port_id, &dev_info);
3774         if (ret != 0)
3775                 return -1;
3776
3777         if (!dev->data->hash_mac_addrs)
3778                 return -1;
3779
3780         for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3781                 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3782                         RTE_ETHER_ADDR_LEN) == 0)
3783                         return i;
3784
3785         return -1;
3786 }
3787
3788 int
3789 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3790                                 uint8_t on)
3791 {
3792         int index;
3793         int ret;
3794         struct rte_eth_dev *dev;
3795
3796         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3797
3798         dev = &rte_eth_devices[port_id];
3799         if (rte_is_zero_ether_addr(addr)) {
3800                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3801                         port_id);
3802                 return -EINVAL;
3803         }
3804
3805         index = get_hash_mac_addr_index(port_id, addr);
3806         /* Check if it's already there, and do nothing */
3807         if ((index >= 0) && on)
3808                 return 0;
3809
3810         if (index < 0) {
3811                 if (!on) {
3812                         RTE_ETHDEV_LOG(ERR,
3813                                 "Port %u: the MAC address was not set in UTA\n",
3814                                 port_id);
3815                         return -EINVAL;
3816                 }
3817
3818                 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3819                 if (index < 0) {
3820                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3821                                 port_id);
3822                         return -ENOSPC;
3823                 }
3824         }
3825
3826         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3827         ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3828         if (ret == 0) {
3829                 /* Update address in NIC data structure */
3830                 if (on)
3831                         rte_ether_addr_copy(addr,
3832                                         &dev->data->hash_mac_addrs[index]);
3833                 else
3834                         rte_ether_addr_copy(&null_mac_addr,
3835                                         &dev->data->hash_mac_addrs[index]);
3836         }
3837
3838         return eth_err(port_id, ret);
3839 }
3840
3841 int
3842 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3843 {
3844         struct rte_eth_dev *dev;
3845
3846         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847
3848         dev = &rte_eth_devices[port_id];
3849
3850         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3851         return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3852                                                                        on));
3853 }
3854
3855 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3856                                         uint16_t tx_rate)
3857 {
3858         struct rte_eth_dev *dev;
3859         struct rte_eth_dev_info dev_info;
3860         struct rte_eth_link link;
3861         int ret;
3862
3863         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3864
3865         ret = rte_eth_dev_info_get(port_id, &dev_info);
3866         if (ret != 0)
3867                 return ret;
3868
3869         dev = &rte_eth_devices[port_id];
3870         link = dev->data->dev_link;
3871
3872         if (queue_idx > dev_info.max_tx_queues) {
3873                 RTE_ETHDEV_LOG(ERR,
3874                         "Set queue rate limit:port %u: invalid queue id=%u\n",
3875                         port_id, queue_idx);
3876                 return -EINVAL;
3877         }
3878
3879         if (tx_rate > link.link_speed) {
3880                 RTE_ETHDEV_LOG(ERR,
3881                         "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3882                         tx_rate, link.link_speed);
3883                 return -EINVAL;
3884         }
3885
3886         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3887         return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3888                                                         queue_idx, tx_rate));
3889 }
3890
3891 int
3892 rte_eth_mirror_rule_set(uint16_t port_id,
3893                         struct rte_eth_mirror_conf *mirror_conf,
3894                         uint8_t rule_id, uint8_t on)
3895 {
3896         struct rte_eth_dev *dev;
3897
3898         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3899         if (mirror_conf->rule_type == 0) {
3900                 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3901                 return -EINVAL;
3902         }
3903
3904         if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3905                 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3906                         ETH_64_POOLS - 1);
3907                 return -EINVAL;
3908         }
3909
3910         if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3911              ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3912             (mirror_conf->pool_mask == 0)) {
3913                 RTE_ETHDEV_LOG(ERR,
3914                         "Invalid mirror pool, pool mask can not be 0\n");
3915                 return -EINVAL;
3916         }
3917
3918         if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3919             mirror_conf->vlan.vlan_mask == 0) {
3920                 RTE_ETHDEV_LOG(ERR,
3921                         "Invalid vlan mask, vlan mask can not be 0\n");
3922                 return -EINVAL;
3923         }
3924
3925         dev = &rte_eth_devices[port_id];
3926         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3927
3928         return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3929                                                 mirror_conf, rule_id, on));
3930 }
3931
3932 int
3933 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3934 {
3935         struct rte_eth_dev *dev;
3936
3937         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3938
3939         dev = &rte_eth_devices[port_id];
3940         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3941
3942         return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3943                                                                    rule_id));
3944 }
3945
3946 RTE_INIT(eth_dev_init_cb_lists)
3947 {
3948         int i;
3949
3950         for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3951                 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3952 }
3953
3954 int
3955 rte_eth_dev_callback_register(uint16_t port_id,
3956                         enum rte_eth_event_type event,
3957                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3958 {
3959         struct rte_eth_dev *dev;
3960         struct rte_eth_dev_callback *user_cb;
3961         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3962         uint16_t last_port;
3963
3964         if (!cb_fn)
3965                 return -EINVAL;
3966
3967         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3968                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3969                 return -EINVAL;
3970         }
3971
3972         if (port_id == RTE_ETH_ALL) {
3973                 next_port = 0;
3974                 last_port = RTE_MAX_ETHPORTS - 1;
3975         } else {
3976                 next_port = last_port = port_id;
3977         }
3978
3979         rte_spinlock_lock(&rte_eth_dev_cb_lock);
3980
3981         do {
3982                 dev = &rte_eth_devices[next_port];
3983
3984                 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3985                         if (user_cb->cb_fn == cb_fn &&
3986                                 user_cb->cb_arg == cb_arg &&
3987                                 user_cb->event == event) {
3988                                 break;
3989                         }
3990                 }
3991
3992                 /* create a new callback. */
3993                 if (user_cb == NULL) {
3994                         user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3995                                 sizeof(struct rte_eth_dev_callback), 0);
3996                         if (user_cb != NULL) {
3997                                 user_cb->cb_fn = cb_fn;
3998                                 user_cb->cb_arg = cb_arg;
3999                                 user_cb->event = event;
4000                                 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4001                                                   user_cb, next);
4002                         } else {
4003                                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4004                                 rte_eth_dev_callback_unregister(port_id, event,
4005                                                                 cb_fn, cb_arg);
4006                                 return -ENOMEM;
4007                         }
4008
4009                 }
4010         } while (++next_port <= last_port);
4011
4012         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4013         return 0;
4014 }
4015
4016 int
4017 rte_eth_dev_callback_unregister(uint16_t port_id,
4018                         enum rte_eth_event_type event,
4019                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4020 {
4021         int ret;
4022         struct rte_eth_dev *dev;
4023         struct rte_eth_dev_callback *cb, *next;
4024         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4025         uint16_t last_port;
4026
4027         if (!cb_fn)
4028                 return -EINVAL;
4029
4030         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4031                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4032                 return -EINVAL;
4033         }
4034
4035         if (port_id == RTE_ETH_ALL) {
4036                 next_port = 0;
4037                 last_port = RTE_MAX_ETHPORTS - 1;
4038         } else {
4039                 next_port = last_port = port_id;
4040         }
4041
4042         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4043
4044         do {
4045                 dev = &rte_eth_devices[next_port];
4046                 ret = 0;
4047                 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4048                      cb = next) {
4049
4050                         next = TAILQ_NEXT(cb, next);
4051
4052                         if (cb->cb_fn != cb_fn || cb->event != event ||
4053                             (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4054                                 continue;
4055
4056                         /*
4057                          * if this callback is not executing right now,
4058                          * then remove it.
4059                          */
4060                         if (cb->active == 0) {
4061                                 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4062                                 rte_free(cb);
4063                         } else {
4064                                 ret = -EAGAIN;
4065                         }
4066                 }
4067         } while (++next_port <= last_port);
4068
4069         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4070         return ret;
4071 }
4072
4073 int
4074 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4075         enum rte_eth_event_type event, void *ret_param)
4076 {
4077         struct rte_eth_dev_callback *cb_lst;
4078         struct rte_eth_dev_callback dev_cb;
4079         int rc = 0;
4080
4081         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4082         TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4083                 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4084                         continue;
4085                 dev_cb = *cb_lst;
4086                 cb_lst->active = 1;
4087                 if (ret_param != NULL)
4088                         dev_cb.ret_param = ret_param;
4089
4090                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4091                 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4092                                 dev_cb.cb_arg, dev_cb.ret_param);
4093                 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4094                 cb_lst->active = 0;
4095         }
4096         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4097         return rc;
4098 }
4099
4100 void
4101 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4102 {
4103         if (dev == NULL)
4104                 return;
4105
4106         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4107
4108         dev->state = RTE_ETH_DEV_ATTACHED;
4109 }
4110
4111 int
4112 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4113 {
4114         uint32_t vec;
4115         struct rte_eth_dev *dev;
4116         struct rte_intr_handle *intr_handle;
4117         uint16_t qid;
4118         int rc;
4119
4120         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4121
4122         dev = &rte_eth_devices[port_id];
4123
4124         if (!dev->intr_handle) {
4125                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4126                 return -ENOTSUP;
4127         }
4128
4129         intr_handle = dev->intr_handle;
4130         if (!intr_handle->intr_vec) {
4131                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4132                 return -EPERM;
4133         }
4134
4135         for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4136                 vec = intr_handle->intr_vec[qid];
4137                 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4138                 if (rc && rc != -EEXIST) {
4139                         RTE_ETHDEV_LOG(ERR,
4140                                 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4141                                 port_id, qid, op, epfd, vec);
4142                 }
4143         }
4144
4145         return 0;
4146 }
4147
4148 int
4149 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4150 {
4151         struct rte_intr_handle *intr_handle;
4152         struct rte_eth_dev *dev;
4153         unsigned int efd_idx;
4154         uint32_t vec;
4155         int fd;
4156
4157         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4158
4159         dev = &rte_eth_devices[port_id];
4160
4161         if (queue_id >= dev->data->nb_rx_queues) {
4162                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4163                 return -1;
4164         }
4165
4166         if (!dev->intr_handle) {
4167                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4168                 return -1;
4169         }
4170
4171         intr_handle = dev->intr_handle;
4172         if (!intr_handle->intr_vec) {
4173                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4174                 return -1;
4175         }
4176
4177         vec = intr_handle->intr_vec[queue_id];
4178         efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4179                 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4180         fd = intr_handle->efds[efd_idx];
4181
4182         return fd;
4183 }
4184
4185 const struct rte_memzone *
4186 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4187                          uint16_t queue_id, size_t size, unsigned align,
4188                          int socket_id)
4189 {
4190         char z_name[RTE_MEMZONE_NAMESIZE];
4191         const struct rte_memzone *mz;
4192         int rc;
4193
4194         rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4195                       dev->data->port_id, queue_id, ring_name);
4196         if (rc >= RTE_MEMZONE_NAMESIZE) {
4197                 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4198                 rte_errno = ENAMETOOLONG;
4199                 return NULL;
4200         }
4201
4202         mz = rte_memzone_lookup(z_name);
4203         if (mz)
4204                 return mz;
4205
4206         return rte_memzone_reserve_aligned(z_name, size, socket_id,
4207                         RTE_MEMZONE_IOVA_CONTIG, align);
4208 }
4209
4210 int
4211 rte_eth_dev_create(struct rte_device *device, const char *name,
4212         size_t priv_data_size,
4213         ethdev_bus_specific_init ethdev_bus_specific_init,
4214         void *bus_init_params,
4215         ethdev_init_t ethdev_init, void *init_params)
4216 {
4217         struct rte_eth_dev *ethdev;
4218         int retval;
4219
4220         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4221
4222         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4223                 ethdev = rte_eth_dev_allocate(name);
4224                 if (!ethdev)
4225                         return -ENODEV;
4226
4227                 if (priv_data_size) {
4228                         ethdev->data->dev_private = rte_zmalloc_socket(
4229                                 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4230                                 device->numa_node);
4231
4232                         if (!ethdev->data->dev_private) {
4233                                 RTE_ETHDEV_LOG(ERR,
4234                                         "failed to allocate private data\n");
4235                                 retval = -ENOMEM;
4236                                 goto probe_failed;
4237                         }
4238                 }
4239         } else {
4240                 ethdev = rte_eth_dev_attach_secondary(name);
4241                 if (!ethdev) {
4242                         RTE_ETHDEV_LOG(ERR,
4243                                 "secondary process attach failed, ethdev doesn't exist\n");
4244                         return  -ENODEV;
4245                 }
4246         }
4247
4248         ethdev->device = device;
4249
4250         if (ethdev_bus_specific_init) {
4251                 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4252                 if (retval) {
4253                         RTE_ETHDEV_LOG(ERR,
4254                                 "ethdev bus specific initialisation failed\n");
4255                         goto probe_failed;
4256                 }
4257         }
4258
4259         retval = ethdev_init(ethdev, init_params);
4260         if (retval) {
4261                 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4262                 goto probe_failed;
4263         }
4264
4265         rte_eth_dev_probing_finish(ethdev);
4266
4267         return retval;
4268
4269 probe_failed:
4270         rte_eth_dev_release_port(ethdev);
4271         return retval;
4272 }
4273
4274 int
4275 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4276         ethdev_uninit_t ethdev_uninit)
4277 {
4278         int ret;
4279
4280         ethdev = rte_eth_dev_allocated(ethdev->data->name);
4281         if (!ethdev)
4282                 return -ENODEV;
4283
4284         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4285
4286         ret = ethdev_uninit(ethdev);
4287         if (ret)
4288                 return ret;
4289
4290         return rte_eth_dev_release_port(ethdev);
4291 }
4292
4293 int
4294 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4295                           int epfd, int op, void *data)
4296 {
4297         uint32_t vec;
4298         struct rte_eth_dev *dev;
4299         struct rte_intr_handle *intr_handle;
4300         int rc;
4301
4302         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4303
4304         dev = &rte_eth_devices[port_id];
4305         if (queue_id >= dev->data->nb_rx_queues) {
4306                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4307                 return -EINVAL;
4308         }
4309
4310         if (!dev->intr_handle) {
4311                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4312                 return -ENOTSUP;
4313         }
4314
4315         intr_handle = dev->intr_handle;
4316         if (!intr_handle->intr_vec) {
4317                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4318                 return -EPERM;
4319         }
4320
4321         vec = intr_handle->intr_vec[queue_id];
4322         rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4323         if (rc && rc != -EEXIST) {
4324                 RTE_ETHDEV_LOG(ERR,
4325                         "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4326                         port_id, queue_id, op, epfd, vec);
4327                 return rc;
4328         }
4329
4330         return 0;
4331 }
4332
4333 int
4334 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4335                            uint16_t queue_id)
4336 {
4337         struct rte_eth_dev *dev;
4338
4339         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4340
4341         dev = &rte_eth_devices[port_id];
4342
4343         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4344         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4345                                                                 queue_id));
4346 }
4347
4348 int
4349 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4350                             uint16_t queue_id)
4351 {
4352         struct rte_eth_dev *dev;
4353
4354         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4355
4356         dev = &rte_eth_devices[port_id];
4357
4358         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4359         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4360                                                                 queue_id));
4361 }
4362
4363
4364 int
4365 rte_eth_dev_filter_supported(uint16_t port_id,
4366                              enum rte_filter_type filter_type)
4367 {
4368         struct rte_eth_dev *dev;
4369
4370         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4371
4372         dev = &rte_eth_devices[port_id];
4373         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4374         return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4375                                 RTE_ETH_FILTER_NOP, NULL);
4376 }
4377
4378 int
4379 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4380                         enum rte_filter_op filter_op, void *arg)
4381 {
4382         struct rte_eth_dev *dev;
4383
4384         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4385
4386         dev = &rte_eth_devices[port_id];
4387         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4388         return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4389                                                              filter_op, arg));
4390 }
4391
4392 const struct rte_eth_rxtx_callback *
4393 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4394                 rte_rx_callback_fn fn, void *user_param)
4395 {
4396 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4397         rte_errno = ENOTSUP;
4398         return NULL;
4399 #endif
4400         struct rte_eth_dev *dev;
4401
4402         /* check input parameters */
4403         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4404                     queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4405                 rte_errno = EINVAL;
4406                 return NULL;
4407         }
4408         dev = &rte_eth_devices[port_id];
4409         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4410                 rte_errno = EINVAL;
4411                 return NULL;
4412         }
4413         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4414
4415         if (cb == NULL) {
4416                 rte_errno = ENOMEM;
4417                 return NULL;
4418         }
4419
4420         cb->fn.rx = fn;
4421         cb->param = user_param;
4422
4423         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4424         /* Add the callbacks in fifo order. */
4425         struct rte_eth_rxtx_callback *tail =
4426                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4427
4428         if (!tail) {
4429                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4430
4431         } else {
4432                 while (tail->next)
4433                         tail = tail->next;
4434                 tail->next = cb;
4435         }
4436         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4437
4438         return cb;
4439 }
4440
4441 const struct rte_eth_rxtx_callback *
4442 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4443                 rte_rx_callback_fn fn, void *user_param)
4444 {
4445 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4446         rte_errno = ENOTSUP;
4447         return NULL;
4448 #endif
4449         /* check input parameters */
4450         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4451                 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4452                 rte_errno = EINVAL;
4453                 return NULL;
4454         }
4455
4456         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4457
4458         if (cb == NULL) {
4459                 rte_errno = ENOMEM;
4460                 return NULL;
4461         }
4462
4463         cb->fn.rx = fn;
4464         cb->param = user_param;
4465
4466         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4467         /* Add the callbacks at first position */
4468         cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4469         rte_smp_wmb();
4470         rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4471         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4472
4473         return cb;
4474 }
4475
4476 const struct rte_eth_rxtx_callback *
4477 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4478                 rte_tx_callback_fn fn, void *user_param)
4479 {
4480 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4481         rte_errno = ENOTSUP;
4482         return NULL;
4483 #endif
4484         struct rte_eth_dev *dev;
4485
4486         /* check input parameters */
4487         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4488                     queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4489                 rte_errno = EINVAL;
4490                 return NULL;
4491         }
4492
4493         dev = &rte_eth_devices[port_id];
4494         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4495                 rte_errno = EINVAL;
4496                 return NULL;
4497         }
4498
4499         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4500
4501         if (cb == NULL) {
4502                 rte_errno = ENOMEM;
4503                 return NULL;
4504         }
4505
4506         cb->fn.tx = fn;
4507         cb->param = user_param;
4508
4509         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4510         /* Add the callbacks in fifo order. */
4511         struct rte_eth_rxtx_callback *tail =
4512                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4513
4514         if (!tail) {
4515                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4516
4517         } else {
4518                 while (tail->next)
4519                         tail = tail->next;
4520                 tail->next = cb;
4521         }
4522         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4523
4524         return cb;
4525 }
4526
4527 int
4528 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4529                 const struct rte_eth_rxtx_callback *user_cb)
4530 {
4531 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4532         return -ENOTSUP;
4533 #endif
4534         /* Check input parameters. */
4535         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4536         if (user_cb == NULL ||
4537                         queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4538                 return -EINVAL;
4539
4540         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4541         struct rte_eth_rxtx_callback *cb;
4542         struct rte_eth_rxtx_callback **prev_cb;
4543         int ret = -EINVAL;
4544
4545         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4546         prev_cb = &dev->post_rx_burst_cbs[queue_id];
4547         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4548                 cb = *prev_cb;
4549                 if (cb == user_cb) {
4550                         /* Remove the user cb from the callback list. */
4551                         *prev_cb = cb->next;
4552                         ret = 0;
4553                         break;
4554                 }
4555         }
4556         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4557
4558         return ret;
4559 }
4560
4561 int
4562 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4563                 const struct rte_eth_rxtx_callback *user_cb)
4564 {
4565 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4566         return -ENOTSUP;
4567 #endif
4568         /* Check input parameters. */
4569         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4570         if (user_cb == NULL ||
4571                         queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4572                 return -EINVAL;
4573
4574         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4575         int ret = -EINVAL;
4576         struct rte_eth_rxtx_callback *cb;
4577         struct rte_eth_rxtx_callback **prev_cb;
4578
4579         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4580         prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4581         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4582                 cb = *prev_cb;
4583                 if (cb == user_cb) {
4584                         /* Remove the user cb from the callback list. */
4585                         *prev_cb = cb->next;
4586                         ret = 0;
4587                         break;
4588                 }
4589         }
4590         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4591
4592         return ret;
4593 }
4594
4595 int
4596 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4597         struct rte_eth_rxq_info *qinfo)
4598 {
4599         struct rte_eth_dev *dev;
4600
4601         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4602
4603         if (qinfo == NULL)
4604                 return -EINVAL;
4605
4606         dev = &rte_eth_devices[port_id];
4607         if (queue_id >= dev->data->nb_rx_queues) {
4608                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4609                 return -EINVAL;
4610         }
4611
4612         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4613                 RTE_ETHDEV_LOG(INFO,
4614                         "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4615                         queue_id, port_id);
4616                 return -EINVAL;
4617         }
4618
4619         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4620
4621         memset(qinfo, 0, sizeof(*qinfo));
4622         dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4623         return 0;
4624 }
4625
4626 int
4627 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4628         struct rte_eth_txq_info *qinfo)
4629 {
4630         struct rte_eth_dev *dev;
4631
4632         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4633
4634         if (qinfo == NULL)
4635                 return -EINVAL;
4636
4637         dev = &rte_eth_devices[port_id];
4638         if (queue_id >= dev->data->nb_tx_queues) {
4639                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4640                 return -EINVAL;
4641         }
4642
4643         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4644                 RTE_ETHDEV_LOG(INFO,
4645                         "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4646                         queue_id, port_id);
4647                 return -EINVAL;
4648         }
4649
4650         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4651
4652         memset(qinfo, 0, sizeof(*qinfo));
4653         dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4654
4655         return 0;
4656 }
4657
4658 int
4659 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4660                           struct rte_eth_burst_mode *mode)
4661 {
4662         struct rte_eth_dev *dev;
4663
4664         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4665
4666         if (mode == NULL)
4667                 return -EINVAL;
4668
4669         dev = &rte_eth_devices[port_id];
4670
4671         if (queue_id >= dev->data->nb_rx_queues) {
4672                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4673                 return -EINVAL;
4674         }
4675
4676         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4677         memset(mode, 0, sizeof(*mode));
4678         return eth_err(port_id,
4679                        dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4680 }
4681
4682 int
4683 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4684                           struct rte_eth_burst_mode *mode)
4685 {
4686         struct rte_eth_dev *dev;
4687
4688         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4689
4690         if (mode == NULL)
4691                 return -EINVAL;
4692
4693         dev = &rte_eth_devices[port_id];
4694
4695         if (queue_id >= dev->data->nb_tx_queues) {
4696                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4697                 return -EINVAL;
4698         }
4699
4700         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4701         memset(mode, 0, sizeof(*mode));
4702         return eth_err(port_id,
4703                        dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4704 }
4705
4706 int
4707 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4708                              struct rte_ether_addr *mc_addr_set,
4709                              uint32_t nb_mc_addr)
4710 {
4711         struct rte_eth_dev *dev;
4712
4713         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4714
4715         dev = &rte_eth_devices[port_id];
4716         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4717         return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4718                                                 mc_addr_set, nb_mc_addr));
4719 }
4720
4721 int
4722 rte_eth_timesync_enable(uint16_t port_id)
4723 {
4724         struct rte_eth_dev *dev;
4725
4726         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4727         dev = &rte_eth_devices[port_id];
4728
4729         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4730         return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4731 }
4732
4733 int
4734 rte_eth_timesync_disable(uint16_t port_id)
4735 {
4736         struct rte_eth_dev *dev;
4737
4738         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4739         dev = &rte_eth_devices[port_id];
4740
4741         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4742         return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4743 }
4744
4745 int
4746 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4747                                    uint32_t flags)
4748 {
4749         struct rte_eth_dev *dev;
4750
4751         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4752         dev = &rte_eth_devices[port_id];
4753
4754         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4755         return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4756                                 (dev, timestamp, flags));
4757 }
4758
4759 int
4760 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4761                                    struct timespec *timestamp)
4762 {
4763         struct rte_eth_dev *dev;
4764
4765         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4766         dev = &rte_eth_devices[port_id];
4767
4768         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4769         return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4770                                 (dev, timestamp));
4771 }
4772
4773 int
4774 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4775 {
4776         struct rte_eth_dev *dev;
4777
4778         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4779         dev = &rte_eth_devices[port_id];
4780
4781         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4782         return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4783                                                                       delta));
4784 }
4785
4786 int
4787 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4788 {
4789         struct rte_eth_dev *dev;
4790
4791         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4792         dev = &rte_eth_devices[port_id];
4793
4794         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4795         return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4796                                                                 timestamp));
4797 }
4798
4799 int
4800 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4801 {
4802         struct rte_eth_dev *dev;
4803
4804         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4805         dev = &rte_eth_devices[port_id];
4806
4807         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4808         return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4809                                                                 timestamp));
4810 }
4811
4812 int
4813 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4814 {
4815         struct rte_eth_dev *dev;
4816
4817         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4818         dev = &rte_eth_devices[port_id];
4819
4820         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4821         return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4822 }
4823
4824 int
4825 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4826 {
4827         struct rte_eth_dev *dev;
4828
4829         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4830
4831         dev = &rte_eth_devices[port_id];
4832         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4833         return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4834 }
4835
4836 int
4837 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4838 {
4839         struct rte_eth_dev *dev;
4840
4841         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4842
4843         dev = &rte_eth_devices[port_id];
4844         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4845         return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4846 }
4847
4848 int
4849 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4850 {
4851         struct rte_eth_dev *dev;
4852
4853         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4854
4855         dev = &rte_eth_devices[port_id];
4856         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4857         return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4858 }
4859
4860 int
4861 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4862 {
4863         struct rte_eth_dev *dev;
4864
4865         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4866
4867         dev = &rte_eth_devices[port_id];
4868         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4869         return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4870 }
4871
4872 int
4873 rte_eth_dev_get_module_info(uint16_t port_id,
4874                             struct rte_eth_dev_module_info *modinfo)
4875 {
4876         struct rte_eth_dev *dev;
4877
4878         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4879
4880         dev = &rte_eth_devices[port_id];
4881         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4882         return (*dev->dev_ops->get_module_info)(dev, modinfo);
4883 }
4884
4885 int
4886 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4887                               struct rte_dev_eeprom_info *info)
4888 {
4889         struct rte_eth_dev *dev;
4890
4891         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4892
4893         dev = &rte_eth_devices[port_id];
4894         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4895         return (*dev->dev_ops->get_module_eeprom)(dev, info);
4896 }
4897
4898 int
4899 rte_eth_dev_get_dcb_info(uint16_t port_id,
4900                              struct rte_eth_dcb_info *dcb_info)
4901 {
4902         struct rte_eth_dev *dev;
4903
4904         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4905
4906         dev = &rte_eth_devices[port_id];
4907         memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4908
4909         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4910         return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4911 }
4912
4913 int
4914 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4915                                     struct rte_eth_l2_tunnel_conf *l2_tunnel)
4916 {
4917         struct rte_eth_dev *dev;
4918
4919         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4920         if (l2_tunnel == NULL) {
4921                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4922                 return -EINVAL;
4923         }
4924
4925         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4926                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4927                 return -EINVAL;
4928         }
4929
4930         dev = &rte_eth_devices[port_id];
4931         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4932                                 -ENOTSUP);
4933         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4934                                                                 l2_tunnel));
4935 }
4936
4937 int
4938 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4939                                   struct rte_eth_l2_tunnel_conf *l2_tunnel,
4940                                   uint32_t mask,
4941                                   uint8_t en)
4942 {
4943         struct rte_eth_dev *dev;
4944
4945         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4946
4947         if (l2_tunnel == NULL) {
4948                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4949                 return -EINVAL;
4950         }
4951
4952         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4953                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4954                 return -EINVAL;
4955         }
4956
4957         if (mask == 0) {
4958                 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4959                 return -EINVAL;
4960         }
4961
4962         dev = &rte_eth_devices[port_id];
4963         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4964                                 -ENOTSUP);
4965         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4966                                                         l2_tunnel, mask, en));
4967 }
4968
4969 static void
4970 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4971                            const struct rte_eth_desc_lim *desc_lim)
4972 {
4973         if (desc_lim->nb_align != 0)
4974                 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4975
4976         if (desc_lim->nb_max != 0)
4977                 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4978
4979         *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4980 }
4981
4982 int
4983 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4984                                  uint16_t *nb_rx_desc,
4985                                  uint16_t *nb_tx_desc)
4986 {
4987         struct rte_eth_dev_info dev_info;
4988         int ret;
4989
4990         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4991
4992         ret = rte_eth_dev_info_get(port_id, &dev_info);
4993         if (ret != 0)
4994                 return ret;
4995
4996         if (nb_rx_desc != NULL)
4997                 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4998
4999         if (nb_tx_desc != NULL)
5000                 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5001
5002         return 0;
5003 }
5004
5005 int
5006 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5007                                    struct rte_eth_hairpin_cap *cap)
5008 {
5009         struct rte_eth_dev *dev;
5010
5011         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5012
5013         dev = &rte_eth_devices[port_id];
5014         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5015         memset(cap, 0, sizeof(*cap));
5016         return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5017 }
5018
5019 int
5020 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5021 {
5022         if (dev->data->rx_queue_state[queue_id] ==
5023             RTE_ETH_QUEUE_STATE_HAIRPIN)
5024                 return 1;
5025         return 0;
5026 }
5027
5028 int
5029 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5030 {
5031         if (dev->data->tx_queue_state[queue_id] ==
5032             RTE_ETH_QUEUE_STATE_HAIRPIN)
5033                 return 1;
5034         return 0;
5035 }
5036
5037 int
5038 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5039 {
5040         struct rte_eth_dev *dev;
5041
5042         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5043
5044         if (pool == NULL)
5045                 return -EINVAL;
5046
5047         dev = &rte_eth_devices[port_id];
5048
5049         if (*dev->dev_ops->pool_ops_supported == NULL)
5050                 return 1; /* all pools are supported */
5051
5052         return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5053 }
5054
5055 /**
5056  * A set of values to describe the possible states of a switch domain.
5057  */
5058 enum rte_eth_switch_domain_state {
5059         RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5060         RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5061 };
5062
5063 /**
5064  * Array of switch domains available for allocation. Array is sized to
5065  * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5066  * ethdev ports in a single process.
5067  */
5068 static struct rte_eth_dev_switch {
5069         enum rte_eth_switch_domain_state state;
5070 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5071
5072 int
5073 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5074 {
5075         unsigned int i;
5076
5077         *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5078
5079         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5080                 if (rte_eth_switch_domains[i].state ==
5081                         RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5082                         rte_eth_switch_domains[i].state =
5083                                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5084                         *domain_id = i;
5085                         return 0;
5086                 }
5087         }
5088
5089         return -ENOSPC;
5090 }
5091
5092 int
5093 rte_eth_switch_domain_free(uint16_t domain_id)
5094 {
5095         if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5096                 domain_id >= RTE_MAX_ETHPORTS)
5097                 return -EINVAL;
5098
5099         if (rte_eth_switch_domains[domain_id].state !=
5100                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5101                 return -EINVAL;
5102
5103         rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5104
5105         return 0;
5106 }
5107
5108 static int
5109 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5110 {
5111         int state;
5112         struct rte_kvargs_pair *pair;
5113         char *letter;
5114
5115         arglist->str = strdup(str_in);
5116         if (arglist->str == NULL)
5117                 return -ENOMEM;
5118
5119         letter = arglist->str;
5120         state = 0;
5121         arglist->count = 0;
5122         pair = &arglist->pairs[0];
5123         while (1) {
5124                 switch (state) {
5125                 case 0: /* Initial */
5126                         if (*letter == '=')
5127                                 return -EINVAL;
5128                         else if (*letter == '\0')
5129                                 return 0;
5130
5131                         state = 1;
5132                         pair->key = letter;
5133                         /* fall-thru */
5134
5135                 case 1: /* Parsing key */
5136                         if (*letter == '=') {
5137                                 *letter = '\0';
5138                                 pair->value = letter + 1;
5139                                 state = 2;
5140                         } else if (*letter == ',' || *letter == '\0')
5141                                 return -EINVAL;
5142                         break;
5143
5144
5145                 case 2: /* Parsing value */
5146                         if (*letter == '[')
5147                                 state = 3;
5148                         else if (*letter == ',') {
5149                                 *letter = '\0';
5150                                 arglist->count++;
5151                                 pair = &arglist->pairs[arglist->count];
5152                                 state = 0;
5153                         } else if (*letter == '\0') {
5154                                 letter--;
5155                                 arglist->count++;
5156                                 pair = &arglist->pairs[arglist->count];
5157                                 state = 0;
5158                         }
5159                         break;
5160
5161                 case 3: /* Parsing list */
5162                         if (*letter == ']')
5163                                 state = 2;
5164                         else if (*letter == '\0')
5165                                 return -EINVAL;
5166                         break;
5167                 }
5168                 letter++;
5169         }
5170 }
5171
5172 int
5173 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5174 {
5175         struct rte_kvargs args;
5176         struct rte_kvargs_pair *pair;
5177         unsigned int i;
5178         int result = 0;
5179
5180         memset(eth_da, 0, sizeof(*eth_da));
5181
5182         result = rte_eth_devargs_tokenise(&args, dargs);
5183         if (result < 0)
5184                 goto parse_cleanup;
5185
5186         for (i = 0; i < args.count; i++) {
5187                 pair = &args.pairs[i];
5188                 if (strcmp("representor", pair->key) == 0) {
5189                         result = rte_eth_devargs_parse_list(pair->value,
5190                                 rte_eth_devargs_parse_representor_ports,
5191                                 eth_da);
5192                         if (result < 0)
5193                                 goto parse_cleanup;
5194                 }
5195         }
5196
5197 parse_cleanup:
5198         if (args.str)
5199                 free(args.str);
5200
5201         return result;
5202 }
5203
5204 static int
5205 handle_port_list(const char *cmd __rte_unused,
5206                 const char *params __rte_unused,
5207                 struct rte_tel_data *d)
5208 {
5209         int port_id;
5210
5211         rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5212         RTE_ETH_FOREACH_DEV(port_id)
5213                 rte_tel_data_add_array_int(d, port_id);
5214         return 0;
5215 }
5216
5217 static int
5218 handle_port_xstats(const char *cmd __rte_unused,
5219                 const char *params,
5220                 struct rte_tel_data *d)
5221 {
5222         struct rte_eth_xstat *eth_xstats;
5223         struct rte_eth_xstat_name *xstat_names;
5224         int port_id, num_xstats;
5225         int i, ret;
5226
5227         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5228                 return -1;
5229
5230         port_id = atoi(params);
5231         if (!rte_eth_dev_is_valid_port(port_id))
5232                 return -1;
5233
5234         num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5235         if (num_xstats < 0)
5236                 return -1;
5237
5238         /* use one malloc for both names and stats */
5239         eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5240                         sizeof(struct rte_eth_xstat_name)) * num_xstats);
5241         if (eth_xstats == NULL)
5242                 return -1;
5243         xstat_names = (void *)&eth_xstats[num_xstats];
5244
5245         ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5246         if (ret < 0 || ret > num_xstats) {
5247                 free(eth_xstats);
5248                 return -1;
5249         }
5250
5251         ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5252         if (ret < 0 || ret > num_xstats) {
5253                 free(eth_xstats);
5254                 return -1;
5255         }
5256
5257         rte_tel_data_start_dict(d);
5258         for (i = 0; i < num_xstats; i++)
5259                 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5260                                 eth_xstats[i].value);
5261         return 0;
5262 }
5263
5264 static int
5265 handle_port_link_status(const char *cmd __rte_unused,
5266                 const char *params,
5267                 struct rte_tel_data *d)
5268 {
5269         static const char *status_str = "status";
5270         int ret, port_id;
5271         struct rte_eth_link link;
5272
5273         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5274                 return -1;
5275
5276         port_id = atoi(params);
5277         if (!rte_eth_dev_is_valid_port(port_id))
5278                 return -1;
5279
5280         ret = rte_eth_link_get(port_id, &link);
5281         if (ret < 0)
5282                 return -1;
5283
5284         rte_tel_data_start_dict(d);
5285         if (!link.link_status) {
5286                 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5287                 return 0;
5288         }
5289         rte_tel_data_add_dict_string(d, status_str, "UP");
5290         rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5291         rte_tel_data_add_dict_string(d, "duplex",
5292                         (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5293                                 "full-duplex" : "half-duplex");
5294         return 0;
5295 }
5296
5297 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5298
5299 RTE_INIT(ethdev_init_telemetry)
5300 {
5301         rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5302                         "Returns list of available ethdev ports. Takes no parameters");
5303         rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5304                         "Returns the extended stats for a port. Parameters: int port_id");
5305         rte_telemetry_register_cmd("/ethdev/link_status",
5306                         handle_port_link_status,
5307                         "Returns the link status for a port. Parameters: int port_id");
5308 }