ethdev: validate offloads set by PMD
[dpdk.git] / lib / librte_ethdev / rte_ethdev.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright(c) 2010-2017 Intel Corporation
3  */
4
5 #include <sys/types.h>
6 #include <sys/queue.h>
7 #include <ctype.h>
8 #include <stdio.h>
9 #include <stdlib.h>
10 #include <string.h>
11 #include <stdarg.h>
12 #include <errno.h>
13 #include <stdbool.h>
14 #include <stdint.h>
15 #include <inttypes.h>
16 #include <netinet/in.h>
17
18 #include <rte_byteorder.h>
19 #include <rte_log.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
26 #include <rte_eal.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
34 #include <rte_mbuf.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41
42 #include "rte_ethdev.h"
43 #include "rte_ethdev_driver.h"
44 #include "ethdev_profile.h"
45 #include "ethdev_private.h"
46
47 int rte_eth_dev_logtype;
48
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
51
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63
64 /* store statistics names and its offset in stats structure  */
65 struct rte_eth_xstats_name_off {
66         char name[RTE_ETH_XSTATS_NAME_SIZE];
67         unsigned offset;
68 };
69
70 /* Shared memory between primary and secondary processes. */
71 static struct {
72         uint64_t next_owner_id;
73         rte_spinlock_t ownership_lock;
74         struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
76
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78         {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79         {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80         {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81         {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82         {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83         {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84         {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85         {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
86                 rx_nombuf)},
87 };
88
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92         {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93         {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94         {"errors", offsetof(struct rte_eth_stats, q_errors)},
95 };
96
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) /       \
98                 sizeof(rte_rxq_stats_strings[0]))
99
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101         {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102         {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 };
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) /       \
105                 sizeof(rte_txq_stats_strings[0]))
106
107 #define RTE_RX_OFFLOAD_BIT2STR(_name)   \
108         { DEV_RX_OFFLOAD_##_name, #_name }
109
110 static const struct {
111         uint64_t offload;
112         const char *name;
113 } rte_rx_offload_names[] = {
114         RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115         RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116         RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117         RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118         RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119         RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120         RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121         RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122         RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123         RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124         RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125         RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126         RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127         RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128         RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129         RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
130         RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
131         RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
132         RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 };
134
135 #undef RTE_RX_OFFLOAD_BIT2STR
136
137 #define RTE_TX_OFFLOAD_BIT2STR(_name)   \
138         { DEV_TX_OFFLOAD_##_name, #_name }
139
140 static const struct {
141         uint64_t offload;
142         const char *name;
143 } rte_tx_offload_names[] = {
144         RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
145         RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
146         RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
147         RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
148         RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
149         RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
150         RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
151         RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
152         RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
153         RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
154         RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
155         RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
156         RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
157         RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
158         RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
159         RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
160         RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
161         RTE_TX_OFFLOAD_BIT2STR(SECURITY),
162         RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
163         RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
164         RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
165 };
166
167 #undef RTE_TX_OFFLOAD_BIT2STR
168
169 /**
170  * The user application callback description.
171  *
172  * It contains callback address to be registered by user application,
173  * the pointer to the parameters for callback, and the event type.
174  */
175 struct rte_eth_dev_callback {
176         TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
177         rte_eth_dev_cb_fn cb_fn;                /**< Callback address */
178         void *cb_arg;                           /**< Parameter for callback */
179         void *ret_param;                        /**< Return parameter */
180         enum rte_eth_event_type event;          /**< Interrupt event type */
181         uint32_t active;                        /**< Callback is executing */
182 };
183
184 enum {
185         STAT_QMAP_TX = 0,
186         STAT_QMAP_RX
187 };
188
189 int
190 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
191 {
192         int ret;
193         struct rte_devargs devargs = {.args = NULL};
194         const char *bus_param_key;
195         char *bus_str = NULL;
196         char *cls_str = NULL;
197         int str_size;
198
199         memset(iter, 0, sizeof(*iter));
200
201         /*
202          * The devargs string may use various syntaxes:
203          *   - 0000:08:00.0,representor=[1-3]
204          *   - pci:0000:06:00.0,representor=[0,5]
205          *   - class=eth,mac=00:11:22:33:44:55
206          * A new syntax is in development (not yet supported):
207          *   - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
208          */
209
210         /*
211          * Handle pure class filter (i.e. without any bus-level argument),
212          * from future new syntax.
213          * rte_devargs_parse() is not yet supporting the new syntax,
214          * that's why this simple case is temporarily parsed here.
215          */
216 #define iter_anybus_str "class=eth,"
217         if (strncmp(devargs_str, iter_anybus_str,
218                         strlen(iter_anybus_str)) == 0) {
219                 iter->cls_str = devargs_str + strlen(iter_anybus_str);
220                 goto end;
221         }
222
223         /* Split bus, device and parameters. */
224         ret = rte_devargs_parse(&devargs, devargs_str);
225         if (ret != 0)
226                 goto error;
227
228         /*
229          * Assume parameters of old syntax can match only at ethdev level.
230          * Extra parameters will be ignored, thanks to "+" prefix.
231          */
232         str_size = strlen(devargs.args) + 2;
233         cls_str = malloc(str_size);
234         if (cls_str == NULL) {
235                 ret = -ENOMEM;
236                 goto error;
237         }
238         ret = snprintf(cls_str, str_size, "+%s", devargs.args);
239         if (ret != str_size - 1) {
240                 ret = -EINVAL;
241                 goto error;
242         }
243         iter->cls_str = cls_str;
244         free(devargs.args); /* allocated by rte_devargs_parse() */
245         devargs.args = NULL;
246
247         iter->bus = devargs.bus;
248         if (iter->bus->dev_iterate == NULL) {
249                 ret = -ENOTSUP;
250                 goto error;
251         }
252
253         /* Convert bus args to new syntax for use with new API dev_iterate. */
254         if (strcmp(iter->bus->name, "vdev") == 0) {
255                 bus_param_key = "name";
256         } else if (strcmp(iter->bus->name, "pci") == 0) {
257                 bus_param_key = "addr";
258         } else {
259                 ret = -ENOTSUP;
260                 goto error;
261         }
262         str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
263         bus_str = malloc(str_size);
264         if (bus_str == NULL) {
265                 ret = -ENOMEM;
266                 goto error;
267         }
268         ret = snprintf(bus_str, str_size, "%s=%s",
269                         bus_param_key, devargs.name);
270         if (ret != str_size - 1) {
271                 ret = -EINVAL;
272                 goto error;
273         }
274         iter->bus_str = bus_str;
275
276 end:
277         iter->cls = rte_class_find_by_name("eth");
278         return 0;
279
280 error:
281         if (ret == -ENOTSUP)
282                 RTE_LOG(ERR, EAL, "Bus %s does not support iterating.\n",
283                                 iter->bus->name);
284         free(devargs.args);
285         free(bus_str);
286         free(cls_str);
287         return ret;
288 }
289
290 uint16_t
291 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 {
293         if (iter->cls == NULL) /* invalid ethdev iterator */
294                 return RTE_MAX_ETHPORTS;
295
296         do { /* loop to try all matching rte_device */
297                 /* If not pure ethdev filter and */
298                 if (iter->bus != NULL &&
299                                 /* not in middle of rte_eth_dev iteration, */
300                                 iter->class_device == NULL) {
301                         /* get next rte_device to try. */
302                         iter->device = iter->bus->dev_iterate(
303                                         iter->device, iter->bus_str, iter);
304                         if (iter->device == NULL)
305                                 break; /* no more rte_device candidate */
306                 }
307                 /* A device is matching bus part, need to check ethdev part. */
308                 iter->class_device = iter->cls->dev_iterate(
309                                 iter->class_device, iter->cls_str, iter);
310                 if (iter->class_device != NULL)
311                         return eth_dev_to_id(iter->class_device); /* match */
312         } while (iter->bus != NULL); /* need to try next rte_device */
313
314         /* No more ethdev port to iterate. */
315         rte_eth_iterator_cleanup(iter);
316         return RTE_MAX_ETHPORTS;
317 }
318
319 void
320 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 {
322         if (iter->bus_str == NULL)
323                 return; /* nothing to free in pure class filter */
324         free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
325         free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
326         memset(iter, 0, sizeof(*iter));
327 }
328
329 uint16_t
330 rte_eth_find_next(uint16_t port_id)
331 {
332         while (port_id < RTE_MAX_ETHPORTS &&
333                         rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
334                 port_id++;
335
336         if (port_id >= RTE_MAX_ETHPORTS)
337                 return RTE_MAX_ETHPORTS;
338
339         return port_id;
340 }
341
342 /*
343  * Macro to iterate over all valid ports for internal usage.
344  * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345  */
346 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
347         for (port_id = rte_eth_find_next(0); \
348              port_id < RTE_MAX_ETHPORTS; \
349              port_id = rte_eth_find_next(port_id + 1))
350
351 uint16_t
352 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 {
354         port_id = rte_eth_find_next(port_id);
355         while (port_id < RTE_MAX_ETHPORTS &&
356                         rte_eth_devices[port_id].device != parent)
357                 port_id = rte_eth_find_next(port_id + 1);
358
359         return port_id;
360 }
361
362 uint16_t
363 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 {
365         RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
366         return rte_eth_find_next_of(port_id,
367                         rte_eth_devices[ref_port_id].device);
368 }
369
370 static void
371 rte_eth_dev_shared_data_prepare(void)
372 {
373         const unsigned flags = 0;
374         const struct rte_memzone *mz;
375
376         rte_spinlock_lock(&rte_eth_shared_data_lock);
377
378         if (rte_eth_dev_shared_data == NULL) {
379                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
380                         /* Allocate port data and ownership shared memory. */
381                         mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
382                                         sizeof(*rte_eth_dev_shared_data),
383                                         rte_socket_id(), flags);
384                 } else
385                         mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386                 if (mz == NULL)
387                         rte_panic("Cannot allocate ethdev shared data\n");
388
389                 rte_eth_dev_shared_data = mz->addr;
390                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
391                         rte_eth_dev_shared_data->next_owner_id =
392                                         RTE_ETH_DEV_NO_OWNER + 1;
393                         rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
394                         memset(rte_eth_dev_shared_data->data, 0,
395                                sizeof(rte_eth_dev_shared_data->data));
396                 }
397         }
398
399         rte_spinlock_unlock(&rte_eth_shared_data_lock);
400 }
401
402 static bool
403 is_allocated(const struct rte_eth_dev *ethdev)
404 {
405         return ethdev->data->name[0] != '\0';
406 }
407
408 static struct rte_eth_dev *
409 _rte_eth_dev_allocated(const char *name)
410 {
411         unsigned i;
412
413         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
414                 if (rte_eth_devices[i].data != NULL &&
415                     strcmp(rte_eth_devices[i].data->name, name) == 0)
416                         return &rte_eth_devices[i];
417         }
418         return NULL;
419 }
420
421 struct rte_eth_dev *
422 rte_eth_dev_allocated(const char *name)
423 {
424         struct rte_eth_dev *ethdev;
425
426         rte_eth_dev_shared_data_prepare();
427
428         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429
430         ethdev = _rte_eth_dev_allocated(name);
431
432         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
433
434         return ethdev;
435 }
436
437 static uint16_t
438 rte_eth_dev_find_free_port(void)
439 {
440         unsigned i;
441
442         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
443                 /* Using shared name field to find a free port. */
444                 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
445                         RTE_ASSERT(rte_eth_devices[i].state ==
446                                    RTE_ETH_DEV_UNUSED);
447                         return i;
448                 }
449         }
450         return RTE_MAX_ETHPORTS;
451 }
452
453 static struct rte_eth_dev *
454 eth_dev_get(uint16_t port_id)
455 {
456         struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457
458         eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
459
460         return eth_dev;
461 }
462
463 struct rte_eth_dev *
464 rte_eth_dev_allocate(const char *name)
465 {
466         uint16_t port_id;
467         struct rte_eth_dev *eth_dev = NULL;
468         size_t name_len;
469
470         name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471         if (name_len == 0) {
472                 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
473                 return NULL;
474         }
475
476         if (name_len >= RTE_ETH_NAME_MAX_LEN) {
477                 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
478                 return NULL;
479         }
480
481         rte_eth_dev_shared_data_prepare();
482
483         /* Synchronize port creation between primary and secondary threads. */
484         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485
486         if (_rte_eth_dev_allocated(name) != NULL) {
487                 RTE_ETHDEV_LOG(ERR,
488                         "Ethernet device with name %s already allocated\n",
489                         name);
490                 goto unlock;
491         }
492
493         port_id = rte_eth_dev_find_free_port();
494         if (port_id == RTE_MAX_ETHPORTS) {
495                 RTE_ETHDEV_LOG(ERR,
496                         "Reached maximum number of Ethernet ports\n");
497                 goto unlock;
498         }
499
500         eth_dev = eth_dev_get(port_id);
501         strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
502         eth_dev->data->port_id = port_id;
503         eth_dev->data->mtu = RTE_ETHER_MTU;
504
505 unlock:
506         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
507
508         return eth_dev;
509 }
510
511 /*
512  * Attach to a port already registered by the primary process, which
513  * makes sure that the same device would have the same port id both
514  * in the primary and secondary process.
515  */
516 struct rte_eth_dev *
517 rte_eth_dev_attach_secondary(const char *name)
518 {
519         uint16_t i;
520         struct rte_eth_dev *eth_dev = NULL;
521
522         rte_eth_dev_shared_data_prepare();
523
524         /* Synchronize port attachment to primary port creation and release. */
525         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526
527         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
528                 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
529                         break;
530         }
531         if (i == RTE_MAX_ETHPORTS) {
532                 RTE_ETHDEV_LOG(ERR,
533                         "Device %s is not driven by the primary process\n",
534                         name);
535         } else {
536                 eth_dev = eth_dev_get(i);
537                 RTE_ASSERT(eth_dev->data->port_id == i);
538         }
539
540         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
541         return eth_dev;
542 }
543
544 int
545 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
546 {
547         if (eth_dev == NULL)
548                 return -EINVAL;
549
550         rte_eth_dev_shared_data_prepare();
551
552         if (eth_dev->state != RTE_ETH_DEV_UNUSED)
553                 _rte_eth_dev_callback_process(eth_dev,
554                                 RTE_ETH_EVENT_DESTROY, NULL);
555
556         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557
558         eth_dev->state = RTE_ETH_DEV_UNUSED;
559
560         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
561                 rte_free(eth_dev->data->rx_queues);
562                 rte_free(eth_dev->data->tx_queues);
563                 rte_free(eth_dev->data->mac_addrs);
564                 rte_free(eth_dev->data->hash_mac_addrs);
565                 rte_free(eth_dev->data->dev_private);
566                 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
567         }
568
569         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
570
571         return 0;
572 }
573
574 int
575 rte_eth_dev_is_valid_port(uint16_t port_id)
576 {
577         if (port_id >= RTE_MAX_ETHPORTS ||
578             (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
579                 return 0;
580         else
581                 return 1;
582 }
583
584 static int
585 rte_eth_is_valid_owner_id(uint64_t owner_id)
586 {
587         if (owner_id == RTE_ETH_DEV_NO_OWNER ||
588             rte_eth_dev_shared_data->next_owner_id <= owner_id)
589                 return 0;
590         return 1;
591 }
592
593 uint64_t
594 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
595 {
596         port_id = rte_eth_find_next(port_id);
597         while (port_id < RTE_MAX_ETHPORTS &&
598                         rte_eth_devices[port_id].data->owner.id != owner_id)
599                 port_id = rte_eth_find_next(port_id + 1);
600
601         return port_id;
602 }
603
604 int
605 rte_eth_dev_owner_new(uint64_t *owner_id)
606 {
607         rte_eth_dev_shared_data_prepare();
608
609         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
610
611         *owner_id = rte_eth_dev_shared_data->next_owner_id++;
612
613         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
614         return 0;
615 }
616
617 static int
618 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
619                        const struct rte_eth_dev_owner *new_owner)
620 {
621         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
622         struct rte_eth_dev_owner *port_owner;
623
624         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
625                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
626                         port_id);
627                 return -ENODEV;
628         }
629
630         if (!rte_eth_is_valid_owner_id(new_owner->id) &&
631             !rte_eth_is_valid_owner_id(old_owner_id)) {
632                 RTE_ETHDEV_LOG(ERR,
633                         "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
634                        old_owner_id, new_owner->id);
635                 return -EINVAL;
636         }
637
638         port_owner = &rte_eth_devices[port_id].data->owner;
639         if (port_owner->id != old_owner_id) {
640                 RTE_ETHDEV_LOG(ERR,
641                         "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
642                         port_id, port_owner->name, port_owner->id);
643                 return -EPERM;
644         }
645
646         /* can not truncate (same structure) */
647         strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
648
649         port_owner->id = new_owner->id;
650
651         RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
652                 port_id, new_owner->name, new_owner->id);
653
654         return 0;
655 }
656
657 int
658 rte_eth_dev_owner_set(const uint16_t port_id,
659                       const struct rte_eth_dev_owner *owner)
660 {
661         int ret;
662
663         rte_eth_dev_shared_data_prepare();
664
665         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
666
667         ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
668
669         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
670         return ret;
671 }
672
673 int
674 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
675 {
676         const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
677                         {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
678         int ret;
679
680         rte_eth_dev_shared_data_prepare();
681
682         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
683
684         ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
685
686         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
687         return ret;
688 }
689
690 int
691 rte_eth_dev_owner_delete(const uint64_t owner_id)
692 {
693         uint16_t port_id;
694         int ret = 0;
695
696         rte_eth_dev_shared_data_prepare();
697
698         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
699
700         if (rte_eth_is_valid_owner_id(owner_id)) {
701                 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
702                         if (rte_eth_devices[port_id].data->owner.id == owner_id)
703                                 memset(&rte_eth_devices[port_id].data->owner, 0,
704                                        sizeof(struct rte_eth_dev_owner));
705                 RTE_ETHDEV_LOG(NOTICE,
706                         "All port owners owned by %016"PRIx64" identifier have removed\n",
707                         owner_id);
708         } else {
709                 RTE_ETHDEV_LOG(ERR,
710                                "Invalid owner id=%016"PRIx64"\n",
711                                owner_id);
712                 ret = -EINVAL;
713         }
714
715         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
716
717         return ret;
718 }
719
720 int
721 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
722 {
723         int ret = 0;
724         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
725
726         rte_eth_dev_shared_data_prepare();
727
728         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
729
730         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
731                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
732                         port_id);
733                 ret = -ENODEV;
734         } else {
735                 rte_memcpy(owner, &ethdev->data->owner, sizeof(*owner));
736         }
737
738         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
739         return ret;
740 }
741
742 int
743 rte_eth_dev_socket_id(uint16_t port_id)
744 {
745         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
746         return rte_eth_devices[port_id].data->numa_node;
747 }
748
749 void *
750 rte_eth_dev_get_sec_ctx(uint16_t port_id)
751 {
752         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
753         return rte_eth_devices[port_id].security_ctx;
754 }
755
756 uint16_t
757 rte_eth_dev_count_avail(void)
758 {
759         uint16_t p;
760         uint16_t count;
761
762         count = 0;
763
764         RTE_ETH_FOREACH_DEV(p)
765                 count++;
766
767         return count;
768 }
769
770 uint16_t
771 rte_eth_dev_count_total(void)
772 {
773         uint16_t port, count = 0;
774
775         RTE_ETH_FOREACH_VALID_DEV(port)
776                 count++;
777
778         return count;
779 }
780
781 int
782 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
783 {
784         char *tmp;
785
786         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
787
788         if (name == NULL) {
789                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
790                 return -EINVAL;
791         }
792
793         /* shouldn't check 'rte_eth_devices[i].data',
794          * because it might be overwritten by VDEV PMD */
795         tmp = rte_eth_dev_shared_data->data[port_id].name;
796         strcpy(name, tmp);
797         return 0;
798 }
799
800 int
801 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
802 {
803         uint32_t pid;
804
805         if (name == NULL) {
806                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
807                 return -EINVAL;
808         }
809
810         RTE_ETH_FOREACH_VALID_DEV(pid)
811                 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
812                         *port_id = pid;
813                         return 0;
814                 }
815
816         return -ENODEV;
817 }
818
819 static int
820 eth_err(uint16_t port_id, int ret)
821 {
822         if (ret == 0)
823                 return 0;
824         if (rte_eth_dev_is_removed(port_id))
825                 return -EIO;
826         return ret;
827 }
828
829 static int
830 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
831 {
832         uint16_t old_nb_queues = dev->data->nb_rx_queues;
833         void **rxq;
834         unsigned i;
835
836         if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
837                 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
838                                 sizeof(dev->data->rx_queues[0]) * nb_queues,
839                                 RTE_CACHE_LINE_SIZE);
840                 if (dev->data->rx_queues == NULL) {
841                         dev->data->nb_rx_queues = 0;
842                         return -(ENOMEM);
843                 }
844         } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
845                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
846
847                 rxq = dev->data->rx_queues;
848
849                 for (i = nb_queues; i < old_nb_queues; i++)
850                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
851                 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
852                                 RTE_CACHE_LINE_SIZE);
853                 if (rxq == NULL)
854                         return -(ENOMEM);
855                 if (nb_queues > old_nb_queues) {
856                         uint16_t new_qs = nb_queues - old_nb_queues;
857
858                         memset(rxq + old_nb_queues, 0,
859                                 sizeof(rxq[0]) * new_qs);
860                 }
861
862                 dev->data->rx_queues = rxq;
863
864         } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
865                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
866
867                 rxq = dev->data->rx_queues;
868
869                 for (i = nb_queues; i < old_nb_queues; i++)
870                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
871
872                 rte_free(dev->data->rx_queues);
873                 dev->data->rx_queues = NULL;
874         }
875         dev->data->nb_rx_queues = nb_queues;
876         return 0;
877 }
878
879 int
880 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
881 {
882         struct rte_eth_dev *dev;
883
884         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
885
886         dev = &rte_eth_devices[port_id];
887         if (!dev->data->dev_started) {
888                 RTE_ETHDEV_LOG(ERR,
889                         "Port %u must be started before start any queue\n",
890                         port_id);
891                 return -EINVAL;
892         }
893
894         if (rx_queue_id >= dev->data->nb_rx_queues) {
895                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
896                 return -EINVAL;
897         }
898
899         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
900
901         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
902                 RTE_ETHDEV_LOG(INFO,
903                         "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
904                         rx_queue_id, port_id);
905                 return -EINVAL;
906         }
907
908         if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
909                 RTE_ETHDEV_LOG(INFO,
910                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
911                         rx_queue_id, port_id);
912                 return 0;
913         }
914
915         return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
916                                                              rx_queue_id));
917
918 }
919
920 int
921 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
922 {
923         struct rte_eth_dev *dev;
924
925         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
926
927         dev = &rte_eth_devices[port_id];
928         if (rx_queue_id >= dev->data->nb_rx_queues) {
929                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
930                 return -EINVAL;
931         }
932
933         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
934
935         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
936                 RTE_ETHDEV_LOG(INFO,
937                         "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
938                         rx_queue_id, port_id);
939                 return -EINVAL;
940         }
941
942         if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
943                 RTE_ETHDEV_LOG(INFO,
944                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
945                         rx_queue_id, port_id);
946                 return 0;
947         }
948
949         return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
950
951 }
952
953 int
954 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
955 {
956         struct rte_eth_dev *dev;
957
958         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
959
960         dev = &rte_eth_devices[port_id];
961         if (!dev->data->dev_started) {
962                 RTE_ETHDEV_LOG(ERR,
963                         "Port %u must be started before start any queue\n",
964                         port_id);
965                 return -EINVAL;
966         }
967
968         if (tx_queue_id >= dev->data->nb_tx_queues) {
969                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
970                 return -EINVAL;
971         }
972
973         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
974
975         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
976                 RTE_ETHDEV_LOG(INFO,
977                         "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
978                         tx_queue_id, port_id);
979                 return -EINVAL;
980         }
981
982         if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
983                 RTE_ETHDEV_LOG(INFO,
984                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
985                         tx_queue_id, port_id);
986                 return 0;
987         }
988
989         return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
990 }
991
992 int
993 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
994 {
995         struct rte_eth_dev *dev;
996
997         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
998
999         dev = &rte_eth_devices[port_id];
1000         if (tx_queue_id >= dev->data->nb_tx_queues) {
1001                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1002                 return -EINVAL;
1003         }
1004
1005         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1006
1007         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1008                 RTE_ETHDEV_LOG(INFO,
1009                         "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1010                         tx_queue_id, port_id);
1011                 return -EINVAL;
1012         }
1013
1014         if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1015                 RTE_ETHDEV_LOG(INFO,
1016                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1017                         tx_queue_id, port_id);
1018                 return 0;
1019         }
1020
1021         return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1022
1023 }
1024
1025 static int
1026 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1027 {
1028         uint16_t old_nb_queues = dev->data->nb_tx_queues;
1029         void **txq;
1030         unsigned i;
1031
1032         if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1033                 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1034                                                    sizeof(dev->data->tx_queues[0]) * nb_queues,
1035                                                    RTE_CACHE_LINE_SIZE);
1036                 if (dev->data->tx_queues == NULL) {
1037                         dev->data->nb_tx_queues = 0;
1038                         return -(ENOMEM);
1039                 }
1040         } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1041                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1042
1043                 txq = dev->data->tx_queues;
1044
1045                 for (i = nb_queues; i < old_nb_queues; i++)
1046                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1047                 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1048                                   RTE_CACHE_LINE_SIZE);
1049                 if (txq == NULL)
1050                         return -ENOMEM;
1051                 if (nb_queues > old_nb_queues) {
1052                         uint16_t new_qs = nb_queues - old_nb_queues;
1053
1054                         memset(txq + old_nb_queues, 0,
1055                                sizeof(txq[0]) * new_qs);
1056                 }
1057
1058                 dev->data->tx_queues = txq;
1059
1060         } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1061                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1062
1063                 txq = dev->data->tx_queues;
1064
1065                 for (i = nb_queues; i < old_nb_queues; i++)
1066                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1067
1068                 rte_free(dev->data->tx_queues);
1069                 dev->data->tx_queues = NULL;
1070         }
1071         dev->data->nb_tx_queues = nb_queues;
1072         return 0;
1073 }
1074
1075 uint32_t
1076 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1077 {
1078         switch (speed) {
1079         case ETH_SPEED_NUM_10M:
1080                 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1081         case ETH_SPEED_NUM_100M:
1082                 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1083         case ETH_SPEED_NUM_1G:
1084                 return ETH_LINK_SPEED_1G;
1085         case ETH_SPEED_NUM_2_5G:
1086                 return ETH_LINK_SPEED_2_5G;
1087         case ETH_SPEED_NUM_5G:
1088                 return ETH_LINK_SPEED_5G;
1089         case ETH_SPEED_NUM_10G:
1090                 return ETH_LINK_SPEED_10G;
1091         case ETH_SPEED_NUM_20G:
1092                 return ETH_LINK_SPEED_20G;
1093         case ETH_SPEED_NUM_25G:
1094                 return ETH_LINK_SPEED_25G;
1095         case ETH_SPEED_NUM_40G:
1096                 return ETH_LINK_SPEED_40G;
1097         case ETH_SPEED_NUM_50G:
1098                 return ETH_LINK_SPEED_50G;
1099         case ETH_SPEED_NUM_56G:
1100                 return ETH_LINK_SPEED_56G;
1101         case ETH_SPEED_NUM_100G:
1102                 return ETH_LINK_SPEED_100G;
1103         default:
1104                 return 0;
1105         }
1106 }
1107
1108 const char *
1109 rte_eth_dev_rx_offload_name(uint64_t offload)
1110 {
1111         const char *name = "UNKNOWN";
1112         unsigned int i;
1113
1114         for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1115                 if (offload == rte_rx_offload_names[i].offload) {
1116                         name = rte_rx_offload_names[i].name;
1117                         break;
1118                 }
1119         }
1120
1121         return name;
1122 }
1123
1124 const char *
1125 rte_eth_dev_tx_offload_name(uint64_t offload)
1126 {
1127         const char *name = "UNKNOWN";
1128         unsigned int i;
1129
1130         for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1131                 if (offload == rte_tx_offload_names[i].offload) {
1132                         name = rte_tx_offload_names[i].name;
1133                         break;
1134                 }
1135         }
1136
1137         return name;
1138 }
1139
1140 /*
1141  * Validate offloads that are requested through rte_eth_dev_configure against
1142  * the offloads successfuly set by the ethernet device.
1143  *
1144  * @param port_id
1145  *   The port identifier of the Ethernet device.
1146  * @param req_offloads
1147  *   The offloads that have been requested through `rte_eth_dev_configure`.
1148  * @param set_offloads
1149  *   The offloads successfuly set by the ethernet device.
1150  * @param offload_type
1151  *   The offload type i.e. Rx/Tx string.
1152  * @param offload_name
1153  *   The function that prints the offload name.
1154  * @return
1155  *   - (0) if validation successful.
1156  *   - (-EINVAL) if requested offload has been silently disabled.
1157  *
1158  */
1159 static int
1160 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1161                   uint64_t set_offloads, const char *offload_type,
1162                   const char *(*offload_name)(uint64_t))
1163 {
1164         uint64_t offloads_diff = req_offloads ^ set_offloads;
1165         uint64_t offload;
1166         int ret = 0;
1167
1168         while (offloads_diff != 0) {
1169                 /* Check if any offload is requested but not enabled. */
1170                 offload = 1ULL << __builtin_ctzll(offloads_diff);
1171                 if (offload & req_offloads) {
1172                         RTE_ETHDEV_LOG(ERR,
1173                                 "Port %u failed to enable %s offload %s\n",
1174                                 port_id, offload_type, offload_name(offload));
1175                         ret = -EINVAL;
1176                 }
1177
1178                 /* Chech if offload couldn't be disabled. */
1179                 if (offload & set_offloads) {
1180                         RTE_ETHDEV_LOG(INFO,
1181                                 "Port %u failed to disable %s offload %s\n",
1182                                 port_id, offload_type, offload_name(offload));
1183                 }
1184
1185                 offloads_diff &= ~offload;
1186         }
1187
1188         return ret;
1189 }
1190
1191 int
1192 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1193                       const struct rte_eth_conf *dev_conf)
1194 {
1195         struct rte_eth_dev *dev;
1196         struct rte_eth_dev_info dev_info;
1197         struct rte_eth_conf orig_conf;
1198         int diag;
1199         int ret;
1200
1201         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1202
1203         dev = &rte_eth_devices[port_id];
1204
1205         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1206
1207         if (dev->data->dev_started) {
1208                 RTE_ETHDEV_LOG(ERR,
1209                         "Port %u must be stopped to allow configuration\n",
1210                         port_id);
1211                 return -EBUSY;
1212         }
1213
1214          /* Store original config, as rollback required on failure */
1215         memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1216
1217         /*
1218          * Copy the dev_conf parameter into the dev structure.
1219          * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1220          */
1221         memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
1222
1223         ret = rte_eth_dev_info_get(port_id, &dev_info);
1224         if (ret != 0)
1225                 goto rollback;
1226
1227         /* If number of queues specified by application for both Rx and Tx is
1228          * zero, use driver preferred values. This cannot be done individually
1229          * as it is valid for either Tx or Rx (but not both) to be zero.
1230          * If driver does not provide any preferred valued, fall back on
1231          * EAL defaults.
1232          */
1233         if (nb_rx_q == 0 && nb_tx_q == 0) {
1234                 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1235                 if (nb_rx_q == 0)
1236                         nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1237                 nb_tx_q = dev_info.default_txportconf.nb_queues;
1238                 if (nb_tx_q == 0)
1239                         nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1240         }
1241
1242         if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1243                 RTE_ETHDEV_LOG(ERR,
1244                         "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1245                         nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1246                 ret = -EINVAL;
1247                 goto rollback;
1248         }
1249
1250         if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1251                 RTE_ETHDEV_LOG(ERR,
1252                         "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1253                         nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1254                 ret = -EINVAL;
1255                 goto rollback;
1256         }
1257
1258         /*
1259          * Check that the numbers of RX and TX queues are not greater
1260          * than the maximum number of RX and TX queues supported by the
1261          * configured device.
1262          */
1263         if (nb_rx_q > dev_info.max_rx_queues) {
1264                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1265                         port_id, nb_rx_q, dev_info.max_rx_queues);
1266                 ret = -EINVAL;
1267                 goto rollback;
1268         }
1269
1270         if (nb_tx_q > dev_info.max_tx_queues) {
1271                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1272                         port_id, nb_tx_q, dev_info.max_tx_queues);
1273                 ret = -EINVAL;
1274                 goto rollback;
1275         }
1276
1277         /* Check that the device supports requested interrupts */
1278         if ((dev_conf->intr_conf.lsc == 1) &&
1279                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1280                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1281                         dev->device->driver->name);
1282                 ret = -EINVAL;
1283                 goto rollback;
1284         }
1285         if ((dev_conf->intr_conf.rmv == 1) &&
1286                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1287                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1288                         dev->device->driver->name);
1289                 ret = -EINVAL;
1290                 goto rollback;
1291         }
1292
1293         /*
1294          * If jumbo frames are enabled, check that the maximum RX packet
1295          * length is supported by the configured device.
1296          */
1297         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1298                 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1299                         RTE_ETHDEV_LOG(ERR,
1300                                 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1301                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1302                                 dev_info.max_rx_pktlen);
1303                         ret = -EINVAL;
1304                         goto rollback;
1305                 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1306                         RTE_ETHDEV_LOG(ERR,
1307                                 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1308                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1309                                 (unsigned int)RTE_ETHER_MIN_LEN);
1310                         ret = -EINVAL;
1311                         goto rollback;
1312                 }
1313         } else {
1314                 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1315                         dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1316                         /* Use default value */
1317                         dev->data->dev_conf.rxmode.max_rx_pkt_len =
1318                                                         RTE_ETHER_MAX_LEN;
1319         }
1320
1321         /* Any requested offloading must be within its device capabilities */
1322         if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1323              dev_conf->rxmode.offloads) {
1324                 RTE_ETHDEV_LOG(ERR,
1325                         "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1326                         "capabilities 0x%"PRIx64" in %s()\n",
1327                         port_id, dev_conf->rxmode.offloads,
1328                         dev_info.rx_offload_capa,
1329                         __func__);
1330                 ret = -EINVAL;
1331                 goto rollback;
1332         }
1333         if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1334              dev_conf->txmode.offloads) {
1335                 RTE_ETHDEV_LOG(ERR,
1336                         "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1337                         "capabilities 0x%"PRIx64" in %s()\n",
1338                         port_id, dev_conf->txmode.offloads,
1339                         dev_info.tx_offload_capa,
1340                         __func__);
1341                 ret = -EINVAL;
1342                 goto rollback;
1343         }
1344
1345         dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1346                 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1347
1348         /* Check that device supports requested rss hash functions. */
1349         if ((dev_info.flow_type_rss_offloads |
1350              dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1351             dev_info.flow_type_rss_offloads) {
1352                 RTE_ETHDEV_LOG(ERR,
1353                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1354                         port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1355                         dev_info.flow_type_rss_offloads);
1356                 ret = -EINVAL;
1357                 goto rollback;
1358         }
1359
1360         /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1361         if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1362             (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1363                 RTE_ETHDEV_LOG(ERR,
1364                         "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested",
1365                         port_id,
1366                         rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1367                 ret = -EINVAL;
1368                 goto rollback;
1369         }
1370
1371         /*
1372          * Setup new number of RX/TX queues and reconfigure device.
1373          */
1374         diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1375         if (diag != 0) {
1376                 RTE_ETHDEV_LOG(ERR,
1377                         "Port%u rte_eth_dev_rx_queue_config = %d\n",
1378                         port_id, diag);
1379                 ret = diag;
1380                 goto rollback;
1381         }
1382
1383         diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1384         if (diag != 0) {
1385                 RTE_ETHDEV_LOG(ERR,
1386                         "Port%u rte_eth_dev_tx_queue_config = %d\n",
1387                         port_id, diag);
1388                 rte_eth_dev_rx_queue_config(dev, 0);
1389                 ret = diag;
1390                 goto rollback;
1391         }
1392
1393         diag = (*dev->dev_ops->dev_configure)(dev);
1394         if (diag != 0) {
1395                 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1396                         port_id, diag);
1397                 ret = eth_err(port_id, diag);
1398                 goto reset_queues;
1399         }
1400
1401         /* Initialize Rx profiling if enabled at compilation time. */
1402         diag = __rte_eth_dev_profile_init(port_id, dev);
1403         if (diag != 0) {
1404                 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1405                         port_id, diag);
1406                 ret = eth_err(port_id, diag);
1407                 goto reset_queues;
1408         }
1409
1410         /* Validate Rx offloads. */
1411         diag = validate_offloads(port_id,
1412                         dev_conf->rxmode.offloads,
1413                         dev->data->dev_conf.rxmode.offloads, "Rx",
1414                         rte_eth_dev_rx_offload_name);
1415         if (diag != 0) {
1416                 ret = diag;
1417                 goto reset_queues;
1418         }
1419
1420         /* Validate Tx offloads. */
1421         diag = validate_offloads(port_id,
1422                         dev_conf->txmode.offloads,
1423                         dev->data->dev_conf.txmode.offloads, "Tx",
1424                         rte_eth_dev_tx_offload_name);
1425         if (diag != 0) {
1426                 ret = diag;
1427                 goto reset_queues;
1428         }
1429
1430         return 0;
1431 reset_queues:
1432         rte_eth_dev_rx_queue_config(dev, 0);
1433         rte_eth_dev_tx_queue_config(dev, 0);
1434 rollback:
1435         memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1436
1437         return ret;
1438 }
1439
1440 void
1441 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1442 {
1443         if (dev->data->dev_started) {
1444                 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1445                         dev->data->port_id);
1446                 return;
1447         }
1448
1449         rte_eth_dev_rx_queue_config(dev, 0);
1450         rte_eth_dev_tx_queue_config(dev, 0);
1451
1452         memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1453 }
1454
1455 static void
1456 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1457                         struct rte_eth_dev_info *dev_info)
1458 {
1459         struct rte_ether_addr *addr;
1460         uint16_t i;
1461         uint32_t pool = 0;
1462         uint64_t pool_mask;
1463
1464         /* replay MAC address configuration including default MAC */
1465         addr = &dev->data->mac_addrs[0];
1466         if (*dev->dev_ops->mac_addr_set != NULL)
1467                 (*dev->dev_ops->mac_addr_set)(dev, addr);
1468         else if (*dev->dev_ops->mac_addr_add != NULL)
1469                 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1470
1471         if (*dev->dev_ops->mac_addr_add != NULL) {
1472                 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1473                         addr = &dev->data->mac_addrs[i];
1474
1475                         /* skip zero address */
1476                         if (rte_is_zero_ether_addr(addr))
1477                                 continue;
1478
1479                         pool = 0;
1480                         pool_mask = dev->data->mac_pool_sel[i];
1481
1482                         do {
1483                                 if (pool_mask & 1ULL)
1484                                         (*dev->dev_ops->mac_addr_add)(dev,
1485                                                 addr, i, pool);
1486                                 pool_mask >>= 1;
1487                                 pool++;
1488                         } while (pool_mask);
1489                 }
1490         }
1491 }
1492
1493 static int
1494 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1495                            struct rte_eth_dev_info *dev_info, uint16_t port_id)
1496 {
1497         int ret;
1498
1499         if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1500                 rte_eth_dev_mac_restore(dev, dev_info);
1501
1502         /* replay promiscuous configuration */
1503         /*
1504          * use callbacks directly since we don't need port_id check and
1505          * would like to bypass the same value set
1506          */
1507         if (rte_eth_promiscuous_get(port_id) == 1 &&
1508             *dev->dev_ops->promiscuous_enable != NULL) {
1509                 ret = eth_err(port_id,
1510                               (*dev->dev_ops->promiscuous_enable)(dev));
1511                 if (ret != 0 && ret != -ENOTSUP) {
1512                         RTE_ETHDEV_LOG(ERR,
1513                                 "Failed to enable promiscuous mode for device (port %u): %s\n",
1514                                 port_id, rte_strerror(-ret));
1515                         return ret;
1516                 }
1517         } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1518                    *dev->dev_ops->promiscuous_disable != NULL) {
1519                 ret = eth_err(port_id,
1520                               (*dev->dev_ops->promiscuous_disable)(dev));
1521                 if (ret != 0 && ret != -ENOTSUP) {
1522                         RTE_ETHDEV_LOG(ERR,
1523                                 "Failed to disable promiscuous mode for device (port %u): %s\n",
1524                                 port_id, rte_strerror(-ret));
1525                         return ret;
1526                 }
1527         }
1528
1529         /* replay all multicast configuration */
1530         /*
1531          * use callbacks directly since we don't need port_id check and
1532          * would like to bypass the same value set
1533          */
1534         if (rte_eth_allmulticast_get(port_id) == 1 &&
1535             *dev->dev_ops->allmulticast_enable != NULL) {
1536                 ret = eth_err(port_id,
1537                               (*dev->dev_ops->allmulticast_enable)(dev));
1538                 if (ret != 0 && ret != -ENOTSUP) {
1539                         RTE_ETHDEV_LOG(ERR,
1540                                 "Failed to enable allmulticast mode for device (port %u): %s\n",
1541                                 port_id, rte_strerror(-ret));
1542                         return ret;
1543                 }
1544         } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1545                    *dev->dev_ops->allmulticast_disable != NULL) {
1546                 ret = eth_err(port_id,
1547                               (*dev->dev_ops->allmulticast_disable)(dev));
1548                 if (ret != 0 && ret != -ENOTSUP) {
1549                         RTE_ETHDEV_LOG(ERR,
1550                                 "Failed to disable allmulticast mode for device (port %u): %s\n",
1551                                 port_id, rte_strerror(-ret));
1552                         return ret;
1553                 }
1554         }
1555
1556         return 0;
1557 }
1558
1559 int
1560 rte_eth_dev_start(uint16_t port_id)
1561 {
1562         struct rte_eth_dev *dev;
1563         struct rte_eth_dev_info dev_info;
1564         int diag;
1565         int ret;
1566
1567         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1568
1569         dev = &rte_eth_devices[port_id];
1570
1571         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1572
1573         if (dev->data->dev_started != 0) {
1574                 RTE_ETHDEV_LOG(INFO,
1575                         "Device with port_id=%"PRIu16" already started\n",
1576                         port_id);
1577                 return 0;
1578         }
1579
1580         ret = rte_eth_dev_info_get(port_id, &dev_info);
1581         if (ret != 0)
1582                 return ret;
1583
1584         /* Lets restore MAC now if device does not support live change */
1585         if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1586                 rte_eth_dev_mac_restore(dev, &dev_info);
1587
1588         diag = (*dev->dev_ops->dev_start)(dev);
1589         if (diag == 0)
1590                 dev->data->dev_started = 1;
1591         else
1592                 return eth_err(port_id, diag);
1593
1594         ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1595         if (ret != 0) {
1596                 RTE_ETHDEV_LOG(ERR,
1597                         "Error during restoring configuration for device (port %u): %s\n",
1598                         port_id, rte_strerror(-ret));
1599                 rte_eth_dev_stop(port_id);
1600                 return ret;
1601         }
1602
1603         if (dev->data->dev_conf.intr_conf.lsc == 0) {
1604                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1605                 (*dev->dev_ops->link_update)(dev, 0);
1606         }
1607         return 0;
1608 }
1609
1610 void
1611 rte_eth_dev_stop(uint16_t port_id)
1612 {
1613         struct rte_eth_dev *dev;
1614
1615         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1616         dev = &rte_eth_devices[port_id];
1617
1618         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1619
1620         if (dev->data->dev_started == 0) {
1621                 RTE_ETHDEV_LOG(INFO,
1622                         "Device with port_id=%"PRIu16" already stopped\n",
1623                         port_id);
1624                 return;
1625         }
1626
1627         dev->data->dev_started = 0;
1628         (*dev->dev_ops->dev_stop)(dev);
1629 }
1630
1631 int
1632 rte_eth_dev_set_link_up(uint16_t port_id)
1633 {
1634         struct rte_eth_dev *dev;
1635
1636         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1637
1638         dev = &rte_eth_devices[port_id];
1639
1640         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1641         return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1642 }
1643
1644 int
1645 rte_eth_dev_set_link_down(uint16_t port_id)
1646 {
1647         struct rte_eth_dev *dev;
1648
1649         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1650
1651         dev = &rte_eth_devices[port_id];
1652
1653         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1654         return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1655 }
1656
1657 void
1658 rte_eth_dev_close(uint16_t port_id)
1659 {
1660         struct rte_eth_dev *dev;
1661
1662         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1663         dev = &rte_eth_devices[port_id];
1664
1665         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1666         dev->data->dev_started = 0;
1667         (*dev->dev_ops->dev_close)(dev);
1668
1669         /* check behaviour flag - temporary for PMD migration */
1670         if ((dev->data->dev_flags & RTE_ETH_DEV_CLOSE_REMOVE) != 0) {
1671                 /* new behaviour: send event + reset state + free all data */
1672                 rte_eth_dev_release_port(dev);
1673                 return;
1674         }
1675         RTE_ETHDEV_LOG(DEBUG, "Port closing is using an old behaviour.\n"
1676                         "The driver %s should migrate to the new behaviour.\n",
1677                         dev->device->driver->name);
1678         /* old behaviour: only free queue arrays */
1679         dev->data->nb_rx_queues = 0;
1680         rte_free(dev->data->rx_queues);
1681         dev->data->rx_queues = NULL;
1682         dev->data->nb_tx_queues = 0;
1683         rte_free(dev->data->tx_queues);
1684         dev->data->tx_queues = NULL;
1685 }
1686
1687 int
1688 rte_eth_dev_reset(uint16_t port_id)
1689 {
1690         struct rte_eth_dev *dev;
1691         int ret;
1692
1693         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1694         dev = &rte_eth_devices[port_id];
1695
1696         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1697
1698         rte_eth_dev_stop(port_id);
1699         ret = dev->dev_ops->dev_reset(dev);
1700
1701         return eth_err(port_id, ret);
1702 }
1703
1704 int
1705 rte_eth_dev_is_removed(uint16_t port_id)
1706 {
1707         struct rte_eth_dev *dev;
1708         int ret;
1709
1710         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1711
1712         dev = &rte_eth_devices[port_id];
1713
1714         if (dev->state == RTE_ETH_DEV_REMOVED)
1715                 return 1;
1716
1717         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1718
1719         ret = dev->dev_ops->is_removed(dev);
1720         if (ret != 0)
1721                 /* Device is physically removed. */
1722                 dev->state = RTE_ETH_DEV_REMOVED;
1723
1724         return ret;
1725 }
1726
1727 int
1728 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1729                        uint16_t nb_rx_desc, unsigned int socket_id,
1730                        const struct rte_eth_rxconf *rx_conf,
1731                        struct rte_mempool *mp)
1732 {
1733         int ret;
1734         uint32_t mbp_buf_size;
1735         struct rte_eth_dev *dev;
1736         struct rte_eth_dev_info dev_info;
1737         struct rte_eth_rxconf local_conf;
1738         void **rxq;
1739
1740         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1741
1742         dev = &rte_eth_devices[port_id];
1743         if (rx_queue_id >= dev->data->nb_rx_queues) {
1744                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1745                 return -EINVAL;
1746         }
1747
1748         if (mp == NULL) {
1749                 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1750                 return -EINVAL;
1751         }
1752
1753         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1754
1755         /*
1756          * Check the size of the mbuf data buffer.
1757          * This value must be provided in the private data of the memory pool.
1758          * First check that the memory pool has a valid private data.
1759          */
1760         ret = rte_eth_dev_info_get(port_id, &dev_info);
1761         if (ret != 0)
1762                 return ret;
1763
1764         if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1765                 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1766                         mp->name, (int)mp->private_data_size,
1767                         (int)sizeof(struct rte_pktmbuf_pool_private));
1768                 return -ENOSPC;
1769         }
1770         mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1771
1772         if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1773                 RTE_ETHDEV_LOG(ERR,
1774                         "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1775                         mp->name, (int)mbp_buf_size,
1776                         (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1777                         (int)RTE_PKTMBUF_HEADROOM,
1778                         (int)dev_info.min_rx_bufsize);
1779                 return -EINVAL;
1780         }
1781
1782         /* Use default specified by driver, if nb_rx_desc is zero */
1783         if (nb_rx_desc == 0) {
1784                 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1785                 /* If driver default is also zero, fall back on EAL default */
1786                 if (nb_rx_desc == 0)
1787                         nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1788         }
1789
1790         if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1791                         nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1792                         nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1793
1794                 RTE_ETHDEV_LOG(ERR,
1795                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1796                         nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1797                         dev_info.rx_desc_lim.nb_min,
1798                         dev_info.rx_desc_lim.nb_align);
1799                 return -EINVAL;
1800         }
1801
1802         if (dev->data->dev_started &&
1803                 !(dev_info.dev_capa &
1804                         RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1805                 return -EBUSY;
1806
1807         if (dev->data->dev_started &&
1808                 (dev->data->rx_queue_state[rx_queue_id] !=
1809                         RTE_ETH_QUEUE_STATE_STOPPED))
1810                 return -EBUSY;
1811
1812         rxq = dev->data->rx_queues;
1813         if (rxq[rx_queue_id]) {
1814                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1815                                         -ENOTSUP);
1816                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1817                 rxq[rx_queue_id] = NULL;
1818         }
1819
1820         if (rx_conf == NULL)
1821                 rx_conf = &dev_info.default_rxconf;
1822
1823         local_conf = *rx_conf;
1824
1825         /*
1826          * If an offloading has already been enabled in
1827          * rte_eth_dev_configure(), it has been enabled on all queues,
1828          * so there is no need to enable it in this queue again.
1829          * The local_conf.offloads input to underlying PMD only carries
1830          * those offloadings which are only enabled on this queue and
1831          * not enabled on all queues.
1832          */
1833         local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1834
1835         /*
1836          * New added offloadings for this queue are those not enabled in
1837          * rte_eth_dev_configure() and they must be per-queue type.
1838          * A pure per-port offloading can't be enabled on a queue while
1839          * disabled on another queue. A pure per-port offloading can't
1840          * be enabled for any queue as new added one if it hasn't been
1841          * enabled in rte_eth_dev_configure().
1842          */
1843         if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1844              local_conf.offloads) {
1845                 RTE_ETHDEV_LOG(ERR,
1846                         "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1847                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1848                         port_id, rx_queue_id, local_conf.offloads,
1849                         dev_info.rx_queue_offload_capa,
1850                         __func__);
1851                 return -EINVAL;
1852         }
1853
1854         ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1855                                               socket_id, &local_conf, mp);
1856         if (!ret) {
1857                 if (!dev->data->min_rx_buf_size ||
1858                     dev->data->min_rx_buf_size > mbp_buf_size)
1859                         dev->data->min_rx_buf_size = mbp_buf_size;
1860         }
1861
1862         return eth_err(port_id, ret);
1863 }
1864
1865 int
1866 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1867                                uint16_t nb_rx_desc,
1868                                const struct rte_eth_hairpin_conf *conf)
1869 {
1870         int ret;
1871         struct rte_eth_dev *dev;
1872         struct rte_eth_hairpin_cap cap;
1873         void **rxq;
1874         int i;
1875         int count;
1876
1877         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1878
1879         dev = &rte_eth_devices[port_id];
1880         if (rx_queue_id >= dev->data->nb_rx_queues) {
1881                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1882                 return -EINVAL;
1883         }
1884         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1885         if (ret != 0)
1886                 return ret;
1887         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1888                                 -ENOTSUP);
1889         /* if nb_rx_desc is zero use max number of desc from the driver. */
1890         if (nb_rx_desc == 0)
1891                 nb_rx_desc = cap.max_nb_desc;
1892         if (nb_rx_desc > cap.max_nb_desc) {
1893                 RTE_ETHDEV_LOG(ERR,
1894                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1895                         nb_rx_desc, cap.max_nb_desc);
1896                 return -EINVAL;
1897         }
1898         if (conf->peer_count > cap.max_rx_2_tx) {
1899                 RTE_ETHDEV_LOG(ERR,
1900                         "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1901                         conf->peer_count, cap.max_rx_2_tx);
1902                 return -EINVAL;
1903         }
1904         if (conf->peer_count == 0) {
1905                 RTE_ETHDEV_LOG(ERR,
1906                         "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1907                         conf->peer_count);
1908                 return -EINVAL;
1909         }
1910         for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1911              cap.max_nb_queues != UINT16_MAX; i++) {
1912                 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1913                         count++;
1914         }
1915         if (count > cap.max_nb_queues) {
1916                 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1917                 cap.max_nb_queues);
1918                 return -EINVAL;
1919         }
1920         if (dev->data->dev_started)
1921                 return -EBUSY;
1922         rxq = dev->data->rx_queues;
1923         if (rxq[rx_queue_id] != NULL) {
1924                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1925                                         -ENOTSUP);
1926                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1927                 rxq[rx_queue_id] = NULL;
1928         }
1929         ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1930                                                       nb_rx_desc, conf);
1931         if (ret == 0)
1932                 dev->data->rx_queue_state[rx_queue_id] =
1933                         RTE_ETH_QUEUE_STATE_HAIRPIN;
1934         return eth_err(port_id, ret);
1935 }
1936
1937 int
1938 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1939                        uint16_t nb_tx_desc, unsigned int socket_id,
1940                        const struct rte_eth_txconf *tx_conf)
1941 {
1942         struct rte_eth_dev *dev;
1943         struct rte_eth_dev_info dev_info;
1944         struct rte_eth_txconf local_conf;
1945         void **txq;
1946         int ret;
1947
1948         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1949
1950         dev = &rte_eth_devices[port_id];
1951         if (tx_queue_id >= dev->data->nb_tx_queues) {
1952                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1953                 return -EINVAL;
1954         }
1955
1956         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1957
1958         ret = rte_eth_dev_info_get(port_id, &dev_info);
1959         if (ret != 0)
1960                 return ret;
1961
1962         /* Use default specified by driver, if nb_tx_desc is zero */
1963         if (nb_tx_desc == 0) {
1964                 nb_tx_desc = dev_info.default_txportconf.ring_size;
1965                 /* If driver default is zero, fall back on EAL default */
1966                 if (nb_tx_desc == 0)
1967                         nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1968         }
1969         if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1970             nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1971             nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1972                 RTE_ETHDEV_LOG(ERR,
1973                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1974                         nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1975                         dev_info.tx_desc_lim.nb_min,
1976                         dev_info.tx_desc_lim.nb_align);
1977                 return -EINVAL;
1978         }
1979
1980         if (dev->data->dev_started &&
1981                 !(dev_info.dev_capa &
1982                         RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1983                 return -EBUSY;
1984
1985         if (dev->data->dev_started &&
1986                 (dev->data->tx_queue_state[tx_queue_id] !=
1987                         RTE_ETH_QUEUE_STATE_STOPPED))
1988                 return -EBUSY;
1989
1990         txq = dev->data->tx_queues;
1991         if (txq[tx_queue_id]) {
1992                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1993                                         -ENOTSUP);
1994                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1995                 txq[tx_queue_id] = NULL;
1996         }
1997
1998         if (tx_conf == NULL)
1999                 tx_conf = &dev_info.default_txconf;
2000
2001         local_conf = *tx_conf;
2002
2003         /*
2004          * If an offloading has already been enabled in
2005          * rte_eth_dev_configure(), it has been enabled on all queues,
2006          * so there is no need to enable it in this queue again.
2007          * The local_conf.offloads input to underlying PMD only carries
2008          * those offloadings which are only enabled on this queue and
2009          * not enabled on all queues.
2010          */
2011         local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2012
2013         /*
2014          * New added offloadings for this queue are those not enabled in
2015          * rte_eth_dev_configure() and they must be per-queue type.
2016          * A pure per-port offloading can't be enabled on a queue while
2017          * disabled on another queue. A pure per-port offloading can't
2018          * be enabled for any queue as new added one if it hasn't been
2019          * enabled in rte_eth_dev_configure().
2020          */
2021         if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2022              local_conf.offloads) {
2023                 RTE_ETHDEV_LOG(ERR,
2024                         "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2025                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2026                         port_id, tx_queue_id, local_conf.offloads,
2027                         dev_info.tx_queue_offload_capa,
2028                         __func__);
2029                 return -EINVAL;
2030         }
2031
2032         return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2033                        tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2034 }
2035
2036 int
2037 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2038                                uint16_t nb_tx_desc,
2039                                const struct rte_eth_hairpin_conf *conf)
2040 {
2041         struct rte_eth_dev *dev;
2042         struct rte_eth_hairpin_cap cap;
2043         void **txq;
2044         int i;
2045         int count;
2046         int ret;
2047
2048         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2049         dev = &rte_eth_devices[port_id];
2050         if (tx_queue_id >= dev->data->nb_tx_queues) {
2051                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2052                 return -EINVAL;
2053         }
2054         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2055         if (ret != 0)
2056                 return ret;
2057         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2058                                 -ENOTSUP);
2059         /* if nb_rx_desc is zero use max number of desc from the driver. */
2060         if (nb_tx_desc == 0)
2061                 nb_tx_desc = cap.max_nb_desc;
2062         if (nb_tx_desc > cap.max_nb_desc) {
2063                 RTE_ETHDEV_LOG(ERR,
2064                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2065                         nb_tx_desc, cap.max_nb_desc);
2066                 return -EINVAL;
2067         }
2068         if (conf->peer_count > cap.max_tx_2_rx) {
2069                 RTE_ETHDEV_LOG(ERR,
2070                         "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2071                         conf->peer_count, cap.max_tx_2_rx);
2072                 return -EINVAL;
2073         }
2074         if (conf->peer_count == 0) {
2075                 RTE_ETHDEV_LOG(ERR,
2076                         "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2077                         conf->peer_count);
2078                 return -EINVAL;
2079         }
2080         for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2081              cap.max_nb_queues != UINT16_MAX; i++) {
2082                 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2083                         count++;
2084         }
2085         if (count > cap.max_nb_queues) {
2086                 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2087                 cap.max_nb_queues);
2088                 return -EINVAL;
2089         }
2090         if (dev->data->dev_started)
2091                 return -EBUSY;
2092         txq = dev->data->tx_queues;
2093         if (txq[tx_queue_id] != NULL) {
2094                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2095                                         -ENOTSUP);
2096                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2097                 txq[tx_queue_id] = NULL;
2098         }
2099         ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2100                 (dev, tx_queue_id, nb_tx_desc, conf);
2101         if (ret == 0)
2102                 dev->data->tx_queue_state[tx_queue_id] =
2103                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2104         return eth_err(port_id, ret);
2105 }
2106
2107 void
2108 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2109                 void *userdata __rte_unused)
2110 {
2111         unsigned i;
2112
2113         for (i = 0; i < unsent; i++)
2114                 rte_pktmbuf_free(pkts[i]);
2115 }
2116
2117 void
2118 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2119                 void *userdata)
2120 {
2121         uint64_t *count = userdata;
2122         unsigned i;
2123
2124         for (i = 0; i < unsent; i++)
2125                 rte_pktmbuf_free(pkts[i]);
2126
2127         *count += unsent;
2128 }
2129
2130 int
2131 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2132                 buffer_tx_error_fn cbfn, void *userdata)
2133 {
2134         buffer->error_callback = cbfn;
2135         buffer->error_userdata = userdata;
2136         return 0;
2137 }
2138
2139 int
2140 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2141 {
2142         int ret = 0;
2143
2144         if (buffer == NULL)
2145                 return -EINVAL;
2146
2147         buffer->size = size;
2148         if (buffer->error_callback == NULL) {
2149                 ret = rte_eth_tx_buffer_set_err_callback(
2150                         buffer, rte_eth_tx_buffer_drop_callback, NULL);
2151         }
2152
2153         return ret;
2154 }
2155
2156 int
2157 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2158 {
2159         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2160         int ret;
2161
2162         /* Validate Input Data. Bail if not valid or not supported. */
2163         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2164         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2165
2166         /* Call driver to free pending mbufs. */
2167         ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2168                                                free_cnt);
2169         return eth_err(port_id, ret);
2170 }
2171
2172 int
2173 rte_eth_promiscuous_enable(uint16_t port_id)
2174 {
2175         struct rte_eth_dev *dev;
2176         int diag = 0;
2177
2178         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2179         dev = &rte_eth_devices[port_id];
2180
2181         if (dev->data->promiscuous == 1)
2182                 return 0;
2183
2184         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2185
2186         diag = (*dev->dev_ops->promiscuous_enable)(dev);
2187         dev->data->promiscuous = (diag == 0) ? 1 : 0;
2188
2189         return eth_err(port_id, diag);
2190 }
2191
2192 int
2193 rte_eth_promiscuous_disable(uint16_t port_id)
2194 {
2195         struct rte_eth_dev *dev;
2196         int diag = 0;
2197
2198         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2199         dev = &rte_eth_devices[port_id];
2200
2201         if (dev->data->promiscuous == 0)
2202                 return 0;
2203
2204         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2205
2206         dev->data->promiscuous = 0;
2207         diag = (*dev->dev_ops->promiscuous_disable)(dev);
2208         if (diag != 0)
2209                 dev->data->promiscuous = 1;
2210
2211         return eth_err(port_id, diag);
2212 }
2213
2214 int
2215 rte_eth_promiscuous_get(uint16_t port_id)
2216 {
2217         struct rte_eth_dev *dev;
2218
2219         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2220
2221         dev = &rte_eth_devices[port_id];
2222         return dev->data->promiscuous;
2223 }
2224
2225 int
2226 rte_eth_allmulticast_enable(uint16_t port_id)
2227 {
2228         struct rte_eth_dev *dev;
2229         int diag;
2230
2231         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2232         dev = &rte_eth_devices[port_id];
2233
2234         if (dev->data->all_multicast == 1)
2235                 return 0;
2236
2237         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2238         diag = (*dev->dev_ops->allmulticast_enable)(dev);
2239         dev->data->all_multicast = (diag == 0) ? 1 : 0;
2240
2241         return eth_err(port_id, diag);
2242 }
2243
2244 int
2245 rte_eth_allmulticast_disable(uint16_t port_id)
2246 {
2247         struct rte_eth_dev *dev;
2248         int diag;
2249
2250         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2251         dev = &rte_eth_devices[port_id];
2252
2253         if (dev->data->all_multicast == 0)
2254                 return 0;
2255
2256         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2257         dev->data->all_multicast = 0;
2258         diag = (*dev->dev_ops->allmulticast_disable)(dev);
2259         if (diag != 0)
2260                 dev->data->all_multicast = 1;
2261
2262         return eth_err(port_id, diag);
2263 }
2264
2265 int
2266 rte_eth_allmulticast_get(uint16_t port_id)
2267 {
2268         struct rte_eth_dev *dev;
2269
2270         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2271
2272         dev = &rte_eth_devices[port_id];
2273         return dev->data->all_multicast;
2274 }
2275
2276 int
2277 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2278 {
2279         struct rte_eth_dev *dev;
2280
2281         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2282         dev = &rte_eth_devices[port_id];
2283
2284         if (dev->data->dev_conf.intr_conf.lsc &&
2285             dev->data->dev_started)
2286                 rte_eth_linkstatus_get(dev, eth_link);
2287         else {
2288                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2289                 (*dev->dev_ops->link_update)(dev, 1);
2290                 *eth_link = dev->data->dev_link;
2291         }
2292
2293         return 0;
2294 }
2295
2296 int
2297 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2298 {
2299         struct rte_eth_dev *dev;
2300
2301         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2302         dev = &rte_eth_devices[port_id];
2303
2304         if (dev->data->dev_conf.intr_conf.lsc &&
2305             dev->data->dev_started)
2306                 rte_eth_linkstatus_get(dev, eth_link);
2307         else {
2308                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2309                 (*dev->dev_ops->link_update)(dev, 0);
2310                 *eth_link = dev->data->dev_link;
2311         }
2312
2313         return 0;
2314 }
2315
2316 int
2317 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2318 {
2319         struct rte_eth_dev *dev;
2320
2321         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2322
2323         dev = &rte_eth_devices[port_id];
2324         memset(stats, 0, sizeof(*stats));
2325
2326         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2327         stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2328         return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2329 }
2330
2331 int
2332 rte_eth_stats_reset(uint16_t port_id)
2333 {
2334         struct rte_eth_dev *dev;
2335         int ret;
2336
2337         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2338         dev = &rte_eth_devices[port_id];
2339
2340         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2341         ret = (*dev->dev_ops->stats_reset)(dev);
2342         if (ret != 0)
2343                 return eth_err(port_id, ret);
2344
2345         dev->data->rx_mbuf_alloc_failed = 0;
2346
2347         return 0;
2348 }
2349
2350 static inline int
2351 get_xstats_basic_count(struct rte_eth_dev *dev)
2352 {
2353         uint16_t nb_rxqs, nb_txqs;
2354         int count;
2355
2356         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2357         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2358
2359         count = RTE_NB_STATS;
2360         count += nb_rxqs * RTE_NB_RXQ_STATS;
2361         count += nb_txqs * RTE_NB_TXQ_STATS;
2362
2363         return count;
2364 }
2365
2366 static int
2367 get_xstats_count(uint16_t port_id)
2368 {
2369         struct rte_eth_dev *dev;
2370         int count;
2371
2372         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2373         dev = &rte_eth_devices[port_id];
2374         if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2375                 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2376                                 NULL, 0);
2377                 if (count < 0)
2378                         return eth_err(port_id, count);
2379         }
2380         if (dev->dev_ops->xstats_get_names != NULL) {
2381                 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2382                 if (count < 0)
2383                         return eth_err(port_id, count);
2384         } else
2385                 count = 0;
2386
2387
2388         count += get_xstats_basic_count(dev);
2389
2390         return count;
2391 }
2392
2393 int
2394 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2395                 uint64_t *id)
2396 {
2397         int cnt_xstats, idx_xstat;
2398
2399         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2400
2401         if (!id) {
2402                 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2403                 return -ENOMEM;
2404         }
2405
2406         if (!xstat_name) {
2407                 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2408                 return -ENOMEM;
2409         }
2410
2411         /* Get count */
2412         cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2413         if (cnt_xstats  < 0) {
2414                 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2415                 return -ENODEV;
2416         }
2417
2418         /* Get id-name lookup table */
2419         struct rte_eth_xstat_name xstats_names[cnt_xstats];
2420
2421         if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2422                         port_id, xstats_names, cnt_xstats, NULL)) {
2423                 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2424                 return -1;
2425         }
2426
2427         for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2428                 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2429                         *id = idx_xstat;
2430                         return 0;
2431                 };
2432         }
2433
2434         return -EINVAL;
2435 }
2436
2437 /* retrieve basic stats names */
2438 static int
2439 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2440         struct rte_eth_xstat_name *xstats_names)
2441 {
2442         int cnt_used_entries = 0;
2443         uint32_t idx, id_queue;
2444         uint16_t num_q;
2445
2446         for (idx = 0; idx < RTE_NB_STATS; idx++) {
2447                 strlcpy(xstats_names[cnt_used_entries].name,
2448                         rte_stats_strings[idx].name,
2449                         sizeof(xstats_names[0].name));
2450                 cnt_used_entries++;
2451         }
2452         num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2453         for (id_queue = 0; id_queue < num_q; id_queue++) {
2454                 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2455                         snprintf(xstats_names[cnt_used_entries].name,
2456                                 sizeof(xstats_names[0].name),
2457                                 "rx_q%u%s",
2458                                 id_queue, rte_rxq_stats_strings[idx].name);
2459                         cnt_used_entries++;
2460                 }
2461
2462         }
2463         num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2464         for (id_queue = 0; id_queue < num_q; id_queue++) {
2465                 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2466                         snprintf(xstats_names[cnt_used_entries].name,
2467                                 sizeof(xstats_names[0].name),
2468                                 "tx_q%u%s",
2469                                 id_queue, rte_txq_stats_strings[idx].name);
2470                         cnt_used_entries++;
2471                 }
2472         }
2473         return cnt_used_entries;
2474 }
2475
2476 /* retrieve ethdev extended statistics names */
2477 int
2478 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2479         struct rte_eth_xstat_name *xstats_names, unsigned int size,
2480         uint64_t *ids)
2481 {
2482         struct rte_eth_xstat_name *xstats_names_copy;
2483         unsigned int no_basic_stat_requested = 1;
2484         unsigned int no_ext_stat_requested = 1;
2485         unsigned int expected_entries;
2486         unsigned int basic_count;
2487         struct rte_eth_dev *dev;
2488         unsigned int i;
2489         int ret;
2490
2491         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2492         dev = &rte_eth_devices[port_id];
2493
2494         basic_count = get_xstats_basic_count(dev);
2495         ret = get_xstats_count(port_id);
2496         if (ret < 0)
2497                 return ret;
2498         expected_entries = (unsigned int)ret;
2499
2500         /* Return max number of stats if no ids given */
2501         if (!ids) {
2502                 if (!xstats_names)
2503                         return expected_entries;
2504                 else if (xstats_names && size < expected_entries)
2505                         return expected_entries;
2506         }
2507
2508         if (ids && !xstats_names)
2509                 return -EINVAL;
2510
2511         if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2512                 uint64_t ids_copy[size];
2513
2514                 for (i = 0; i < size; i++) {
2515                         if (ids[i] < basic_count) {
2516                                 no_basic_stat_requested = 0;
2517                                 break;
2518                         }
2519
2520                         /*
2521                          * Convert ids to xstats ids that PMD knows.
2522                          * ids known by user are basic + extended stats.
2523                          */
2524                         ids_copy[i] = ids[i] - basic_count;
2525                 }
2526
2527                 if (no_basic_stat_requested)
2528                         return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2529                                         xstats_names, ids_copy, size);
2530         }
2531
2532         /* Retrieve all stats */
2533         if (!ids) {
2534                 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2535                                 expected_entries);
2536                 if (num_stats < 0 || num_stats > (int)expected_entries)
2537                         return num_stats;
2538                 else
2539                         return expected_entries;
2540         }
2541
2542         xstats_names_copy = calloc(expected_entries,
2543                 sizeof(struct rte_eth_xstat_name));
2544
2545         if (!xstats_names_copy) {
2546                 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2547                 return -ENOMEM;
2548         }
2549
2550         if (ids) {
2551                 for (i = 0; i < size; i++) {
2552                         if (ids[i] >= basic_count) {
2553                                 no_ext_stat_requested = 0;
2554                                 break;
2555                         }
2556                 }
2557         }
2558
2559         /* Fill xstats_names_copy structure */
2560         if (ids && no_ext_stat_requested) {
2561                 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2562         } else {
2563                 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2564                         expected_entries);
2565                 if (ret < 0) {
2566                         free(xstats_names_copy);
2567                         return ret;
2568                 }
2569         }
2570
2571         /* Filter stats */
2572         for (i = 0; i < size; i++) {
2573                 if (ids[i] >= expected_entries) {
2574                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2575                         free(xstats_names_copy);
2576                         return -1;
2577                 }
2578                 xstats_names[i] = xstats_names_copy[ids[i]];
2579         }
2580
2581         free(xstats_names_copy);
2582         return size;
2583 }
2584
2585 int
2586 rte_eth_xstats_get_names(uint16_t port_id,
2587         struct rte_eth_xstat_name *xstats_names,
2588         unsigned int size)
2589 {
2590         struct rte_eth_dev *dev;
2591         int cnt_used_entries;
2592         int cnt_expected_entries;
2593         int cnt_driver_entries;
2594
2595         cnt_expected_entries = get_xstats_count(port_id);
2596         if (xstats_names == NULL || cnt_expected_entries < 0 ||
2597                         (int)size < cnt_expected_entries)
2598                 return cnt_expected_entries;
2599
2600         /* port_id checked in get_xstats_count() */
2601         dev = &rte_eth_devices[port_id];
2602
2603         cnt_used_entries = rte_eth_basic_stats_get_names(
2604                 dev, xstats_names);
2605
2606         if (dev->dev_ops->xstats_get_names != NULL) {
2607                 /* If there are any driver-specific xstats, append them
2608                  * to end of list.
2609                  */
2610                 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2611                         dev,
2612                         xstats_names + cnt_used_entries,
2613                         size - cnt_used_entries);
2614                 if (cnt_driver_entries < 0)
2615                         return eth_err(port_id, cnt_driver_entries);
2616                 cnt_used_entries += cnt_driver_entries;
2617         }
2618
2619         return cnt_used_entries;
2620 }
2621
2622
2623 static int
2624 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2625 {
2626         struct rte_eth_dev *dev;
2627         struct rte_eth_stats eth_stats;
2628         unsigned int count = 0, i, q;
2629         uint64_t val, *stats_ptr;
2630         uint16_t nb_rxqs, nb_txqs;
2631         int ret;
2632
2633         ret = rte_eth_stats_get(port_id, &eth_stats);
2634         if (ret < 0)
2635                 return ret;
2636
2637         dev = &rte_eth_devices[port_id];
2638
2639         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2640         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2641
2642         /* global stats */
2643         for (i = 0; i < RTE_NB_STATS; i++) {
2644                 stats_ptr = RTE_PTR_ADD(&eth_stats,
2645                                         rte_stats_strings[i].offset);
2646                 val = *stats_ptr;
2647                 xstats[count++].value = val;
2648         }
2649
2650         /* per-rxq stats */
2651         for (q = 0; q < nb_rxqs; q++) {
2652                 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2653                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2654                                         rte_rxq_stats_strings[i].offset +
2655                                         q * sizeof(uint64_t));
2656                         val = *stats_ptr;
2657                         xstats[count++].value = val;
2658                 }
2659         }
2660
2661         /* per-txq stats */
2662         for (q = 0; q < nb_txqs; q++) {
2663                 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2664                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2665                                         rte_txq_stats_strings[i].offset +
2666                                         q * sizeof(uint64_t));
2667                         val = *stats_ptr;
2668                         xstats[count++].value = val;
2669                 }
2670         }
2671         return count;
2672 }
2673
2674 /* retrieve ethdev extended statistics */
2675 int
2676 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2677                          uint64_t *values, unsigned int size)
2678 {
2679         unsigned int no_basic_stat_requested = 1;
2680         unsigned int no_ext_stat_requested = 1;
2681         unsigned int num_xstats_filled;
2682         unsigned int basic_count;
2683         uint16_t expected_entries;
2684         struct rte_eth_dev *dev;
2685         unsigned int i;
2686         int ret;
2687
2688         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2689         ret = get_xstats_count(port_id);
2690         if (ret < 0)
2691                 return ret;
2692         expected_entries = (uint16_t)ret;
2693         struct rte_eth_xstat xstats[expected_entries];
2694         dev = &rte_eth_devices[port_id];
2695         basic_count = get_xstats_basic_count(dev);
2696
2697         /* Return max number of stats if no ids given */
2698         if (!ids) {
2699                 if (!values)
2700                         return expected_entries;
2701                 else if (values && size < expected_entries)
2702                         return expected_entries;
2703         }
2704
2705         if (ids && !values)
2706                 return -EINVAL;
2707
2708         if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2709                 unsigned int basic_count = get_xstats_basic_count(dev);
2710                 uint64_t ids_copy[size];
2711
2712                 for (i = 0; i < size; i++) {
2713                         if (ids[i] < basic_count) {
2714                                 no_basic_stat_requested = 0;
2715                                 break;
2716                         }
2717
2718                         /*
2719                          * Convert ids to xstats ids that PMD knows.
2720                          * ids known by user are basic + extended stats.
2721                          */
2722                         ids_copy[i] = ids[i] - basic_count;
2723                 }
2724
2725                 if (no_basic_stat_requested)
2726                         return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2727                                         values, size);
2728         }
2729
2730         if (ids) {
2731                 for (i = 0; i < size; i++) {
2732                         if (ids[i] >= basic_count) {
2733                                 no_ext_stat_requested = 0;
2734                                 break;
2735                         }
2736                 }
2737         }
2738
2739         /* Fill the xstats structure */
2740         if (ids && no_ext_stat_requested)
2741                 ret = rte_eth_basic_stats_get(port_id, xstats);
2742         else
2743                 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2744
2745         if (ret < 0)
2746                 return ret;
2747         num_xstats_filled = (unsigned int)ret;
2748
2749         /* Return all stats */
2750         if (!ids) {
2751                 for (i = 0; i < num_xstats_filled; i++)
2752                         values[i] = xstats[i].value;
2753                 return expected_entries;
2754         }
2755
2756         /* Filter stats */
2757         for (i = 0; i < size; i++) {
2758                 if (ids[i] >= expected_entries) {
2759                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2760                         return -1;
2761                 }
2762                 values[i] = xstats[ids[i]].value;
2763         }
2764         return size;
2765 }
2766
2767 int
2768 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2769         unsigned int n)
2770 {
2771         struct rte_eth_dev *dev;
2772         unsigned int count = 0, i;
2773         signed int xcount = 0;
2774         uint16_t nb_rxqs, nb_txqs;
2775         int ret;
2776
2777         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2778
2779         dev = &rte_eth_devices[port_id];
2780
2781         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2782         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2783
2784         /* Return generic statistics */
2785         count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2786                 (nb_txqs * RTE_NB_TXQ_STATS);
2787
2788         /* implemented by the driver */
2789         if (dev->dev_ops->xstats_get != NULL) {
2790                 /* Retrieve the xstats from the driver at the end of the
2791                  * xstats struct.
2792                  */
2793                 xcount = (*dev->dev_ops->xstats_get)(dev,
2794                                      xstats ? xstats + count : NULL,
2795                                      (n > count) ? n - count : 0);
2796
2797                 if (xcount < 0)
2798                         return eth_err(port_id, xcount);
2799         }
2800
2801         if (n < count + xcount || xstats == NULL)
2802                 return count + xcount;
2803
2804         /* now fill the xstats structure */
2805         ret = rte_eth_basic_stats_get(port_id, xstats);
2806         if (ret < 0)
2807                 return ret;
2808         count = ret;
2809
2810         for (i = 0; i < count; i++)
2811                 xstats[i].id = i;
2812         /* add an offset to driver-specific stats */
2813         for ( ; i < count + xcount; i++)
2814                 xstats[i].id += count;
2815
2816         return count + xcount;
2817 }
2818
2819 /* reset ethdev extended statistics */
2820 int
2821 rte_eth_xstats_reset(uint16_t port_id)
2822 {
2823         struct rte_eth_dev *dev;
2824
2825         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2826         dev = &rte_eth_devices[port_id];
2827
2828         /* implemented by the driver */
2829         if (dev->dev_ops->xstats_reset != NULL)
2830                 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2831
2832         /* fallback to default */
2833         return rte_eth_stats_reset(port_id);
2834 }
2835
2836 static int
2837 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2838                 uint8_t is_rx)
2839 {
2840         struct rte_eth_dev *dev;
2841
2842         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2843
2844         dev = &rte_eth_devices[port_id];
2845
2846         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2847
2848         if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2849                 return -EINVAL;
2850
2851         if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2852                 return -EINVAL;
2853
2854         if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2855                 return -EINVAL;
2856
2857         return (*dev->dev_ops->queue_stats_mapping_set)
2858                         (dev, queue_id, stat_idx, is_rx);
2859 }
2860
2861
2862 int
2863 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2864                 uint8_t stat_idx)
2865 {
2866         return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2867                                                 stat_idx, STAT_QMAP_TX));
2868 }
2869
2870
2871 int
2872 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2873                 uint8_t stat_idx)
2874 {
2875         return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2876                                                 stat_idx, STAT_QMAP_RX));
2877 }
2878
2879 int
2880 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2881 {
2882         struct rte_eth_dev *dev;
2883
2884         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2885         dev = &rte_eth_devices[port_id];
2886
2887         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2888         return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2889                                                         fw_version, fw_size));
2890 }
2891
2892 int
2893 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2894 {
2895         struct rte_eth_dev *dev;
2896         const struct rte_eth_desc_lim lim = {
2897                 .nb_max = UINT16_MAX,
2898                 .nb_min = 0,
2899                 .nb_align = 1,
2900                 .nb_seg_max = UINT16_MAX,
2901                 .nb_mtu_seg_max = UINT16_MAX,
2902         };
2903         int diag;
2904
2905         /*
2906          * Init dev_info before port_id check since caller does not have
2907          * return status and does not know if get is successful or not.
2908          */
2909         memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2910
2911         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2912         dev = &rte_eth_devices[port_id];
2913
2914         dev_info->rx_desc_lim = lim;
2915         dev_info->tx_desc_lim = lim;
2916         dev_info->device = dev->device;
2917         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
2918         dev_info->max_mtu = UINT16_MAX;
2919
2920         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
2921         diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2922         if (diag != 0) {
2923                 /* Cleanup already filled in device information */
2924                 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2925                 return eth_err(port_id, diag);
2926         }
2927
2928         dev_info->driver_name = dev->device->driver->name;
2929         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2930         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2931
2932         dev_info->dev_flags = &dev->data->dev_flags;
2933
2934         return 0;
2935 }
2936
2937 int
2938 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2939                                  uint32_t *ptypes, int num)
2940 {
2941         int i, j;
2942         struct rte_eth_dev *dev;
2943         const uint32_t *all_ptypes;
2944
2945         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2946         dev = &rte_eth_devices[port_id];
2947         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2948         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2949
2950         if (!all_ptypes)
2951                 return 0;
2952
2953         for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2954                 if (all_ptypes[i] & ptype_mask) {
2955                         if (j < num)
2956                                 ptypes[j] = all_ptypes[i];
2957                         j++;
2958                 }
2959
2960         return j;
2961 }
2962
2963 int
2964 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
2965                                  uint32_t *set_ptypes, unsigned int num)
2966 {
2967         const uint32_t valid_ptype_masks[] = {
2968                 RTE_PTYPE_L2_MASK,
2969                 RTE_PTYPE_L3_MASK,
2970                 RTE_PTYPE_L4_MASK,
2971                 RTE_PTYPE_TUNNEL_MASK,
2972                 RTE_PTYPE_INNER_L2_MASK,
2973                 RTE_PTYPE_INNER_L3_MASK,
2974                 RTE_PTYPE_INNER_L4_MASK,
2975         };
2976         const uint32_t *all_ptypes;
2977         struct rte_eth_dev *dev;
2978         uint32_t unused_mask;
2979         unsigned int i, j;
2980         int ret;
2981
2982         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2983         dev = &rte_eth_devices[port_id];
2984
2985         if (num > 0 && set_ptypes == NULL)
2986                 return -EINVAL;
2987
2988         if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
2989                         *dev->dev_ops->dev_ptypes_set == NULL) {
2990                 ret = 0;
2991                 goto ptype_unknown;
2992         }
2993
2994         if (ptype_mask == 0) {
2995                 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
2996                                 ptype_mask);
2997                 goto ptype_unknown;
2998         }
2999
3000         unused_mask = ptype_mask;
3001         for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3002                 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3003                 if (mask && mask != valid_ptype_masks[i]) {
3004                         ret = -EINVAL;
3005                         goto ptype_unknown;
3006                 }
3007                 unused_mask &= ~valid_ptype_masks[i];
3008         }
3009
3010         if (unused_mask) {
3011                 ret = -EINVAL;
3012                 goto ptype_unknown;
3013         }
3014
3015         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3016         if (all_ptypes == NULL) {
3017                 ret = 0;
3018                 goto ptype_unknown;
3019         }
3020
3021         /*
3022          * Accommodate as many set_ptypes as possible. If the supplied
3023          * set_ptypes array is insufficient fill it partially.
3024          */
3025         for (i = 0, j = 0; set_ptypes != NULL &&
3026                                 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3027                 if (ptype_mask & all_ptypes[i]) {
3028                         if (j < num - 1) {
3029                                 set_ptypes[j] = all_ptypes[i];
3030                                 j++;
3031                                 continue;
3032                         }
3033                         break;
3034                 }
3035         }
3036
3037         if (set_ptypes != NULL && j < num)
3038                 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3039
3040         return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3041
3042 ptype_unknown:
3043         if (num > 0)
3044                 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3045
3046         return ret;
3047 }
3048
3049 int
3050 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3051 {
3052         struct rte_eth_dev *dev;
3053
3054         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3055         dev = &rte_eth_devices[port_id];
3056         rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3057
3058         return 0;
3059 }
3060
3061 int
3062 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3063 {
3064         struct rte_eth_dev *dev;
3065
3066         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3067
3068         dev = &rte_eth_devices[port_id];
3069         *mtu = dev->data->mtu;
3070         return 0;
3071 }
3072
3073 int
3074 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3075 {
3076         int ret;
3077         struct rte_eth_dev_info dev_info;
3078         struct rte_eth_dev *dev;
3079
3080         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3081         dev = &rte_eth_devices[port_id];
3082         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3083
3084         /*
3085          * Check if the device supports dev_infos_get, if it does not
3086          * skip min_mtu/max_mtu validation here as this requires values
3087          * that are populated within the call to rte_eth_dev_info_get()
3088          * which relies on dev->dev_ops->dev_infos_get.
3089          */
3090         if (*dev->dev_ops->dev_infos_get != NULL) {
3091                 ret = rte_eth_dev_info_get(port_id, &dev_info);
3092                 if (ret != 0)
3093                         return ret;
3094
3095                 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3096                         return -EINVAL;
3097         }
3098
3099         ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3100         if (!ret)
3101                 dev->data->mtu = mtu;
3102
3103         return eth_err(port_id, ret);
3104 }
3105
3106 int
3107 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3108 {
3109         struct rte_eth_dev *dev;
3110         int ret;
3111
3112         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3113         dev = &rte_eth_devices[port_id];
3114         if (!(dev->data->dev_conf.rxmode.offloads &
3115               DEV_RX_OFFLOAD_VLAN_FILTER)) {
3116                 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3117                         port_id);
3118                 return -ENOSYS;
3119         }
3120
3121         if (vlan_id > 4095) {
3122                 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3123                         port_id, vlan_id);
3124                 return -EINVAL;
3125         }
3126         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3127
3128         ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3129         if (ret == 0) {
3130                 struct rte_vlan_filter_conf *vfc;
3131                 int vidx;
3132                 int vbit;
3133
3134                 vfc = &dev->data->vlan_filter_conf;
3135                 vidx = vlan_id / 64;
3136                 vbit = vlan_id % 64;
3137
3138                 if (on)
3139                         vfc->ids[vidx] |= UINT64_C(1) << vbit;
3140                 else
3141                         vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3142         }
3143
3144         return eth_err(port_id, ret);
3145 }
3146
3147 int
3148 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3149                                     int on)
3150 {
3151         struct rte_eth_dev *dev;
3152
3153         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3154         dev = &rte_eth_devices[port_id];
3155         if (rx_queue_id >= dev->data->nb_rx_queues) {
3156                 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3157                 return -EINVAL;
3158         }
3159
3160         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3161         (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3162
3163         return 0;
3164 }
3165
3166 int
3167 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3168                                 enum rte_vlan_type vlan_type,
3169                                 uint16_t tpid)
3170 {
3171         struct rte_eth_dev *dev;
3172
3173         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3174         dev = &rte_eth_devices[port_id];
3175         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3176
3177         return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3178                                                                tpid));
3179 }
3180
3181 int
3182 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3183 {
3184         struct rte_eth_dev *dev;
3185         int ret = 0;
3186         int mask = 0;
3187         int cur, org = 0;
3188         uint64_t orig_offloads;
3189         uint64_t *dev_offloads;
3190
3191         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3192         dev = &rte_eth_devices[port_id];
3193
3194         /* save original values in case of failure */
3195         orig_offloads = dev->data->dev_conf.rxmode.offloads;
3196         dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3197
3198         /*check which option changed by application*/
3199         cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3200         org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3201         if (cur != org) {
3202                 if (cur)
3203                         *dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3204                 else
3205                         *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3206                 mask |= ETH_VLAN_STRIP_MASK;
3207         }
3208
3209         cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3210         org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3211         if (cur != org) {
3212                 if (cur)
3213                         *dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3214                 else
3215                         *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3216                 mask |= ETH_VLAN_FILTER_MASK;
3217         }
3218
3219         cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3220         org = !!(*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3221         if (cur != org) {
3222                 if (cur)
3223                         *dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3224                 else
3225                         *dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3226                 mask |= ETH_VLAN_EXTEND_MASK;
3227         }
3228
3229         cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3230         org = !!(*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3231         if (cur != org) {
3232                 if (cur)
3233                         *dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3234                 else
3235                         *dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3236                 mask |= ETH_QINQ_STRIP_MASK;
3237         }
3238
3239         /*no change*/
3240         if (mask == 0)
3241                 return ret;
3242
3243         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3244         ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3245         if (ret) {
3246                 /* hit an error restore  original values */
3247                 *dev_offloads = orig_offloads;
3248         }
3249
3250         return eth_err(port_id, ret);
3251 }
3252
3253 int
3254 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3255 {
3256         struct rte_eth_dev *dev;
3257         uint64_t *dev_offloads;
3258         int ret = 0;
3259
3260         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3261         dev = &rte_eth_devices[port_id];
3262         dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3263
3264         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3265                 ret |= ETH_VLAN_STRIP_OFFLOAD;
3266
3267         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3268                 ret |= ETH_VLAN_FILTER_OFFLOAD;
3269
3270         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3271                 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3272
3273         if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3274                 ret |= ETH_QINQ_STRIP_OFFLOAD;
3275
3276         return ret;
3277 }
3278
3279 int
3280 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3281 {
3282         struct rte_eth_dev *dev;
3283
3284         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3285         dev = &rte_eth_devices[port_id];
3286         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3287
3288         return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3289 }
3290
3291 int
3292 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3293 {
3294         struct rte_eth_dev *dev;
3295
3296         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3297         dev = &rte_eth_devices[port_id];
3298         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3299         memset(fc_conf, 0, sizeof(*fc_conf));
3300         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3301 }
3302
3303 int
3304 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3305 {
3306         struct rte_eth_dev *dev;
3307
3308         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3309         if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3310                 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3311                 return -EINVAL;
3312         }
3313
3314         dev = &rte_eth_devices[port_id];
3315         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3316         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3317 }
3318
3319 int
3320 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3321                                    struct rte_eth_pfc_conf *pfc_conf)
3322 {
3323         struct rte_eth_dev *dev;
3324
3325         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3326         if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3327                 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3328                 return -EINVAL;
3329         }
3330
3331         dev = &rte_eth_devices[port_id];
3332         /* High water, low water validation are device specific */
3333         if  (*dev->dev_ops->priority_flow_ctrl_set)
3334                 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3335                                         (dev, pfc_conf));
3336         return -ENOTSUP;
3337 }
3338
3339 static int
3340 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3341                         uint16_t reta_size)
3342 {
3343         uint16_t i, num;
3344
3345         if (!reta_conf)
3346                 return -EINVAL;
3347
3348         num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3349         for (i = 0; i < num; i++) {
3350                 if (reta_conf[i].mask)
3351                         return 0;
3352         }
3353
3354         return -EINVAL;
3355 }
3356
3357 static int
3358 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3359                          uint16_t reta_size,
3360                          uint16_t max_rxq)
3361 {
3362         uint16_t i, idx, shift;
3363
3364         if (!reta_conf)
3365                 return -EINVAL;
3366
3367         if (max_rxq == 0) {
3368                 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3369                 return -EINVAL;
3370         }
3371
3372         for (i = 0; i < reta_size; i++) {
3373                 idx = i / RTE_RETA_GROUP_SIZE;
3374                 shift = i % RTE_RETA_GROUP_SIZE;
3375                 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3376                         (reta_conf[idx].reta[shift] >= max_rxq)) {
3377                         RTE_ETHDEV_LOG(ERR,
3378                                 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3379                                 idx, shift,
3380                                 reta_conf[idx].reta[shift], max_rxq);
3381                         return -EINVAL;
3382                 }
3383         }
3384
3385         return 0;
3386 }
3387
3388 int
3389 rte_eth_dev_rss_reta_update(uint16_t port_id,
3390                             struct rte_eth_rss_reta_entry64 *reta_conf,
3391                             uint16_t reta_size)
3392 {
3393         struct rte_eth_dev *dev;
3394         int ret;
3395
3396         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3397         /* Check mask bits */
3398         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3399         if (ret < 0)
3400                 return ret;
3401
3402         dev = &rte_eth_devices[port_id];
3403
3404         /* Check entry value */
3405         ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3406                                 dev->data->nb_rx_queues);
3407         if (ret < 0)
3408                 return ret;
3409
3410         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3411         return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3412                                                              reta_size));
3413 }
3414
3415 int
3416 rte_eth_dev_rss_reta_query(uint16_t port_id,
3417                            struct rte_eth_rss_reta_entry64 *reta_conf,
3418                            uint16_t reta_size)
3419 {
3420         struct rte_eth_dev *dev;
3421         int ret;
3422
3423         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3424
3425         /* Check mask bits */
3426         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3427         if (ret < 0)
3428                 return ret;
3429
3430         dev = &rte_eth_devices[port_id];
3431         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3432         return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3433                                                             reta_size));
3434 }
3435
3436 int
3437 rte_eth_dev_rss_hash_update(uint16_t port_id,
3438                             struct rte_eth_rss_conf *rss_conf)
3439 {
3440         struct rte_eth_dev *dev;
3441         struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3442         int ret;
3443
3444         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3445
3446         ret = rte_eth_dev_info_get(port_id, &dev_info);
3447         if (ret != 0)
3448                 return ret;
3449
3450         rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3451
3452         dev = &rte_eth_devices[port_id];
3453         if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3454             dev_info.flow_type_rss_offloads) {
3455                 RTE_ETHDEV_LOG(ERR,
3456                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3457                         port_id, rss_conf->rss_hf,
3458                         dev_info.flow_type_rss_offloads);
3459                 return -EINVAL;
3460         }
3461         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3462         return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3463                                                                  rss_conf));
3464 }
3465
3466 int
3467 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3468                               struct rte_eth_rss_conf *rss_conf)
3469 {
3470         struct rte_eth_dev *dev;
3471
3472         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3473         dev = &rte_eth_devices[port_id];
3474         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3475         return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3476                                                                    rss_conf));
3477 }
3478
3479 int
3480 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3481                                 struct rte_eth_udp_tunnel *udp_tunnel)
3482 {
3483         struct rte_eth_dev *dev;
3484
3485         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3486         if (udp_tunnel == NULL) {
3487                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3488                 return -EINVAL;
3489         }
3490
3491         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3492                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3493                 return -EINVAL;
3494         }
3495
3496         dev = &rte_eth_devices[port_id];
3497         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3498         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3499                                                                 udp_tunnel));
3500 }
3501
3502 int
3503 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3504                                    struct rte_eth_udp_tunnel *udp_tunnel)
3505 {
3506         struct rte_eth_dev *dev;
3507
3508         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3509         dev = &rte_eth_devices[port_id];
3510
3511         if (udp_tunnel == NULL) {
3512                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3513                 return -EINVAL;
3514         }
3515
3516         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3517                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3518                 return -EINVAL;
3519         }
3520
3521         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3522         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3523                                                                 udp_tunnel));
3524 }
3525
3526 int
3527 rte_eth_led_on(uint16_t port_id)
3528 {
3529         struct rte_eth_dev *dev;
3530
3531         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3532         dev = &rte_eth_devices[port_id];
3533         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3534         return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3535 }
3536
3537 int
3538 rte_eth_led_off(uint16_t port_id)
3539 {
3540         struct rte_eth_dev *dev;
3541
3542         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3543         dev = &rte_eth_devices[port_id];
3544         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3545         return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3546 }
3547
3548 /*
3549  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3550  * an empty spot.
3551  */
3552 static int
3553 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3554 {
3555         struct rte_eth_dev_info dev_info;
3556         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3557         unsigned i;
3558         int ret;
3559
3560         ret = rte_eth_dev_info_get(port_id, &dev_info);
3561         if (ret != 0)
3562                 return -1;
3563
3564         for (i = 0; i < dev_info.max_mac_addrs; i++)
3565                 if (memcmp(addr, &dev->data->mac_addrs[i],
3566                                 RTE_ETHER_ADDR_LEN) == 0)
3567                         return i;
3568
3569         return -1;
3570 }
3571
3572 static const struct rte_ether_addr null_mac_addr;
3573
3574 int
3575 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3576                         uint32_t pool)
3577 {
3578         struct rte_eth_dev *dev;
3579         int index;
3580         uint64_t pool_mask;
3581         int ret;
3582
3583         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3584         dev = &rte_eth_devices[port_id];
3585         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3586
3587         if (rte_is_zero_ether_addr(addr)) {
3588                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3589                         port_id);
3590                 return -EINVAL;
3591         }
3592         if (pool >= ETH_64_POOLS) {
3593                 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3594                 return -EINVAL;
3595         }
3596
3597         index = get_mac_addr_index(port_id, addr);
3598         if (index < 0) {
3599                 index = get_mac_addr_index(port_id, &null_mac_addr);
3600                 if (index < 0) {
3601                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3602                                 port_id);
3603                         return -ENOSPC;
3604                 }
3605         } else {
3606                 pool_mask = dev->data->mac_pool_sel[index];
3607
3608                 /* Check if both MAC address and pool is already there, and do nothing */
3609                 if (pool_mask & (1ULL << pool))
3610                         return 0;
3611         }
3612
3613         /* Update NIC */
3614         ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3615
3616         if (ret == 0) {
3617                 /* Update address in NIC data structure */
3618                 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3619
3620                 /* Update pool bitmap in NIC data structure */
3621                 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3622         }
3623
3624         return eth_err(port_id, ret);
3625 }
3626
3627 int
3628 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3629 {
3630         struct rte_eth_dev *dev;
3631         int index;
3632
3633         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3634         dev = &rte_eth_devices[port_id];
3635         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3636
3637         index = get_mac_addr_index(port_id, addr);
3638         if (index == 0) {
3639                 RTE_ETHDEV_LOG(ERR,
3640                         "Port %u: Cannot remove default MAC address\n",
3641                         port_id);
3642                 return -EADDRINUSE;
3643         } else if (index < 0)
3644                 return 0;  /* Do nothing if address wasn't found */
3645
3646         /* Update NIC */
3647         (*dev->dev_ops->mac_addr_remove)(dev, index);
3648
3649         /* Update address in NIC data structure */
3650         rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3651
3652         /* reset pool bitmap */
3653         dev->data->mac_pool_sel[index] = 0;
3654
3655         return 0;
3656 }
3657
3658 int
3659 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3660 {
3661         struct rte_eth_dev *dev;
3662         int ret;
3663
3664         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3665
3666         if (!rte_is_valid_assigned_ether_addr(addr))
3667                 return -EINVAL;
3668
3669         dev = &rte_eth_devices[port_id];
3670         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3671
3672         ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3673         if (ret < 0)
3674                 return ret;
3675
3676         /* Update default address in NIC data structure */
3677         rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3678
3679         return 0;
3680 }
3681
3682
3683 /*
3684  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3685  * an empty spot.
3686  */
3687 static int
3688 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3689 {
3690         struct rte_eth_dev_info dev_info;
3691         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3692         unsigned i;
3693         int ret;
3694
3695         ret = rte_eth_dev_info_get(port_id, &dev_info);
3696         if (ret != 0)
3697                 return -1;
3698
3699         if (!dev->data->hash_mac_addrs)
3700                 return -1;
3701
3702         for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3703                 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3704                         RTE_ETHER_ADDR_LEN) == 0)
3705                         return i;
3706
3707         return -1;
3708 }
3709
3710 int
3711 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3712                                 uint8_t on)
3713 {
3714         int index;
3715         int ret;
3716         struct rte_eth_dev *dev;
3717
3718         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3719
3720         dev = &rte_eth_devices[port_id];
3721         if (rte_is_zero_ether_addr(addr)) {
3722                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3723                         port_id);
3724                 return -EINVAL;
3725         }
3726
3727         index = get_hash_mac_addr_index(port_id, addr);
3728         /* Check if it's already there, and do nothing */
3729         if ((index >= 0) && on)
3730                 return 0;
3731
3732         if (index < 0) {
3733                 if (!on) {
3734                         RTE_ETHDEV_LOG(ERR,
3735                                 "Port %u: the MAC address was not set in UTA\n",
3736                                 port_id);
3737                         return -EINVAL;
3738                 }
3739
3740                 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3741                 if (index < 0) {
3742                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3743                                 port_id);
3744                         return -ENOSPC;
3745                 }
3746         }
3747
3748         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3749         ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3750         if (ret == 0) {
3751                 /* Update address in NIC data structure */
3752                 if (on)
3753                         rte_ether_addr_copy(addr,
3754                                         &dev->data->hash_mac_addrs[index]);
3755                 else
3756                         rte_ether_addr_copy(&null_mac_addr,
3757                                         &dev->data->hash_mac_addrs[index]);
3758         }
3759
3760         return eth_err(port_id, ret);
3761 }
3762
3763 int
3764 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3765 {
3766         struct rte_eth_dev *dev;
3767
3768         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3769
3770         dev = &rte_eth_devices[port_id];
3771
3772         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3773         return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3774                                                                        on));
3775 }
3776
3777 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3778                                         uint16_t tx_rate)
3779 {
3780         struct rte_eth_dev *dev;
3781         struct rte_eth_dev_info dev_info;
3782         struct rte_eth_link link;
3783         int ret;
3784
3785         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3786
3787         ret = rte_eth_dev_info_get(port_id, &dev_info);
3788         if (ret != 0)
3789                 return ret;
3790
3791         dev = &rte_eth_devices[port_id];
3792         link = dev->data->dev_link;
3793
3794         if (queue_idx > dev_info.max_tx_queues) {
3795                 RTE_ETHDEV_LOG(ERR,
3796                         "Set queue rate limit:port %u: invalid queue id=%u\n",
3797                         port_id, queue_idx);
3798                 return -EINVAL;
3799         }
3800
3801         if (tx_rate > link.link_speed) {
3802                 RTE_ETHDEV_LOG(ERR,
3803                         "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3804                         tx_rate, link.link_speed);
3805                 return -EINVAL;
3806         }
3807
3808         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3809         return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3810                                                         queue_idx, tx_rate));
3811 }
3812
3813 int
3814 rte_eth_mirror_rule_set(uint16_t port_id,
3815                         struct rte_eth_mirror_conf *mirror_conf,
3816                         uint8_t rule_id, uint8_t on)
3817 {
3818         struct rte_eth_dev *dev;
3819
3820         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3821         if (mirror_conf->rule_type == 0) {
3822                 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3823                 return -EINVAL;
3824         }
3825
3826         if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3827                 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3828                         ETH_64_POOLS - 1);
3829                 return -EINVAL;
3830         }
3831
3832         if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3833              ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3834             (mirror_conf->pool_mask == 0)) {
3835                 RTE_ETHDEV_LOG(ERR,
3836                         "Invalid mirror pool, pool mask can not be 0\n");
3837                 return -EINVAL;
3838         }
3839
3840         if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3841             mirror_conf->vlan.vlan_mask == 0) {
3842                 RTE_ETHDEV_LOG(ERR,
3843                         "Invalid vlan mask, vlan mask can not be 0\n");
3844                 return -EINVAL;
3845         }
3846
3847         dev = &rte_eth_devices[port_id];
3848         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3849
3850         return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3851                                                 mirror_conf, rule_id, on));
3852 }
3853
3854 int
3855 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3856 {
3857         struct rte_eth_dev *dev;
3858
3859         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3860
3861         dev = &rte_eth_devices[port_id];
3862         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3863
3864         return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3865                                                                    rule_id));
3866 }
3867
3868 RTE_INIT(eth_dev_init_cb_lists)
3869 {
3870         int i;
3871
3872         for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3873                 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3874 }
3875
3876 int
3877 rte_eth_dev_callback_register(uint16_t port_id,
3878                         enum rte_eth_event_type event,
3879                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3880 {
3881         struct rte_eth_dev *dev;
3882         struct rte_eth_dev_callback *user_cb;
3883         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3884         uint16_t last_port;
3885
3886         if (!cb_fn)
3887                 return -EINVAL;
3888
3889         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3890                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3891                 return -EINVAL;
3892         }
3893
3894         if (port_id == RTE_ETH_ALL) {
3895                 next_port = 0;
3896                 last_port = RTE_MAX_ETHPORTS - 1;
3897         } else {
3898                 next_port = last_port = port_id;
3899         }
3900
3901         rte_spinlock_lock(&rte_eth_dev_cb_lock);
3902
3903         do {
3904                 dev = &rte_eth_devices[next_port];
3905
3906                 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3907                         if (user_cb->cb_fn == cb_fn &&
3908                                 user_cb->cb_arg == cb_arg &&
3909                                 user_cb->event == event) {
3910                                 break;
3911                         }
3912                 }
3913
3914                 /* create a new callback. */
3915                 if (user_cb == NULL) {
3916                         user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3917                                 sizeof(struct rte_eth_dev_callback), 0);
3918                         if (user_cb != NULL) {
3919                                 user_cb->cb_fn = cb_fn;
3920                                 user_cb->cb_arg = cb_arg;
3921                                 user_cb->event = event;
3922                                 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3923                                                   user_cb, next);
3924                         } else {
3925                                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3926                                 rte_eth_dev_callback_unregister(port_id, event,
3927                                                                 cb_fn, cb_arg);
3928                                 return -ENOMEM;
3929                         }
3930
3931                 }
3932         } while (++next_port <= last_port);
3933
3934         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3935         return 0;
3936 }
3937
3938 int
3939 rte_eth_dev_callback_unregister(uint16_t port_id,
3940                         enum rte_eth_event_type event,
3941                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3942 {
3943         int ret;
3944         struct rte_eth_dev *dev;
3945         struct rte_eth_dev_callback *cb, *next;
3946         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3947         uint16_t last_port;
3948
3949         if (!cb_fn)
3950                 return -EINVAL;
3951
3952         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3953                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3954                 return -EINVAL;
3955         }
3956
3957         if (port_id == RTE_ETH_ALL) {
3958                 next_port = 0;
3959                 last_port = RTE_MAX_ETHPORTS - 1;
3960         } else {
3961                 next_port = last_port = port_id;
3962         }
3963
3964         rte_spinlock_lock(&rte_eth_dev_cb_lock);
3965
3966         do {
3967                 dev = &rte_eth_devices[next_port];
3968                 ret = 0;
3969                 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3970                      cb = next) {
3971
3972                         next = TAILQ_NEXT(cb, next);
3973
3974                         if (cb->cb_fn != cb_fn || cb->event != event ||
3975                             (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3976                                 continue;
3977
3978                         /*
3979                          * if this callback is not executing right now,
3980                          * then remove it.
3981                          */
3982                         if (cb->active == 0) {
3983                                 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3984                                 rte_free(cb);
3985                         } else {
3986                                 ret = -EAGAIN;
3987                         }
3988                 }
3989         } while (++next_port <= last_port);
3990
3991         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3992         return ret;
3993 }
3994
3995 int
3996 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3997         enum rte_eth_event_type event, void *ret_param)
3998 {
3999         struct rte_eth_dev_callback *cb_lst;
4000         struct rte_eth_dev_callback dev_cb;
4001         int rc = 0;
4002
4003         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4004         TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4005                 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4006                         continue;
4007                 dev_cb = *cb_lst;
4008                 cb_lst->active = 1;
4009                 if (ret_param != NULL)
4010                         dev_cb.ret_param = ret_param;
4011
4012                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4013                 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4014                                 dev_cb.cb_arg, dev_cb.ret_param);
4015                 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4016                 cb_lst->active = 0;
4017         }
4018         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4019         return rc;
4020 }
4021
4022 void
4023 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4024 {
4025         if (dev == NULL)
4026                 return;
4027
4028         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4029
4030         dev->state = RTE_ETH_DEV_ATTACHED;
4031 }
4032
4033 int
4034 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4035 {
4036         uint32_t vec;
4037         struct rte_eth_dev *dev;
4038         struct rte_intr_handle *intr_handle;
4039         uint16_t qid;
4040         int rc;
4041
4042         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4043
4044         dev = &rte_eth_devices[port_id];
4045
4046         if (!dev->intr_handle) {
4047                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4048                 return -ENOTSUP;
4049         }
4050
4051         intr_handle = dev->intr_handle;
4052         if (!intr_handle->intr_vec) {
4053                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4054                 return -EPERM;
4055         }
4056
4057         for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4058                 vec = intr_handle->intr_vec[qid];
4059                 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4060                 if (rc && rc != -EEXIST) {
4061                         RTE_ETHDEV_LOG(ERR,
4062                                 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4063                                 port_id, qid, op, epfd, vec);
4064                 }
4065         }
4066
4067         return 0;
4068 }
4069
4070 int
4071 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4072 {
4073         struct rte_intr_handle *intr_handle;
4074         struct rte_eth_dev *dev;
4075         unsigned int efd_idx;
4076         uint32_t vec;
4077         int fd;
4078
4079         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4080
4081         dev = &rte_eth_devices[port_id];
4082
4083         if (queue_id >= dev->data->nb_rx_queues) {
4084                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4085                 return -1;
4086         }
4087
4088         if (!dev->intr_handle) {
4089                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4090                 return -1;
4091         }
4092
4093         intr_handle = dev->intr_handle;
4094         if (!intr_handle->intr_vec) {
4095                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4096                 return -1;
4097         }
4098
4099         vec = intr_handle->intr_vec[queue_id];
4100         efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4101                 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4102         fd = intr_handle->efds[efd_idx];
4103
4104         return fd;
4105 }
4106
4107 const struct rte_memzone *
4108 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4109                          uint16_t queue_id, size_t size, unsigned align,
4110                          int socket_id)
4111 {
4112         char z_name[RTE_MEMZONE_NAMESIZE];
4113         const struct rte_memzone *mz;
4114         int rc;
4115
4116         rc = snprintf(z_name, sizeof(z_name), "eth_p%d_q%d_%s",
4117                       dev->data->port_id, queue_id, ring_name);
4118         if (rc >= RTE_MEMZONE_NAMESIZE) {
4119                 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4120                 rte_errno = ENAMETOOLONG;
4121                 return NULL;
4122         }
4123
4124         mz = rte_memzone_lookup(z_name);
4125         if (mz)
4126                 return mz;
4127
4128         return rte_memzone_reserve_aligned(z_name, size, socket_id,
4129                         RTE_MEMZONE_IOVA_CONTIG, align);
4130 }
4131
4132 int
4133 rte_eth_dev_create(struct rte_device *device, const char *name,
4134         size_t priv_data_size,
4135         ethdev_bus_specific_init ethdev_bus_specific_init,
4136         void *bus_init_params,
4137         ethdev_init_t ethdev_init, void *init_params)
4138 {
4139         struct rte_eth_dev *ethdev;
4140         int retval;
4141
4142         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4143
4144         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4145                 ethdev = rte_eth_dev_allocate(name);
4146                 if (!ethdev)
4147                         return -ENODEV;
4148
4149                 if (priv_data_size) {
4150                         ethdev->data->dev_private = rte_zmalloc_socket(
4151                                 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4152                                 device->numa_node);
4153
4154                         if (!ethdev->data->dev_private) {
4155                                 RTE_LOG(ERR, EAL, "failed to allocate private data");
4156                                 retval = -ENOMEM;
4157                                 goto probe_failed;
4158                         }
4159                 }
4160         } else {
4161                 ethdev = rte_eth_dev_attach_secondary(name);
4162                 if (!ethdev) {
4163                         RTE_LOG(ERR, EAL, "secondary process attach failed, "
4164                                 "ethdev doesn't exist");
4165                         return  -ENODEV;
4166                 }
4167         }
4168
4169         ethdev->device = device;
4170
4171         if (ethdev_bus_specific_init) {
4172                 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4173                 if (retval) {
4174                         RTE_LOG(ERR, EAL,
4175                                 "ethdev bus specific initialisation failed");
4176                         goto probe_failed;
4177                 }
4178         }
4179
4180         retval = ethdev_init(ethdev, init_params);
4181         if (retval) {
4182                 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
4183                 goto probe_failed;
4184         }
4185
4186         rte_eth_dev_probing_finish(ethdev);
4187
4188         return retval;
4189
4190 probe_failed:
4191         rte_eth_dev_release_port(ethdev);
4192         return retval;
4193 }
4194
4195 int
4196 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4197         ethdev_uninit_t ethdev_uninit)
4198 {
4199         int ret;
4200
4201         ethdev = rte_eth_dev_allocated(ethdev->data->name);
4202         if (!ethdev)
4203                 return -ENODEV;
4204
4205         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4206
4207         ret = ethdev_uninit(ethdev);
4208         if (ret)
4209                 return ret;
4210
4211         return rte_eth_dev_release_port(ethdev);
4212 }
4213
4214 int
4215 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4216                           int epfd, int op, void *data)
4217 {
4218         uint32_t vec;
4219         struct rte_eth_dev *dev;
4220         struct rte_intr_handle *intr_handle;
4221         int rc;
4222
4223         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4224
4225         dev = &rte_eth_devices[port_id];
4226         if (queue_id >= dev->data->nb_rx_queues) {
4227                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4228                 return -EINVAL;
4229         }
4230
4231         if (!dev->intr_handle) {
4232                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4233                 return -ENOTSUP;
4234         }
4235
4236         intr_handle = dev->intr_handle;
4237         if (!intr_handle->intr_vec) {
4238                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4239                 return -EPERM;
4240         }
4241
4242         vec = intr_handle->intr_vec[queue_id];
4243         rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4244         if (rc && rc != -EEXIST) {
4245                 RTE_ETHDEV_LOG(ERR,
4246                         "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4247                         port_id, queue_id, op, epfd, vec);
4248                 return rc;
4249         }
4250
4251         return 0;
4252 }
4253
4254 int
4255 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4256                            uint16_t queue_id)
4257 {
4258         struct rte_eth_dev *dev;
4259
4260         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4261
4262         dev = &rte_eth_devices[port_id];
4263
4264         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4265         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4266                                                                 queue_id));
4267 }
4268
4269 int
4270 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4271                             uint16_t queue_id)
4272 {
4273         struct rte_eth_dev *dev;
4274
4275         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4276
4277         dev = &rte_eth_devices[port_id];
4278
4279         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4280         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4281                                                                 queue_id));
4282 }
4283
4284
4285 int
4286 rte_eth_dev_filter_supported(uint16_t port_id,
4287                              enum rte_filter_type filter_type)
4288 {
4289         struct rte_eth_dev *dev;
4290
4291         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4292
4293         dev = &rte_eth_devices[port_id];
4294         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4295         return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4296                                 RTE_ETH_FILTER_NOP, NULL);
4297 }
4298
4299 int
4300 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4301                         enum rte_filter_op filter_op, void *arg)
4302 {
4303         struct rte_eth_dev *dev;
4304
4305         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4306
4307         dev = &rte_eth_devices[port_id];
4308         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4309         return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4310                                                              filter_op, arg));
4311 }
4312
4313 const struct rte_eth_rxtx_callback *
4314 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4315                 rte_rx_callback_fn fn, void *user_param)
4316 {
4317 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4318         rte_errno = ENOTSUP;
4319         return NULL;
4320 #endif
4321         struct rte_eth_dev *dev;
4322
4323         /* check input parameters */
4324         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4325                     queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4326                 rte_errno = EINVAL;
4327                 return NULL;
4328         }
4329         dev = &rte_eth_devices[port_id];
4330         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4331                 rte_errno = EINVAL;
4332                 return NULL;
4333         }
4334         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4335
4336         if (cb == NULL) {
4337                 rte_errno = ENOMEM;
4338                 return NULL;
4339         }
4340
4341         cb->fn.rx = fn;
4342         cb->param = user_param;
4343
4344         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4345         /* Add the callbacks in fifo order. */
4346         struct rte_eth_rxtx_callback *tail =
4347                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4348
4349         if (!tail) {
4350                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4351
4352         } else {
4353                 while (tail->next)
4354                         tail = tail->next;
4355                 tail->next = cb;
4356         }
4357         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4358
4359         return cb;
4360 }
4361
4362 const struct rte_eth_rxtx_callback *
4363 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4364                 rte_rx_callback_fn fn, void *user_param)
4365 {
4366 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4367         rte_errno = ENOTSUP;
4368         return NULL;
4369 #endif
4370         /* check input parameters */
4371         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4372                 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4373                 rte_errno = EINVAL;
4374                 return NULL;
4375         }
4376
4377         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4378
4379         if (cb == NULL) {
4380                 rte_errno = ENOMEM;
4381                 return NULL;
4382         }
4383
4384         cb->fn.rx = fn;
4385         cb->param = user_param;
4386
4387         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4388         /* Add the callbacks at fisrt position*/
4389         cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4390         rte_smp_wmb();
4391         rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4392         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4393
4394         return cb;
4395 }
4396
4397 const struct rte_eth_rxtx_callback *
4398 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4399                 rte_tx_callback_fn fn, void *user_param)
4400 {
4401 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4402         rte_errno = ENOTSUP;
4403         return NULL;
4404 #endif
4405         struct rte_eth_dev *dev;
4406
4407         /* check input parameters */
4408         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4409                     queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4410                 rte_errno = EINVAL;
4411                 return NULL;
4412         }
4413
4414         dev = &rte_eth_devices[port_id];
4415         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4416                 rte_errno = EINVAL;
4417                 return NULL;
4418         }
4419
4420         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4421
4422         if (cb == NULL) {
4423                 rte_errno = ENOMEM;
4424                 return NULL;
4425         }
4426
4427         cb->fn.tx = fn;
4428         cb->param = user_param;
4429
4430         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4431         /* Add the callbacks in fifo order. */
4432         struct rte_eth_rxtx_callback *tail =
4433                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4434
4435         if (!tail) {
4436                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4437
4438         } else {
4439                 while (tail->next)
4440                         tail = tail->next;
4441                 tail->next = cb;
4442         }
4443         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4444
4445         return cb;
4446 }
4447
4448 int
4449 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4450                 const struct rte_eth_rxtx_callback *user_cb)
4451 {
4452 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4453         return -ENOTSUP;
4454 #endif
4455         /* Check input parameters. */
4456         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4457         if (user_cb == NULL ||
4458                         queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4459                 return -EINVAL;
4460
4461         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4462         struct rte_eth_rxtx_callback *cb;
4463         struct rte_eth_rxtx_callback **prev_cb;
4464         int ret = -EINVAL;
4465
4466         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4467         prev_cb = &dev->post_rx_burst_cbs[queue_id];
4468         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4469                 cb = *prev_cb;
4470                 if (cb == user_cb) {
4471                         /* Remove the user cb from the callback list. */
4472                         *prev_cb = cb->next;
4473                         ret = 0;
4474                         break;
4475                 }
4476         }
4477         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4478
4479         return ret;
4480 }
4481
4482 int
4483 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4484                 const struct rte_eth_rxtx_callback *user_cb)
4485 {
4486 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4487         return -ENOTSUP;
4488 #endif
4489         /* Check input parameters. */
4490         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4491         if (user_cb == NULL ||
4492                         queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4493                 return -EINVAL;
4494
4495         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4496         int ret = -EINVAL;
4497         struct rte_eth_rxtx_callback *cb;
4498         struct rte_eth_rxtx_callback **prev_cb;
4499
4500         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4501         prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4502         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4503                 cb = *prev_cb;
4504                 if (cb == user_cb) {
4505                         /* Remove the user cb from the callback list. */
4506                         *prev_cb = cb->next;
4507                         ret = 0;
4508                         break;
4509                 }
4510         }
4511         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4512
4513         return ret;
4514 }
4515
4516 int
4517 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4518         struct rte_eth_rxq_info *qinfo)
4519 {
4520         struct rte_eth_dev *dev;
4521
4522         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4523
4524         if (qinfo == NULL)
4525                 return -EINVAL;
4526
4527         dev = &rte_eth_devices[port_id];
4528         if (queue_id >= dev->data->nb_rx_queues) {
4529                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4530                 return -EINVAL;
4531         }
4532
4533         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4534                 RTE_ETHDEV_LOG(INFO,
4535                         "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4536                         queue_id, port_id);
4537                 return -EINVAL;
4538         }
4539
4540         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4541
4542         memset(qinfo, 0, sizeof(*qinfo));
4543         dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4544         return 0;
4545 }
4546
4547 int
4548 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4549         struct rte_eth_txq_info *qinfo)
4550 {
4551         struct rte_eth_dev *dev;
4552
4553         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4554
4555         if (qinfo == NULL)
4556                 return -EINVAL;
4557
4558         dev = &rte_eth_devices[port_id];
4559         if (queue_id >= dev->data->nb_tx_queues) {
4560                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4561                 return -EINVAL;
4562         }
4563
4564         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4565                 RTE_ETHDEV_LOG(INFO,
4566                         "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4567                         queue_id, port_id);
4568                 return -EINVAL;
4569         }
4570
4571         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4572
4573         memset(qinfo, 0, sizeof(*qinfo));
4574         dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4575
4576         return 0;
4577 }
4578
4579 int
4580 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4581                           struct rte_eth_burst_mode *mode)
4582 {
4583         struct rte_eth_dev *dev;
4584
4585         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4586
4587         if (mode == NULL)
4588                 return -EINVAL;
4589
4590         dev = &rte_eth_devices[port_id];
4591
4592         if (queue_id >= dev->data->nb_rx_queues) {
4593                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4594                 return -EINVAL;
4595         }
4596
4597         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4598         memset(mode, 0, sizeof(*mode));
4599         return eth_err(port_id,
4600                        dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4601 }
4602
4603 int
4604 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4605                           struct rte_eth_burst_mode *mode)
4606 {
4607         struct rte_eth_dev *dev;
4608
4609         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4610
4611         if (mode == NULL)
4612                 return -EINVAL;
4613
4614         dev = &rte_eth_devices[port_id];
4615
4616         if (queue_id >= dev->data->nb_tx_queues) {
4617                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4618                 return -EINVAL;
4619         }
4620
4621         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4622         memset(mode, 0, sizeof(*mode));
4623         return eth_err(port_id,
4624                        dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4625 }
4626
4627 int
4628 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4629                              struct rte_ether_addr *mc_addr_set,
4630                              uint32_t nb_mc_addr)
4631 {
4632         struct rte_eth_dev *dev;
4633
4634         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4635
4636         dev = &rte_eth_devices[port_id];
4637         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4638         return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4639                                                 mc_addr_set, nb_mc_addr));
4640 }
4641
4642 int
4643 rte_eth_timesync_enable(uint16_t port_id)
4644 {
4645         struct rte_eth_dev *dev;
4646
4647         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4648         dev = &rte_eth_devices[port_id];
4649
4650         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4651         return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4652 }
4653
4654 int
4655 rte_eth_timesync_disable(uint16_t port_id)
4656 {
4657         struct rte_eth_dev *dev;
4658
4659         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4660         dev = &rte_eth_devices[port_id];
4661
4662         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4663         return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4664 }
4665
4666 int
4667 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4668                                    uint32_t flags)
4669 {
4670         struct rte_eth_dev *dev;
4671
4672         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4673         dev = &rte_eth_devices[port_id];
4674
4675         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4676         return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4677                                 (dev, timestamp, flags));
4678 }
4679
4680 int
4681 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4682                                    struct timespec *timestamp)
4683 {
4684         struct rte_eth_dev *dev;
4685
4686         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4687         dev = &rte_eth_devices[port_id];
4688
4689         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4690         return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4691                                 (dev, timestamp));
4692 }
4693
4694 int
4695 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4696 {
4697         struct rte_eth_dev *dev;
4698
4699         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4700         dev = &rte_eth_devices[port_id];
4701
4702         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4703         return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4704                                                                       delta));
4705 }
4706
4707 int
4708 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4709 {
4710         struct rte_eth_dev *dev;
4711
4712         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4713         dev = &rte_eth_devices[port_id];
4714
4715         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4716         return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4717                                                                 timestamp));
4718 }
4719
4720 int
4721 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4722 {
4723         struct rte_eth_dev *dev;
4724
4725         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4726         dev = &rte_eth_devices[port_id];
4727
4728         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4729         return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4730                                                                 timestamp));
4731 }
4732
4733 int
4734 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4735 {
4736         struct rte_eth_dev *dev;
4737
4738         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4739         dev = &rte_eth_devices[port_id];
4740
4741         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4742         return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4743 }
4744
4745 int
4746 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4747 {
4748         struct rte_eth_dev *dev;
4749
4750         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4751
4752         dev = &rte_eth_devices[port_id];
4753         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4754         return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4755 }
4756
4757 int
4758 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4759 {
4760         struct rte_eth_dev *dev;
4761
4762         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4763
4764         dev = &rte_eth_devices[port_id];
4765         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4766         return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4767 }
4768
4769 int
4770 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4771 {
4772         struct rte_eth_dev *dev;
4773
4774         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4775
4776         dev = &rte_eth_devices[port_id];
4777         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4778         return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4779 }
4780
4781 int
4782 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4783 {
4784         struct rte_eth_dev *dev;
4785
4786         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4787
4788         dev = &rte_eth_devices[port_id];
4789         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4790         return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4791 }
4792
4793 int
4794 rte_eth_dev_get_module_info(uint16_t port_id,
4795                             struct rte_eth_dev_module_info *modinfo)
4796 {
4797         struct rte_eth_dev *dev;
4798
4799         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4800
4801         dev = &rte_eth_devices[port_id];
4802         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4803         return (*dev->dev_ops->get_module_info)(dev, modinfo);
4804 }
4805
4806 int
4807 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4808                               struct rte_dev_eeprom_info *info)
4809 {
4810         struct rte_eth_dev *dev;
4811
4812         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4813
4814         dev = &rte_eth_devices[port_id];
4815         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4816         return (*dev->dev_ops->get_module_eeprom)(dev, info);
4817 }
4818
4819 int
4820 rte_eth_dev_get_dcb_info(uint16_t port_id,
4821                              struct rte_eth_dcb_info *dcb_info)
4822 {
4823         struct rte_eth_dev *dev;
4824
4825         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4826
4827         dev = &rte_eth_devices[port_id];
4828         memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4829
4830         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4831         return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4832 }
4833
4834 int
4835 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4836                                     struct rte_eth_l2_tunnel_conf *l2_tunnel)
4837 {
4838         struct rte_eth_dev *dev;
4839
4840         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4841         if (l2_tunnel == NULL) {
4842                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4843                 return -EINVAL;
4844         }
4845
4846         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4847                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4848                 return -EINVAL;
4849         }
4850
4851         dev = &rte_eth_devices[port_id];
4852         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4853                                 -ENOTSUP);
4854         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4855                                                                 l2_tunnel));
4856 }
4857
4858 int
4859 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4860                                   struct rte_eth_l2_tunnel_conf *l2_tunnel,
4861                                   uint32_t mask,
4862                                   uint8_t en)
4863 {
4864         struct rte_eth_dev *dev;
4865
4866         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4867
4868         if (l2_tunnel == NULL) {
4869                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4870                 return -EINVAL;
4871         }
4872
4873         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4874                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4875                 return -EINVAL;
4876         }
4877
4878         if (mask == 0) {
4879                 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4880                 return -EINVAL;
4881         }
4882
4883         dev = &rte_eth_devices[port_id];
4884         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4885                                 -ENOTSUP);
4886         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4887                                                         l2_tunnel, mask, en));
4888 }
4889
4890 static void
4891 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4892                            const struct rte_eth_desc_lim *desc_lim)
4893 {
4894         if (desc_lim->nb_align != 0)
4895                 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4896
4897         if (desc_lim->nb_max != 0)
4898                 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4899
4900         *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4901 }
4902
4903 int
4904 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4905                                  uint16_t *nb_rx_desc,
4906                                  uint16_t *nb_tx_desc)
4907 {
4908         struct rte_eth_dev_info dev_info;
4909         int ret;
4910
4911         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4912
4913         ret = rte_eth_dev_info_get(port_id, &dev_info);
4914         if (ret != 0)
4915                 return ret;
4916
4917         if (nb_rx_desc != NULL)
4918                 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4919
4920         if (nb_tx_desc != NULL)
4921                 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4922
4923         return 0;
4924 }
4925
4926 int
4927 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
4928                                    struct rte_eth_hairpin_cap *cap)
4929 {
4930         struct rte_eth_dev *dev;
4931
4932         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4933
4934         dev = &rte_eth_devices[port_id];
4935         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
4936         memset(cap, 0, sizeof(*cap));
4937         return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
4938 }
4939
4940 int
4941 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4942 {
4943         if (dev->data->rx_queue_state[queue_id] ==
4944             RTE_ETH_QUEUE_STATE_HAIRPIN)
4945                 return 1;
4946         return 0;
4947 }
4948
4949 int
4950 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
4951 {
4952         if (dev->data->tx_queue_state[queue_id] ==
4953             RTE_ETH_QUEUE_STATE_HAIRPIN)
4954                 return 1;
4955         return 0;
4956 }
4957
4958 int
4959 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4960 {
4961         struct rte_eth_dev *dev;
4962
4963         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4964
4965         if (pool == NULL)
4966                 return -EINVAL;
4967
4968         dev = &rte_eth_devices[port_id];
4969
4970         if (*dev->dev_ops->pool_ops_supported == NULL)
4971                 return 1; /* all pools are supported */
4972
4973         return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4974 }
4975
4976 /**
4977  * A set of values to describe the possible states of a switch domain.
4978  */
4979 enum rte_eth_switch_domain_state {
4980         RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4981         RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4982 };
4983
4984 /**
4985  * Array of switch domains available for allocation. Array is sized to
4986  * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4987  * ethdev ports in a single process.
4988  */
4989 static struct rte_eth_dev_switch {
4990         enum rte_eth_switch_domain_state state;
4991 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4992
4993 int
4994 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4995 {
4996         unsigned int i;
4997
4998         *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4999
5000         for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
5001                 i < RTE_MAX_ETHPORTS; i++) {
5002                 if (rte_eth_switch_domains[i].state ==
5003                         RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5004                         rte_eth_switch_domains[i].state =
5005                                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5006                         *domain_id = i;
5007                         return 0;
5008                 }
5009         }
5010
5011         return -ENOSPC;
5012 }
5013
5014 int
5015 rte_eth_switch_domain_free(uint16_t domain_id)
5016 {
5017         if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5018                 domain_id >= RTE_MAX_ETHPORTS)
5019                 return -EINVAL;
5020
5021         if (rte_eth_switch_domains[domain_id].state !=
5022                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5023                 return -EINVAL;
5024
5025         rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5026
5027         return 0;
5028 }
5029
5030 static int
5031 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5032 {
5033         int state;
5034         struct rte_kvargs_pair *pair;
5035         char *letter;
5036
5037         arglist->str = strdup(str_in);
5038         if (arglist->str == NULL)
5039                 return -ENOMEM;
5040
5041         letter = arglist->str;
5042         state = 0;
5043         arglist->count = 0;
5044         pair = &arglist->pairs[0];
5045         while (1) {
5046                 switch (state) {
5047                 case 0: /* Initial */
5048                         if (*letter == '=')
5049                                 return -EINVAL;
5050                         else if (*letter == '\0')
5051                                 return 0;
5052
5053                         state = 1;
5054                         pair->key = letter;
5055                         /* fall-thru */
5056
5057                 case 1: /* Parsing key */
5058                         if (*letter == '=') {
5059                                 *letter = '\0';
5060                                 pair->value = letter + 1;
5061                                 state = 2;
5062                         } else if (*letter == ',' || *letter == '\0')
5063                                 return -EINVAL;
5064                         break;
5065
5066
5067                 case 2: /* Parsing value */
5068                         if (*letter == '[')
5069                                 state = 3;
5070                         else if (*letter == ',') {
5071                                 *letter = '\0';
5072                                 arglist->count++;
5073                                 pair = &arglist->pairs[arglist->count];
5074                                 state = 0;
5075                         } else if (*letter == '\0') {
5076                                 letter--;
5077                                 arglist->count++;
5078                                 pair = &arglist->pairs[arglist->count];
5079                                 state = 0;
5080                         }
5081                         break;
5082
5083                 case 3: /* Parsing list */
5084                         if (*letter == ']')
5085                                 state = 2;
5086                         else if (*letter == '\0')
5087                                 return -EINVAL;
5088                         break;
5089                 }
5090                 letter++;
5091         }
5092 }
5093
5094 int
5095 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5096 {
5097         struct rte_kvargs args;
5098         struct rte_kvargs_pair *pair;
5099         unsigned int i;
5100         int result = 0;
5101
5102         memset(eth_da, 0, sizeof(*eth_da));
5103
5104         result = rte_eth_devargs_tokenise(&args, dargs);
5105         if (result < 0)
5106                 goto parse_cleanup;
5107
5108         for (i = 0; i < args.count; i++) {
5109                 pair = &args.pairs[i];
5110                 if (strcmp("representor", pair->key) == 0) {
5111                         result = rte_eth_devargs_parse_list(pair->value,
5112                                 rte_eth_devargs_parse_representor_ports,
5113                                 eth_da);
5114                         if (result < 0)
5115                                 goto parse_cleanup;
5116                 }
5117         }
5118
5119 parse_cleanup:
5120         if (args.str)
5121                 free(args.str);
5122
5123         return result;
5124 }
5125
5126 RTE_INIT(ethdev_init_log)
5127 {
5128         rte_eth_dev_logtype = rte_log_register("lib.ethdev");
5129         if (rte_eth_dev_logtype >= 0)
5130                 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);
5131 }