1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
39 #include <rte_class.h>
40 #include <rte_ether.h>
41 #include <rte_telemetry.h>
43 #include "rte_ethdev_trace.h"
44 #include "rte_ethdev.h"
45 #include "rte_ethdev_driver.h"
46 #include "ethdev_profile.h"
47 #include "ethdev_private.h"
49 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
50 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
105 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
106 { DEV_RX_OFFLOAD_##_name, #_name }
108 static const struct {
111 } rte_rx_offload_names[] = {
112 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
113 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
114 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
117 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
118 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
119 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
121 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
123 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
124 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
125 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
126 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
127 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
128 RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
129 RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
130 RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
133 #undef RTE_RX_OFFLOAD_BIT2STR
135 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
136 { DEV_TX_OFFLOAD_##_name, #_name }
138 static const struct {
141 } rte_tx_offload_names[] = {
142 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
143 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
147 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
149 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
150 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
151 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
155 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
156 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
157 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
158 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
159 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
160 RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
161 RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
162 RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
163 RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
166 #undef RTE_TX_OFFLOAD_BIT2STR
169 * The user application callback description.
171 * It contains callback address to be registered by user application,
172 * the pointer to the parameters for callback, and the event type.
174 struct rte_eth_dev_callback {
175 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
176 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
177 void *cb_arg; /**< Parameter for callback */
178 void *ret_param; /**< Return parameter */
179 enum rte_eth_event_type event; /**< Interrupt event type */
180 uint32_t active; /**< Callback is executing */
189 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
192 struct rte_devargs devargs = {.args = NULL};
193 const char *bus_param_key;
194 char *bus_str = NULL;
195 char *cls_str = NULL;
198 memset(iter, 0, sizeof(*iter));
201 * The devargs string may use various syntaxes:
202 * - 0000:08:00.0,representor=[1-3]
203 * - pci:0000:06:00.0,representor=[0,5]
204 * - class=eth,mac=00:11:22:33:44:55
205 * A new syntax is in development (not yet supported):
206 * - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
210 * Handle pure class filter (i.e. without any bus-level argument),
211 * from future new syntax.
212 * rte_devargs_parse() is not yet supporting the new syntax,
213 * that's why this simple case is temporarily parsed here.
215 #define iter_anybus_str "class=eth,"
216 if (strncmp(devargs_str, iter_anybus_str,
217 strlen(iter_anybus_str)) == 0) {
218 iter->cls_str = devargs_str + strlen(iter_anybus_str);
222 /* Split bus, device and parameters. */
223 ret = rte_devargs_parse(&devargs, devargs_str);
228 * Assume parameters of old syntax can match only at ethdev level.
229 * Extra parameters will be ignored, thanks to "+" prefix.
231 str_size = strlen(devargs.args) + 2;
232 cls_str = malloc(str_size);
233 if (cls_str == NULL) {
237 ret = snprintf(cls_str, str_size, "+%s", devargs.args);
238 if (ret != str_size - 1) {
242 iter->cls_str = cls_str;
243 free(devargs.args); /* allocated by rte_devargs_parse() */
246 iter->bus = devargs.bus;
247 if (iter->bus->dev_iterate == NULL) {
252 /* Convert bus args to new syntax for use with new API dev_iterate. */
253 if (strcmp(iter->bus->name, "vdev") == 0) {
254 bus_param_key = "name";
255 } else if (strcmp(iter->bus->name, "pci") == 0) {
256 bus_param_key = "addr";
261 str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
262 bus_str = malloc(str_size);
263 if (bus_str == NULL) {
267 ret = snprintf(bus_str, str_size, "%s=%s",
268 bus_param_key, devargs.name);
269 if (ret != str_size - 1) {
273 iter->bus_str = bus_str;
276 iter->cls = rte_class_find_by_name("eth");
281 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
290 rte_eth_iterator_next(struct rte_dev_iterator *iter)
292 if (iter->cls == NULL) /* invalid ethdev iterator */
293 return RTE_MAX_ETHPORTS;
295 do { /* loop to try all matching rte_device */
296 /* If not pure ethdev filter and */
297 if (iter->bus != NULL &&
298 /* not in middle of rte_eth_dev iteration, */
299 iter->class_device == NULL) {
300 /* get next rte_device to try. */
301 iter->device = iter->bus->dev_iterate(
302 iter->device, iter->bus_str, iter);
303 if (iter->device == NULL)
304 break; /* no more rte_device candidate */
306 /* A device is matching bus part, need to check ethdev part. */
307 iter->class_device = iter->cls->dev_iterate(
308 iter->class_device, iter->cls_str, iter);
309 if (iter->class_device != NULL)
310 return eth_dev_to_id(iter->class_device); /* match */
311 } while (iter->bus != NULL); /* need to try next rte_device */
313 /* No more ethdev port to iterate. */
314 rte_eth_iterator_cleanup(iter);
315 return RTE_MAX_ETHPORTS;
319 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
321 if (iter->bus_str == NULL)
322 return; /* nothing to free in pure class filter */
323 free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
324 free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
325 memset(iter, 0, sizeof(*iter));
329 rte_eth_find_next(uint16_t port_id)
331 while (port_id < RTE_MAX_ETHPORTS &&
332 rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
335 if (port_id >= RTE_MAX_ETHPORTS)
336 return RTE_MAX_ETHPORTS;
342 * Macro to iterate over all valid ports for internal usage.
343 * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
345 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
346 for (port_id = rte_eth_find_next(0); \
347 port_id < RTE_MAX_ETHPORTS; \
348 port_id = rte_eth_find_next(port_id + 1))
351 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
353 port_id = rte_eth_find_next(port_id);
354 while (port_id < RTE_MAX_ETHPORTS &&
355 rte_eth_devices[port_id].device != parent)
356 port_id = rte_eth_find_next(port_id + 1);
362 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
364 RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
365 return rte_eth_find_next_of(port_id,
366 rte_eth_devices[ref_port_id].device);
370 rte_eth_dev_shared_data_prepare(void)
372 const unsigned flags = 0;
373 const struct rte_memzone *mz;
375 rte_spinlock_lock(&rte_eth_shared_data_lock);
377 if (rte_eth_dev_shared_data == NULL) {
378 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
379 /* Allocate port data and ownership shared memory. */
380 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
381 sizeof(*rte_eth_dev_shared_data),
382 rte_socket_id(), flags);
384 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
386 rte_panic("Cannot allocate ethdev shared data\n");
388 rte_eth_dev_shared_data = mz->addr;
389 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
390 rte_eth_dev_shared_data->next_owner_id =
391 RTE_ETH_DEV_NO_OWNER + 1;
392 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
393 memset(rte_eth_dev_shared_data->data, 0,
394 sizeof(rte_eth_dev_shared_data->data));
398 rte_spinlock_unlock(&rte_eth_shared_data_lock);
402 is_allocated(const struct rte_eth_dev *ethdev)
404 return ethdev->data->name[0] != '\0';
407 static struct rte_eth_dev *
408 _rte_eth_dev_allocated(const char *name)
412 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
413 if (rte_eth_devices[i].data != NULL &&
414 strcmp(rte_eth_devices[i].data->name, name) == 0)
415 return &rte_eth_devices[i];
421 rte_eth_dev_allocated(const char *name)
423 struct rte_eth_dev *ethdev;
425 rte_eth_dev_shared_data_prepare();
427 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
429 ethdev = _rte_eth_dev_allocated(name);
431 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
437 rte_eth_dev_find_free_port(void)
441 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
442 /* Using shared name field to find a free port. */
443 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
444 RTE_ASSERT(rte_eth_devices[i].state ==
449 return RTE_MAX_ETHPORTS;
452 static struct rte_eth_dev *
453 eth_dev_get(uint16_t port_id)
455 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
457 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
463 rte_eth_dev_allocate(const char *name)
466 struct rte_eth_dev *eth_dev = NULL;
469 name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
471 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
475 if (name_len >= RTE_ETH_NAME_MAX_LEN) {
476 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
480 rte_eth_dev_shared_data_prepare();
482 /* Synchronize port creation between primary and secondary threads. */
483 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
485 if (_rte_eth_dev_allocated(name) != NULL) {
487 "Ethernet device with name %s already allocated\n",
492 port_id = rte_eth_dev_find_free_port();
493 if (port_id == RTE_MAX_ETHPORTS) {
495 "Reached maximum number of Ethernet ports\n");
499 eth_dev = eth_dev_get(port_id);
500 strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
501 eth_dev->data->port_id = port_id;
502 eth_dev->data->mtu = RTE_ETHER_MTU;
505 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
511 * Attach to a port already registered by the primary process, which
512 * makes sure that the same device would have the same port id both
513 * in the primary and secondary process.
516 rte_eth_dev_attach_secondary(const char *name)
519 struct rte_eth_dev *eth_dev = NULL;
521 rte_eth_dev_shared_data_prepare();
523 /* Synchronize port attachment to primary port creation and release. */
524 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
526 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
527 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
530 if (i == RTE_MAX_ETHPORTS) {
532 "Device %s is not driven by the primary process\n",
535 eth_dev = eth_dev_get(i);
536 RTE_ASSERT(eth_dev->data->port_id == i);
539 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
544 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
549 rte_eth_dev_shared_data_prepare();
551 if (eth_dev->state != RTE_ETH_DEV_UNUSED)
552 rte_eth_dev_callback_process(eth_dev,
553 RTE_ETH_EVENT_DESTROY, NULL);
555 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
557 eth_dev->state = RTE_ETH_DEV_UNUSED;
558 eth_dev->device = NULL;
559 eth_dev->intr_handle = NULL;
561 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
562 rte_free(eth_dev->data->rx_queues);
563 rte_free(eth_dev->data->tx_queues);
564 rte_free(eth_dev->data->mac_addrs);
565 rte_free(eth_dev->data->hash_mac_addrs);
566 rte_free(eth_dev->data->dev_private);
567 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
570 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
576 rte_eth_dev_is_valid_port(uint16_t port_id)
578 if (port_id >= RTE_MAX_ETHPORTS ||
579 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
586 rte_eth_is_valid_owner_id(uint64_t owner_id)
588 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
589 rte_eth_dev_shared_data->next_owner_id <= owner_id)
595 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
597 port_id = rte_eth_find_next(port_id);
598 while (port_id < RTE_MAX_ETHPORTS &&
599 rte_eth_devices[port_id].data->owner.id != owner_id)
600 port_id = rte_eth_find_next(port_id + 1);
606 rte_eth_dev_owner_new(uint64_t *owner_id)
608 rte_eth_dev_shared_data_prepare();
610 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
612 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
614 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
619 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
620 const struct rte_eth_dev_owner *new_owner)
622 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
623 struct rte_eth_dev_owner *port_owner;
625 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
626 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
631 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
632 !rte_eth_is_valid_owner_id(old_owner_id)) {
634 "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
635 old_owner_id, new_owner->id);
639 port_owner = &rte_eth_devices[port_id].data->owner;
640 if (port_owner->id != old_owner_id) {
642 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
643 port_id, port_owner->name, port_owner->id);
647 /* can not truncate (same structure) */
648 strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
650 port_owner->id = new_owner->id;
652 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
653 port_id, new_owner->name, new_owner->id);
659 rte_eth_dev_owner_set(const uint16_t port_id,
660 const struct rte_eth_dev_owner *owner)
664 rte_eth_dev_shared_data_prepare();
666 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
668 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
670 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
675 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
677 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
678 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
681 rte_eth_dev_shared_data_prepare();
683 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
685 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
687 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
692 rte_eth_dev_owner_delete(const uint64_t owner_id)
697 rte_eth_dev_shared_data_prepare();
699 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
701 if (rte_eth_is_valid_owner_id(owner_id)) {
702 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
703 if (rte_eth_devices[port_id].data->owner.id == owner_id)
704 memset(&rte_eth_devices[port_id].data->owner, 0,
705 sizeof(struct rte_eth_dev_owner));
706 RTE_ETHDEV_LOG(NOTICE,
707 "All port owners owned by %016"PRIx64" identifier have removed\n",
711 "Invalid owner id=%016"PRIx64"\n",
716 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
722 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
725 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
727 rte_eth_dev_shared_data_prepare();
729 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
731 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
732 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
736 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
739 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
744 rte_eth_dev_socket_id(uint16_t port_id)
746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
747 return rte_eth_devices[port_id].data->numa_node;
751 rte_eth_dev_get_sec_ctx(uint16_t port_id)
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
754 return rte_eth_devices[port_id].security_ctx;
758 rte_eth_dev_count_avail(void)
765 RTE_ETH_FOREACH_DEV(p)
772 rte_eth_dev_count_total(void)
774 uint16_t port, count = 0;
776 RTE_ETH_FOREACH_VALID_DEV(port)
783 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
787 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
790 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
794 /* shouldn't check 'rte_eth_devices[i].data',
795 * because it might be overwritten by VDEV PMD */
796 tmp = rte_eth_dev_shared_data->data[port_id].name;
802 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
807 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
811 RTE_ETH_FOREACH_VALID_DEV(pid)
812 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
821 eth_err(uint16_t port_id, int ret)
825 if (rte_eth_dev_is_removed(port_id))
831 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
833 uint16_t old_nb_queues = dev->data->nb_rx_queues;
837 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
838 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
839 sizeof(dev->data->rx_queues[0]) * nb_queues,
840 RTE_CACHE_LINE_SIZE);
841 if (dev->data->rx_queues == NULL) {
842 dev->data->nb_rx_queues = 0;
845 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
846 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
848 rxq = dev->data->rx_queues;
850 for (i = nb_queues; i < old_nb_queues; i++)
851 (*dev->dev_ops->rx_queue_release)(rxq[i]);
852 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
853 RTE_CACHE_LINE_SIZE);
856 if (nb_queues > old_nb_queues) {
857 uint16_t new_qs = nb_queues - old_nb_queues;
859 memset(rxq + old_nb_queues, 0,
860 sizeof(rxq[0]) * new_qs);
863 dev->data->rx_queues = rxq;
865 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
866 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
868 rxq = dev->data->rx_queues;
870 for (i = nb_queues; i < old_nb_queues; i++)
871 (*dev->dev_ops->rx_queue_release)(rxq[i]);
873 rte_free(dev->data->rx_queues);
874 dev->data->rx_queues = NULL;
876 dev->data->nb_rx_queues = nb_queues;
881 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
883 struct rte_eth_dev *dev;
885 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
887 dev = &rte_eth_devices[port_id];
888 if (!dev->data->dev_started) {
890 "Port %u must be started before start any queue\n",
895 if (rx_queue_id >= dev->data->nb_rx_queues) {
896 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
902 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
904 "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
905 rx_queue_id, port_id);
909 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
911 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
912 rx_queue_id, port_id);
916 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
922 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
924 struct rte_eth_dev *dev;
926 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
928 dev = &rte_eth_devices[port_id];
929 if (rx_queue_id >= dev->data->nb_rx_queues) {
930 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
934 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
936 if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
938 "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
939 rx_queue_id, port_id);
943 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
945 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
946 rx_queue_id, port_id);
950 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
955 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
957 struct rte_eth_dev *dev;
959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
961 dev = &rte_eth_devices[port_id];
962 if (!dev->data->dev_started) {
964 "Port %u must be started before start any queue\n",
969 if (tx_queue_id >= dev->data->nb_tx_queues) {
970 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
974 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
976 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
978 "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
979 tx_queue_id, port_id);
983 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
985 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
986 tx_queue_id, port_id);
990 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
994 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
996 struct rte_eth_dev *dev;
998 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1000 dev = &rte_eth_devices[port_id];
1001 if (tx_queue_id >= dev->data->nb_tx_queues) {
1002 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1006 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1008 if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1009 RTE_ETHDEV_LOG(INFO,
1010 "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1011 tx_queue_id, port_id);
1015 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1016 RTE_ETHDEV_LOG(INFO,
1017 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1018 tx_queue_id, port_id);
1022 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1027 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1029 uint16_t old_nb_queues = dev->data->nb_tx_queues;
1033 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1034 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1035 sizeof(dev->data->tx_queues[0]) * nb_queues,
1036 RTE_CACHE_LINE_SIZE);
1037 if (dev->data->tx_queues == NULL) {
1038 dev->data->nb_tx_queues = 0;
1041 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1044 txq = dev->data->tx_queues;
1046 for (i = nb_queues; i < old_nb_queues; i++)
1047 (*dev->dev_ops->tx_queue_release)(txq[i]);
1048 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1049 RTE_CACHE_LINE_SIZE);
1052 if (nb_queues > old_nb_queues) {
1053 uint16_t new_qs = nb_queues - old_nb_queues;
1055 memset(txq + old_nb_queues, 0,
1056 sizeof(txq[0]) * new_qs);
1059 dev->data->tx_queues = txq;
1061 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1064 txq = dev->data->tx_queues;
1066 for (i = nb_queues; i < old_nb_queues; i++)
1067 (*dev->dev_ops->tx_queue_release)(txq[i]);
1069 rte_free(dev->data->tx_queues);
1070 dev->data->tx_queues = NULL;
1072 dev->data->nb_tx_queues = nb_queues;
1077 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1080 case ETH_SPEED_NUM_10M:
1081 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1082 case ETH_SPEED_NUM_100M:
1083 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1084 case ETH_SPEED_NUM_1G:
1085 return ETH_LINK_SPEED_1G;
1086 case ETH_SPEED_NUM_2_5G:
1087 return ETH_LINK_SPEED_2_5G;
1088 case ETH_SPEED_NUM_5G:
1089 return ETH_LINK_SPEED_5G;
1090 case ETH_SPEED_NUM_10G:
1091 return ETH_LINK_SPEED_10G;
1092 case ETH_SPEED_NUM_20G:
1093 return ETH_LINK_SPEED_20G;
1094 case ETH_SPEED_NUM_25G:
1095 return ETH_LINK_SPEED_25G;
1096 case ETH_SPEED_NUM_40G:
1097 return ETH_LINK_SPEED_40G;
1098 case ETH_SPEED_NUM_50G:
1099 return ETH_LINK_SPEED_50G;
1100 case ETH_SPEED_NUM_56G:
1101 return ETH_LINK_SPEED_56G;
1102 case ETH_SPEED_NUM_100G:
1103 return ETH_LINK_SPEED_100G;
1104 case ETH_SPEED_NUM_200G:
1105 return ETH_LINK_SPEED_200G;
1112 rte_eth_dev_rx_offload_name(uint64_t offload)
1114 const char *name = "UNKNOWN";
1117 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1118 if (offload == rte_rx_offload_names[i].offload) {
1119 name = rte_rx_offload_names[i].name;
1128 rte_eth_dev_tx_offload_name(uint64_t offload)
1130 const char *name = "UNKNOWN";
1133 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1134 if (offload == rte_tx_offload_names[i].offload) {
1135 name = rte_tx_offload_names[i].name;
1144 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1145 uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1149 if (dev_info_size == 0) {
1150 if (config_size != max_rx_pkt_len) {
1151 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1152 " %u != %u is not allowed\n",
1153 port_id, config_size, max_rx_pkt_len);
1156 } else if (config_size > dev_info_size) {
1157 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1158 "> max allowed value %u\n", port_id, config_size,
1161 } else if (config_size < RTE_ETHER_MIN_LEN) {
1162 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1163 "< min allowed value %u\n", port_id, config_size,
1164 (unsigned int)RTE_ETHER_MIN_LEN);
1171 * Validate offloads that are requested through rte_eth_dev_configure against
1172 * the offloads successfully set by the ethernet device.
1175 * The port identifier of the Ethernet device.
1176 * @param req_offloads
1177 * The offloads that have been requested through `rte_eth_dev_configure`.
1178 * @param set_offloads
1179 * The offloads successfully set by the ethernet device.
1180 * @param offload_type
1181 * The offload type i.e. Rx/Tx string.
1182 * @param offload_name
1183 * The function that prints the offload name.
1185 * - (0) if validation successful.
1186 * - (-EINVAL) if requested offload has been silently disabled.
1190 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1191 uint64_t set_offloads, const char *offload_type,
1192 const char *(*offload_name)(uint64_t))
1194 uint64_t offloads_diff = req_offloads ^ set_offloads;
1198 while (offloads_diff != 0) {
1199 /* Check if any offload is requested but not enabled. */
1200 offload = 1ULL << __builtin_ctzll(offloads_diff);
1201 if (offload & req_offloads) {
1203 "Port %u failed to enable %s offload %s\n",
1204 port_id, offload_type, offload_name(offload));
1208 /* Check if offload couldn't be disabled. */
1209 if (offload & set_offloads) {
1210 RTE_ETHDEV_LOG(DEBUG,
1211 "Port %u %s offload %s is not requested but enabled\n",
1212 port_id, offload_type, offload_name(offload));
1215 offloads_diff &= ~offload;
1222 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1223 const struct rte_eth_conf *dev_conf)
1225 struct rte_eth_dev *dev;
1226 struct rte_eth_dev_info dev_info;
1227 struct rte_eth_conf orig_conf;
1231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1233 dev = &rte_eth_devices[port_id];
1235 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1237 if (dev->data->dev_started) {
1239 "Port %u must be stopped to allow configuration\n",
1244 /* Store original config, as rollback required on failure */
1245 memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1248 * Copy the dev_conf parameter into the dev structure.
1249 * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1251 if (dev_conf != &dev->data->dev_conf)
1252 memcpy(&dev->data->dev_conf, dev_conf,
1253 sizeof(dev->data->dev_conf));
1255 ret = rte_eth_dev_info_get(port_id, &dev_info);
1259 /* If number of queues specified by application for both Rx and Tx is
1260 * zero, use driver preferred values. This cannot be done individually
1261 * as it is valid for either Tx or Rx (but not both) to be zero.
1262 * If driver does not provide any preferred valued, fall back on
1265 if (nb_rx_q == 0 && nb_tx_q == 0) {
1266 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1268 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1269 nb_tx_q = dev_info.default_txportconf.nb_queues;
1271 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1274 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1276 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1277 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1282 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1284 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1285 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1291 * Check that the numbers of RX and TX queues are not greater
1292 * than the maximum number of RX and TX queues supported by the
1293 * configured device.
1295 if (nb_rx_q > dev_info.max_rx_queues) {
1296 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1297 port_id, nb_rx_q, dev_info.max_rx_queues);
1302 if (nb_tx_q > dev_info.max_tx_queues) {
1303 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1304 port_id, nb_tx_q, dev_info.max_tx_queues);
1309 /* Check that the device supports requested interrupts */
1310 if ((dev_conf->intr_conf.lsc == 1) &&
1311 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1312 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1313 dev->device->driver->name);
1317 if ((dev_conf->intr_conf.rmv == 1) &&
1318 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1319 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1320 dev->device->driver->name);
1326 * If jumbo frames are enabled, check that the maximum RX packet
1327 * length is supported by the configured device.
1329 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1330 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1332 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1333 port_id, dev_conf->rxmode.max_rx_pkt_len,
1334 dev_info.max_rx_pktlen);
1337 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1339 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1340 port_id, dev_conf->rxmode.max_rx_pkt_len,
1341 (unsigned int)RTE_ETHER_MIN_LEN);
1346 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1347 dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1348 /* Use default value */
1349 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1354 * If LRO is enabled, check that the maximum aggregated packet
1355 * size is supported by the configured device.
1357 if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1358 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1359 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1360 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1361 ret = check_lro_pkt_size(port_id,
1362 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1363 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1364 dev_info.max_lro_pkt_size);
1369 /* Any requested offloading must be within its device capabilities */
1370 if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1371 dev_conf->rxmode.offloads) {
1373 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1374 "capabilities 0x%"PRIx64" in %s()\n",
1375 port_id, dev_conf->rxmode.offloads,
1376 dev_info.rx_offload_capa,
1381 if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1382 dev_conf->txmode.offloads) {
1384 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1385 "capabilities 0x%"PRIx64" in %s()\n",
1386 port_id, dev_conf->txmode.offloads,
1387 dev_info.tx_offload_capa,
1393 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1394 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1396 /* Check that device supports requested rss hash functions. */
1397 if ((dev_info.flow_type_rss_offloads |
1398 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1399 dev_info.flow_type_rss_offloads) {
1401 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1402 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1403 dev_info.flow_type_rss_offloads);
1408 /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1409 if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1410 (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1412 "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1414 rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1420 * Setup new number of RX/TX queues and reconfigure device.
1422 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1425 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1431 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1434 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1436 rte_eth_dev_rx_queue_config(dev, 0);
1441 diag = (*dev->dev_ops->dev_configure)(dev);
1443 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1445 ret = eth_err(port_id, diag);
1449 /* Initialize Rx profiling if enabled at compilation time. */
1450 diag = __rte_eth_dev_profile_init(port_id, dev);
1452 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1454 ret = eth_err(port_id, diag);
1458 /* Validate Rx offloads. */
1459 diag = validate_offloads(port_id,
1460 dev_conf->rxmode.offloads,
1461 dev->data->dev_conf.rxmode.offloads, "Rx",
1462 rte_eth_dev_rx_offload_name);
1468 /* Validate Tx offloads. */
1469 diag = validate_offloads(port_id,
1470 dev_conf->txmode.offloads,
1471 dev->data->dev_conf.txmode.offloads, "Tx",
1472 rte_eth_dev_tx_offload_name);
1478 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1481 rte_eth_dev_rx_queue_config(dev, 0);
1482 rte_eth_dev_tx_queue_config(dev, 0);
1484 memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1486 rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1491 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1493 if (dev->data->dev_started) {
1494 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1495 dev->data->port_id);
1499 rte_eth_dev_rx_queue_config(dev, 0);
1500 rte_eth_dev_tx_queue_config(dev, 0);
1502 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1506 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1507 struct rte_eth_dev_info *dev_info)
1509 struct rte_ether_addr *addr;
1514 /* replay MAC address configuration including default MAC */
1515 addr = &dev->data->mac_addrs[0];
1516 if (*dev->dev_ops->mac_addr_set != NULL)
1517 (*dev->dev_ops->mac_addr_set)(dev, addr);
1518 else if (*dev->dev_ops->mac_addr_add != NULL)
1519 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1521 if (*dev->dev_ops->mac_addr_add != NULL) {
1522 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1523 addr = &dev->data->mac_addrs[i];
1525 /* skip zero address */
1526 if (rte_is_zero_ether_addr(addr))
1530 pool_mask = dev->data->mac_pool_sel[i];
1533 if (pool_mask & 1ULL)
1534 (*dev->dev_ops->mac_addr_add)(dev,
1538 } while (pool_mask);
1544 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1545 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1549 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1550 rte_eth_dev_mac_restore(dev, dev_info);
1552 /* replay promiscuous configuration */
1554 * use callbacks directly since we don't need port_id check and
1555 * would like to bypass the same value set
1557 if (rte_eth_promiscuous_get(port_id) == 1 &&
1558 *dev->dev_ops->promiscuous_enable != NULL) {
1559 ret = eth_err(port_id,
1560 (*dev->dev_ops->promiscuous_enable)(dev));
1561 if (ret != 0 && ret != -ENOTSUP) {
1563 "Failed to enable promiscuous mode for device (port %u): %s\n",
1564 port_id, rte_strerror(-ret));
1567 } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1568 *dev->dev_ops->promiscuous_disable != NULL) {
1569 ret = eth_err(port_id,
1570 (*dev->dev_ops->promiscuous_disable)(dev));
1571 if (ret != 0 && ret != -ENOTSUP) {
1573 "Failed to disable promiscuous mode for device (port %u): %s\n",
1574 port_id, rte_strerror(-ret));
1579 /* replay all multicast configuration */
1581 * use callbacks directly since we don't need port_id check and
1582 * would like to bypass the same value set
1584 if (rte_eth_allmulticast_get(port_id) == 1 &&
1585 *dev->dev_ops->allmulticast_enable != NULL) {
1586 ret = eth_err(port_id,
1587 (*dev->dev_ops->allmulticast_enable)(dev));
1588 if (ret != 0 && ret != -ENOTSUP) {
1590 "Failed to enable allmulticast mode for device (port %u): %s\n",
1591 port_id, rte_strerror(-ret));
1594 } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1595 *dev->dev_ops->allmulticast_disable != NULL) {
1596 ret = eth_err(port_id,
1597 (*dev->dev_ops->allmulticast_disable)(dev));
1598 if (ret != 0 && ret != -ENOTSUP) {
1600 "Failed to disable allmulticast mode for device (port %u): %s\n",
1601 port_id, rte_strerror(-ret));
1610 rte_eth_dev_start(uint16_t port_id)
1612 struct rte_eth_dev *dev;
1613 struct rte_eth_dev_info dev_info;
1617 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1619 dev = &rte_eth_devices[port_id];
1621 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1623 if (dev->data->dev_started != 0) {
1624 RTE_ETHDEV_LOG(INFO,
1625 "Device with port_id=%"PRIu16" already started\n",
1630 ret = rte_eth_dev_info_get(port_id, &dev_info);
1634 /* Lets restore MAC now if device does not support live change */
1635 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1636 rte_eth_dev_mac_restore(dev, &dev_info);
1638 diag = (*dev->dev_ops->dev_start)(dev);
1640 dev->data->dev_started = 1;
1642 return eth_err(port_id, diag);
1644 ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1647 "Error during restoring configuration for device (port %u): %s\n",
1648 port_id, rte_strerror(-ret));
1649 rte_eth_dev_stop(port_id);
1653 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1655 (*dev->dev_ops->link_update)(dev, 0);
1658 rte_ethdev_trace_start(port_id);
1663 rte_eth_dev_stop(uint16_t port_id)
1665 struct rte_eth_dev *dev;
1667 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1668 dev = &rte_eth_devices[port_id];
1670 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1672 if (dev->data->dev_started == 0) {
1673 RTE_ETHDEV_LOG(INFO,
1674 "Device with port_id=%"PRIu16" already stopped\n",
1679 dev->data->dev_started = 0;
1680 (*dev->dev_ops->dev_stop)(dev);
1681 rte_ethdev_trace_stop(port_id);
1685 rte_eth_dev_set_link_up(uint16_t port_id)
1687 struct rte_eth_dev *dev;
1689 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1691 dev = &rte_eth_devices[port_id];
1693 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1694 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1698 rte_eth_dev_set_link_down(uint16_t port_id)
1700 struct rte_eth_dev *dev;
1702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1704 dev = &rte_eth_devices[port_id];
1706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1707 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1711 rte_eth_dev_close(uint16_t port_id)
1713 struct rte_eth_dev *dev;
1715 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1716 dev = &rte_eth_devices[port_id];
1718 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1719 dev->data->dev_started = 0;
1720 (*dev->dev_ops->dev_close)(dev);
1722 rte_ethdev_trace_close(port_id);
1723 rte_eth_dev_release_port(dev);
1727 rte_eth_dev_reset(uint16_t port_id)
1729 struct rte_eth_dev *dev;
1732 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1733 dev = &rte_eth_devices[port_id];
1735 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1737 rte_eth_dev_stop(port_id);
1738 ret = dev->dev_ops->dev_reset(dev);
1740 return eth_err(port_id, ret);
1744 rte_eth_dev_is_removed(uint16_t port_id)
1746 struct rte_eth_dev *dev;
1749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1751 dev = &rte_eth_devices[port_id];
1753 if (dev->state == RTE_ETH_DEV_REMOVED)
1756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1758 ret = dev->dev_ops->is_removed(dev);
1760 /* Device is physically removed. */
1761 dev->state = RTE_ETH_DEV_REMOVED;
1767 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1768 uint16_t nb_rx_desc, unsigned int socket_id,
1769 const struct rte_eth_rxconf *rx_conf,
1770 struct rte_mempool *mp)
1773 uint32_t mbp_buf_size;
1774 struct rte_eth_dev *dev;
1775 struct rte_eth_dev_info dev_info;
1776 struct rte_eth_rxconf local_conf;
1779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1781 dev = &rte_eth_devices[port_id];
1782 if (rx_queue_id >= dev->data->nb_rx_queues) {
1783 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1788 RTE_ETHDEV_LOG(ERR, "Invalid null mempool pointer\n");
1792 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1795 * Check the size of the mbuf data buffer.
1796 * This value must be provided in the private data of the memory pool.
1797 * First check that the memory pool has a valid private data.
1799 ret = rte_eth_dev_info_get(port_id, &dev_info);
1803 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1804 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1805 mp->name, (int)mp->private_data_size,
1806 (int)sizeof(struct rte_pktmbuf_pool_private));
1809 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1811 if (mbp_buf_size < dev_info.min_rx_bufsize + RTE_PKTMBUF_HEADROOM) {
1813 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1814 mp->name, (int)mbp_buf_size,
1815 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1816 (int)RTE_PKTMBUF_HEADROOM,
1817 (int)dev_info.min_rx_bufsize);
1821 /* Use default specified by driver, if nb_rx_desc is zero */
1822 if (nb_rx_desc == 0) {
1823 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1824 /* If driver default is also zero, fall back on EAL default */
1825 if (nb_rx_desc == 0)
1826 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1829 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1830 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1831 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1834 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1835 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1836 dev_info.rx_desc_lim.nb_min,
1837 dev_info.rx_desc_lim.nb_align);
1841 if (dev->data->dev_started &&
1842 !(dev_info.dev_capa &
1843 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1846 if (dev->data->dev_started &&
1847 (dev->data->rx_queue_state[rx_queue_id] !=
1848 RTE_ETH_QUEUE_STATE_STOPPED))
1851 rxq = dev->data->rx_queues;
1852 if (rxq[rx_queue_id]) {
1853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1855 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1856 rxq[rx_queue_id] = NULL;
1859 if (rx_conf == NULL)
1860 rx_conf = &dev_info.default_rxconf;
1862 local_conf = *rx_conf;
1865 * If an offloading has already been enabled in
1866 * rte_eth_dev_configure(), it has been enabled on all queues,
1867 * so there is no need to enable it in this queue again.
1868 * The local_conf.offloads input to underlying PMD only carries
1869 * those offloadings which are only enabled on this queue and
1870 * not enabled on all queues.
1872 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1875 * New added offloadings for this queue are those not enabled in
1876 * rte_eth_dev_configure() and they must be per-queue type.
1877 * A pure per-port offloading can't be enabled on a queue while
1878 * disabled on another queue. A pure per-port offloading can't
1879 * be enabled for any queue as new added one if it hasn't been
1880 * enabled in rte_eth_dev_configure().
1882 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1883 local_conf.offloads) {
1885 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1886 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
1887 port_id, rx_queue_id, local_conf.offloads,
1888 dev_info.rx_queue_offload_capa,
1894 * If LRO is enabled, check that the maximum aggregated packet
1895 * size is supported by the configured device.
1897 if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1898 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
1899 dev->data->dev_conf.rxmode.max_lro_pkt_size =
1900 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1901 int ret = check_lro_pkt_size(port_id,
1902 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1903 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1904 dev_info.max_lro_pkt_size);
1909 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1910 socket_id, &local_conf, mp);
1912 if (!dev->data->min_rx_buf_size ||
1913 dev->data->min_rx_buf_size > mbp_buf_size)
1914 dev->data->min_rx_buf_size = mbp_buf_size;
1917 rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
1919 return eth_err(port_id, ret);
1923 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1924 uint16_t nb_rx_desc,
1925 const struct rte_eth_hairpin_conf *conf)
1928 struct rte_eth_dev *dev;
1929 struct rte_eth_hairpin_cap cap;
1934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1936 dev = &rte_eth_devices[port_id];
1937 if (rx_queue_id >= dev->data->nb_rx_queues) {
1938 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1941 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
1944 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
1946 /* if nb_rx_desc is zero use max number of desc from the driver. */
1947 if (nb_rx_desc == 0)
1948 nb_rx_desc = cap.max_nb_desc;
1949 if (nb_rx_desc > cap.max_nb_desc) {
1951 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
1952 nb_rx_desc, cap.max_nb_desc);
1955 if (conf->peer_count > cap.max_rx_2_tx) {
1957 "Invalid value for number of peers for Rx queue(=%hu), should be: <= %hu",
1958 conf->peer_count, cap.max_rx_2_tx);
1961 if (conf->peer_count == 0) {
1963 "Invalid value for number of peers for Rx queue(=%hu), should be: > 0",
1967 for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
1968 cap.max_nb_queues != UINT16_MAX; i++) {
1969 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
1972 if (count > cap.max_nb_queues) {
1973 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
1977 if (dev->data->dev_started)
1979 rxq = dev->data->rx_queues;
1980 if (rxq[rx_queue_id] != NULL) {
1981 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1983 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1984 rxq[rx_queue_id] = NULL;
1986 ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
1989 dev->data->rx_queue_state[rx_queue_id] =
1990 RTE_ETH_QUEUE_STATE_HAIRPIN;
1991 return eth_err(port_id, ret);
1995 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1996 uint16_t nb_tx_desc, unsigned int socket_id,
1997 const struct rte_eth_txconf *tx_conf)
1999 struct rte_eth_dev *dev;
2000 struct rte_eth_dev_info dev_info;
2001 struct rte_eth_txconf local_conf;
2005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2007 dev = &rte_eth_devices[port_id];
2008 if (tx_queue_id >= dev->data->nb_tx_queues) {
2009 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2013 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2015 ret = rte_eth_dev_info_get(port_id, &dev_info);
2019 /* Use default specified by driver, if nb_tx_desc is zero */
2020 if (nb_tx_desc == 0) {
2021 nb_tx_desc = dev_info.default_txportconf.ring_size;
2022 /* If driver default is zero, fall back on EAL default */
2023 if (nb_tx_desc == 0)
2024 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2026 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2027 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2028 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2030 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2031 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2032 dev_info.tx_desc_lim.nb_min,
2033 dev_info.tx_desc_lim.nb_align);
2037 if (dev->data->dev_started &&
2038 !(dev_info.dev_capa &
2039 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2042 if (dev->data->dev_started &&
2043 (dev->data->tx_queue_state[tx_queue_id] !=
2044 RTE_ETH_QUEUE_STATE_STOPPED))
2047 txq = dev->data->tx_queues;
2048 if (txq[tx_queue_id]) {
2049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2051 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2052 txq[tx_queue_id] = NULL;
2055 if (tx_conf == NULL)
2056 tx_conf = &dev_info.default_txconf;
2058 local_conf = *tx_conf;
2061 * If an offloading has already been enabled in
2062 * rte_eth_dev_configure(), it has been enabled on all queues,
2063 * so there is no need to enable it in this queue again.
2064 * The local_conf.offloads input to underlying PMD only carries
2065 * those offloadings which are only enabled on this queue and
2066 * not enabled on all queues.
2068 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2071 * New added offloadings for this queue are those not enabled in
2072 * rte_eth_dev_configure() and they must be per-queue type.
2073 * A pure per-port offloading can't be enabled on a queue while
2074 * disabled on another queue. A pure per-port offloading can't
2075 * be enabled for any queue as new added one if it hasn't been
2076 * enabled in rte_eth_dev_configure().
2078 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2079 local_conf.offloads) {
2081 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2082 "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2083 port_id, tx_queue_id, local_conf.offloads,
2084 dev_info.tx_queue_offload_capa,
2089 rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2090 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2091 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2095 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2096 uint16_t nb_tx_desc,
2097 const struct rte_eth_hairpin_conf *conf)
2099 struct rte_eth_dev *dev;
2100 struct rte_eth_hairpin_cap cap;
2106 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2107 dev = &rte_eth_devices[port_id];
2108 if (tx_queue_id >= dev->data->nb_tx_queues) {
2109 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2112 ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2117 /* if nb_rx_desc is zero use max number of desc from the driver. */
2118 if (nb_tx_desc == 0)
2119 nb_tx_desc = cap.max_nb_desc;
2120 if (nb_tx_desc > cap.max_nb_desc) {
2122 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2123 nb_tx_desc, cap.max_nb_desc);
2126 if (conf->peer_count > cap.max_tx_2_rx) {
2128 "Invalid value for number of peers for Tx queue(=%hu), should be: <= %hu",
2129 conf->peer_count, cap.max_tx_2_rx);
2132 if (conf->peer_count == 0) {
2134 "Invalid value for number of peers for Tx queue(=%hu), should be: > 0",
2138 for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2139 cap.max_nb_queues != UINT16_MAX; i++) {
2140 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2143 if (count > cap.max_nb_queues) {
2144 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2148 if (dev->data->dev_started)
2150 txq = dev->data->tx_queues;
2151 if (txq[tx_queue_id] != NULL) {
2152 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2154 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2155 txq[tx_queue_id] = NULL;
2157 ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2158 (dev, tx_queue_id, nb_tx_desc, conf);
2160 dev->data->tx_queue_state[tx_queue_id] =
2161 RTE_ETH_QUEUE_STATE_HAIRPIN;
2162 return eth_err(port_id, ret);
2166 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2167 void *userdata __rte_unused)
2171 for (i = 0; i < unsent; i++)
2172 rte_pktmbuf_free(pkts[i]);
2176 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2179 uint64_t *count = userdata;
2182 for (i = 0; i < unsent; i++)
2183 rte_pktmbuf_free(pkts[i]);
2189 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2190 buffer_tx_error_fn cbfn, void *userdata)
2192 buffer->error_callback = cbfn;
2193 buffer->error_userdata = userdata;
2198 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2205 buffer->size = size;
2206 if (buffer->error_callback == NULL) {
2207 ret = rte_eth_tx_buffer_set_err_callback(
2208 buffer, rte_eth_tx_buffer_drop_callback, NULL);
2215 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2217 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2220 /* Validate Input Data. Bail if not valid or not supported. */
2221 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2222 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2224 /* Call driver to free pending mbufs. */
2225 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2227 return eth_err(port_id, ret);
2231 rte_eth_promiscuous_enable(uint16_t port_id)
2233 struct rte_eth_dev *dev;
2236 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2237 dev = &rte_eth_devices[port_id];
2239 if (dev->data->promiscuous == 1)
2242 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2244 diag = (*dev->dev_ops->promiscuous_enable)(dev);
2245 dev->data->promiscuous = (diag == 0) ? 1 : 0;
2247 return eth_err(port_id, diag);
2251 rte_eth_promiscuous_disable(uint16_t port_id)
2253 struct rte_eth_dev *dev;
2256 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2257 dev = &rte_eth_devices[port_id];
2259 if (dev->data->promiscuous == 0)
2262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2264 dev->data->promiscuous = 0;
2265 diag = (*dev->dev_ops->promiscuous_disable)(dev);
2267 dev->data->promiscuous = 1;
2269 return eth_err(port_id, diag);
2273 rte_eth_promiscuous_get(uint16_t port_id)
2275 struct rte_eth_dev *dev;
2277 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2279 dev = &rte_eth_devices[port_id];
2280 return dev->data->promiscuous;
2284 rte_eth_allmulticast_enable(uint16_t port_id)
2286 struct rte_eth_dev *dev;
2289 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2290 dev = &rte_eth_devices[port_id];
2292 if (dev->data->all_multicast == 1)
2295 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2296 diag = (*dev->dev_ops->allmulticast_enable)(dev);
2297 dev->data->all_multicast = (diag == 0) ? 1 : 0;
2299 return eth_err(port_id, diag);
2303 rte_eth_allmulticast_disable(uint16_t port_id)
2305 struct rte_eth_dev *dev;
2308 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2309 dev = &rte_eth_devices[port_id];
2311 if (dev->data->all_multicast == 0)
2314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2315 dev->data->all_multicast = 0;
2316 diag = (*dev->dev_ops->allmulticast_disable)(dev);
2318 dev->data->all_multicast = 1;
2320 return eth_err(port_id, diag);
2324 rte_eth_allmulticast_get(uint16_t port_id)
2326 struct rte_eth_dev *dev;
2328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2330 dev = &rte_eth_devices[port_id];
2331 return dev->data->all_multicast;
2335 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2337 struct rte_eth_dev *dev;
2339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2340 dev = &rte_eth_devices[port_id];
2342 if (dev->data->dev_conf.intr_conf.lsc &&
2343 dev->data->dev_started)
2344 rte_eth_linkstatus_get(dev, eth_link);
2346 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2347 (*dev->dev_ops->link_update)(dev, 1);
2348 *eth_link = dev->data->dev_link;
2355 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2357 struct rte_eth_dev *dev;
2359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2360 dev = &rte_eth_devices[port_id];
2362 if (dev->data->dev_conf.intr_conf.lsc &&
2363 dev->data->dev_started)
2364 rte_eth_linkstatus_get(dev, eth_link);
2366 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2367 (*dev->dev_ops->link_update)(dev, 0);
2368 *eth_link = dev->data->dev_link;
2375 rte_eth_link_speed_to_str(uint32_t link_speed)
2377 switch (link_speed) {
2378 case ETH_SPEED_NUM_NONE: return "None";
2379 case ETH_SPEED_NUM_10M: return "10 Mbps";
2380 case ETH_SPEED_NUM_100M: return "100 Mbps";
2381 case ETH_SPEED_NUM_1G: return "1 Gbps";
2382 case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2383 case ETH_SPEED_NUM_5G: return "5 Gbps";
2384 case ETH_SPEED_NUM_10G: return "10 Gbps";
2385 case ETH_SPEED_NUM_20G: return "20 Gbps";
2386 case ETH_SPEED_NUM_25G: return "25 Gbps";
2387 case ETH_SPEED_NUM_40G: return "40 Gbps";
2388 case ETH_SPEED_NUM_50G: return "50 Gbps";
2389 case ETH_SPEED_NUM_56G: return "56 Gbps";
2390 case ETH_SPEED_NUM_100G: return "100 Gbps";
2391 case ETH_SPEED_NUM_200G: return "200 Gbps";
2392 case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2393 default: return "Invalid";
2398 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2400 if (eth_link->link_status == ETH_LINK_DOWN)
2401 return snprintf(str, len, "Link down");
2403 return snprintf(str, len, "Link up at %s %s %s",
2404 rte_eth_link_speed_to_str(eth_link->link_speed),
2405 (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2407 (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2408 "Autoneg" : "Fixed");
2412 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2414 struct rte_eth_dev *dev;
2416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2418 dev = &rte_eth_devices[port_id];
2419 memset(stats, 0, sizeof(*stats));
2421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2422 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2423 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2427 rte_eth_stats_reset(uint16_t port_id)
2429 struct rte_eth_dev *dev;
2432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 dev = &rte_eth_devices[port_id];
2435 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2436 ret = (*dev->dev_ops->stats_reset)(dev);
2438 return eth_err(port_id, ret);
2440 dev->data->rx_mbuf_alloc_failed = 0;
2446 get_xstats_basic_count(struct rte_eth_dev *dev)
2448 uint16_t nb_rxqs, nb_txqs;
2451 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2452 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2454 count = RTE_NB_STATS;
2455 count += nb_rxqs * RTE_NB_RXQ_STATS;
2456 count += nb_txqs * RTE_NB_TXQ_STATS;
2462 get_xstats_count(uint16_t port_id)
2464 struct rte_eth_dev *dev;
2467 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2468 dev = &rte_eth_devices[port_id];
2469 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2470 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2473 return eth_err(port_id, count);
2475 if (dev->dev_ops->xstats_get_names != NULL) {
2476 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2478 return eth_err(port_id, count);
2483 count += get_xstats_basic_count(dev);
2489 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2492 int cnt_xstats, idx_xstat;
2494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2497 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2502 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2507 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2508 if (cnt_xstats < 0) {
2509 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2513 /* Get id-name lookup table */
2514 struct rte_eth_xstat_name xstats_names[cnt_xstats];
2516 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2517 port_id, xstats_names, cnt_xstats, NULL)) {
2518 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2522 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2523 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2532 /* retrieve basic stats names */
2534 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2535 struct rte_eth_xstat_name *xstats_names)
2537 int cnt_used_entries = 0;
2538 uint32_t idx, id_queue;
2541 for (idx = 0; idx < RTE_NB_STATS; idx++) {
2542 strlcpy(xstats_names[cnt_used_entries].name,
2543 rte_stats_strings[idx].name,
2544 sizeof(xstats_names[0].name));
2547 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2548 for (id_queue = 0; id_queue < num_q; id_queue++) {
2549 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2550 snprintf(xstats_names[cnt_used_entries].name,
2551 sizeof(xstats_names[0].name),
2553 id_queue, rte_rxq_stats_strings[idx].name);
2558 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2559 for (id_queue = 0; id_queue < num_q; id_queue++) {
2560 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2561 snprintf(xstats_names[cnt_used_entries].name,
2562 sizeof(xstats_names[0].name),
2564 id_queue, rte_txq_stats_strings[idx].name);
2568 return cnt_used_entries;
2571 /* retrieve ethdev extended statistics names */
2573 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2574 struct rte_eth_xstat_name *xstats_names, unsigned int size,
2577 struct rte_eth_xstat_name *xstats_names_copy;
2578 unsigned int no_basic_stat_requested = 1;
2579 unsigned int no_ext_stat_requested = 1;
2580 unsigned int expected_entries;
2581 unsigned int basic_count;
2582 struct rte_eth_dev *dev;
2586 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2587 dev = &rte_eth_devices[port_id];
2589 basic_count = get_xstats_basic_count(dev);
2590 ret = get_xstats_count(port_id);
2593 expected_entries = (unsigned int)ret;
2595 /* Return max number of stats if no ids given */
2598 return expected_entries;
2599 else if (xstats_names && size < expected_entries)
2600 return expected_entries;
2603 if (ids && !xstats_names)
2606 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2607 uint64_t ids_copy[size];
2609 for (i = 0; i < size; i++) {
2610 if (ids[i] < basic_count) {
2611 no_basic_stat_requested = 0;
2616 * Convert ids to xstats ids that PMD knows.
2617 * ids known by user are basic + extended stats.
2619 ids_copy[i] = ids[i] - basic_count;
2622 if (no_basic_stat_requested)
2623 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2624 xstats_names, ids_copy, size);
2627 /* Retrieve all stats */
2629 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2631 if (num_stats < 0 || num_stats > (int)expected_entries)
2634 return expected_entries;
2637 xstats_names_copy = calloc(expected_entries,
2638 sizeof(struct rte_eth_xstat_name));
2640 if (!xstats_names_copy) {
2641 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2646 for (i = 0; i < size; i++) {
2647 if (ids[i] >= basic_count) {
2648 no_ext_stat_requested = 0;
2654 /* Fill xstats_names_copy structure */
2655 if (ids && no_ext_stat_requested) {
2656 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2658 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2661 free(xstats_names_copy);
2667 for (i = 0; i < size; i++) {
2668 if (ids[i] >= expected_entries) {
2669 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2670 free(xstats_names_copy);
2673 xstats_names[i] = xstats_names_copy[ids[i]];
2676 free(xstats_names_copy);
2681 rte_eth_xstats_get_names(uint16_t port_id,
2682 struct rte_eth_xstat_name *xstats_names,
2685 struct rte_eth_dev *dev;
2686 int cnt_used_entries;
2687 int cnt_expected_entries;
2688 int cnt_driver_entries;
2690 cnt_expected_entries = get_xstats_count(port_id);
2691 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2692 (int)size < cnt_expected_entries)
2693 return cnt_expected_entries;
2695 /* port_id checked in get_xstats_count() */
2696 dev = &rte_eth_devices[port_id];
2698 cnt_used_entries = rte_eth_basic_stats_get_names(
2701 if (dev->dev_ops->xstats_get_names != NULL) {
2702 /* If there are any driver-specific xstats, append them
2705 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2707 xstats_names + cnt_used_entries,
2708 size - cnt_used_entries);
2709 if (cnt_driver_entries < 0)
2710 return eth_err(port_id, cnt_driver_entries);
2711 cnt_used_entries += cnt_driver_entries;
2714 return cnt_used_entries;
2719 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2721 struct rte_eth_dev *dev;
2722 struct rte_eth_stats eth_stats;
2723 unsigned int count = 0, i, q;
2724 uint64_t val, *stats_ptr;
2725 uint16_t nb_rxqs, nb_txqs;
2728 ret = rte_eth_stats_get(port_id, ð_stats);
2732 dev = &rte_eth_devices[port_id];
2734 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2735 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2738 for (i = 0; i < RTE_NB_STATS; i++) {
2739 stats_ptr = RTE_PTR_ADD(ð_stats,
2740 rte_stats_strings[i].offset);
2742 xstats[count++].value = val;
2746 for (q = 0; q < nb_rxqs; q++) {
2747 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2748 stats_ptr = RTE_PTR_ADD(ð_stats,
2749 rte_rxq_stats_strings[i].offset +
2750 q * sizeof(uint64_t));
2752 xstats[count++].value = val;
2757 for (q = 0; q < nb_txqs; q++) {
2758 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2759 stats_ptr = RTE_PTR_ADD(ð_stats,
2760 rte_txq_stats_strings[i].offset +
2761 q * sizeof(uint64_t));
2763 xstats[count++].value = val;
2769 /* retrieve ethdev extended statistics */
2771 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2772 uint64_t *values, unsigned int size)
2774 unsigned int no_basic_stat_requested = 1;
2775 unsigned int no_ext_stat_requested = 1;
2776 unsigned int num_xstats_filled;
2777 unsigned int basic_count;
2778 uint16_t expected_entries;
2779 struct rte_eth_dev *dev;
2783 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2784 ret = get_xstats_count(port_id);
2787 expected_entries = (uint16_t)ret;
2788 struct rte_eth_xstat xstats[expected_entries];
2789 dev = &rte_eth_devices[port_id];
2790 basic_count = get_xstats_basic_count(dev);
2792 /* Return max number of stats if no ids given */
2795 return expected_entries;
2796 else if (values && size < expected_entries)
2797 return expected_entries;
2803 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2804 unsigned int basic_count = get_xstats_basic_count(dev);
2805 uint64_t ids_copy[size];
2807 for (i = 0; i < size; i++) {
2808 if (ids[i] < basic_count) {
2809 no_basic_stat_requested = 0;
2814 * Convert ids to xstats ids that PMD knows.
2815 * ids known by user are basic + extended stats.
2817 ids_copy[i] = ids[i] - basic_count;
2820 if (no_basic_stat_requested)
2821 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2826 for (i = 0; i < size; i++) {
2827 if (ids[i] >= basic_count) {
2828 no_ext_stat_requested = 0;
2834 /* Fill the xstats structure */
2835 if (ids && no_ext_stat_requested)
2836 ret = rte_eth_basic_stats_get(port_id, xstats);
2838 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2842 num_xstats_filled = (unsigned int)ret;
2844 /* Return all stats */
2846 for (i = 0; i < num_xstats_filled; i++)
2847 values[i] = xstats[i].value;
2848 return expected_entries;
2852 for (i = 0; i < size; i++) {
2853 if (ids[i] >= expected_entries) {
2854 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2857 values[i] = xstats[ids[i]].value;
2863 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2866 struct rte_eth_dev *dev;
2867 unsigned int count = 0, i;
2868 signed int xcount = 0;
2869 uint16_t nb_rxqs, nb_txqs;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2874 dev = &rte_eth_devices[port_id];
2876 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2877 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2879 /* Return generic statistics */
2880 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2881 (nb_txqs * RTE_NB_TXQ_STATS);
2883 /* implemented by the driver */
2884 if (dev->dev_ops->xstats_get != NULL) {
2885 /* Retrieve the xstats from the driver at the end of the
2888 xcount = (*dev->dev_ops->xstats_get)(dev,
2889 xstats ? xstats + count : NULL,
2890 (n > count) ? n - count : 0);
2893 return eth_err(port_id, xcount);
2896 if (n < count + xcount || xstats == NULL)
2897 return count + xcount;
2899 /* now fill the xstats structure */
2900 ret = rte_eth_basic_stats_get(port_id, xstats);
2905 for (i = 0; i < count; i++)
2907 /* add an offset to driver-specific stats */
2908 for ( ; i < count + xcount; i++)
2909 xstats[i].id += count;
2911 return count + xcount;
2914 /* reset ethdev extended statistics */
2916 rte_eth_xstats_reset(uint16_t port_id)
2918 struct rte_eth_dev *dev;
2920 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2921 dev = &rte_eth_devices[port_id];
2923 /* implemented by the driver */
2924 if (dev->dev_ops->xstats_reset != NULL)
2925 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
2927 /* fallback to default */
2928 return rte_eth_stats_reset(port_id);
2932 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2935 struct rte_eth_dev *dev;
2937 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 dev = &rte_eth_devices[port_id];
2941 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2943 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2946 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2949 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2952 return (*dev->dev_ops->queue_stats_mapping_set)
2953 (dev, queue_id, stat_idx, is_rx);
2958 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2961 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2962 stat_idx, STAT_QMAP_TX));
2967 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2970 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2971 stat_idx, STAT_QMAP_RX));
2975 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2977 struct rte_eth_dev *dev;
2979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2980 dev = &rte_eth_devices[port_id];
2982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2983 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2984 fw_version, fw_size));
2988 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2990 struct rte_eth_dev *dev;
2991 const struct rte_eth_desc_lim lim = {
2992 .nb_max = UINT16_MAX,
2995 .nb_seg_max = UINT16_MAX,
2996 .nb_mtu_seg_max = UINT16_MAX,
3001 * Init dev_info before port_id check since caller does not have
3002 * return status and does not know if get is successful or not.
3004 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3005 dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3008 dev = &rte_eth_devices[port_id];
3010 dev_info->rx_desc_lim = lim;
3011 dev_info->tx_desc_lim = lim;
3012 dev_info->device = dev->device;
3013 dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3014 dev_info->max_mtu = UINT16_MAX;
3016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3017 diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3019 /* Cleanup already filled in device information */
3020 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3021 return eth_err(port_id, diag);
3024 /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3025 dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3026 RTE_MAX_QUEUES_PER_PORT);
3027 dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3028 RTE_MAX_QUEUES_PER_PORT);
3030 dev_info->driver_name = dev->device->driver->name;
3031 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3032 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3034 dev_info->dev_flags = &dev->data->dev_flags;
3040 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3041 uint32_t *ptypes, int num)
3044 struct rte_eth_dev *dev;
3045 const uint32_t *all_ptypes;
3047 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3048 dev = &rte_eth_devices[port_id];
3049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3050 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3055 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3056 if (all_ptypes[i] & ptype_mask) {
3058 ptypes[j] = all_ptypes[i];
3066 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3067 uint32_t *set_ptypes, unsigned int num)
3069 const uint32_t valid_ptype_masks[] = {
3073 RTE_PTYPE_TUNNEL_MASK,
3074 RTE_PTYPE_INNER_L2_MASK,
3075 RTE_PTYPE_INNER_L3_MASK,
3076 RTE_PTYPE_INNER_L4_MASK,
3078 const uint32_t *all_ptypes;
3079 struct rte_eth_dev *dev;
3080 uint32_t unused_mask;
3084 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3085 dev = &rte_eth_devices[port_id];
3087 if (num > 0 && set_ptypes == NULL)
3090 if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3091 *dev->dev_ops->dev_ptypes_set == NULL) {
3096 if (ptype_mask == 0) {
3097 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3102 unused_mask = ptype_mask;
3103 for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3104 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3105 if (mask && mask != valid_ptype_masks[i]) {
3109 unused_mask &= ~valid_ptype_masks[i];
3117 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3118 if (all_ptypes == NULL) {
3124 * Accommodate as many set_ptypes as possible. If the supplied
3125 * set_ptypes array is insufficient fill it partially.
3127 for (i = 0, j = 0; set_ptypes != NULL &&
3128 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3129 if (ptype_mask & all_ptypes[i]) {
3131 set_ptypes[j] = all_ptypes[i];
3139 if (set_ptypes != NULL && j < num)
3140 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3142 return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3146 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3152 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3154 struct rte_eth_dev *dev;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3157 dev = &rte_eth_devices[port_id];
3158 rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3164 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3166 struct rte_eth_dev *dev;
3168 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3170 dev = &rte_eth_devices[port_id];
3171 *mtu = dev->data->mtu;
3176 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3179 struct rte_eth_dev_info dev_info;
3180 struct rte_eth_dev *dev;
3182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3183 dev = &rte_eth_devices[port_id];
3184 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3187 * Check if the device supports dev_infos_get, if it does not
3188 * skip min_mtu/max_mtu validation here as this requires values
3189 * that are populated within the call to rte_eth_dev_info_get()
3190 * which relies on dev->dev_ops->dev_infos_get.
3192 if (*dev->dev_ops->dev_infos_get != NULL) {
3193 ret = rte_eth_dev_info_get(port_id, &dev_info);
3197 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3201 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3203 dev->data->mtu = mtu;
3205 return eth_err(port_id, ret);
3209 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3211 struct rte_eth_dev *dev;
3214 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3215 dev = &rte_eth_devices[port_id];
3216 if (!(dev->data->dev_conf.rxmode.offloads &
3217 DEV_RX_OFFLOAD_VLAN_FILTER)) {
3218 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3223 if (vlan_id > 4095) {
3224 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3228 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3230 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3232 struct rte_vlan_filter_conf *vfc;
3236 vfc = &dev->data->vlan_filter_conf;
3237 vidx = vlan_id / 64;
3238 vbit = vlan_id % 64;
3241 vfc->ids[vidx] |= UINT64_C(1) << vbit;
3243 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3246 return eth_err(port_id, ret);
3250 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3253 struct rte_eth_dev *dev;
3255 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3256 dev = &rte_eth_devices[port_id];
3257 if (rx_queue_id >= dev->data->nb_rx_queues) {
3258 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3263 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3269 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3270 enum rte_vlan_type vlan_type,
3273 struct rte_eth_dev *dev;
3275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3276 dev = &rte_eth_devices[port_id];
3277 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3279 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3284 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3286 struct rte_eth_dev_info dev_info;
3287 struct rte_eth_dev *dev;
3291 uint64_t orig_offloads;
3292 uint64_t dev_offloads;
3293 uint64_t new_offloads;
3295 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3296 dev = &rte_eth_devices[port_id];
3298 /* save original values in case of failure */
3299 orig_offloads = dev->data->dev_conf.rxmode.offloads;
3300 dev_offloads = orig_offloads;
3302 /* check which option changed by application */
3303 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3304 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3307 dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3309 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3310 mask |= ETH_VLAN_STRIP_MASK;
3313 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3314 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3317 dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3319 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3320 mask |= ETH_VLAN_FILTER_MASK;
3323 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3324 org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3327 dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3329 dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3330 mask |= ETH_VLAN_EXTEND_MASK;
3333 cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3334 org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3337 dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3339 dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3340 mask |= ETH_QINQ_STRIP_MASK;
3347 ret = rte_eth_dev_info_get(port_id, &dev_info);
3351 /* Rx VLAN offloading must be within its device capabilities */
3352 if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3353 new_offloads = dev_offloads & ~orig_offloads;
3355 "Ethdev port_id=%u requested new added VLAN offloads "
3356 "0x%" PRIx64 " must be within Rx offloads capabilities "
3357 "0x%" PRIx64 " in %s()\n",
3358 port_id, new_offloads, dev_info.rx_offload_capa,
3363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3364 dev->data->dev_conf.rxmode.offloads = dev_offloads;
3365 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3367 /* hit an error restore original values */
3368 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3371 return eth_err(port_id, ret);
3375 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3377 struct rte_eth_dev *dev;
3378 uint64_t *dev_offloads;
3381 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3382 dev = &rte_eth_devices[port_id];
3383 dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3385 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3386 ret |= ETH_VLAN_STRIP_OFFLOAD;
3388 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3389 ret |= ETH_VLAN_FILTER_OFFLOAD;
3391 if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3392 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3394 if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3395 ret |= ETH_QINQ_STRIP_OFFLOAD;
3401 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3403 struct rte_eth_dev *dev;
3405 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3406 dev = &rte_eth_devices[port_id];
3407 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3409 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3413 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3415 struct rte_eth_dev *dev;
3417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3418 dev = &rte_eth_devices[port_id];
3419 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3420 memset(fc_conf, 0, sizeof(*fc_conf));
3421 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3425 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3427 struct rte_eth_dev *dev;
3429 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3430 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3431 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3435 dev = &rte_eth_devices[port_id];
3436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3437 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3441 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3442 struct rte_eth_pfc_conf *pfc_conf)
3444 struct rte_eth_dev *dev;
3446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3447 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3448 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3452 dev = &rte_eth_devices[port_id];
3453 /* High water, low water validation are device specific */
3454 if (*dev->dev_ops->priority_flow_ctrl_set)
3455 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3461 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3469 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3470 for (i = 0; i < num; i++) {
3471 if (reta_conf[i].mask)
3479 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3483 uint16_t i, idx, shift;
3489 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3493 for (i = 0; i < reta_size; i++) {
3494 idx = i / RTE_RETA_GROUP_SIZE;
3495 shift = i % RTE_RETA_GROUP_SIZE;
3496 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3497 (reta_conf[idx].reta[shift] >= max_rxq)) {
3499 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3501 reta_conf[idx].reta[shift], max_rxq);
3510 rte_eth_dev_rss_reta_update(uint16_t port_id,
3511 struct rte_eth_rss_reta_entry64 *reta_conf,
3514 struct rte_eth_dev *dev;
3517 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3518 /* Check mask bits */
3519 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3523 dev = &rte_eth_devices[port_id];
3525 /* Check entry value */
3526 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3527 dev->data->nb_rx_queues);
3531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3532 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3537 rte_eth_dev_rss_reta_query(uint16_t port_id,
3538 struct rte_eth_rss_reta_entry64 *reta_conf,
3541 struct rte_eth_dev *dev;
3544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3546 /* Check mask bits */
3547 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3551 dev = &rte_eth_devices[port_id];
3552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3553 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3558 rte_eth_dev_rss_hash_update(uint16_t port_id,
3559 struct rte_eth_rss_conf *rss_conf)
3561 struct rte_eth_dev *dev;
3562 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3567 ret = rte_eth_dev_info_get(port_id, &dev_info);
3571 rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3573 dev = &rte_eth_devices[port_id];
3574 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3575 dev_info.flow_type_rss_offloads) {
3577 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3578 port_id, rss_conf->rss_hf,
3579 dev_info.flow_type_rss_offloads);
3582 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3583 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3588 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3589 struct rte_eth_rss_conf *rss_conf)
3591 struct rte_eth_dev *dev;
3593 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3594 dev = &rte_eth_devices[port_id];
3595 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3596 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3601 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3602 struct rte_eth_udp_tunnel *udp_tunnel)
3604 struct rte_eth_dev *dev;
3606 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3607 if (udp_tunnel == NULL) {
3608 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3612 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3613 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3617 dev = &rte_eth_devices[port_id];
3618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3619 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3624 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3625 struct rte_eth_udp_tunnel *udp_tunnel)
3627 struct rte_eth_dev *dev;
3629 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3630 dev = &rte_eth_devices[port_id];
3632 if (udp_tunnel == NULL) {
3633 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3637 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3638 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3642 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3643 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3648 rte_eth_led_on(uint16_t port_id)
3650 struct rte_eth_dev *dev;
3652 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3653 dev = &rte_eth_devices[port_id];
3654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3655 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3659 rte_eth_led_off(uint16_t port_id)
3661 struct rte_eth_dev *dev;
3663 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3664 dev = &rte_eth_devices[port_id];
3665 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3666 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3670 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3674 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3676 struct rte_eth_dev_info dev_info;
3677 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3681 ret = rte_eth_dev_info_get(port_id, &dev_info);
3685 for (i = 0; i < dev_info.max_mac_addrs; i++)
3686 if (memcmp(addr, &dev->data->mac_addrs[i],
3687 RTE_ETHER_ADDR_LEN) == 0)
3693 static const struct rte_ether_addr null_mac_addr;
3696 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3699 struct rte_eth_dev *dev;
3704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3705 dev = &rte_eth_devices[port_id];
3706 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3708 if (rte_is_zero_ether_addr(addr)) {
3709 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3713 if (pool >= ETH_64_POOLS) {
3714 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3718 index = get_mac_addr_index(port_id, addr);
3720 index = get_mac_addr_index(port_id, &null_mac_addr);
3722 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3727 pool_mask = dev->data->mac_pool_sel[index];
3729 /* Check if both MAC address and pool is already there, and do nothing */
3730 if (pool_mask & (1ULL << pool))
3735 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3738 /* Update address in NIC data structure */
3739 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
3741 /* Update pool bitmap in NIC data structure */
3742 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3745 return eth_err(port_id, ret);
3749 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
3751 struct rte_eth_dev *dev;
3754 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3755 dev = &rte_eth_devices[port_id];
3756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3758 index = get_mac_addr_index(port_id, addr);
3761 "Port %u: Cannot remove default MAC address\n",
3764 } else if (index < 0)
3765 return 0; /* Do nothing if address wasn't found */
3768 (*dev->dev_ops->mac_addr_remove)(dev, index);
3770 /* Update address in NIC data structure */
3771 rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3773 /* reset pool bitmap */
3774 dev->data->mac_pool_sel[index] = 0;
3780 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
3782 struct rte_eth_dev *dev;
3785 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3787 if (!rte_is_valid_assigned_ether_addr(addr))
3790 dev = &rte_eth_devices[port_id];
3791 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3793 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3797 /* Update default address in NIC data structure */
3798 rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3805 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3809 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3811 struct rte_eth_dev_info dev_info;
3812 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3816 ret = rte_eth_dev_info_get(port_id, &dev_info);
3820 if (!dev->data->hash_mac_addrs)
3823 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3824 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3825 RTE_ETHER_ADDR_LEN) == 0)
3832 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
3837 struct rte_eth_dev *dev;
3839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3841 dev = &rte_eth_devices[port_id];
3842 if (rte_is_zero_ether_addr(addr)) {
3843 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3848 index = get_hash_mac_addr_index(port_id, addr);
3849 /* Check if it's already there, and do nothing */
3850 if ((index >= 0) && on)
3856 "Port %u: the MAC address was not set in UTA\n",
3861 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3863 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3870 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3872 /* Update address in NIC data structure */
3874 rte_ether_addr_copy(addr,
3875 &dev->data->hash_mac_addrs[index]);
3877 rte_ether_addr_copy(&null_mac_addr,
3878 &dev->data->hash_mac_addrs[index]);
3881 return eth_err(port_id, ret);
3885 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3887 struct rte_eth_dev *dev;
3889 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3891 dev = &rte_eth_devices[port_id];
3893 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3894 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3898 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3901 struct rte_eth_dev *dev;
3902 struct rte_eth_dev_info dev_info;
3903 struct rte_eth_link link;
3906 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3908 ret = rte_eth_dev_info_get(port_id, &dev_info);
3912 dev = &rte_eth_devices[port_id];
3913 link = dev->data->dev_link;
3915 if (queue_idx > dev_info.max_tx_queues) {
3917 "Set queue rate limit:port %u: invalid queue id=%u\n",
3918 port_id, queue_idx);
3922 if (tx_rate > link.link_speed) {
3924 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3925 tx_rate, link.link_speed);
3929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3930 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3931 queue_idx, tx_rate));
3935 rte_eth_mirror_rule_set(uint16_t port_id,
3936 struct rte_eth_mirror_conf *mirror_conf,
3937 uint8_t rule_id, uint8_t on)
3939 struct rte_eth_dev *dev;
3941 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3942 if (mirror_conf->rule_type == 0) {
3943 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3947 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3948 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3953 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3954 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3955 (mirror_conf->pool_mask == 0)) {
3957 "Invalid mirror pool, pool mask can not be 0\n");
3961 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3962 mirror_conf->vlan.vlan_mask == 0) {
3964 "Invalid vlan mask, vlan mask can not be 0\n");
3968 dev = &rte_eth_devices[port_id];
3969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3971 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3972 mirror_conf, rule_id, on));
3976 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3978 struct rte_eth_dev *dev;
3980 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3982 dev = &rte_eth_devices[port_id];
3983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3985 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3989 RTE_INIT(eth_dev_init_cb_lists)
3993 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3994 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3998 rte_eth_dev_callback_register(uint16_t port_id,
3999 enum rte_eth_event_type event,
4000 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4002 struct rte_eth_dev *dev;
4003 struct rte_eth_dev_callback *user_cb;
4004 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4010 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4011 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4015 if (port_id == RTE_ETH_ALL) {
4017 last_port = RTE_MAX_ETHPORTS - 1;
4019 next_port = last_port = port_id;
4022 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4025 dev = &rte_eth_devices[next_port];
4027 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4028 if (user_cb->cb_fn == cb_fn &&
4029 user_cb->cb_arg == cb_arg &&
4030 user_cb->event == event) {
4035 /* create a new callback. */
4036 if (user_cb == NULL) {
4037 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4038 sizeof(struct rte_eth_dev_callback), 0);
4039 if (user_cb != NULL) {
4040 user_cb->cb_fn = cb_fn;
4041 user_cb->cb_arg = cb_arg;
4042 user_cb->event = event;
4043 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4046 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4047 rte_eth_dev_callback_unregister(port_id, event,
4053 } while (++next_port <= last_port);
4055 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4060 rte_eth_dev_callback_unregister(uint16_t port_id,
4061 enum rte_eth_event_type event,
4062 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4065 struct rte_eth_dev *dev;
4066 struct rte_eth_dev_callback *cb, *next;
4067 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4073 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4074 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4078 if (port_id == RTE_ETH_ALL) {
4080 last_port = RTE_MAX_ETHPORTS - 1;
4082 next_port = last_port = port_id;
4085 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4088 dev = &rte_eth_devices[next_port];
4090 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4093 next = TAILQ_NEXT(cb, next);
4095 if (cb->cb_fn != cb_fn || cb->event != event ||
4096 (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4100 * if this callback is not executing right now,
4103 if (cb->active == 0) {
4104 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4110 } while (++next_port <= last_port);
4112 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4117 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4118 enum rte_eth_event_type event, void *ret_param)
4120 struct rte_eth_dev_callback *cb_lst;
4121 struct rte_eth_dev_callback dev_cb;
4124 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4125 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4126 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4130 if (ret_param != NULL)
4131 dev_cb.ret_param = ret_param;
4133 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4134 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4135 dev_cb.cb_arg, dev_cb.ret_param);
4136 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4139 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4144 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4149 rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4151 dev->state = RTE_ETH_DEV_ATTACHED;
4155 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4158 struct rte_eth_dev *dev;
4159 struct rte_intr_handle *intr_handle;
4163 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4165 dev = &rte_eth_devices[port_id];
4167 if (!dev->intr_handle) {
4168 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4172 intr_handle = dev->intr_handle;
4173 if (!intr_handle->intr_vec) {
4174 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4178 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4179 vec = intr_handle->intr_vec[qid];
4180 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4181 if (rc && rc != -EEXIST) {
4183 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4184 port_id, qid, op, epfd, vec);
4192 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4194 struct rte_intr_handle *intr_handle;
4195 struct rte_eth_dev *dev;
4196 unsigned int efd_idx;
4200 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4202 dev = &rte_eth_devices[port_id];
4204 if (queue_id >= dev->data->nb_rx_queues) {
4205 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4209 if (!dev->intr_handle) {
4210 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4214 intr_handle = dev->intr_handle;
4215 if (!intr_handle->intr_vec) {
4216 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4220 vec = intr_handle->intr_vec[queue_id];
4221 efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4222 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4223 fd = intr_handle->efds[efd_idx];
4229 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4230 const char *ring_name)
4232 return snprintf(name, len, "eth_p%d_q%d_%s",
4233 port_id, queue_id, ring_name);
4236 const struct rte_memzone *
4237 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4238 uint16_t queue_id, size_t size, unsigned align,
4241 char z_name[RTE_MEMZONE_NAMESIZE];
4242 const struct rte_memzone *mz;
4245 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4246 queue_id, ring_name);
4247 if (rc >= RTE_MEMZONE_NAMESIZE) {
4248 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4249 rte_errno = ENAMETOOLONG;
4253 mz = rte_memzone_lookup(z_name);
4255 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4257 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4259 "memzone %s does not justify the requested attributes\n",
4267 return rte_memzone_reserve_aligned(z_name, size, socket_id,
4268 RTE_MEMZONE_IOVA_CONTIG, align);
4272 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4275 char z_name[RTE_MEMZONE_NAMESIZE];
4276 const struct rte_memzone *mz;
4279 rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4280 queue_id, ring_name);
4281 if (rc >= RTE_MEMZONE_NAMESIZE) {
4282 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4283 return -ENAMETOOLONG;
4286 mz = rte_memzone_lookup(z_name);
4288 rc = rte_memzone_free(mz);
4296 rte_eth_dev_create(struct rte_device *device, const char *name,
4297 size_t priv_data_size,
4298 ethdev_bus_specific_init ethdev_bus_specific_init,
4299 void *bus_init_params,
4300 ethdev_init_t ethdev_init, void *init_params)
4302 struct rte_eth_dev *ethdev;
4305 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4307 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4308 ethdev = rte_eth_dev_allocate(name);
4312 if (priv_data_size) {
4313 ethdev->data->dev_private = rte_zmalloc_socket(
4314 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4317 if (!ethdev->data->dev_private) {
4319 "failed to allocate private data\n");
4325 ethdev = rte_eth_dev_attach_secondary(name);
4328 "secondary process attach failed, ethdev doesn't exist\n");
4333 ethdev->device = device;
4335 if (ethdev_bus_specific_init) {
4336 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4339 "ethdev bus specific initialisation failed\n");
4344 retval = ethdev_init(ethdev, init_params);
4346 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4350 rte_eth_dev_probing_finish(ethdev);
4355 rte_eth_dev_release_port(ethdev);
4360 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4361 ethdev_uninit_t ethdev_uninit)
4365 ethdev = rte_eth_dev_allocated(ethdev->data->name);
4369 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4371 ret = ethdev_uninit(ethdev);
4375 return rte_eth_dev_release_port(ethdev);
4379 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4380 int epfd, int op, void *data)
4383 struct rte_eth_dev *dev;
4384 struct rte_intr_handle *intr_handle;
4387 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4389 dev = &rte_eth_devices[port_id];
4390 if (queue_id >= dev->data->nb_rx_queues) {
4391 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4395 if (!dev->intr_handle) {
4396 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4400 intr_handle = dev->intr_handle;
4401 if (!intr_handle->intr_vec) {
4402 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4406 vec = intr_handle->intr_vec[queue_id];
4407 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4408 if (rc && rc != -EEXIST) {
4410 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4411 port_id, queue_id, op, epfd, vec);
4419 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4422 struct rte_eth_dev *dev;
4424 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4426 dev = &rte_eth_devices[port_id];
4428 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4429 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4434 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4437 struct rte_eth_dev *dev;
4439 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4441 dev = &rte_eth_devices[port_id];
4443 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4444 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4450 rte_eth_dev_filter_supported(uint16_t port_id,
4451 enum rte_filter_type filter_type)
4453 struct rte_eth_dev *dev;
4455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4457 dev = &rte_eth_devices[port_id];
4458 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4459 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4460 RTE_ETH_FILTER_NOP, NULL);
4464 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4465 enum rte_filter_op filter_op, void *arg)
4467 struct rte_eth_dev *dev;
4469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4471 dev = &rte_eth_devices[port_id];
4472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4473 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4477 const struct rte_eth_rxtx_callback *
4478 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4479 rte_rx_callback_fn fn, void *user_param)
4481 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4482 rte_errno = ENOTSUP;
4485 struct rte_eth_dev *dev;
4487 /* check input parameters */
4488 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4489 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4493 dev = &rte_eth_devices[port_id];
4494 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4498 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4506 cb->param = user_param;
4508 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4509 /* Add the callbacks in fifo order. */
4510 struct rte_eth_rxtx_callback *tail =
4511 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4514 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4521 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4526 const struct rte_eth_rxtx_callback *
4527 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4528 rte_rx_callback_fn fn, void *user_param)
4530 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4531 rte_errno = ENOTSUP;
4534 /* check input parameters */
4535 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4536 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4541 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4549 cb->param = user_param;
4551 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4552 /* Add the callbacks at first position */
4553 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4555 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
4556 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4561 const struct rte_eth_rxtx_callback *
4562 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4563 rte_tx_callback_fn fn, void *user_param)
4565 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4566 rte_errno = ENOTSUP;
4569 struct rte_eth_dev *dev;
4571 /* check input parameters */
4572 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4573 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4578 dev = &rte_eth_devices[port_id];
4579 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4584 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4592 cb->param = user_param;
4594 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4595 /* Add the callbacks in fifo order. */
4596 struct rte_eth_rxtx_callback *tail =
4597 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4600 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
4607 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4613 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4614 const struct rte_eth_rxtx_callback *user_cb)
4616 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4619 /* Check input parameters. */
4620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4621 if (user_cb == NULL ||
4622 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4625 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4626 struct rte_eth_rxtx_callback *cb;
4627 struct rte_eth_rxtx_callback **prev_cb;
4630 rte_spinlock_lock(&rte_eth_rx_cb_lock);
4631 prev_cb = &dev->post_rx_burst_cbs[queue_id];
4632 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4634 if (cb == user_cb) {
4635 /* Remove the user cb from the callback list. */
4636 *prev_cb = cb->next;
4641 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4647 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4648 const struct rte_eth_rxtx_callback *user_cb)
4650 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4653 /* Check input parameters. */
4654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4655 if (user_cb == NULL ||
4656 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4659 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4661 struct rte_eth_rxtx_callback *cb;
4662 struct rte_eth_rxtx_callback **prev_cb;
4664 rte_spinlock_lock(&rte_eth_tx_cb_lock);
4665 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4666 for (; *prev_cb != NULL; prev_cb = &cb->next) {
4668 if (cb == user_cb) {
4669 /* Remove the user cb from the callback list. */
4670 *prev_cb = cb->next;
4675 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4681 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4682 struct rte_eth_rxq_info *qinfo)
4684 struct rte_eth_dev *dev;
4686 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4691 dev = &rte_eth_devices[port_id];
4692 if (queue_id >= dev->data->nb_rx_queues) {
4693 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4697 if (dev->data->rx_queues[queue_id] == NULL) {
4699 "Rx queue %"PRIu16" of device with port_id=%"
4700 PRIu16" has not been setup\n",
4705 if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4706 RTE_ETHDEV_LOG(INFO,
4707 "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
4714 memset(qinfo, 0, sizeof(*qinfo));
4715 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
4720 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4721 struct rte_eth_txq_info *qinfo)
4723 struct rte_eth_dev *dev;
4725 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4730 dev = &rte_eth_devices[port_id];
4731 if (queue_id >= dev->data->nb_tx_queues) {
4732 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4736 if (dev->data->tx_queues[queue_id] == NULL) {
4738 "Tx queue %"PRIu16" of device with port_id=%"
4739 PRIu16" has not been setup\n",
4744 if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4745 RTE_ETHDEV_LOG(INFO,
4746 "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
4751 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
4753 memset(qinfo, 0, sizeof(*qinfo));
4754 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
4760 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4761 struct rte_eth_burst_mode *mode)
4763 struct rte_eth_dev *dev;
4765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4770 dev = &rte_eth_devices[port_id];
4772 if (queue_id >= dev->data->nb_rx_queues) {
4773 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4777 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
4778 memset(mode, 0, sizeof(*mode));
4779 return eth_err(port_id,
4780 dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
4784 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
4785 struct rte_eth_burst_mode *mode)
4787 struct rte_eth_dev *dev;
4789 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4794 dev = &rte_eth_devices[port_id];
4796 if (queue_id >= dev->data->nb_tx_queues) {
4797 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
4801 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
4802 memset(mode, 0, sizeof(*mode));
4803 return eth_err(port_id,
4804 dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
4808 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
4809 struct rte_ether_addr *mc_addr_set,
4810 uint32_t nb_mc_addr)
4812 struct rte_eth_dev *dev;
4814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4816 dev = &rte_eth_devices[port_id];
4817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
4818 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
4819 mc_addr_set, nb_mc_addr));
4823 rte_eth_timesync_enable(uint16_t port_id)
4825 struct rte_eth_dev *dev;
4827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4828 dev = &rte_eth_devices[port_id];
4830 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
4831 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
4835 rte_eth_timesync_disable(uint16_t port_id)
4837 struct rte_eth_dev *dev;
4839 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4840 dev = &rte_eth_devices[port_id];
4842 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
4843 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
4847 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
4850 struct rte_eth_dev *dev;
4852 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4853 dev = &rte_eth_devices[port_id];
4855 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
4856 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
4857 (dev, timestamp, flags));
4861 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
4862 struct timespec *timestamp)
4864 struct rte_eth_dev *dev;
4866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4867 dev = &rte_eth_devices[port_id];
4869 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
4870 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
4875 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
4877 struct rte_eth_dev *dev;
4879 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4880 dev = &rte_eth_devices[port_id];
4882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
4883 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
4888 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
4890 struct rte_eth_dev *dev;
4892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4893 dev = &rte_eth_devices[port_id];
4895 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
4896 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
4901 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
4903 struct rte_eth_dev *dev;
4905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4906 dev = &rte_eth_devices[port_id];
4908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
4909 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
4914 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
4916 struct rte_eth_dev *dev;
4918 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4919 dev = &rte_eth_devices[port_id];
4921 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
4922 return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
4926 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
4928 struct rte_eth_dev *dev;
4930 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4932 dev = &rte_eth_devices[port_id];
4933 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4934 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4938 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4940 struct rte_eth_dev *dev;
4942 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4944 dev = &rte_eth_devices[port_id];
4945 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4946 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4950 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4952 struct rte_eth_dev *dev;
4954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4956 dev = &rte_eth_devices[port_id];
4957 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4958 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4962 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4964 struct rte_eth_dev *dev;
4966 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4968 dev = &rte_eth_devices[port_id];
4969 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4970 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4974 rte_eth_dev_get_module_info(uint16_t port_id,
4975 struct rte_eth_dev_module_info *modinfo)
4977 struct rte_eth_dev *dev;
4979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4981 dev = &rte_eth_devices[port_id];
4982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4983 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4987 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4988 struct rte_dev_eeprom_info *info)
4990 struct rte_eth_dev *dev;
4992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4994 dev = &rte_eth_devices[port_id];
4995 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4996 return (*dev->dev_ops->get_module_eeprom)(dev, info);
5000 rte_eth_dev_get_dcb_info(uint16_t port_id,
5001 struct rte_eth_dcb_info *dcb_info)
5003 struct rte_eth_dev *dev;
5005 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5007 dev = &rte_eth_devices[port_id];
5008 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5010 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5011 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5015 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5016 struct rte_eth_l2_tunnel_conf *l2_tunnel)
5018 struct rte_eth_dev *dev;
5020 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5021 if (l2_tunnel == NULL) {
5022 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5026 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5027 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5031 dev = &rte_eth_devices[port_id];
5032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5034 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5039 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5040 struct rte_eth_l2_tunnel_conf *l2_tunnel,
5044 struct rte_eth_dev *dev;
5046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5048 if (l2_tunnel == NULL) {
5049 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5053 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5054 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5059 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5063 dev = &rte_eth_devices[port_id];
5064 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5066 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5067 l2_tunnel, mask, en));
5071 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5072 const struct rte_eth_desc_lim *desc_lim)
5074 if (desc_lim->nb_align != 0)
5075 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5077 if (desc_lim->nb_max != 0)
5078 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5080 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5084 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5085 uint16_t *nb_rx_desc,
5086 uint16_t *nb_tx_desc)
5088 struct rte_eth_dev_info dev_info;
5091 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5093 ret = rte_eth_dev_info_get(port_id, &dev_info);
5097 if (nb_rx_desc != NULL)
5098 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5100 if (nb_tx_desc != NULL)
5101 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5107 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5108 struct rte_eth_hairpin_cap *cap)
5110 struct rte_eth_dev *dev;
5112 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5114 dev = &rte_eth_devices[port_id];
5115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5116 memset(cap, 0, sizeof(*cap));
5117 return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5121 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5123 if (dev->data->rx_queue_state[queue_id] ==
5124 RTE_ETH_QUEUE_STATE_HAIRPIN)
5130 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5132 if (dev->data->tx_queue_state[queue_id] ==
5133 RTE_ETH_QUEUE_STATE_HAIRPIN)
5139 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5141 struct rte_eth_dev *dev;
5143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5148 dev = &rte_eth_devices[port_id];
5150 if (*dev->dev_ops->pool_ops_supported == NULL)
5151 return 1; /* all pools are supported */
5153 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5157 * A set of values to describe the possible states of a switch domain.
5159 enum rte_eth_switch_domain_state {
5160 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5161 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5165 * Array of switch domains available for allocation. Array is sized to
5166 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5167 * ethdev ports in a single process.
5169 static struct rte_eth_dev_switch {
5170 enum rte_eth_switch_domain_state state;
5171 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5174 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5178 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5180 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5181 if (rte_eth_switch_domains[i].state ==
5182 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5183 rte_eth_switch_domains[i].state =
5184 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5194 rte_eth_switch_domain_free(uint16_t domain_id)
5196 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5197 domain_id >= RTE_MAX_ETHPORTS)
5200 if (rte_eth_switch_domains[domain_id].state !=
5201 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5204 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5210 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5213 struct rte_kvargs_pair *pair;
5216 arglist->str = strdup(str_in);
5217 if (arglist->str == NULL)
5220 letter = arglist->str;
5223 pair = &arglist->pairs[0];
5226 case 0: /* Initial */
5229 else if (*letter == '\0')
5236 case 1: /* Parsing key */
5237 if (*letter == '=') {
5239 pair->value = letter + 1;
5241 } else if (*letter == ',' || *letter == '\0')
5246 case 2: /* Parsing value */
5249 else if (*letter == ',') {
5252 pair = &arglist->pairs[arglist->count];
5254 } else if (*letter == '\0') {
5257 pair = &arglist->pairs[arglist->count];
5262 case 3: /* Parsing list */
5265 else if (*letter == '\0')
5274 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5276 struct rte_kvargs args;
5277 struct rte_kvargs_pair *pair;
5281 memset(eth_da, 0, sizeof(*eth_da));
5283 result = rte_eth_devargs_tokenise(&args, dargs);
5287 for (i = 0; i < args.count; i++) {
5288 pair = &args.pairs[i];
5289 if (strcmp("representor", pair->key) == 0) {
5290 result = rte_eth_devargs_parse_list(pair->value,
5291 rte_eth_devargs_parse_representor_ports,
5306 handle_port_list(const char *cmd __rte_unused,
5307 const char *params __rte_unused,
5308 struct rte_tel_data *d)
5312 rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5313 RTE_ETH_FOREACH_DEV(port_id)
5314 rte_tel_data_add_array_int(d, port_id);
5319 handle_port_xstats(const char *cmd __rte_unused,
5321 struct rte_tel_data *d)
5323 struct rte_eth_xstat *eth_xstats;
5324 struct rte_eth_xstat_name *xstat_names;
5325 int port_id, num_xstats;
5328 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5331 port_id = atoi(params);
5332 if (!rte_eth_dev_is_valid_port(port_id))
5335 num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5339 /* use one malloc for both names and stats */
5340 eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5341 sizeof(struct rte_eth_xstat_name)) * num_xstats);
5342 if (eth_xstats == NULL)
5344 xstat_names = (void *)ð_xstats[num_xstats];
5346 ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5347 if (ret < 0 || ret > num_xstats) {
5352 ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5353 if (ret < 0 || ret > num_xstats) {
5358 rte_tel_data_start_dict(d);
5359 for (i = 0; i < num_xstats; i++)
5360 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5361 eth_xstats[i].value);
5366 handle_port_link_status(const char *cmd __rte_unused,
5368 struct rte_tel_data *d)
5370 static const char *status_str = "status";
5372 struct rte_eth_link link;
5374 if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5377 port_id = atoi(params);
5378 if (!rte_eth_dev_is_valid_port(port_id))
5381 ret = rte_eth_link_get(port_id, &link);
5385 rte_tel_data_start_dict(d);
5386 if (!link.link_status) {
5387 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5390 rte_tel_data_add_dict_string(d, status_str, "UP");
5391 rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5392 rte_tel_data_add_dict_string(d, "duplex",
5393 (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5394 "full-duplex" : "half-duplex");
5398 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5400 RTE_INIT(ethdev_init_telemetry)
5402 rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5403 "Returns list of available ethdev ports. Takes no parameters");
5404 rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5405 "Returns the extended stats for a port. Parameters: int port_id");
5406 rte_telemetry_register_cmd("/ethdev/link_status",
5407 handle_port_link_status,
5408 "Returns the link status for a port. Parameters: int port_id");