lib/librte_ethdev/rte_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2017 Intel Corporation
   3  */
   4
   5 #include <sys/types.h>
   6 #include <sys/queue.h>
   7 #include <ctype.h>
   8 #include <stdio.h>
   9 #include <stdlib.h>
  10 #include <string.h>
  11 #include <stdarg.h>
  12 #include <errno.h>
  13 #include <stdbool.h>
  14 #include <stdint.h>
  15 #include <inttypes.h>
  16 #include <netinet/in.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_interrupts.h>
  22 #include <rte_memory.h>
  23 #include <rte_memcpy.h>
  24 #include <rte_memzone.h>
  25 #include <rte_launch.h>
  26 #include <rte_eal.h>
  27 #include <rte_per_lcore.h>
  28 #include <rte_lcore.h>
  29 #include <rte_branch_prediction.h>
  30 #include <rte_common.h>
  31 #include <rte_mempool.h>
  32 #include <rte_malloc.h>
  33 #include <rte_mbuf.h>
  34 #include <rte_errno.h>
  35 #include <rte_spinlock.h>
  36 #include <rte_string_fns.h>
  37 #include <rte_kvargs.h>
  38 #include <rte_class.h>
  39 #include <rte_ether.h>
  40 #include <rte_telemetry.h>
  41
  42 #include "rte_ethdev_trace.h"
  43 #include "rte_ethdev.h"
  44 #include "rte_ethdev_driver.h"
  45 #include "ethdev_profile.h"
  46 #include "ethdev_private.h"
  47
  48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
  49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
  50
  51 /* spinlock for eth device callbacks */
  52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
  53
  54 /* spinlock for add/remove rx callbacks */
  55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
  56
  57 /* spinlock for add/remove tx callbacks */
  58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
  59
  60 /* spinlock for shared data allocation */
  61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
  62
  63 /* store statistics names and its offset in stats structure  */
  64 struct rte_eth_xstats_name_off {
  65         char name[RTE_ETH_XSTATS_NAME_SIZE];
  66         unsigned offset;
  67 };
  68
  69 /* Shared memory between primary and secondary processes. */
  70 static struct {
  71         uint64_t next_owner_id;
  72         rte_spinlock_t ownership_lock;
  73         struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
  74 } *rte_eth_dev_shared_data;
  75
  76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
  77         {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
  78         {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
  79         {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
  80         {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
  81         {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
  82         {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
  83         {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
  84         {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
  85                 rx_nombuf)},
  86 };
  87
  88 #define RTE_NB_STATS RTE_DIM(rte_stats_strings)
  89
  90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
  91         {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
  92         {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
  93         {"errors", offsetof(struct rte_eth_stats, q_errors)},
  94 };
  95
  96 #define RTE_NB_RXQ_STATS RTE_DIM(rte_rxq_stats_strings)
  97
  98 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
  99         {"packets", offsetof(struct rte_eth_stats, q_opackets)},
 100         {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
 101 };
 102 #define RTE_NB_TXQ_STATS RTE_DIM(rte_txq_stats_strings)
 103
 104 #define RTE_RX_OFFLOAD_BIT2STR(_name)   \
 105         { DEV_RX_OFFLOAD_##_name, #_name }
 106
 107 #define RTE_ETH_RX_OFFLOAD_BIT2STR(_name)       \
 108         { RTE_ETH_RX_OFFLOAD_##_name, #_name }
 109
 110 static const struct {
 111         uint64_t offload;
 112         const char *name;
 113 } rte_rx_offload_names[] = {
 114         RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
 115         RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
 116         RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
 117         RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
 118         RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
 119         RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
 120         RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
 121         RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
 122         RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
 123         RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
 124         RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
 125         RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
 126         RTE_RX_OFFLOAD_BIT2STR(SCATTER),
 127         RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
 128         RTE_RX_OFFLOAD_BIT2STR(SECURITY),
 129         RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
 130         RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
 131         RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
 132         RTE_RX_OFFLOAD_BIT2STR(RSS_HASH),
 133         RTE_ETH_RX_OFFLOAD_BIT2STR(BUFFER_SPLIT),
 134 };
 135
 136 #undef RTE_RX_OFFLOAD_BIT2STR
 137 #undef RTE_ETH_RX_OFFLOAD_BIT2STR
 138
 139 #define RTE_TX_OFFLOAD_BIT2STR(_name)   \
 140         { DEV_TX_OFFLOAD_##_name, #_name }
 141
 142 static const struct {
 143         uint64_t offload;
 144         const char *name;
 145 } rte_tx_offload_names[] = {
 146         RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
 147         RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
 148         RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
 149         RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
 150         RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
 151         RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
 152         RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
 153         RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
 154         RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
 155         RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
 156         RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
 157         RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
 158         RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
 159         RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
 160         RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
 161         RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
 162         RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
 163         RTE_TX_OFFLOAD_BIT2STR(SECURITY),
 164         RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
 165         RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
 166         RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
 167         RTE_TX_OFFLOAD_BIT2STR(SEND_ON_TIMESTAMP),
 168 };
 169
 170 #undef RTE_TX_OFFLOAD_BIT2STR
 171
 172 /**
 173  * The user application callback description.
 174  *
 175  * It contains callback address to be registered by user application,
 176  * the pointer to the parameters for callback, and the event type.
 177  */
 178 struct rte_eth_dev_callback {
 179         TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
 180         rte_eth_dev_cb_fn cb_fn;                /**< Callback address */
 181         void *cb_arg;                           /**< Parameter for callback */
 182         void *ret_param;                        /**< Return parameter */
 183         enum rte_eth_event_type event;          /**< Interrupt event type */
 184         uint32_t active;                        /**< Callback is executing */
 185 };
 186
 187 enum {
 188         STAT_QMAP_TX = 0,
 189         STAT_QMAP_RX
 190 };
 191
 192 int
 193 rte_eth_iterator_init(struct rte_dev_iterator *iter, const char *devargs_str)
 194 {
 195         int ret;
 196         struct rte_devargs devargs = {.args = NULL};
 197         const char *bus_param_key;
 198         char *bus_str = NULL;
 199         char *cls_str = NULL;
 200         int str_size;
 201
 202         memset(iter, 0, sizeof(*iter));
 203
 204         /*
 205          * The devargs string may use various syntaxes:
 206          *   - 0000:08:00.0,representor=[1-3]
 207          *   - pci:0000:06:00.0,representor=[0,5]
 208          *   - class=eth,mac=00:11:22:33:44:55
 209          * A new syntax is in development (not yet supported):
 210          *   - bus=X,paramX=x/class=Y,paramY=y/driver=Z,paramZ=z
 211          */
 212
 213         /*
 214          * Handle pure class filter (i.e. without any bus-level argument),
 215          * from future new syntax.
 216          * rte_devargs_parse() is not yet supporting the new syntax,
 217          * that's why this simple case is temporarily parsed here.
 218          */
 219 #define iter_anybus_str "class=eth,"
 220         if (strncmp(devargs_str, iter_anybus_str,
 221                         strlen(iter_anybus_str)) == 0) {
 222                 iter->cls_str = devargs_str + strlen(iter_anybus_str);
 223                 goto end;
 224         }
 225
 226         /* Split bus, device and parameters. */
 227         ret = rte_devargs_parse(&devargs, devargs_str);
 228         if (ret != 0)
 229                 goto error;
 230
 231         /*
 232          * Assume parameters of old syntax can match only at ethdev level.
 233          * Extra parameters will be ignored, thanks to "+" prefix.
 234          */
 235         str_size = strlen(devargs.args) + 2;
 236         cls_str = malloc(str_size);
 237         if (cls_str == NULL) {
 238                 ret = -ENOMEM;
 239                 goto error;
 240         }
 241         ret = snprintf(cls_str, str_size, "+%s", devargs.args);
 242         if (ret != str_size - 1) {
 243                 ret = -EINVAL;
 244                 goto error;
 245         }
 246         iter->cls_str = cls_str;
 247         free(devargs.args); /* allocated by rte_devargs_parse() */
 248         devargs.args = NULL;
 249
 250         iter->bus = devargs.bus;
 251         if (iter->bus->dev_iterate == NULL) {
 252                 ret = -ENOTSUP;
 253                 goto error;
 254         }
 255
 256         /* Convert bus args to new syntax for use with new API dev_iterate. */
 257         if (strcmp(iter->bus->name, "vdev") == 0) {
 258                 bus_param_key = "name";
 259         } else if (strcmp(iter->bus->name, "pci") == 0) {
 260                 bus_param_key = "addr";
 261         } else {
 262                 ret = -ENOTSUP;
 263                 goto error;
 264         }
 265         str_size = strlen(bus_param_key) + strlen(devargs.name) + 2;
 266         bus_str = malloc(str_size);
 267         if (bus_str == NULL) {
 268                 ret = -ENOMEM;
 269                 goto error;
 270         }
 271         ret = snprintf(bus_str, str_size, "%s=%s",
 272                         bus_param_key, devargs.name);
 273         if (ret != str_size - 1) {
 274                 ret = -EINVAL;
 275                 goto error;
 276         }
 277         iter->bus_str = bus_str;
 278
 279 end:
 280         iter->cls = rte_class_find_by_name("eth");
 281         return 0;
 282
 283 error:
 284         if (ret == -ENOTSUP)
 285                 RTE_ETHDEV_LOG(ERR, "Bus %s does not support iterating.\n",
 286                                 iter->bus->name);
 287         free(devargs.args);
 288         free(bus_str);
 289         free(cls_str);
 290         return ret;
 291 }
 292
 293 uint16_t
 294 rte_eth_iterator_next(struct rte_dev_iterator *iter)
 295 {
 296         if (iter->cls == NULL) /* invalid ethdev iterator */
 297                 return RTE_MAX_ETHPORTS;
 298
 299         do { /* loop to try all matching rte_device */
 300                 /* If not pure ethdev filter and */
 301                 if (iter->bus != NULL &&
 302                                 /* not in middle of rte_eth_dev iteration, */
 303                                 iter->class_device == NULL) {
 304                         /* get next rte_device to try. */
 305                         iter->device = iter->bus->dev_iterate(
 306                                         iter->device, iter->bus_str, iter);
 307                         if (iter->device == NULL)
 308                                 break; /* no more rte_device candidate */
 309                 }
 310                 /* A device is matching bus part, need to check ethdev part. */
 311                 iter->class_device = iter->cls->dev_iterate(
 312                                 iter->class_device, iter->cls_str, iter);
 313                 if (iter->class_device != NULL)
 314                         return eth_dev_to_id(iter->class_device); /* match */
 315         } while (iter->bus != NULL); /* need to try next rte_device */
 316
 317         /* No more ethdev port to iterate. */
 318         rte_eth_iterator_cleanup(iter);
 319         return RTE_MAX_ETHPORTS;
 320 }
 321
 322 void
 323 rte_eth_iterator_cleanup(struct rte_dev_iterator *iter)
 324 {
 325         if (iter->bus_str == NULL)
 326                 return; /* nothing to free in pure class filter */
 327         free(RTE_CAST_FIELD(iter, bus_str, char *)); /* workaround const */
 328         free(RTE_CAST_FIELD(iter, cls_str, char *)); /* workaround const */
 329         memset(iter, 0, sizeof(*iter));
 330 }
 331
 332 uint16_t
 333 rte_eth_find_next(uint16_t port_id)
 334 {
 335         while (port_id < RTE_MAX_ETHPORTS &&
 336                         rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED)
 337                 port_id++;
 338
 339         if (port_id >= RTE_MAX_ETHPORTS)
 340                 return RTE_MAX_ETHPORTS;
 341
 342         return port_id;
 343 }
 344
 345 /*
 346  * Macro to iterate over all valid ports for internal usage.
 347  * Note: RTE_ETH_FOREACH_DEV is different because filtering owned ports.
 348  */
 349 #define RTE_ETH_FOREACH_VALID_DEV(port_id) \
 350         for (port_id = rte_eth_find_next(0); \
 351              port_id < RTE_MAX_ETHPORTS; \
 352              port_id = rte_eth_find_next(port_id + 1))
 353
 354 uint16_t
 355 rte_eth_find_next_of(uint16_t port_id, const struct rte_device *parent)
 356 {
 357         port_id = rte_eth_find_next(port_id);
 358         while (port_id < RTE_MAX_ETHPORTS &&
 359                         rte_eth_devices[port_id].device != parent)
 360                 port_id = rte_eth_find_next(port_id + 1);
 361
 362         return port_id;
 363 }
 364
 365 uint16_t
 366 rte_eth_find_next_sibling(uint16_t port_id, uint16_t ref_port_id)
 367 {
 368         RTE_ETH_VALID_PORTID_OR_ERR_RET(ref_port_id, RTE_MAX_ETHPORTS);
 369         return rte_eth_find_next_of(port_id,
 370                         rte_eth_devices[ref_port_id].device);
 371 }
 372
 373 static void
 374 rte_eth_dev_shared_data_prepare(void)
 375 {
 376         const unsigned flags = 0;
 377         const struct rte_memzone *mz;
 378
 379         rte_spinlock_lock(&rte_eth_shared_data_lock);
 380
 381         if (rte_eth_dev_shared_data == NULL) {
 382                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 383                         /* Allocate port data and ownership shared memory. */
 384                         mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
 385                                         sizeof(*rte_eth_dev_shared_data),
 386                                         rte_socket_id(), flags);
 387                 } else
 388                         mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
 389                 if (mz == NULL)
 390                         rte_panic("Cannot allocate ethdev shared data\n");
 391
 392                 rte_eth_dev_shared_data = mz->addr;
 393                 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 394                         rte_eth_dev_shared_data->next_owner_id =
 395                                         RTE_ETH_DEV_NO_OWNER + 1;
 396                         rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
 397                         memset(rte_eth_dev_shared_data->data, 0,
 398                                sizeof(rte_eth_dev_shared_data->data));
 399                 }
 400         }
 401
 402         rte_spinlock_unlock(&rte_eth_shared_data_lock);
 403 }
 404
 405 static bool
 406 is_allocated(const struct rte_eth_dev *ethdev)
 407 {
 408         return ethdev->data->name[0] != '\0';
 409 }
 410
 411 static struct rte_eth_dev *
 412 _rte_eth_dev_allocated(const char *name)
 413 {
 414         unsigned i;
 415
 416         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
 417                 if (rte_eth_devices[i].data != NULL &&
 418                     strcmp(rte_eth_devices[i].data->name, name) == 0)
 419                         return &rte_eth_devices[i];
 420         }
 421         return NULL;
 422 }
 423
 424 struct rte_eth_dev *
 425 rte_eth_dev_allocated(const char *name)
 426 {
 427         struct rte_eth_dev *ethdev;
 428
 429         rte_eth_dev_shared_data_prepare();
 430
 431         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 432
 433         ethdev = _rte_eth_dev_allocated(name);
 434
 435         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 436
 437         return ethdev;
 438 }
 439
 440 static uint16_t
 441 rte_eth_dev_find_free_port(void)
 442 {
 443         unsigned i;
 444
 445         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
 446                 /* Using shared name field to find a free port. */
 447                 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
 448                         RTE_ASSERT(rte_eth_devices[i].state ==
 449                                    RTE_ETH_DEV_UNUSED);
 450                         return i;
 451                 }
 452         }
 453         return RTE_MAX_ETHPORTS;
 454 }
 455
 456 static struct rte_eth_dev *
 457 eth_dev_get(uint16_t port_id)
 458 {
 459         struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
 460
 461         eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
 462
 463         return eth_dev;
 464 }
 465
 466 struct rte_eth_dev *
 467 rte_eth_dev_allocate(const char *name)
 468 {
 469         uint16_t port_id;
 470         struct rte_eth_dev *eth_dev = NULL;
 471         size_t name_len;
 472
 473         name_len = strnlen(name, RTE_ETH_NAME_MAX_LEN);
 474         if (name_len == 0) {
 475                 RTE_ETHDEV_LOG(ERR, "Zero length Ethernet device name\n");
 476                 return NULL;
 477         }
 478
 479         if (name_len >= RTE_ETH_NAME_MAX_LEN) {
 480                 RTE_ETHDEV_LOG(ERR, "Ethernet device name is too long\n");
 481                 return NULL;
 482         }
 483
 484         rte_eth_dev_shared_data_prepare();
 485
 486         /* Synchronize port creation between primary and secondary threads. */
 487         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 488
 489         if (_rte_eth_dev_allocated(name) != NULL) {
 490                 RTE_ETHDEV_LOG(ERR,
 491                         "Ethernet device with name %s already allocated\n",
 492                         name);
 493                 goto unlock;
 494         }
 495
 496         port_id = rte_eth_dev_find_free_port();
 497         if (port_id == RTE_MAX_ETHPORTS) {
 498                 RTE_ETHDEV_LOG(ERR,
 499                         "Reached maximum number of Ethernet ports\n");
 500                 goto unlock;
 501         }
 502
 503         eth_dev = eth_dev_get(port_id);
 504         strlcpy(eth_dev->data->name, name, sizeof(eth_dev->data->name));
 505         eth_dev->data->port_id = port_id;
 506         eth_dev->data->mtu = RTE_ETHER_MTU;
 507         pthread_mutex_init(&eth_dev->data->flow_ops_mutex, NULL);
 508
 509 unlock:
 510         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 511
 512         return eth_dev;
 513 }
 514
 515 /*
 516  * Attach to a port already registered by the primary process, which
 517  * makes sure that the same device would have the same port id both
 518  * in the primary and secondary process.
 519  */
 520 struct rte_eth_dev *
 521 rte_eth_dev_attach_secondary(const char *name)
 522 {
 523         uint16_t i;
 524         struct rte_eth_dev *eth_dev = NULL;
 525
 526         rte_eth_dev_shared_data_prepare();
 527
 528         /* Synchronize port attachment to primary port creation and release. */
 529         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 530
 531         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
 532                 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
 533                         break;
 534         }
 535         if (i == RTE_MAX_ETHPORTS) {
 536                 RTE_ETHDEV_LOG(ERR,
 537                         "Device %s is not driven by the primary process\n",
 538                         name);
 539         } else {
 540                 eth_dev = eth_dev_get(i);
 541                 RTE_ASSERT(eth_dev->data->port_id == i);
 542         }
 543
 544         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 545         return eth_dev;
 546 }
 547
 548 int
 549 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
 550 {
 551         if (eth_dev == NULL)
 552                 return -EINVAL;
 553
 554         rte_eth_dev_shared_data_prepare();
 555
 556         if (eth_dev->state != RTE_ETH_DEV_UNUSED)
 557                 rte_eth_dev_callback_process(eth_dev,
 558                                 RTE_ETH_EVENT_DESTROY, NULL);
 559
 560         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 561
 562         eth_dev->state = RTE_ETH_DEV_UNUSED;
 563         eth_dev->device = NULL;
 564         eth_dev->intr_handle = NULL;
 565
 566         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
 567                 rte_free(eth_dev->data->rx_queues);
 568                 rte_free(eth_dev->data->tx_queues);
 569                 rte_free(eth_dev->data->mac_addrs);
 570                 rte_free(eth_dev->data->hash_mac_addrs);
 571                 rte_free(eth_dev->data->dev_private);
 572                 pthread_mutex_destroy(&eth_dev->data->flow_ops_mutex);
 573                 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
 574         }
 575
 576         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 577
 578         return 0;
 579 }
 580
 581 int
 582 rte_eth_dev_is_valid_port(uint16_t port_id)
 583 {
 584         if (port_id >= RTE_MAX_ETHPORTS ||
 585             (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
 586                 return 0;
 587         else
 588                 return 1;
 589 }
 590
 591 static int
 592 rte_eth_is_valid_owner_id(uint64_t owner_id)
 593 {
 594         if (owner_id == RTE_ETH_DEV_NO_OWNER ||
 595             rte_eth_dev_shared_data->next_owner_id <= owner_id)
 596                 return 0;
 597         return 1;
 598 }
 599
 600 uint64_t
 601 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
 602 {
 603         port_id = rte_eth_find_next(port_id);
 604         while (port_id < RTE_MAX_ETHPORTS &&
 605                         rte_eth_devices[port_id].data->owner.id != owner_id)
 606                 port_id = rte_eth_find_next(port_id + 1);
 607
 608         return port_id;
 609 }
 610
 611 int
 612 rte_eth_dev_owner_new(uint64_t *owner_id)
 613 {
 614         rte_eth_dev_shared_data_prepare();
 615
 616         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 617
 618         *owner_id = rte_eth_dev_shared_data->next_owner_id++;
 619
 620         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 621         return 0;
 622 }
 623
 624 static int
 625 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
 626                        const struct rte_eth_dev_owner *new_owner)
 627 {
 628         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
 629         struct rte_eth_dev_owner *port_owner;
 630
 631         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
 632                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
 633                         port_id);
 634                 return -ENODEV;
 635         }
 636
 637         if (!rte_eth_is_valid_owner_id(new_owner->id) &&
 638             !rte_eth_is_valid_owner_id(old_owner_id)) {
 639                 RTE_ETHDEV_LOG(ERR,
 640                         "Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
 641                        old_owner_id, new_owner->id);
 642                 return -EINVAL;
 643         }
 644
 645         port_owner = &rte_eth_devices[port_id].data->owner;
 646         if (port_owner->id != old_owner_id) {
 647                 RTE_ETHDEV_LOG(ERR,
 648                         "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
 649                         port_id, port_owner->name, port_owner->id);
 650                 return -EPERM;
 651         }
 652
 653         /* can not truncate (same structure) */
 654         strlcpy(port_owner->name, new_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN);
 655
 656         port_owner->id = new_owner->id;
 657
 658         RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
 659                 port_id, new_owner->name, new_owner->id);
 660
 661         return 0;
 662 }
 663
 664 int
 665 rte_eth_dev_owner_set(const uint16_t port_id,
 666                       const struct rte_eth_dev_owner *owner)
 667 {
 668         int ret;
 669
 670         rte_eth_dev_shared_data_prepare();
 671
 672         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 673
 674         ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
 675
 676         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 677         return ret;
 678 }
 679
 680 int
 681 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
 682 {
 683         const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
 684                         {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
 685         int ret;
 686
 687         rte_eth_dev_shared_data_prepare();
 688
 689         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 690
 691         ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
 692
 693         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 694         return ret;
 695 }
 696
 697 int
 698 rte_eth_dev_owner_delete(const uint64_t owner_id)
 699 {
 700         uint16_t port_id;
 701         int ret = 0;
 702
 703         rte_eth_dev_shared_data_prepare();
 704
 705         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 706
 707         if (rte_eth_is_valid_owner_id(owner_id)) {
 708                 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
 709                         if (rte_eth_devices[port_id].data->owner.id == owner_id)
 710                                 memset(&rte_eth_devices[port_id].data->owner, 0,
 711                                        sizeof(struct rte_eth_dev_owner));
 712                 RTE_ETHDEV_LOG(NOTICE,
 713                         "All port owners owned by %016"PRIx64" identifier have removed\n",
 714                         owner_id);
 715         } else {
 716                 RTE_ETHDEV_LOG(ERR,
 717                                "Invalid owner id=%016"PRIx64"\n",
 718                                owner_id);
 719                 ret = -EINVAL;
 720         }
 721
 722         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 723
 724         return ret;
 725 }
 726
 727 int
 728 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
 729 {
 730         int ret = 0;
 731         struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
 732
 733         rte_eth_dev_shared_data_prepare();
 734
 735         rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
 736
 737         if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
 738                 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
 739                         port_id);
 740                 ret = -ENODEV;
 741         } else {
 742                 rte_memcpy(owner, &ethdev->data->owner, sizeof(*owner));
 743         }
 744
 745         rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
 746         return ret;
 747 }
 748
 749 int
 750 rte_eth_dev_socket_id(uint16_t port_id)
 751 {
 752         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
 753         return rte_eth_devices[port_id].data->numa_node;
 754 }
 755
 756 void *
 757 rte_eth_dev_get_sec_ctx(uint16_t port_id)
 758 {
 759         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
 760         return rte_eth_devices[port_id].security_ctx;
 761 }
 762
 763 uint16_t
 764 rte_eth_dev_count_avail(void)
 765 {
 766         uint16_t p;
 767         uint16_t count;
 768
 769         count = 0;
 770
 771         RTE_ETH_FOREACH_DEV(p)
 772                 count++;
 773
 774         return count;
 775 }
 776
 777 uint16_t
 778 rte_eth_dev_count_total(void)
 779 {
 780         uint16_t port, count = 0;
 781
 782         RTE_ETH_FOREACH_VALID_DEV(port)
 783                 count++;
 784
 785         return count;
 786 }
 787
 788 int
 789 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
 790 {
 791         char *tmp;
 792
 793         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
 794
 795         if (name == NULL) {
 796                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
 797                 return -EINVAL;
 798         }
 799
 800         /* shouldn't check 'rte_eth_devices[i].data',
 801          * because it might be overwritten by VDEV PMD */
 802         tmp = rte_eth_dev_shared_data->data[port_id].name;
 803         strcpy(name, tmp);
 804         return 0;
 805 }
 806
 807 int
 808 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
 809 {
 810         uint32_t pid;
 811
 812         if (name == NULL) {
 813                 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
 814                 return -EINVAL;
 815         }
 816
 817         RTE_ETH_FOREACH_VALID_DEV(pid)
 818                 if (!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
 819                         *port_id = pid;
 820                         return 0;
 821                 }
 822
 823         return -ENODEV;
 824 }
 825
 826 static int
 827 eth_err(uint16_t port_id, int ret)
 828 {
 829         if (ret == 0)
 830                 return 0;
 831         if (rte_eth_dev_is_removed(port_id))
 832                 return -EIO;
 833         return ret;
 834 }
 835
 836 static int
 837 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
 838 {
 839         uint16_t old_nb_queues = dev->data->nb_rx_queues;
 840         void **rxq;
 841         unsigned i;
 842
 843         if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
 844                 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
 845                                 sizeof(dev->data->rx_queues[0]) * nb_queues,
 846                                 RTE_CACHE_LINE_SIZE);
 847                 if (dev->data->rx_queues == NULL) {
 848                         dev->data->nb_rx_queues = 0;
 849                         return -(ENOMEM);
 850                 }
 851         } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
 852                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
 853
 854                 rxq = dev->data->rx_queues;
 855
 856                 for (i = nb_queues; i < old_nb_queues; i++)
 857                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
 858                 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
 859                                 RTE_CACHE_LINE_SIZE);
 860                 if (rxq == NULL)
 861                         return -(ENOMEM);
 862                 if (nb_queues > old_nb_queues) {
 863                         uint16_t new_qs = nb_queues - old_nb_queues;
 864
 865                         memset(rxq + old_nb_queues, 0,
 866                                 sizeof(rxq[0]) * new_qs);
 867                 }
 868
 869                 dev->data->rx_queues = rxq;
 870
 871         } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
 872                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
 873
 874                 rxq = dev->data->rx_queues;
 875
 876                 for (i = nb_queues; i < old_nb_queues; i++)
 877                         (*dev->dev_ops->rx_queue_release)(rxq[i]);
 878
 879                 rte_free(dev->data->rx_queues);
 880                 dev->data->rx_queues = NULL;
 881         }
 882         dev->data->nb_rx_queues = nb_queues;
 883         return 0;
 884 }
 885
 886 static int
 887 eth_dev_validate_rx_queue(const struct rte_eth_dev *dev, uint16_t rx_queue_id)
 888 {
 889         uint16_t port_id;
 890
 891         if (rx_queue_id >= dev->data->nb_rx_queues) {
 892                 port_id = dev->data->port_id;
 893                 RTE_ETHDEV_LOG(ERR,
 894                                "Invalid Rx queue_id=%u of device with port_id=%u\n",
 895                                rx_queue_id, port_id);
 896                 return -EINVAL;
 897         }
 898
 899         if (dev->data->rx_queues[rx_queue_id] == NULL) {
 900                 port_id = dev->data->port_id;
 901                 RTE_ETHDEV_LOG(ERR,
 902                                "Queue %u of device with port_id=%u has not been setup\n",
 903                                rx_queue_id, port_id);
 904                 return -EINVAL;
 905         }
 906
 907         return 0;
 908 }
 909
 910 static int
 911 eth_dev_validate_tx_queue(const struct rte_eth_dev *dev, uint16_t tx_queue_id)
 912 {
 913         uint16_t port_id;
 914
 915         if (tx_queue_id >= dev->data->nb_tx_queues) {
 916                 port_id = dev->data->port_id;
 917                 RTE_ETHDEV_LOG(ERR,
 918                                "Invalid Tx queue_id=%u of device with port_id=%u\n",
 919                                tx_queue_id, port_id);
 920                 return -EINVAL;
 921         }
 922
 923         if (dev->data->tx_queues[tx_queue_id] == NULL) {
 924                 port_id = dev->data->port_id;
 925                 RTE_ETHDEV_LOG(ERR,
 926                                "Queue %u of device with port_id=%u has not been setup\n",
 927                                tx_queue_id, port_id);
 928                 return -EINVAL;
 929         }
 930
 931         return 0;
 932 }
 933
 934 int
 935 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
 936 {
 937         struct rte_eth_dev *dev;
 938         int ret;
 939
 940         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
 941
 942         dev = &rte_eth_devices[port_id];
 943         if (!dev->data->dev_started) {
 944                 RTE_ETHDEV_LOG(ERR,
 945                         "Port %u must be started before start any queue\n",
 946                         port_id);
 947                 return -EINVAL;
 948         }
 949
 950         ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
 951         if (ret != 0)
 952                 return ret;
 953
 954         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
 955
 956         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
 957                 RTE_ETHDEV_LOG(INFO,
 958                         "Can't start Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
 959                         rx_queue_id, port_id);
 960                 return -EINVAL;
 961         }
 962
 963         if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
 964                 RTE_ETHDEV_LOG(INFO,
 965                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
 966                         rx_queue_id, port_id);
 967                 return 0;
 968         }
 969
 970         return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
 971                                                              rx_queue_id));
 972
 973 }
 974
 975 int
 976 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
 977 {
 978         struct rte_eth_dev *dev;
 979         int ret;
 980
 981         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
 982
 983         dev = &rte_eth_devices[port_id];
 984
 985         ret = eth_dev_validate_rx_queue(dev, rx_queue_id);
 986         if (ret != 0)
 987                 return ret;
 988
 989         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
 990
 991         if (rte_eth_dev_is_rx_hairpin_queue(dev, rx_queue_id)) {
 992                 RTE_ETHDEV_LOG(INFO,
 993                         "Can't stop Rx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
 994                         rx_queue_id, port_id);
 995                 return -EINVAL;
 996         }
 997
 998         if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
 999                 RTE_ETHDEV_LOG(INFO,
1000                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1001                         rx_queue_id, port_id);
1002                 return 0;
1003         }
1004
1005         return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
1006
1007 }
1008
1009 int
1010 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
1011 {
1012         struct rte_eth_dev *dev;
1013         int ret;
1014
1015         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1016
1017         dev = &rte_eth_devices[port_id];
1018         if (!dev->data->dev_started) {
1019                 RTE_ETHDEV_LOG(ERR,
1020                         "Port %u must be started before start any queue\n",
1021                         port_id);
1022                 return -EINVAL;
1023         }
1024
1025         ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1026         if (ret != 0)
1027                 return ret;
1028
1029         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
1030
1031         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1032                 RTE_ETHDEV_LOG(INFO,
1033                         "Can't start Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1034                         tx_queue_id, port_id);
1035                 return -EINVAL;
1036         }
1037
1038         if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
1039                 RTE_ETHDEV_LOG(INFO,
1040                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
1041                         tx_queue_id, port_id);
1042                 return 0;
1043         }
1044
1045         return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
1046 }
1047
1048 int
1049 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
1050 {
1051         struct rte_eth_dev *dev;
1052         int ret;
1053
1054         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1055
1056         dev = &rte_eth_devices[port_id];
1057
1058         ret = eth_dev_validate_tx_queue(dev, tx_queue_id);
1059         if (ret != 0)
1060                 return ret;
1061
1062         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
1063
1064         if (rte_eth_dev_is_tx_hairpin_queue(dev, tx_queue_id)) {
1065                 RTE_ETHDEV_LOG(INFO,
1066                         "Can't stop Tx hairpin queue %"PRIu16" of device with port_id=%"PRIu16"\n",
1067                         tx_queue_id, port_id);
1068                 return -EINVAL;
1069         }
1070
1071         if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
1072                 RTE_ETHDEV_LOG(INFO,
1073                         "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
1074                         tx_queue_id, port_id);
1075                 return 0;
1076         }
1077
1078         return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
1079
1080 }
1081
1082 static int
1083 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
1084 {
1085         uint16_t old_nb_queues = dev->data->nb_tx_queues;
1086         void **txq;
1087         unsigned i;
1088
1089         if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
1090                 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
1091                                                    sizeof(dev->data->tx_queues[0]) * nb_queues,
1092                                                    RTE_CACHE_LINE_SIZE);
1093                 if (dev->data->tx_queues == NULL) {
1094                         dev->data->nb_tx_queues = 0;
1095                         return -(ENOMEM);
1096                 }
1097         } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
1098                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1099
1100                 txq = dev->data->tx_queues;
1101
1102                 for (i = nb_queues; i < old_nb_queues; i++)
1103                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1104                 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
1105                                   RTE_CACHE_LINE_SIZE);
1106                 if (txq == NULL)
1107                         return -ENOMEM;
1108                 if (nb_queues > old_nb_queues) {
1109                         uint16_t new_qs = nb_queues - old_nb_queues;
1110
1111                         memset(txq + old_nb_queues, 0,
1112                                sizeof(txq[0]) * new_qs);
1113                 }
1114
1115                 dev->data->tx_queues = txq;
1116
1117         } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
1118                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
1119
1120                 txq = dev->data->tx_queues;
1121
1122                 for (i = nb_queues; i < old_nb_queues; i++)
1123                         (*dev->dev_ops->tx_queue_release)(txq[i]);
1124
1125                 rte_free(dev->data->tx_queues);
1126                 dev->data->tx_queues = NULL;
1127         }
1128         dev->data->nb_tx_queues = nb_queues;
1129         return 0;
1130 }
1131
1132 uint32_t
1133 rte_eth_speed_bitflag(uint32_t speed, int duplex)
1134 {
1135         switch (speed) {
1136         case ETH_SPEED_NUM_10M:
1137                 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
1138         case ETH_SPEED_NUM_100M:
1139                 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
1140         case ETH_SPEED_NUM_1G:
1141                 return ETH_LINK_SPEED_1G;
1142         case ETH_SPEED_NUM_2_5G:
1143                 return ETH_LINK_SPEED_2_5G;
1144         case ETH_SPEED_NUM_5G:
1145                 return ETH_LINK_SPEED_5G;
1146         case ETH_SPEED_NUM_10G:
1147                 return ETH_LINK_SPEED_10G;
1148         case ETH_SPEED_NUM_20G:
1149                 return ETH_LINK_SPEED_20G;
1150         case ETH_SPEED_NUM_25G:
1151                 return ETH_LINK_SPEED_25G;
1152         case ETH_SPEED_NUM_40G:
1153                 return ETH_LINK_SPEED_40G;
1154         case ETH_SPEED_NUM_50G:
1155                 return ETH_LINK_SPEED_50G;
1156         case ETH_SPEED_NUM_56G:
1157                 return ETH_LINK_SPEED_56G;
1158         case ETH_SPEED_NUM_100G:
1159                 return ETH_LINK_SPEED_100G;
1160         case ETH_SPEED_NUM_200G:
1161                 return ETH_LINK_SPEED_200G;
1162         default:
1163                 return 0;
1164         }
1165 }
1166
1167 const char *
1168 rte_eth_dev_rx_offload_name(uint64_t offload)
1169 {
1170         const char *name = "UNKNOWN";
1171         unsigned int i;
1172
1173         for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
1174                 if (offload == rte_rx_offload_names[i].offload) {
1175                         name = rte_rx_offload_names[i].name;
1176                         break;
1177                 }
1178         }
1179
1180         return name;
1181 }
1182
1183 const char *
1184 rte_eth_dev_tx_offload_name(uint64_t offload)
1185 {
1186         const char *name = "UNKNOWN";
1187         unsigned int i;
1188
1189         for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1190                 if (offload == rte_tx_offload_names[i].offload) {
1191                         name = rte_tx_offload_names[i].name;
1192                         break;
1193                 }
1194         }
1195
1196         return name;
1197 }
1198
1199 static inline int
1200 check_lro_pkt_size(uint16_t port_id, uint32_t config_size,
1201                    uint32_t max_rx_pkt_len, uint32_t dev_info_size)
1202 {
1203         int ret = 0;
1204
1205         if (dev_info_size == 0) {
1206                 if (config_size != max_rx_pkt_len) {
1207                         RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size"
1208                                        " %u != %u is not allowed\n",
1209                                        port_id, config_size, max_rx_pkt_len);
1210                         ret = -EINVAL;
1211                 }
1212         } else if (config_size > dev_info_size) {
1213                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1214                                "> max allowed value %u\n", port_id, config_size,
1215                                dev_info_size);
1216                 ret = -EINVAL;
1217         } else if (config_size < RTE_ETHER_MIN_LEN) {
1218                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%d max_lro_pkt_size %u "
1219                                "< min allowed value %u\n", port_id, config_size,
1220                                (unsigned int)RTE_ETHER_MIN_LEN);
1221                 ret = -EINVAL;
1222         }
1223         return ret;
1224 }
1225
1226 /*
1227  * Validate offloads that are requested through rte_eth_dev_configure against
1228  * the offloads successfully set by the ethernet device.
1229  *
1230  * @param port_id
1231  *   The port identifier of the Ethernet device.
1232  * @param req_offloads
1233  *   The offloads that have been requested through `rte_eth_dev_configure`.
1234  * @param set_offloads
1235  *   The offloads successfully set by the ethernet device.
1236  * @param offload_type
1237  *   The offload type i.e. Rx/Tx string.
1238  * @param offload_name
1239  *   The function that prints the offload name.
1240  * @return
1241  *   - (0) if validation successful.
1242  *   - (-EINVAL) if requested offload has been silently disabled.
1243  *
1244  */
1245 static int
1246 validate_offloads(uint16_t port_id, uint64_t req_offloads,
1247                   uint64_t set_offloads, const char *offload_type,
1248                   const char *(*offload_name)(uint64_t))
1249 {
1250         uint64_t offloads_diff = req_offloads ^ set_offloads;
1251         uint64_t offload;
1252         int ret = 0;
1253
1254         while (offloads_diff != 0) {
1255                 /* Check if any offload is requested but not enabled. */
1256                 offload = 1ULL << __builtin_ctzll(offloads_diff);
1257                 if (offload & req_offloads) {
1258                         RTE_ETHDEV_LOG(ERR,
1259                                 "Port %u failed to enable %s offload %s\n",
1260                                 port_id, offload_type, offload_name(offload));
1261                         ret = -EINVAL;
1262                 }
1263
1264                 /* Check if offload couldn't be disabled. */
1265                 if (offload & set_offloads) {
1266                         RTE_ETHDEV_LOG(DEBUG,
1267                                 "Port %u %s offload %s is not requested but enabled\n",
1268                                 port_id, offload_type, offload_name(offload));
1269                 }
1270
1271                 offloads_diff &= ~offload;
1272         }
1273
1274         return ret;
1275 }
1276
1277 int
1278 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1279                       const struct rte_eth_conf *dev_conf)
1280 {
1281         struct rte_eth_dev *dev;
1282         struct rte_eth_dev_info dev_info;
1283         struct rte_eth_conf orig_conf;
1284         int diag;
1285         int ret;
1286
1287         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1288
1289         dev = &rte_eth_devices[port_id];
1290
1291         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1292
1293         if (dev->data->dev_started) {
1294                 RTE_ETHDEV_LOG(ERR,
1295                         "Port %u must be stopped to allow configuration\n",
1296                         port_id);
1297                 return -EBUSY;
1298         }
1299
1300          /* Store original config, as rollback required on failure */
1301         memcpy(&orig_conf, &dev->data->dev_conf, sizeof(dev->data->dev_conf));
1302
1303         /*
1304          * Copy the dev_conf parameter into the dev structure.
1305          * rte_eth_dev_info_get() requires dev_conf, copy it before dev_info get
1306          */
1307         if (dev_conf != &dev->data->dev_conf)
1308                 memcpy(&dev->data->dev_conf, dev_conf,
1309                        sizeof(dev->data->dev_conf));
1310
1311         ret = rte_eth_dev_info_get(port_id, &dev_info);
1312         if (ret != 0)
1313                 goto rollback;
1314
1315         /* If number of queues specified by application for both Rx and Tx is
1316          * zero, use driver preferred values. This cannot be done individually
1317          * as it is valid for either Tx or Rx (but not both) to be zero.
1318          * If driver does not provide any preferred valued, fall back on
1319          * EAL defaults.
1320          */
1321         if (nb_rx_q == 0 && nb_tx_q == 0) {
1322                 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1323                 if (nb_rx_q == 0)
1324                         nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1325                 nb_tx_q = dev_info.default_txportconf.nb_queues;
1326                 if (nb_tx_q == 0)
1327                         nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1328         }
1329
1330         if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1331                 RTE_ETHDEV_LOG(ERR,
1332                         "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1333                         nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1334                 ret = -EINVAL;
1335                 goto rollback;
1336         }
1337
1338         if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1339                 RTE_ETHDEV_LOG(ERR,
1340                         "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1341                         nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1342                 ret = -EINVAL;
1343                 goto rollback;
1344         }
1345
1346         /*
1347          * Check that the numbers of RX and TX queues are not greater
1348          * than the maximum number of RX and TX queues supported by the
1349          * configured device.
1350          */
1351         if (nb_rx_q > dev_info.max_rx_queues) {
1352                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1353                         port_id, nb_rx_q, dev_info.max_rx_queues);
1354                 ret = -EINVAL;
1355                 goto rollback;
1356         }
1357
1358         if (nb_tx_q > dev_info.max_tx_queues) {
1359                 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1360                         port_id, nb_tx_q, dev_info.max_tx_queues);
1361                 ret = -EINVAL;
1362                 goto rollback;
1363         }
1364
1365         /* Check that the device supports requested interrupts */
1366         if ((dev_conf->intr_conf.lsc == 1) &&
1367                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1368                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1369                         dev->device->driver->name);
1370                 ret = -EINVAL;
1371                 goto rollback;
1372         }
1373         if ((dev_conf->intr_conf.rmv == 1) &&
1374                         (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1375                 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1376                         dev->device->driver->name);
1377                 ret = -EINVAL;
1378                 goto rollback;
1379         }
1380
1381         /*
1382          * If jumbo frames are enabled, check that the maximum RX packet
1383          * length is supported by the configured device.
1384          */
1385         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1386                 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1387                         RTE_ETHDEV_LOG(ERR,
1388                                 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1389                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1390                                 dev_info.max_rx_pktlen);
1391                         ret = -EINVAL;
1392                         goto rollback;
1393                 } else if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN) {
1394                         RTE_ETHDEV_LOG(ERR,
1395                                 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1396                                 port_id, dev_conf->rxmode.max_rx_pkt_len,
1397                                 (unsigned int)RTE_ETHER_MIN_LEN);
1398                         ret = -EINVAL;
1399                         goto rollback;
1400                 }
1401         } else {
1402                 if (dev_conf->rxmode.max_rx_pkt_len < RTE_ETHER_MIN_LEN ||
1403                         dev_conf->rxmode.max_rx_pkt_len > RTE_ETHER_MAX_LEN)
1404                         /* Use default value */
1405                         dev->data->dev_conf.rxmode.max_rx_pkt_len =
1406                                                         RTE_ETHER_MAX_LEN;
1407         }
1408
1409         /*
1410          * If LRO is enabled, check that the maximum aggregated packet
1411          * size is supported by the configured device.
1412          */
1413         if (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
1414                 if (dev_conf->rxmode.max_lro_pkt_size == 0)
1415                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
1416                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
1417                 ret = check_lro_pkt_size(port_id,
1418                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
1419                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
1420                                 dev_info.max_lro_pkt_size);
1421                 if (ret != 0)
1422                         goto rollback;
1423         }
1424
1425         /* Any requested offloading must be within its device capabilities */
1426         if ((dev_conf->rxmode.offloads & dev_info.rx_offload_capa) !=
1427              dev_conf->rxmode.offloads) {
1428                 RTE_ETHDEV_LOG(ERR,
1429                         "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1430                         "capabilities 0x%"PRIx64" in %s()\n",
1431                         port_id, dev_conf->rxmode.offloads,
1432                         dev_info.rx_offload_capa,
1433                         __func__);
1434                 ret = -EINVAL;
1435                 goto rollback;
1436         }
1437         if ((dev_conf->txmode.offloads & dev_info.tx_offload_capa) !=
1438              dev_conf->txmode.offloads) {
1439                 RTE_ETHDEV_LOG(ERR,
1440                         "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1441                         "capabilities 0x%"PRIx64" in %s()\n",
1442                         port_id, dev_conf->txmode.offloads,
1443                         dev_info.tx_offload_capa,
1444                         __func__);
1445                 ret = -EINVAL;
1446                 goto rollback;
1447         }
1448
1449         dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf =
1450                 rte_eth_rss_hf_refine(dev_conf->rx_adv_conf.rss_conf.rss_hf);
1451
1452         /* Check that device supports requested rss hash functions. */
1453         if ((dev_info.flow_type_rss_offloads |
1454              dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1455             dev_info.flow_type_rss_offloads) {
1456                 RTE_ETHDEV_LOG(ERR,
1457                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1458                         port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1459                         dev_info.flow_type_rss_offloads);
1460                 ret = -EINVAL;
1461                 goto rollback;
1462         }
1463
1464         /* Check if Rx RSS distribution is disabled but RSS hash is enabled. */
1465         if (((dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) == 0) &&
1466             (dev_conf->rxmode.offloads & DEV_RX_OFFLOAD_RSS_HASH)) {
1467                 RTE_ETHDEV_LOG(ERR,
1468                         "Ethdev port_id=%u config invalid Rx mq_mode without RSS but %s offload is requested\n",
1469                         port_id,
1470                         rte_eth_dev_rx_offload_name(DEV_RX_OFFLOAD_RSS_HASH));
1471                 ret = -EINVAL;
1472                 goto rollback;
1473         }
1474
1475         /*
1476          * Setup new number of RX/TX queues and reconfigure device.
1477          */
1478         diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1479         if (diag != 0) {
1480                 RTE_ETHDEV_LOG(ERR,
1481                         "Port%u rte_eth_dev_rx_queue_config = %d\n",
1482                         port_id, diag);
1483                 ret = diag;
1484                 goto rollback;
1485         }
1486
1487         diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1488         if (diag != 0) {
1489                 RTE_ETHDEV_LOG(ERR,
1490                         "Port%u rte_eth_dev_tx_queue_config = %d\n",
1491                         port_id, diag);
1492                 rte_eth_dev_rx_queue_config(dev, 0);
1493                 ret = diag;
1494                 goto rollback;
1495         }
1496
1497         diag = (*dev->dev_ops->dev_configure)(dev);
1498         if (diag != 0) {
1499                 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1500                         port_id, diag);
1501                 ret = eth_err(port_id, diag);
1502                 goto reset_queues;
1503         }
1504
1505         /* Initialize Rx profiling if enabled at compilation time. */
1506         diag = __rte_eth_dev_profile_init(port_id, dev);
1507         if (diag != 0) {
1508                 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1509                         port_id, diag);
1510                 ret = eth_err(port_id, diag);
1511                 goto reset_queues;
1512         }
1513
1514         /* Validate Rx offloads. */
1515         diag = validate_offloads(port_id,
1516                         dev_conf->rxmode.offloads,
1517                         dev->data->dev_conf.rxmode.offloads, "Rx",
1518                         rte_eth_dev_rx_offload_name);
1519         if (diag != 0) {
1520                 ret = diag;
1521                 goto reset_queues;
1522         }
1523
1524         /* Validate Tx offloads. */
1525         diag = validate_offloads(port_id,
1526                         dev_conf->txmode.offloads,
1527                         dev->data->dev_conf.txmode.offloads, "Tx",
1528                         rte_eth_dev_tx_offload_name);
1529         if (diag != 0) {
1530                 ret = diag;
1531                 goto reset_queues;
1532         }
1533
1534         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, 0);
1535         return 0;
1536 reset_queues:
1537         rte_eth_dev_rx_queue_config(dev, 0);
1538         rte_eth_dev_tx_queue_config(dev, 0);
1539 rollback:
1540         memcpy(&dev->data->dev_conf, &orig_conf, sizeof(dev->data->dev_conf));
1541
1542         rte_ethdev_trace_configure(port_id, nb_rx_q, nb_tx_q, dev_conf, ret);
1543         return ret;
1544 }
1545
1546 void
1547 rte_eth_dev_internal_reset(struct rte_eth_dev *dev)
1548 {
1549         if (dev->data->dev_started) {
1550                 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1551                         dev->data->port_id);
1552                 return;
1553         }
1554
1555         rte_eth_dev_rx_queue_config(dev, 0);
1556         rte_eth_dev_tx_queue_config(dev, 0);
1557
1558         memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1559 }
1560
1561 static void
1562 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1563                         struct rte_eth_dev_info *dev_info)
1564 {
1565         struct rte_ether_addr *addr;
1566         uint16_t i;
1567         uint32_t pool = 0;
1568         uint64_t pool_mask;
1569
1570         /* replay MAC address configuration including default MAC */
1571         addr = &dev->data->mac_addrs[0];
1572         if (*dev->dev_ops->mac_addr_set != NULL)
1573                 (*dev->dev_ops->mac_addr_set)(dev, addr);
1574         else if (*dev->dev_ops->mac_addr_add != NULL)
1575                 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1576
1577         if (*dev->dev_ops->mac_addr_add != NULL) {
1578                 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1579                         addr = &dev->data->mac_addrs[i];
1580
1581                         /* skip zero address */
1582                         if (rte_is_zero_ether_addr(addr))
1583                                 continue;
1584
1585                         pool = 0;
1586                         pool_mask = dev->data->mac_pool_sel[i];
1587
1588                         do {
1589                                 if (pool_mask & 1ULL)
1590                                         (*dev->dev_ops->mac_addr_add)(dev,
1591                                                 addr, i, pool);
1592                                 pool_mask >>= 1;
1593                                 pool++;
1594                         } while (pool_mask);
1595                 }
1596         }
1597 }
1598
1599 static int
1600 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1601                            struct rte_eth_dev_info *dev_info, uint16_t port_id)
1602 {
1603         int ret;
1604
1605         if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1606                 rte_eth_dev_mac_restore(dev, dev_info);
1607
1608         /* replay promiscuous configuration */
1609         /*
1610          * use callbacks directly since we don't need port_id check and
1611          * would like to bypass the same value set
1612          */
1613         if (rte_eth_promiscuous_get(port_id) == 1 &&
1614             *dev->dev_ops->promiscuous_enable != NULL) {
1615                 ret = eth_err(port_id,
1616                               (*dev->dev_ops->promiscuous_enable)(dev));
1617                 if (ret != 0 && ret != -ENOTSUP) {
1618                         RTE_ETHDEV_LOG(ERR,
1619                                 "Failed to enable promiscuous mode for device (port %u): %s\n",
1620                                 port_id, rte_strerror(-ret));
1621                         return ret;
1622                 }
1623         } else if (rte_eth_promiscuous_get(port_id) == 0 &&
1624                    *dev->dev_ops->promiscuous_disable != NULL) {
1625                 ret = eth_err(port_id,
1626                               (*dev->dev_ops->promiscuous_disable)(dev));
1627                 if (ret != 0 && ret != -ENOTSUP) {
1628                         RTE_ETHDEV_LOG(ERR,
1629                                 "Failed to disable promiscuous mode for device (port %u): %s\n",
1630                                 port_id, rte_strerror(-ret));
1631                         return ret;
1632                 }
1633         }
1634
1635         /* replay all multicast configuration */
1636         /*
1637          * use callbacks directly since we don't need port_id check and
1638          * would like to bypass the same value set
1639          */
1640         if (rte_eth_allmulticast_get(port_id) == 1 &&
1641             *dev->dev_ops->allmulticast_enable != NULL) {
1642                 ret = eth_err(port_id,
1643                               (*dev->dev_ops->allmulticast_enable)(dev));
1644                 if (ret != 0 && ret != -ENOTSUP) {
1645                         RTE_ETHDEV_LOG(ERR,
1646                                 "Failed to enable allmulticast mode for device (port %u): %s\n",
1647                                 port_id, rte_strerror(-ret));
1648                         return ret;
1649                 }
1650         } else if (rte_eth_allmulticast_get(port_id) == 0 &&
1651                    *dev->dev_ops->allmulticast_disable != NULL) {
1652                 ret = eth_err(port_id,
1653                               (*dev->dev_ops->allmulticast_disable)(dev));
1654                 if (ret != 0 && ret != -ENOTSUP) {
1655                         RTE_ETHDEV_LOG(ERR,
1656                                 "Failed to disable allmulticast mode for device (port %u): %s\n",
1657                                 port_id, rte_strerror(-ret));
1658                         return ret;
1659                 }
1660         }
1661
1662         return 0;
1663 }
1664
1665 int
1666 rte_eth_dev_start(uint16_t port_id)
1667 {
1668         struct rte_eth_dev *dev;
1669         struct rte_eth_dev_info dev_info;
1670         int diag;
1671         int ret;
1672
1673         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1674
1675         dev = &rte_eth_devices[port_id];
1676
1677         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1678
1679         if (dev->data->dev_started != 0) {
1680                 RTE_ETHDEV_LOG(INFO,
1681                         "Device with port_id=%"PRIu16" already started\n",
1682                         port_id);
1683                 return 0;
1684         }
1685
1686         ret = rte_eth_dev_info_get(port_id, &dev_info);
1687         if (ret != 0)
1688                 return ret;
1689
1690         /* Lets restore MAC now if device does not support live change */
1691         if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1692                 rte_eth_dev_mac_restore(dev, &dev_info);
1693
1694         diag = (*dev->dev_ops->dev_start)(dev);
1695         if (diag == 0)
1696                 dev->data->dev_started = 1;
1697         else
1698                 return eth_err(port_id, diag);
1699
1700         ret = rte_eth_dev_config_restore(dev, &dev_info, port_id);
1701         if (ret != 0) {
1702                 RTE_ETHDEV_LOG(ERR,
1703                         "Error during restoring configuration for device (port %u): %s\n",
1704                         port_id, rte_strerror(-ret));
1705                 rte_eth_dev_stop(port_id);
1706                 return ret;
1707         }
1708
1709         if (dev->data->dev_conf.intr_conf.lsc == 0) {
1710                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1711                 (*dev->dev_ops->link_update)(dev, 0);
1712         }
1713
1714         rte_ethdev_trace_start(port_id);
1715         return 0;
1716 }
1717
1718 void
1719 rte_eth_dev_stop(uint16_t port_id)
1720 {
1721         struct rte_eth_dev *dev;
1722
1723         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1724         dev = &rte_eth_devices[port_id];
1725
1726         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1727
1728         if (dev->data->dev_started == 0) {
1729                 RTE_ETHDEV_LOG(INFO,
1730                         "Device with port_id=%"PRIu16" already stopped\n",
1731                         port_id);
1732                 return;
1733         }
1734
1735         dev->data->dev_started = 0;
1736         (*dev->dev_ops->dev_stop)(dev);
1737         rte_ethdev_trace_stop(port_id);
1738 }
1739
1740 int
1741 rte_eth_dev_set_link_up(uint16_t port_id)
1742 {
1743         struct rte_eth_dev *dev;
1744
1745         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1746
1747         dev = &rte_eth_devices[port_id];
1748
1749         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1750         return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1751 }
1752
1753 int
1754 rte_eth_dev_set_link_down(uint16_t port_id)
1755 {
1756         struct rte_eth_dev *dev;
1757
1758         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1759
1760         dev = &rte_eth_devices[port_id];
1761
1762         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1763         return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1764 }
1765
1766 void
1767 rte_eth_dev_close(uint16_t port_id)
1768 {
1769         struct rte_eth_dev *dev;
1770
1771         RTE_ETH_VALID_PORTID_OR_RET(port_id);
1772         dev = &rte_eth_devices[port_id];
1773
1774         RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1775         (*dev->dev_ops->dev_close)(dev);
1776
1777         rte_ethdev_trace_close(port_id);
1778         rte_eth_dev_release_port(dev);
1779 }
1780
1781 int
1782 rte_eth_dev_reset(uint16_t port_id)
1783 {
1784         struct rte_eth_dev *dev;
1785         int ret;
1786
1787         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1788         dev = &rte_eth_devices[port_id];
1789
1790         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1791
1792         rte_eth_dev_stop(port_id);
1793         ret = dev->dev_ops->dev_reset(dev);
1794
1795         return eth_err(port_id, ret);
1796 }
1797
1798 int
1799 rte_eth_dev_is_removed(uint16_t port_id)
1800 {
1801         struct rte_eth_dev *dev;
1802         int ret;
1803
1804         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1805
1806         dev = &rte_eth_devices[port_id];
1807
1808         if (dev->state == RTE_ETH_DEV_REMOVED)
1809                 return 1;
1810
1811         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1812
1813         ret = dev->dev_ops->is_removed(dev);
1814         if (ret != 0)
1815                 /* Device is physically removed. */
1816                 dev->state = RTE_ETH_DEV_REMOVED;
1817
1818         return ret;
1819 }
1820
1821 static int
1822 rte_eth_rx_queue_check_split(const struct rte_eth_rxseg_split *rx_seg,
1823                              uint16_t n_seg, uint32_t *mbp_buf_size,
1824                              const struct rte_eth_dev_info *dev_info)
1825 {
1826         const struct rte_eth_rxseg_capa *seg_capa = &dev_info->rx_seg_capa;
1827         struct rte_mempool *mp_first;
1828         uint32_t offset_mask;
1829         uint16_t seg_idx;
1830
1831         if (n_seg > seg_capa->max_nseg) {
1832                 RTE_ETHDEV_LOG(ERR,
1833                                "Requested Rx segments %u exceed supported %u\n",
1834                                n_seg, seg_capa->max_nseg);
1835                 return -EINVAL;
1836         }
1837         /*
1838          * Check the sizes and offsets against buffer sizes
1839          * for each segment specified in extended configuration.
1840          */
1841         mp_first = rx_seg[0].mp;
1842         offset_mask = (1u << seg_capa->offset_align_log2) - 1;
1843         for (seg_idx = 0; seg_idx < n_seg; seg_idx++) {
1844                 struct rte_mempool *mpl = rx_seg[seg_idx].mp;
1845                 uint32_t length = rx_seg[seg_idx].length;
1846                 uint32_t offset = rx_seg[seg_idx].offset;
1847
1848                 if (mpl == NULL) {
1849                         RTE_ETHDEV_LOG(ERR, "null mempool pointer\n");
1850                         return -EINVAL;
1851                 }
1852                 if (seg_idx != 0 && mp_first != mpl &&
1853                     seg_capa->multi_pools == 0) {
1854                         RTE_ETHDEV_LOG(ERR, "Receiving to multiple pools is not supported\n");
1855                         return -ENOTSUP;
1856                 }
1857                 if (offset != 0) {
1858                         if (seg_capa->offset_allowed == 0) {
1859                                 RTE_ETHDEV_LOG(ERR, "Rx segmentation with offset is not supported\n");
1860                                 return -ENOTSUP;
1861                         }
1862                         if (offset & offset_mask) {
1863                                 RTE_ETHDEV_LOG(ERR, "Rx segmentation invalid offset alignment %u, %u\n",
1864                                                offset,
1865                                                seg_capa->offset_align_log2);
1866                                 return -EINVAL;
1867                         }
1868                 }
1869                 if (mpl->private_data_size <
1870                         sizeof(struct rte_pktmbuf_pool_private)) {
1871                         RTE_ETHDEV_LOG(ERR,
1872                                        "%s private_data_size %u < %u\n",
1873                                        mpl->name, mpl->private_data_size,
1874                                        (unsigned int)sizeof
1875                                         (struct rte_pktmbuf_pool_private));
1876                         return -ENOSPC;
1877                 }
1878                 offset += seg_idx != 0 ? 0 : RTE_PKTMBUF_HEADROOM;
1879                 *mbp_buf_size = rte_pktmbuf_data_room_size(mpl);
1880                 length = length != 0 ? length : *mbp_buf_size;
1881                 if (*mbp_buf_size < length + offset) {
1882                         RTE_ETHDEV_LOG(ERR,
1883                                        "%s mbuf_data_room_size %u < %u (segment length=%u + segment offset=%u)\n",
1884                                        mpl->name, *mbp_buf_size,
1885                                        length + offset, length, offset);
1886                         return -EINVAL;
1887                 }
1888         }
1889         return 0;
1890 }
1891
1892 int
1893 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1894                        uint16_t nb_rx_desc, unsigned int socket_id,
1895                        const struct rte_eth_rxconf *rx_conf,
1896                        struct rte_mempool *mp)
1897 {
1898         int ret;
1899         uint32_t mbp_buf_size;
1900         struct rte_eth_dev *dev;
1901         struct rte_eth_dev_info dev_info;
1902         struct rte_eth_rxconf local_conf;
1903         void **rxq;
1904
1905         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1906
1907         dev = &rte_eth_devices[port_id];
1908         if (rx_queue_id >= dev->data->nb_rx_queues) {
1909                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1910                 return -EINVAL;
1911         }
1912
1913         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1914
1915         ret = rte_eth_dev_info_get(port_id, &dev_info);
1916         if (ret != 0)
1917                 return ret;
1918
1919         if (mp != NULL) {
1920                 /* Single pool configuration check. */
1921                 if (rx_conf != NULL && rx_conf->rx_nseg != 0) {
1922                         RTE_ETHDEV_LOG(ERR,
1923                                        "Ambiguous segment configuration\n");
1924                         return -EINVAL;
1925                 }
1926                 /*
1927                  * Check the size of the mbuf data buffer, this value
1928                  * must be provided in the private data of the memory pool.
1929                  * First check that the memory pool(s) has a valid private data.
1930                  */
1931                 if (mp->private_data_size <
1932                                 sizeof(struct rte_pktmbuf_pool_private)) {
1933                         RTE_ETHDEV_LOG(ERR, "%s private_data_size %u < %u\n",
1934                                 mp->name, mp->private_data_size,
1935                                 (unsigned int)
1936                                 sizeof(struct rte_pktmbuf_pool_private));
1937                         return -ENOSPC;
1938                 }
1939                 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1940                 if (mbp_buf_size < dev_info.min_rx_bufsize +
1941                                    RTE_PKTMBUF_HEADROOM) {
1942                         RTE_ETHDEV_LOG(ERR,
1943                                        "%s mbuf_data_room_size %u < %u (RTE_PKTMBUF_HEADROOM=%u + min_rx_bufsize(dev)=%u)\n",
1944                                        mp->name, mbp_buf_size,
1945                                        RTE_PKTMBUF_HEADROOM +
1946                                        dev_info.min_rx_bufsize,
1947                                        RTE_PKTMBUF_HEADROOM,
1948                                        dev_info.min_rx_bufsize);
1949                         return -EINVAL;
1950                 }
1951         } else {
1952                 const struct rte_eth_rxseg_split *rx_seg =
1953                         (const struct rte_eth_rxseg_split *)rx_conf->rx_seg;
1954                 uint16_t n_seg = rx_conf->rx_nseg;
1955
1956                 /* Extended multi-segment configuration check. */
1957                 if (rx_conf == NULL || rx_conf->rx_seg == NULL || rx_conf->rx_nseg == 0) {
1958                         RTE_ETHDEV_LOG(ERR,
1959                                        "Memory pool is null and no extended configuration provided\n");
1960                         return -EINVAL;
1961                 }
1962                 if (rx_conf->offloads & RTE_ETH_RX_OFFLOAD_BUFFER_SPLIT) {
1963                         ret = rte_eth_rx_queue_check_split(rx_seg, n_seg,
1964                                                            &mbp_buf_size,
1965                                                            &dev_info);
1966                         if (ret != 0)
1967                                 return ret;
1968                 } else {
1969                         RTE_ETHDEV_LOG(ERR, "No Rx segmentation offload configured\n");
1970                         return -EINVAL;
1971                 }
1972         }
1973
1974         /* Use default specified by driver, if nb_rx_desc is zero */
1975         if (nb_rx_desc == 0) {
1976                 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1977                 /* If driver default is also zero, fall back on EAL default */
1978                 if (nb_rx_desc == 0)
1979                         nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1980         }
1981
1982         if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1983                         nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1984                         nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1985
1986                 RTE_ETHDEV_LOG(ERR,
1987                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
1988                         nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1989                         dev_info.rx_desc_lim.nb_min,
1990                         dev_info.rx_desc_lim.nb_align);
1991                 return -EINVAL;
1992         }
1993
1994         if (dev->data->dev_started &&
1995                 !(dev_info.dev_capa &
1996                         RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1997                 return -EBUSY;
1998
1999         if (dev->data->dev_started &&
2000                 (dev->data->rx_queue_state[rx_queue_id] !=
2001                         RTE_ETH_QUEUE_STATE_STOPPED))
2002                 return -EBUSY;
2003
2004         rxq = dev->data->rx_queues;
2005         if (rxq[rx_queue_id]) {
2006                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2007                                         -ENOTSUP);
2008                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2009                 rxq[rx_queue_id] = NULL;
2010         }
2011
2012         if (rx_conf == NULL)
2013                 rx_conf = &dev_info.default_rxconf;
2014
2015         local_conf = *rx_conf;
2016
2017         /*
2018          * If an offloading has already been enabled in
2019          * rte_eth_dev_configure(), it has been enabled on all queues,
2020          * so there is no need to enable it in this queue again.
2021          * The local_conf.offloads input to underlying PMD only carries
2022          * those offloadings which are only enabled on this queue and
2023          * not enabled on all queues.
2024          */
2025         local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
2026
2027         /*
2028          * New added offloadings for this queue are those not enabled in
2029          * rte_eth_dev_configure() and they must be per-queue type.
2030          * A pure per-port offloading can't be enabled on a queue while
2031          * disabled on another queue. A pure per-port offloading can't
2032          * be enabled for any queue as new added one if it hasn't been
2033          * enabled in rte_eth_dev_configure().
2034          */
2035         if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
2036              local_conf.offloads) {
2037                 RTE_ETHDEV_LOG(ERR,
2038                         "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2039                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2040                         port_id, rx_queue_id, local_conf.offloads,
2041                         dev_info.rx_queue_offload_capa,
2042                         __func__);
2043                 return -EINVAL;
2044         }
2045
2046         /*
2047          * If LRO is enabled, check that the maximum aggregated packet
2048          * size is supported by the configured device.
2049          */
2050         if (local_conf.offloads & DEV_RX_OFFLOAD_TCP_LRO) {
2051                 if (dev->data->dev_conf.rxmode.max_lro_pkt_size == 0)
2052                         dev->data->dev_conf.rxmode.max_lro_pkt_size =
2053                                 dev->data->dev_conf.rxmode.max_rx_pkt_len;
2054                 int ret = check_lro_pkt_size(port_id,
2055                                 dev->data->dev_conf.rxmode.max_lro_pkt_size,
2056                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
2057                                 dev_info.max_lro_pkt_size);
2058                 if (ret != 0)
2059                         return ret;
2060         }
2061
2062         ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
2063                                               socket_id, &local_conf, mp);
2064         if (!ret) {
2065                 if (!dev->data->min_rx_buf_size ||
2066                     dev->data->min_rx_buf_size > mbp_buf_size)
2067                         dev->data->min_rx_buf_size = mbp_buf_size;
2068         }
2069
2070         rte_ethdev_trace_rxq_setup(port_id, rx_queue_id, nb_rx_desc, mp,
2071                 rx_conf, ret);
2072         return eth_err(port_id, ret);
2073 }
2074
2075 int
2076 rte_eth_rx_hairpin_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
2077                                uint16_t nb_rx_desc,
2078                                const struct rte_eth_hairpin_conf *conf)
2079 {
2080         int ret;
2081         struct rte_eth_dev *dev;
2082         struct rte_eth_hairpin_cap cap;
2083         void **rxq;
2084         int i;
2085         int count;
2086
2087         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2088
2089         dev = &rte_eth_devices[port_id];
2090         if (rx_queue_id >= dev->data->nb_rx_queues) {
2091                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
2092                 return -EINVAL;
2093         }
2094         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2095         if (ret != 0)
2096                 return ret;
2097         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_hairpin_queue_setup,
2098                                 -ENOTSUP);
2099         /* if nb_rx_desc is zero use max number of desc from the driver. */
2100         if (nb_rx_desc == 0)
2101                 nb_rx_desc = cap.max_nb_desc;
2102         if (nb_rx_desc > cap.max_nb_desc) {
2103                 RTE_ETHDEV_LOG(ERR,
2104                         "Invalid value for nb_rx_desc(=%hu), should be: <= %hu",
2105                         nb_rx_desc, cap.max_nb_desc);
2106                 return -EINVAL;
2107         }
2108         if (conf->peer_count > cap.max_rx_2_tx) {
2109                 RTE_ETHDEV_LOG(ERR,
2110                         "Invalid value for number of peers for Rx queue(=%u), should be: <= %hu",
2111                         conf->peer_count, cap.max_rx_2_tx);
2112                 return -EINVAL;
2113         }
2114         if (conf->peer_count == 0) {
2115                 RTE_ETHDEV_LOG(ERR,
2116                         "Invalid value for number of peers for Rx queue(=%u), should be: > 0",
2117                         conf->peer_count);
2118                 return -EINVAL;
2119         }
2120         for (i = 0, count = 0; i < dev->data->nb_rx_queues &&
2121              cap.max_nb_queues != UINT16_MAX; i++) {
2122                 if (i == rx_queue_id || rte_eth_dev_is_rx_hairpin_queue(dev, i))
2123                         count++;
2124         }
2125         if (count > cap.max_nb_queues) {
2126                 RTE_ETHDEV_LOG(ERR, "To many Rx hairpin queues max is %d",
2127                 cap.max_nb_queues);
2128                 return -EINVAL;
2129         }
2130         if (dev->data->dev_started)
2131                 return -EBUSY;
2132         rxq = dev->data->rx_queues;
2133         if (rxq[rx_queue_id] != NULL) {
2134                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
2135                                         -ENOTSUP);
2136                 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
2137                 rxq[rx_queue_id] = NULL;
2138         }
2139         ret = (*dev->dev_ops->rx_hairpin_queue_setup)(dev, rx_queue_id,
2140                                                       nb_rx_desc, conf);
2141         if (ret == 0)
2142                 dev->data->rx_queue_state[rx_queue_id] =
2143                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2144         return eth_err(port_id, ret);
2145 }
2146
2147 int
2148 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2149                        uint16_t nb_tx_desc, unsigned int socket_id,
2150                        const struct rte_eth_txconf *tx_conf)
2151 {
2152         struct rte_eth_dev *dev;
2153         struct rte_eth_dev_info dev_info;
2154         struct rte_eth_txconf local_conf;
2155         void **txq;
2156         int ret;
2157
2158         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2159
2160         dev = &rte_eth_devices[port_id];
2161         if (tx_queue_id >= dev->data->nb_tx_queues) {
2162                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2163                 return -EINVAL;
2164         }
2165
2166         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
2167
2168         ret = rte_eth_dev_info_get(port_id, &dev_info);
2169         if (ret != 0)
2170                 return ret;
2171
2172         /* Use default specified by driver, if nb_tx_desc is zero */
2173         if (nb_tx_desc == 0) {
2174                 nb_tx_desc = dev_info.default_txportconf.ring_size;
2175                 /* If driver default is zero, fall back on EAL default */
2176                 if (nb_tx_desc == 0)
2177                         nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
2178         }
2179         if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
2180             nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
2181             nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
2182                 RTE_ETHDEV_LOG(ERR,
2183                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, >= %hu, and a product of %hu\n",
2184                         nb_tx_desc, dev_info.tx_desc_lim.nb_max,
2185                         dev_info.tx_desc_lim.nb_min,
2186                         dev_info.tx_desc_lim.nb_align);
2187                 return -EINVAL;
2188         }
2189
2190         if (dev->data->dev_started &&
2191                 !(dev_info.dev_capa &
2192                         RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
2193                 return -EBUSY;
2194
2195         if (dev->data->dev_started &&
2196                 (dev->data->tx_queue_state[tx_queue_id] !=
2197                         RTE_ETH_QUEUE_STATE_STOPPED))
2198                 return -EBUSY;
2199
2200         txq = dev->data->tx_queues;
2201         if (txq[tx_queue_id]) {
2202                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2203                                         -ENOTSUP);
2204                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2205                 txq[tx_queue_id] = NULL;
2206         }
2207
2208         if (tx_conf == NULL)
2209                 tx_conf = &dev_info.default_txconf;
2210
2211         local_conf = *tx_conf;
2212
2213         /*
2214          * If an offloading has already been enabled in
2215          * rte_eth_dev_configure(), it has been enabled on all queues,
2216          * so there is no need to enable it in this queue again.
2217          * The local_conf.offloads input to underlying PMD only carries
2218          * those offloadings which are only enabled on this queue and
2219          * not enabled on all queues.
2220          */
2221         local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
2222
2223         /*
2224          * New added offloadings for this queue are those not enabled in
2225          * rte_eth_dev_configure() and they must be per-queue type.
2226          * A pure per-port offloading can't be enabled on a queue while
2227          * disabled on another queue. A pure per-port offloading can't
2228          * be enabled for any queue as new added one if it hasn't been
2229          * enabled in rte_eth_dev_configure().
2230          */
2231         if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
2232              local_conf.offloads) {
2233                 RTE_ETHDEV_LOG(ERR,
2234                         "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
2235                         "within per-queue offload capabilities 0x%"PRIx64" in %s()\n",
2236                         port_id, tx_queue_id, local_conf.offloads,
2237                         dev_info.tx_queue_offload_capa,
2238                         __func__);
2239                 return -EINVAL;
2240         }
2241
2242         rte_ethdev_trace_txq_setup(port_id, tx_queue_id, nb_tx_desc, tx_conf);
2243         return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
2244                        tx_queue_id, nb_tx_desc, socket_id, &local_conf));
2245 }
2246
2247 int
2248 rte_eth_tx_hairpin_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
2249                                uint16_t nb_tx_desc,
2250                                const struct rte_eth_hairpin_conf *conf)
2251 {
2252         struct rte_eth_dev *dev;
2253         struct rte_eth_hairpin_cap cap;
2254         void **txq;
2255         int i;
2256         int count;
2257         int ret;
2258
2259         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2260         dev = &rte_eth_devices[port_id];
2261         if (tx_queue_id >= dev->data->nb_tx_queues) {
2262                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
2263                 return -EINVAL;
2264         }
2265         ret = rte_eth_dev_hairpin_capability_get(port_id, &cap);
2266         if (ret != 0)
2267                 return ret;
2268         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_hairpin_queue_setup,
2269                                 -ENOTSUP);
2270         /* if nb_rx_desc is zero use max number of desc from the driver. */
2271         if (nb_tx_desc == 0)
2272                 nb_tx_desc = cap.max_nb_desc;
2273         if (nb_tx_desc > cap.max_nb_desc) {
2274                 RTE_ETHDEV_LOG(ERR,
2275                         "Invalid value for nb_tx_desc(=%hu), should be: <= %hu",
2276                         nb_tx_desc, cap.max_nb_desc);
2277                 return -EINVAL;
2278         }
2279         if (conf->peer_count > cap.max_tx_2_rx) {
2280                 RTE_ETHDEV_LOG(ERR,
2281                         "Invalid value for number of peers for Tx queue(=%u), should be: <= %hu",
2282                         conf->peer_count, cap.max_tx_2_rx);
2283                 return -EINVAL;
2284         }
2285         if (conf->peer_count == 0) {
2286                 RTE_ETHDEV_LOG(ERR,
2287                         "Invalid value for number of peers for Tx queue(=%u), should be: > 0",
2288                         conf->peer_count);
2289                 return -EINVAL;
2290         }
2291         for (i = 0, count = 0; i < dev->data->nb_tx_queues &&
2292              cap.max_nb_queues != UINT16_MAX; i++) {
2293                 if (i == tx_queue_id || rte_eth_dev_is_tx_hairpin_queue(dev, i))
2294                         count++;
2295         }
2296         if (count > cap.max_nb_queues) {
2297                 RTE_ETHDEV_LOG(ERR, "To many Tx hairpin queues max is %d",
2298                 cap.max_nb_queues);
2299                 return -EINVAL;
2300         }
2301         if (dev->data->dev_started)
2302                 return -EBUSY;
2303         txq = dev->data->tx_queues;
2304         if (txq[tx_queue_id] != NULL) {
2305                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
2306                                         -ENOTSUP);
2307                 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
2308                 txq[tx_queue_id] = NULL;
2309         }
2310         ret = (*dev->dev_ops->tx_hairpin_queue_setup)
2311                 (dev, tx_queue_id, nb_tx_desc, conf);
2312         if (ret == 0)
2313                 dev->data->tx_queue_state[tx_queue_id] =
2314                         RTE_ETH_QUEUE_STATE_HAIRPIN;
2315         return eth_err(port_id, ret);
2316 }
2317
2318 int
2319 rte_eth_hairpin_bind(uint16_t tx_port, uint16_t rx_port)
2320 {
2321         struct rte_eth_dev *dev;
2322         int ret;
2323
2324         RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2325         dev = &rte_eth_devices[tx_port];
2326         if (dev->data->dev_started == 0) {
2327                 RTE_ETHDEV_LOG(ERR, "Tx port %d is not started\n", tx_port);
2328                 return -EBUSY;
2329         }
2330
2331         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_bind, -ENOTSUP);
2332         ret = (*dev->dev_ops->hairpin_bind)(dev, rx_port);
2333         if (ret != 0)
2334                 RTE_ETHDEV_LOG(ERR, "Failed to bind hairpin Tx %d"
2335                                " to Rx %d (%d - all ports)\n",
2336                                tx_port, rx_port, RTE_MAX_ETHPORTS);
2337
2338         return ret;
2339 }
2340
2341 int
2342 rte_eth_hairpin_unbind(uint16_t tx_port, uint16_t rx_port)
2343 {
2344         struct rte_eth_dev *dev;
2345         int ret;
2346
2347         RTE_ETH_VALID_PORTID_OR_ERR_RET(tx_port, -ENODEV);
2348         dev = &rte_eth_devices[tx_port];
2349         if (dev->data->dev_started == 0) {
2350                 RTE_ETHDEV_LOG(ERR, "Tx port %d is already stopped\n", tx_port);
2351                 return -EBUSY;
2352         }
2353
2354         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_unbind, -ENOTSUP);
2355         ret = (*dev->dev_ops->hairpin_unbind)(dev, rx_port);
2356         if (ret != 0)
2357                 RTE_ETHDEV_LOG(ERR, "Failed to unbind hairpin Tx %d"
2358                                " from Rx %d (%d - all ports)\n",
2359                                tx_port, rx_port, RTE_MAX_ETHPORTS);
2360
2361         return ret;
2362 }
2363
2364 int
2365 rte_eth_hairpin_get_peer_ports(uint16_t port_id, uint16_t *peer_ports,
2366                                size_t len, uint32_t direction)
2367 {
2368         struct rte_eth_dev *dev;
2369         int ret;
2370
2371         if (peer_ports == NULL || len == 0)
2372                 return -EINVAL;
2373
2374         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2375         dev = &rte_eth_devices[port_id];
2376         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_get_peer_ports,
2377                                 -ENOTSUP);
2378
2379         ret = (*dev->dev_ops->hairpin_get_peer_ports)(dev, peer_ports,
2380                                                       len, direction);
2381         if (ret < 0)
2382                 RTE_ETHDEV_LOG(ERR, "Failed to get %d hairpin peer %s ports\n",
2383                                port_id, direction ? "Rx" : "Tx");
2384
2385         return ret;
2386 }
2387
2388 void
2389 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
2390                 void *userdata __rte_unused)
2391 {
2392         rte_pktmbuf_free_bulk(pkts, unsent);
2393 }
2394
2395 void
2396 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
2397                 void *userdata)
2398 {
2399         uint64_t *count = userdata;
2400
2401         rte_pktmbuf_free_bulk(pkts, unsent);
2402         *count += unsent;
2403 }
2404
2405 int
2406 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
2407                 buffer_tx_error_fn cbfn, void *userdata)
2408 {
2409         buffer->error_callback = cbfn;
2410         buffer->error_userdata = userdata;
2411         return 0;
2412 }
2413
2414 int
2415 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
2416 {
2417         int ret = 0;
2418
2419         if (buffer == NULL)
2420                 return -EINVAL;
2421
2422         buffer->size = size;
2423         if (buffer->error_callback == NULL) {
2424                 ret = rte_eth_tx_buffer_set_err_callback(
2425                         buffer, rte_eth_tx_buffer_drop_callback, NULL);
2426         }
2427
2428         return ret;
2429 }
2430
2431 int
2432 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
2433 {
2434         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2435         int ret;
2436
2437         /* Validate Input Data. Bail if not valid or not supported. */
2438         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2439         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
2440
2441         /* Call driver to free pending mbufs. */
2442         ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
2443                                                free_cnt);
2444         return eth_err(port_id, ret);
2445 }
2446
2447 int
2448 rte_eth_promiscuous_enable(uint16_t port_id)
2449 {
2450         struct rte_eth_dev *dev;
2451         int diag = 0;
2452
2453         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2454         dev = &rte_eth_devices[port_id];
2455
2456         if (dev->data->promiscuous == 1)
2457                 return 0;
2458
2459         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_enable, -ENOTSUP);
2460
2461         diag = (*dev->dev_ops->promiscuous_enable)(dev);
2462         dev->data->promiscuous = (diag == 0) ? 1 : 0;
2463
2464         return eth_err(port_id, diag);
2465 }
2466
2467 int
2468 rte_eth_promiscuous_disable(uint16_t port_id)
2469 {
2470         struct rte_eth_dev *dev;
2471         int diag = 0;
2472
2473         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474         dev = &rte_eth_devices[port_id];
2475
2476         if (dev->data->promiscuous == 0)
2477                 return 0;
2478
2479         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->promiscuous_disable, -ENOTSUP);
2480
2481         dev->data->promiscuous = 0;
2482         diag = (*dev->dev_ops->promiscuous_disable)(dev);
2483         if (diag != 0)
2484                 dev->data->promiscuous = 1;
2485
2486         return eth_err(port_id, diag);
2487 }
2488
2489 int
2490 rte_eth_promiscuous_get(uint16_t port_id)
2491 {
2492         struct rte_eth_dev *dev;
2493
2494         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2495
2496         dev = &rte_eth_devices[port_id];
2497         return dev->data->promiscuous;
2498 }
2499
2500 int
2501 rte_eth_allmulticast_enable(uint16_t port_id)
2502 {
2503         struct rte_eth_dev *dev;
2504         int diag;
2505
2506         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2507         dev = &rte_eth_devices[port_id];
2508
2509         if (dev->data->all_multicast == 1)
2510                 return 0;
2511
2512         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_enable, -ENOTSUP);
2513         diag = (*dev->dev_ops->allmulticast_enable)(dev);
2514         dev->data->all_multicast = (diag == 0) ? 1 : 0;
2515
2516         return eth_err(port_id, diag);
2517 }
2518
2519 int
2520 rte_eth_allmulticast_disable(uint16_t port_id)
2521 {
2522         struct rte_eth_dev *dev;
2523         int diag;
2524
2525         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2526         dev = &rte_eth_devices[port_id];
2527
2528         if (dev->data->all_multicast == 0)
2529                 return 0;
2530
2531         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->allmulticast_disable, -ENOTSUP);
2532         dev->data->all_multicast = 0;
2533         diag = (*dev->dev_ops->allmulticast_disable)(dev);
2534         if (diag != 0)
2535                 dev->data->all_multicast = 1;
2536
2537         return eth_err(port_id, diag);
2538 }
2539
2540 int
2541 rte_eth_allmulticast_get(uint16_t port_id)
2542 {
2543         struct rte_eth_dev *dev;
2544
2545         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2546
2547         dev = &rte_eth_devices[port_id];
2548         return dev->data->all_multicast;
2549 }
2550
2551 int
2552 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
2553 {
2554         struct rte_eth_dev *dev;
2555
2556         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2557         dev = &rte_eth_devices[port_id];
2558
2559         if (dev->data->dev_conf.intr_conf.lsc &&
2560             dev->data->dev_started)
2561                 rte_eth_linkstatus_get(dev, eth_link);
2562         else {
2563                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2564                 (*dev->dev_ops->link_update)(dev, 1);
2565                 *eth_link = dev->data->dev_link;
2566         }
2567
2568         return 0;
2569 }
2570
2571 int
2572 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
2573 {
2574         struct rte_eth_dev *dev;
2575
2576         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2577         dev = &rte_eth_devices[port_id];
2578
2579         if (dev->data->dev_conf.intr_conf.lsc &&
2580             dev->data->dev_started)
2581                 rte_eth_linkstatus_get(dev, eth_link);
2582         else {
2583                 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
2584                 (*dev->dev_ops->link_update)(dev, 0);
2585                 *eth_link = dev->data->dev_link;
2586         }
2587
2588         return 0;
2589 }
2590
2591 const char *
2592 rte_eth_link_speed_to_str(uint32_t link_speed)
2593 {
2594         switch (link_speed) {
2595         case ETH_SPEED_NUM_NONE: return "None";
2596         case ETH_SPEED_NUM_10M:  return "10 Mbps";
2597         case ETH_SPEED_NUM_100M: return "100 Mbps";
2598         case ETH_SPEED_NUM_1G:   return "1 Gbps";
2599         case ETH_SPEED_NUM_2_5G: return "2.5 Gbps";
2600         case ETH_SPEED_NUM_5G:   return "5 Gbps";
2601         case ETH_SPEED_NUM_10G:  return "10 Gbps";
2602         case ETH_SPEED_NUM_20G:  return "20 Gbps";
2603         case ETH_SPEED_NUM_25G:  return "25 Gbps";
2604         case ETH_SPEED_NUM_40G:  return "40 Gbps";
2605         case ETH_SPEED_NUM_50G:  return "50 Gbps";
2606         case ETH_SPEED_NUM_56G:  return "56 Gbps";
2607         case ETH_SPEED_NUM_100G: return "100 Gbps";
2608         case ETH_SPEED_NUM_200G: return "200 Gbps";
2609         case ETH_SPEED_NUM_UNKNOWN: return "Unknown";
2610         default: return "Invalid";
2611         }
2612 }
2613
2614 int
2615 rte_eth_link_to_str(char *str, size_t len, const struct rte_eth_link *eth_link)
2616 {
2617         if (eth_link->link_status == ETH_LINK_DOWN)
2618                 return snprintf(str, len, "Link down");
2619         else
2620                 return snprintf(str, len, "Link up at %s %s %s",
2621                         rte_eth_link_speed_to_str(eth_link->link_speed),
2622                         (eth_link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
2623                         "FDX" : "HDX",
2624                         (eth_link->link_autoneg == ETH_LINK_AUTONEG) ?
2625                         "Autoneg" : "Fixed");
2626 }
2627
2628 int
2629 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
2630 {
2631         struct rte_eth_dev *dev;
2632
2633         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2634
2635         dev = &rte_eth_devices[port_id];
2636         memset(stats, 0, sizeof(*stats));
2637
2638         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
2639         stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
2640         return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
2641 }
2642
2643 int
2644 rte_eth_stats_reset(uint16_t port_id)
2645 {
2646         struct rte_eth_dev *dev;
2647         int ret;
2648
2649         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2650         dev = &rte_eth_devices[port_id];
2651
2652         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
2653         ret = (*dev->dev_ops->stats_reset)(dev);
2654         if (ret != 0)
2655                 return eth_err(port_id, ret);
2656
2657         dev->data->rx_mbuf_alloc_failed = 0;
2658
2659         return 0;
2660 }
2661
2662 static inline int
2663 get_xstats_basic_count(struct rte_eth_dev *dev)
2664 {
2665         uint16_t nb_rxqs, nb_txqs;
2666         int count;
2667
2668         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2669         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2670
2671         count = RTE_NB_STATS;
2672         count += nb_rxqs * RTE_NB_RXQ_STATS;
2673         count += nb_txqs * RTE_NB_TXQ_STATS;
2674
2675         return count;
2676 }
2677
2678 static int
2679 get_xstats_count(uint16_t port_id)
2680 {
2681         struct rte_eth_dev *dev;
2682         int count;
2683
2684         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2685         dev = &rte_eth_devices[port_id];
2686         if (dev->dev_ops->xstats_get_names_by_id != NULL) {
2687                 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
2688                                 NULL, 0);
2689                 if (count < 0)
2690                         return eth_err(port_id, count);
2691         }
2692         if (dev->dev_ops->xstats_get_names != NULL) {
2693                 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
2694                 if (count < 0)
2695                         return eth_err(port_id, count);
2696         } else
2697                 count = 0;
2698
2699
2700         count += get_xstats_basic_count(dev);
2701
2702         return count;
2703 }
2704
2705 int
2706 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
2707                 uint64_t *id)
2708 {
2709         int cnt_xstats, idx_xstat;
2710
2711         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2712
2713         if (!id) {
2714                 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
2715                 return -ENOMEM;
2716         }
2717
2718         if (!xstat_name) {
2719                 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
2720                 return -ENOMEM;
2721         }
2722
2723         /* Get count */
2724         cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
2725         if (cnt_xstats  < 0) {
2726                 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
2727                 return -ENODEV;
2728         }
2729
2730         /* Get id-name lookup table */
2731         struct rte_eth_xstat_name xstats_names[cnt_xstats];
2732
2733         if (cnt_xstats != rte_eth_xstats_get_names_by_id(
2734                         port_id, xstats_names, cnt_xstats, NULL)) {
2735                 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
2736                 return -1;
2737         }
2738
2739         for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
2740                 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
2741                         *id = idx_xstat;
2742                         return 0;
2743                 };
2744         }
2745
2746         return -EINVAL;
2747 }
2748
2749 /* retrieve basic stats names */
2750 static int
2751 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
2752         struct rte_eth_xstat_name *xstats_names)
2753 {
2754         int cnt_used_entries = 0;
2755         uint32_t idx, id_queue;
2756         uint16_t num_q;
2757
2758         for (idx = 0; idx < RTE_NB_STATS; idx++) {
2759                 strlcpy(xstats_names[cnt_used_entries].name,
2760                         rte_stats_strings[idx].name,
2761                         sizeof(xstats_names[0].name));
2762                 cnt_used_entries++;
2763         }
2764         num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2765         for (id_queue = 0; id_queue < num_q; id_queue++) {
2766                 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
2767                         snprintf(xstats_names[cnt_used_entries].name,
2768                                 sizeof(xstats_names[0].name),
2769                                 "rx_q%u_%s",
2770                                 id_queue, rte_rxq_stats_strings[idx].name);
2771                         cnt_used_entries++;
2772                 }
2773
2774         }
2775         num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2776         for (id_queue = 0; id_queue < num_q; id_queue++) {
2777                 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
2778                         snprintf(xstats_names[cnt_used_entries].name,
2779                                 sizeof(xstats_names[0].name),
2780                                 "tx_q%u_%s",
2781                                 id_queue, rte_txq_stats_strings[idx].name);
2782                         cnt_used_entries++;
2783                 }
2784         }
2785         return cnt_used_entries;
2786 }
2787
2788 /* retrieve ethdev extended statistics names */
2789 int
2790 rte_eth_xstats_get_names_by_id(uint16_t port_id,
2791         struct rte_eth_xstat_name *xstats_names, unsigned int size,
2792         uint64_t *ids)
2793 {
2794         struct rte_eth_xstat_name *xstats_names_copy;
2795         unsigned int no_basic_stat_requested = 1;
2796         unsigned int no_ext_stat_requested = 1;
2797         unsigned int expected_entries;
2798         unsigned int basic_count;
2799         struct rte_eth_dev *dev;
2800         unsigned int i;
2801         int ret;
2802
2803         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2804         dev = &rte_eth_devices[port_id];
2805
2806         basic_count = get_xstats_basic_count(dev);
2807         ret = get_xstats_count(port_id);
2808         if (ret < 0)
2809                 return ret;
2810         expected_entries = (unsigned int)ret;
2811
2812         /* Return max number of stats if no ids given */
2813         if (!ids) {
2814                 if (!xstats_names)
2815                         return expected_entries;
2816                 else if (xstats_names && size < expected_entries)
2817                         return expected_entries;
2818         }
2819
2820         if (ids && !xstats_names)
2821                 return -EINVAL;
2822
2823         if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2824                 uint64_t ids_copy[size];
2825
2826                 for (i = 0; i < size; i++) {
2827                         if (ids[i] < basic_count) {
2828                                 no_basic_stat_requested = 0;
2829                                 break;
2830                         }
2831
2832                         /*
2833                          * Convert ids to xstats ids that PMD knows.
2834                          * ids known by user are basic + extended stats.
2835                          */
2836                         ids_copy[i] = ids[i] - basic_count;
2837                 }
2838
2839                 if (no_basic_stat_requested)
2840                         return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2841                                         xstats_names, ids_copy, size);
2842         }
2843
2844         /* Retrieve all stats */
2845         if (!ids) {
2846                 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2847                                 expected_entries);
2848                 if (num_stats < 0 || num_stats > (int)expected_entries)
2849                         return num_stats;
2850                 else
2851                         return expected_entries;
2852         }
2853
2854         xstats_names_copy = calloc(expected_entries,
2855                 sizeof(struct rte_eth_xstat_name));
2856
2857         if (!xstats_names_copy) {
2858                 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2859                 return -ENOMEM;
2860         }
2861
2862         if (ids) {
2863                 for (i = 0; i < size; i++) {
2864                         if (ids[i] >= basic_count) {
2865                                 no_ext_stat_requested = 0;
2866                                 break;
2867                         }
2868                 }
2869         }
2870
2871         /* Fill xstats_names_copy structure */
2872         if (ids && no_ext_stat_requested) {
2873                 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2874         } else {
2875                 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2876                         expected_entries);
2877                 if (ret < 0) {
2878                         free(xstats_names_copy);
2879                         return ret;
2880                 }
2881         }
2882
2883         /* Filter stats */
2884         for (i = 0; i < size; i++) {
2885                 if (ids[i] >= expected_entries) {
2886                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2887                         free(xstats_names_copy);
2888                         return -1;
2889                 }
2890                 xstats_names[i] = xstats_names_copy[ids[i]];
2891         }
2892
2893         free(xstats_names_copy);
2894         return size;
2895 }
2896
2897 int
2898 rte_eth_xstats_get_names(uint16_t port_id,
2899         struct rte_eth_xstat_name *xstats_names,
2900         unsigned int size)
2901 {
2902         struct rte_eth_dev *dev;
2903         int cnt_used_entries;
2904         int cnt_expected_entries;
2905         int cnt_driver_entries;
2906
2907         cnt_expected_entries = get_xstats_count(port_id);
2908         if (xstats_names == NULL || cnt_expected_entries < 0 ||
2909                         (int)size < cnt_expected_entries)
2910                 return cnt_expected_entries;
2911
2912         /* port_id checked in get_xstats_count() */
2913         dev = &rte_eth_devices[port_id];
2914
2915         cnt_used_entries = rte_eth_basic_stats_get_names(
2916                 dev, xstats_names);
2917
2918         if (dev->dev_ops->xstats_get_names != NULL) {
2919                 /* If there are any driver-specific xstats, append them
2920                  * to end of list.
2921                  */
2922                 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2923                         dev,
2924                         xstats_names + cnt_used_entries,
2925                         size - cnt_used_entries);
2926                 if (cnt_driver_entries < 0)
2927                         return eth_err(port_id, cnt_driver_entries);
2928                 cnt_used_entries += cnt_driver_entries;
2929         }
2930
2931         return cnt_used_entries;
2932 }
2933
2934
2935 static int
2936 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2937 {
2938         struct rte_eth_dev *dev;
2939         struct rte_eth_stats eth_stats;
2940         unsigned int count = 0, i, q;
2941         uint64_t val, *stats_ptr;
2942         uint16_t nb_rxqs, nb_txqs;
2943         int ret;
2944
2945         ret = rte_eth_stats_get(port_id, &eth_stats);
2946         if (ret < 0)
2947                 return ret;
2948
2949         dev = &rte_eth_devices[port_id];
2950
2951         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2952         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2953
2954         /* global stats */
2955         for (i = 0; i < RTE_NB_STATS; i++) {
2956                 stats_ptr = RTE_PTR_ADD(&eth_stats,
2957                                         rte_stats_strings[i].offset);
2958                 val = *stats_ptr;
2959                 xstats[count++].value = val;
2960         }
2961
2962         /* per-rxq stats */
2963         for (q = 0; q < nb_rxqs; q++) {
2964                 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2965                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2966                                         rte_rxq_stats_strings[i].offset +
2967                                         q * sizeof(uint64_t));
2968                         val = *stats_ptr;
2969                         xstats[count++].value = val;
2970                 }
2971         }
2972
2973         /* per-txq stats */
2974         for (q = 0; q < nb_txqs; q++) {
2975                 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2976                         stats_ptr = RTE_PTR_ADD(&eth_stats,
2977                                         rte_txq_stats_strings[i].offset +
2978                                         q * sizeof(uint64_t));
2979                         val = *stats_ptr;
2980                         xstats[count++].value = val;
2981                 }
2982         }
2983         return count;
2984 }
2985
2986 /* retrieve ethdev extended statistics */
2987 int
2988 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2989                          uint64_t *values, unsigned int size)
2990 {
2991         unsigned int no_basic_stat_requested = 1;
2992         unsigned int no_ext_stat_requested = 1;
2993         unsigned int num_xstats_filled;
2994         unsigned int basic_count;
2995         uint16_t expected_entries;
2996         struct rte_eth_dev *dev;
2997         unsigned int i;
2998         int ret;
2999
3000         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3001         ret = get_xstats_count(port_id);
3002         if (ret < 0)
3003                 return ret;
3004         expected_entries = (uint16_t)ret;
3005         struct rte_eth_xstat xstats[expected_entries];
3006         dev = &rte_eth_devices[port_id];
3007         basic_count = get_xstats_basic_count(dev);
3008
3009         /* Return max number of stats if no ids given */
3010         if (!ids) {
3011                 if (!values)
3012                         return expected_entries;
3013                 else if (values && size < expected_entries)
3014                         return expected_entries;
3015         }
3016
3017         if (ids && !values)
3018                 return -EINVAL;
3019
3020         if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
3021                 unsigned int basic_count = get_xstats_basic_count(dev);
3022                 uint64_t ids_copy[size];
3023
3024                 for (i = 0; i < size; i++) {
3025                         if (ids[i] < basic_count) {
3026                                 no_basic_stat_requested = 0;
3027                                 break;
3028                         }
3029
3030                         /*
3031                          * Convert ids to xstats ids that PMD knows.
3032                          * ids known by user are basic + extended stats.
3033                          */
3034                         ids_copy[i] = ids[i] - basic_count;
3035                 }
3036
3037                 if (no_basic_stat_requested)
3038                         return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
3039                                         values, size);
3040         }
3041
3042         if (ids) {
3043                 for (i = 0; i < size; i++) {
3044                         if (ids[i] >= basic_count) {
3045                                 no_ext_stat_requested = 0;
3046                                 break;
3047                         }
3048                 }
3049         }
3050
3051         /* Fill the xstats structure */
3052         if (ids && no_ext_stat_requested)
3053                 ret = rte_eth_basic_stats_get(port_id, xstats);
3054         else
3055                 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
3056
3057         if (ret < 0)
3058                 return ret;
3059         num_xstats_filled = (unsigned int)ret;
3060
3061         /* Return all stats */
3062         if (!ids) {
3063                 for (i = 0; i < num_xstats_filled; i++)
3064                         values[i] = xstats[i].value;
3065                 return expected_entries;
3066         }
3067
3068         /* Filter stats */
3069         for (i = 0; i < size; i++) {
3070                 if (ids[i] >= expected_entries) {
3071                         RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
3072                         return -1;
3073                 }
3074                 values[i] = xstats[ids[i]].value;
3075         }
3076         return size;
3077 }
3078
3079 int
3080 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
3081         unsigned int n)
3082 {
3083         struct rte_eth_dev *dev;
3084         unsigned int count = 0, i;
3085         signed int xcount = 0;
3086         uint16_t nb_rxqs, nb_txqs;
3087         int ret;
3088
3089         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3090
3091         dev = &rte_eth_devices[port_id];
3092
3093         nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3094         nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
3095
3096         /* Return generic statistics */
3097         count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
3098                 (nb_txqs * RTE_NB_TXQ_STATS);
3099
3100         /* implemented by the driver */
3101         if (dev->dev_ops->xstats_get != NULL) {
3102                 /* Retrieve the xstats from the driver at the end of the
3103                  * xstats struct.
3104                  */
3105                 xcount = (*dev->dev_ops->xstats_get)(dev,
3106                                      xstats ? xstats + count : NULL,
3107                                      (n > count) ? n - count : 0);
3108
3109                 if (xcount < 0)
3110                         return eth_err(port_id, xcount);
3111         }
3112
3113         if (n < count + xcount || xstats == NULL)
3114                 return count + xcount;
3115
3116         /* now fill the xstats structure */
3117         ret = rte_eth_basic_stats_get(port_id, xstats);
3118         if (ret < 0)
3119                 return ret;
3120         count = ret;
3121
3122         for (i = 0; i < count; i++)
3123                 xstats[i].id = i;
3124         /* add an offset to driver-specific stats */
3125         for ( ; i < count + xcount; i++)
3126                 xstats[i].id += count;
3127
3128         return count + xcount;
3129 }
3130
3131 /* reset ethdev extended statistics */
3132 int
3133 rte_eth_xstats_reset(uint16_t port_id)
3134 {
3135         struct rte_eth_dev *dev;
3136
3137         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3138         dev = &rte_eth_devices[port_id];
3139
3140         /* implemented by the driver */
3141         if (dev->dev_ops->xstats_reset != NULL)
3142                 return eth_err(port_id, (*dev->dev_ops->xstats_reset)(dev));
3143
3144         /* fallback to default */
3145         return rte_eth_stats_reset(port_id);
3146 }
3147
3148 static int
3149 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
3150                 uint8_t is_rx)
3151 {
3152         struct rte_eth_dev *dev;
3153
3154         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3155
3156         dev = &rte_eth_devices[port_id];
3157
3158         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
3159
3160         if (is_rx && (queue_id >= dev->data->nb_rx_queues))
3161                 return -EINVAL;
3162
3163         if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
3164                 return -EINVAL;
3165
3166         if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
3167                 return -EINVAL;
3168
3169         return (*dev->dev_ops->queue_stats_mapping_set)
3170                         (dev, queue_id, stat_idx, is_rx);
3171 }
3172
3173
3174 int
3175 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
3176                 uint8_t stat_idx)
3177 {
3178         return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
3179                                                 stat_idx, STAT_QMAP_TX));
3180 }
3181
3182
3183 int
3184 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
3185                 uint8_t stat_idx)
3186 {
3187         return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
3188                                                 stat_idx, STAT_QMAP_RX));
3189 }
3190
3191 int
3192 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
3193 {
3194         struct rte_eth_dev *dev;
3195
3196         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3197         dev = &rte_eth_devices[port_id];
3198
3199         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
3200         return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
3201                                                         fw_version, fw_size));
3202 }
3203
3204 int
3205 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
3206 {
3207         struct rte_eth_dev *dev;
3208         const struct rte_eth_desc_lim lim = {
3209                 .nb_max = UINT16_MAX,
3210                 .nb_min = 0,
3211                 .nb_align = 1,
3212                 .nb_seg_max = UINT16_MAX,
3213                 .nb_mtu_seg_max = UINT16_MAX,
3214         };
3215         int diag;
3216
3217         /*
3218          * Init dev_info before port_id check since caller does not have
3219          * return status and does not know if get is successful or not.
3220          */
3221         memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3222         dev_info->switch_info.domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
3223
3224         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3225         dev = &rte_eth_devices[port_id];
3226
3227         dev_info->rx_desc_lim = lim;
3228         dev_info->tx_desc_lim = lim;
3229         dev_info->device = dev->device;
3230         dev_info->min_mtu = RTE_ETHER_MIN_MTU;
3231         dev_info->max_mtu = UINT16_MAX;
3232
3233         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3234         diag = (*dev->dev_ops->dev_infos_get)(dev, dev_info);
3235         if (diag != 0) {
3236                 /* Cleanup already filled in device information */
3237                 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
3238                 return eth_err(port_id, diag);
3239         }
3240
3241         /* Maximum number of queues should be <= RTE_MAX_QUEUES_PER_PORT */
3242         dev_info->max_rx_queues = RTE_MIN(dev_info->max_rx_queues,
3243                         RTE_MAX_QUEUES_PER_PORT);
3244         dev_info->max_tx_queues = RTE_MIN(dev_info->max_tx_queues,
3245                         RTE_MAX_QUEUES_PER_PORT);
3246
3247         dev_info->driver_name = dev->device->driver->name;
3248         dev_info->nb_rx_queues = dev->data->nb_rx_queues;
3249         dev_info->nb_tx_queues = dev->data->nb_tx_queues;
3250
3251         dev_info->dev_flags = &dev->data->dev_flags;
3252
3253         return 0;
3254 }
3255
3256 int
3257 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
3258                                  uint32_t *ptypes, int num)
3259 {
3260         int i, j;
3261         struct rte_eth_dev *dev;
3262         const uint32_t *all_ptypes;
3263
3264         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3265         dev = &rte_eth_devices[port_id];
3266         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
3267         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3268
3269         if (!all_ptypes)
3270                 return 0;
3271
3272         for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
3273                 if (all_ptypes[i] & ptype_mask) {
3274                         if (j < num)
3275                                 ptypes[j] = all_ptypes[i];
3276                         j++;
3277                 }
3278
3279         return j;
3280 }
3281
3282 int
3283 rte_eth_dev_set_ptypes(uint16_t port_id, uint32_t ptype_mask,
3284                                  uint32_t *set_ptypes, unsigned int num)
3285 {
3286         const uint32_t valid_ptype_masks[] = {
3287                 RTE_PTYPE_L2_MASK,
3288                 RTE_PTYPE_L3_MASK,
3289                 RTE_PTYPE_L4_MASK,
3290                 RTE_PTYPE_TUNNEL_MASK,
3291                 RTE_PTYPE_INNER_L2_MASK,
3292                 RTE_PTYPE_INNER_L3_MASK,
3293                 RTE_PTYPE_INNER_L4_MASK,
3294         };
3295         const uint32_t *all_ptypes;
3296         struct rte_eth_dev *dev;
3297         uint32_t unused_mask;
3298         unsigned int i, j;
3299         int ret;
3300
3301         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3302         dev = &rte_eth_devices[port_id];
3303
3304         if (num > 0 && set_ptypes == NULL)
3305                 return -EINVAL;
3306
3307         if (*dev->dev_ops->dev_supported_ptypes_get == NULL ||
3308                         *dev->dev_ops->dev_ptypes_set == NULL) {
3309                 ret = 0;
3310                 goto ptype_unknown;
3311         }
3312
3313         if (ptype_mask == 0) {
3314                 ret = (*dev->dev_ops->dev_ptypes_set)(dev,
3315                                 ptype_mask);
3316                 goto ptype_unknown;
3317         }
3318
3319         unused_mask = ptype_mask;
3320         for (i = 0; i < RTE_DIM(valid_ptype_masks); i++) {
3321                 uint32_t mask = ptype_mask & valid_ptype_masks[i];
3322                 if (mask && mask != valid_ptype_masks[i]) {
3323                         ret = -EINVAL;
3324                         goto ptype_unknown;
3325                 }
3326                 unused_mask &= ~valid_ptype_masks[i];
3327         }
3328
3329         if (unused_mask) {
3330                 ret = -EINVAL;
3331                 goto ptype_unknown;
3332         }
3333
3334         all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
3335         if (all_ptypes == NULL) {
3336                 ret = 0;
3337                 goto ptype_unknown;
3338         }
3339
3340         /*
3341          * Accommodate as many set_ptypes as possible. If the supplied
3342          * set_ptypes array is insufficient fill it partially.
3343          */
3344         for (i = 0, j = 0; set_ptypes != NULL &&
3345                                 (all_ptypes[i] != RTE_PTYPE_UNKNOWN); ++i) {
3346                 if (ptype_mask & all_ptypes[i]) {
3347                         if (j < num - 1) {
3348                                 set_ptypes[j] = all_ptypes[i];
3349                                 j++;
3350                                 continue;
3351                         }
3352                         break;
3353                 }
3354         }
3355
3356         if (set_ptypes != NULL && j < num)
3357                 set_ptypes[j] = RTE_PTYPE_UNKNOWN;
3358
3359         return (*dev->dev_ops->dev_ptypes_set)(dev, ptype_mask);
3360
3361 ptype_unknown:
3362         if (num > 0)
3363                 set_ptypes[0] = RTE_PTYPE_UNKNOWN;
3364
3365         return ret;
3366 }
3367
3368 int
3369 rte_eth_macaddr_get(uint16_t port_id, struct rte_ether_addr *mac_addr)
3370 {
3371         struct rte_eth_dev *dev;
3372
3373         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3374         dev = &rte_eth_devices[port_id];
3375         rte_ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
3376
3377         return 0;
3378 }
3379
3380 int
3381 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
3382 {
3383         struct rte_eth_dev *dev;
3384
3385         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3386
3387         dev = &rte_eth_devices[port_id];
3388         *mtu = dev->data->mtu;
3389         return 0;
3390 }
3391
3392 int
3393 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
3394 {
3395         int ret;
3396         struct rte_eth_dev_info dev_info;
3397         struct rte_eth_dev *dev;
3398
3399         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3400         dev = &rte_eth_devices[port_id];
3401         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
3402
3403         /*
3404          * Check if the device supports dev_infos_get, if it does not
3405          * skip min_mtu/max_mtu validation here as this requires values
3406          * that are populated within the call to rte_eth_dev_info_get()
3407          * which relies on dev->dev_ops->dev_infos_get.
3408          */
3409         if (*dev->dev_ops->dev_infos_get != NULL) {
3410                 ret = rte_eth_dev_info_get(port_id, &dev_info);
3411                 if (ret != 0)
3412                         return ret;
3413
3414                 if (mtu < dev_info.min_mtu || mtu > dev_info.max_mtu)
3415                         return -EINVAL;
3416         }
3417
3418         ret = (*dev->dev_ops->mtu_set)(dev, mtu);
3419         if (!ret)
3420                 dev->data->mtu = mtu;
3421
3422         return eth_err(port_id, ret);
3423 }
3424
3425 int
3426 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
3427 {
3428         struct rte_eth_dev *dev;
3429         int ret;
3430
3431         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3432         dev = &rte_eth_devices[port_id];
3433         if (!(dev->data->dev_conf.rxmode.offloads &
3434               DEV_RX_OFFLOAD_VLAN_FILTER)) {
3435                 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
3436                         port_id);
3437                 return -ENOSYS;
3438         }
3439
3440         if (vlan_id > 4095) {
3441                 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
3442                         port_id, vlan_id);
3443                 return -EINVAL;
3444         }
3445         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
3446
3447         ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
3448         if (ret == 0) {
3449                 struct rte_vlan_filter_conf *vfc;
3450                 int vidx;
3451                 int vbit;
3452
3453                 vfc = &dev->data->vlan_filter_conf;
3454                 vidx = vlan_id / 64;
3455                 vbit = vlan_id % 64;
3456
3457                 if (on)
3458                         vfc->ids[vidx] |= UINT64_C(1) << vbit;
3459                 else
3460                         vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
3461         }
3462
3463         return eth_err(port_id, ret);
3464 }
3465
3466 int
3467 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
3468                                     int on)
3469 {
3470         struct rte_eth_dev *dev;
3471
3472         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3473         dev = &rte_eth_devices[port_id];
3474         if (rx_queue_id >= dev->data->nb_rx_queues) {
3475                 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
3476                 return -EINVAL;
3477         }
3478
3479         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
3480         (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
3481
3482         return 0;
3483 }
3484
3485 int
3486 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
3487                                 enum rte_vlan_type vlan_type,
3488                                 uint16_t tpid)
3489 {
3490         struct rte_eth_dev *dev;
3491
3492         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3493         dev = &rte_eth_devices[port_id];
3494         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
3495
3496         return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
3497                                                                tpid));
3498 }
3499
3500 int
3501 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
3502 {
3503         struct rte_eth_dev_info dev_info;
3504         struct rte_eth_dev *dev;
3505         int ret = 0;
3506         int mask = 0;
3507         int cur, org = 0;
3508         uint64_t orig_offloads;
3509         uint64_t dev_offloads;
3510         uint64_t new_offloads;
3511
3512         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3513         dev = &rte_eth_devices[port_id];
3514
3515         /* save original values in case of failure */
3516         orig_offloads = dev->data->dev_conf.rxmode.offloads;
3517         dev_offloads = orig_offloads;
3518
3519         /* check which option changed by application */
3520         cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
3521         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP);
3522         if (cur != org) {
3523                 if (cur)
3524                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
3525                 else
3526                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_STRIP;
3527                 mask |= ETH_VLAN_STRIP_MASK;
3528         }
3529
3530         cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
3531         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER);
3532         if (cur != org) {
3533                 if (cur)
3534                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
3535                 else
3536                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_FILTER;
3537                 mask |= ETH_VLAN_FILTER_MASK;
3538         }
3539
3540         cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
3541         org = !!(dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND);
3542         if (cur != org) {
3543                 if (cur)
3544                         dev_offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
3545                 else
3546                         dev_offloads &= ~DEV_RX_OFFLOAD_VLAN_EXTEND;
3547                 mask |= ETH_VLAN_EXTEND_MASK;
3548         }
3549
3550         cur = !!(offload_mask & ETH_QINQ_STRIP_OFFLOAD);
3551         org = !!(dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP);
3552         if (cur != org) {
3553                 if (cur)
3554                         dev_offloads |= DEV_RX_OFFLOAD_QINQ_STRIP;
3555                 else
3556                         dev_offloads &= ~DEV_RX_OFFLOAD_QINQ_STRIP;
3557                 mask |= ETH_QINQ_STRIP_MASK;
3558         }
3559
3560         /*no change*/
3561         if (mask == 0)
3562                 return ret;
3563
3564         ret = rte_eth_dev_info_get(port_id, &dev_info);
3565         if (ret != 0)
3566                 return ret;
3567
3568         /* Rx VLAN offloading must be within its device capabilities */
3569         if ((dev_offloads & dev_info.rx_offload_capa) != dev_offloads) {
3570                 new_offloads = dev_offloads & ~orig_offloads;
3571                 RTE_ETHDEV_LOG(ERR,
3572                         "Ethdev port_id=%u requested new added VLAN offloads "
3573                         "0x%" PRIx64 " must be within Rx offloads capabilities "
3574                         "0x%" PRIx64 " in %s()\n",
3575                         port_id, new_offloads, dev_info.rx_offload_capa,
3576                         __func__);
3577                 return -EINVAL;
3578         }
3579
3580         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
3581         dev->data->dev_conf.rxmode.offloads = dev_offloads;
3582         ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
3583         if (ret) {
3584                 /* hit an error restore  original values */
3585                 dev->data->dev_conf.rxmode.offloads = orig_offloads;
3586         }
3587
3588         return eth_err(port_id, ret);
3589 }
3590
3591 int
3592 rte_eth_dev_get_vlan_offload(uint16_t port_id)
3593 {
3594         struct rte_eth_dev *dev;
3595         uint64_t *dev_offloads;
3596         int ret = 0;
3597
3598         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3599         dev = &rte_eth_devices[port_id];
3600         dev_offloads = &dev->data->dev_conf.rxmode.offloads;
3601
3602         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
3603                 ret |= ETH_VLAN_STRIP_OFFLOAD;
3604
3605         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
3606                 ret |= ETH_VLAN_FILTER_OFFLOAD;
3607
3608         if (*dev_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
3609                 ret |= ETH_VLAN_EXTEND_OFFLOAD;
3610
3611         if (*dev_offloads & DEV_RX_OFFLOAD_QINQ_STRIP)
3612                 ret |= ETH_QINQ_STRIP_OFFLOAD;
3613
3614         return ret;
3615 }
3616
3617 int
3618 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
3619 {
3620         struct rte_eth_dev *dev;
3621
3622         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3623         dev = &rte_eth_devices[port_id];
3624         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
3625
3626         return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
3627 }
3628
3629 int
3630 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3631 {
3632         struct rte_eth_dev *dev;
3633
3634         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3635         dev = &rte_eth_devices[port_id];
3636         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
3637         memset(fc_conf, 0, sizeof(*fc_conf));
3638         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
3639 }
3640
3641 int
3642 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
3643 {
3644         struct rte_eth_dev *dev;
3645
3646         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3647         if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
3648                 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
3649                 return -EINVAL;
3650         }
3651
3652         dev = &rte_eth_devices[port_id];
3653         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
3654         return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
3655 }
3656
3657 int
3658 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
3659                                    struct rte_eth_pfc_conf *pfc_conf)
3660 {
3661         struct rte_eth_dev *dev;
3662
3663         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3664         if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
3665                 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
3666                 return -EINVAL;
3667         }
3668
3669         dev = &rte_eth_devices[port_id];
3670         /* High water, low water validation are device specific */
3671         if  (*dev->dev_ops->priority_flow_ctrl_set)
3672                 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
3673                                         (dev, pfc_conf));
3674         return -ENOTSUP;
3675 }
3676
3677 static int
3678 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
3679                         uint16_t reta_size)
3680 {
3681         uint16_t i, num;
3682
3683         if (!reta_conf)
3684                 return -EINVAL;
3685
3686         num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
3687         for (i = 0; i < num; i++) {
3688                 if (reta_conf[i].mask)
3689                         return 0;
3690         }
3691
3692         return -EINVAL;
3693 }
3694
3695 static int
3696 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
3697                          uint16_t reta_size,
3698                          uint16_t max_rxq)
3699 {
3700         uint16_t i, idx, shift;
3701
3702         if (!reta_conf)
3703                 return -EINVAL;
3704
3705         if (max_rxq == 0) {
3706                 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
3707                 return -EINVAL;
3708         }
3709
3710         for (i = 0; i < reta_size; i++) {
3711                 idx = i / RTE_RETA_GROUP_SIZE;
3712                 shift = i % RTE_RETA_GROUP_SIZE;
3713                 if ((reta_conf[idx].mask & (1ULL << shift)) &&
3714                         (reta_conf[idx].reta[shift] >= max_rxq)) {
3715                         RTE_ETHDEV_LOG(ERR,
3716                                 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
3717                                 idx, shift,
3718                                 reta_conf[idx].reta[shift], max_rxq);
3719                         return -EINVAL;
3720                 }
3721         }
3722
3723         return 0;
3724 }
3725
3726 int
3727 rte_eth_dev_rss_reta_update(uint16_t port_id,
3728                             struct rte_eth_rss_reta_entry64 *reta_conf,
3729                             uint16_t reta_size)
3730 {
3731         struct rte_eth_dev *dev;
3732         int ret;
3733
3734         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3735         /* Check mask bits */
3736         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3737         if (ret < 0)
3738                 return ret;
3739
3740         dev = &rte_eth_devices[port_id];
3741
3742         /* Check entry value */
3743         ret = rte_eth_check_reta_entry(reta_conf, reta_size,
3744                                 dev->data->nb_rx_queues);
3745         if (ret < 0)
3746                 return ret;
3747
3748         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
3749         return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
3750                                                              reta_size));
3751 }
3752
3753 int
3754 rte_eth_dev_rss_reta_query(uint16_t port_id,
3755                            struct rte_eth_rss_reta_entry64 *reta_conf,
3756                            uint16_t reta_size)
3757 {
3758         struct rte_eth_dev *dev;
3759         int ret;
3760
3761         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3762
3763         /* Check mask bits */
3764         ret = rte_eth_check_reta_mask(reta_conf, reta_size);
3765         if (ret < 0)
3766                 return ret;
3767
3768         dev = &rte_eth_devices[port_id];
3769         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
3770         return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
3771                                                             reta_size));
3772 }
3773
3774 int
3775 rte_eth_dev_rss_hash_update(uint16_t port_id,
3776                             struct rte_eth_rss_conf *rss_conf)
3777 {
3778         struct rte_eth_dev *dev;
3779         struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
3780         int ret;
3781
3782         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3783
3784         ret = rte_eth_dev_info_get(port_id, &dev_info);
3785         if (ret != 0)
3786                 return ret;
3787
3788         rss_conf->rss_hf = rte_eth_rss_hf_refine(rss_conf->rss_hf);
3789
3790         dev = &rte_eth_devices[port_id];
3791         if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
3792             dev_info.flow_type_rss_offloads) {
3793                 RTE_ETHDEV_LOG(ERR,
3794                         "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
3795                         port_id, rss_conf->rss_hf,
3796                         dev_info.flow_type_rss_offloads);
3797                 return -EINVAL;
3798         }
3799         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
3800         return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
3801                                                                  rss_conf));
3802 }
3803
3804 int
3805 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
3806                               struct rte_eth_rss_conf *rss_conf)
3807 {
3808         struct rte_eth_dev *dev;
3809
3810         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3811         dev = &rte_eth_devices[port_id];
3812         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
3813         return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
3814                                                                    rss_conf));
3815 }
3816
3817 int
3818 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
3819                                 struct rte_eth_udp_tunnel *udp_tunnel)
3820 {
3821         struct rte_eth_dev *dev;
3822
3823         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3824         if (udp_tunnel == NULL) {
3825                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3826                 return -EINVAL;
3827         }
3828
3829         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3830                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3831                 return -EINVAL;
3832         }
3833
3834         dev = &rte_eth_devices[port_id];
3835         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
3836         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
3837                                                                 udp_tunnel));
3838 }
3839
3840 int
3841 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
3842                                    struct rte_eth_udp_tunnel *udp_tunnel)
3843 {
3844         struct rte_eth_dev *dev;
3845
3846         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3847         dev = &rte_eth_devices[port_id];
3848
3849         if (udp_tunnel == NULL) {
3850                 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
3851                 return -EINVAL;
3852         }
3853
3854         if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
3855                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
3856                 return -EINVAL;
3857         }
3858
3859         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
3860         return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
3861                                                                 udp_tunnel));
3862 }
3863
3864 int
3865 rte_eth_led_on(uint16_t port_id)
3866 {
3867         struct rte_eth_dev *dev;
3868
3869         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3870         dev = &rte_eth_devices[port_id];
3871         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
3872         return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
3873 }
3874
3875 int
3876 rte_eth_led_off(uint16_t port_id)
3877 {
3878         struct rte_eth_dev *dev;
3879
3880         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3881         dev = &rte_eth_devices[port_id];
3882         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
3883         return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
3884 }
3885
3886 int
3887 rte_eth_fec_get_capability(uint16_t port_id,
3888                            struct rte_eth_fec_capa *speed_fec_capa,
3889                            unsigned int num)
3890 {
3891         struct rte_eth_dev *dev;
3892         int ret;
3893
3894         if (speed_fec_capa == NULL && num > 0)
3895                 return -EINVAL;
3896
3897         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898         dev = &rte_eth_devices[port_id];
3899         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get_capability, -ENOTSUP);
3900         ret = (*dev->dev_ops->fec_get_capability)(dev, speed_fec_capa, num);
3901
3902         return ret;
3903 }
3904
3905 int
3906 rte_eth_fec_get(uint16_t port_id, uint32_t *fec_capa)
3907 {
3908         struct rte_eth_dev *dev;
3909
3910         if (fec_capa == NULL)
3911                 return -EINVAL;
3912
3913         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3914         dev = &rte_eth_devices[port_id];
3915         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_get, -ENOTSUP);
3916         return eth_err(port_id, (*dev->dev_ops->fec_get)(dev, fec_capa));
3917 }
3918
3919 int
3920 rte_eth_fec_set(uint16_t port_id, uint32_t fec_capa)
3921 {
3922         struct rte_eth_dev *dev;
3923
3924         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3925         dev = &rte_eth_devices[port_id];
3926         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fec_set, -ENOTSUP);
3927         return eth_err(port_id, (*dev->dev_ops->fec_set)(dev, fec_capa));
3928 }
3929
3930 /*
3931  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3932  * an empty spot.
3933  */
3934 static int
3935 get_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
3936 {
3937         struct rte_eth_dev_info dev_info;
3938         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3939         unsigned i;
3940         int ret;
3941
3942         ret = rte_eth_dev_info_get(port_id, &dev_info);
3943         if (ret != 0)
3944                 return -1;
3945
3946         for (i = 0; i < dev_info.max_mac_addrs; i++)
3947                 if (memcmp(addr, &dev->data->mac_addrs[i],
3948                                 RTE_ETHER_ADDR_LEN) == 0)
3949                         return i;
3950
3951         return -1;
3952 }
3953
3954 static const struct rte_ether_addr null_mac_addr;
3955
3956 int
3957 rte_eth_dev_mac_addr_add(uint16_t port_id, struct rte_ether_addr *addr,
3958                         uint32_t pool)
3959 {
3960         struct rte_eth_dev *dev;
3961         int index;
3962         uint64_t pool_mask;
3963         int ret;
3964
3965         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3966         dev = &rte_eth_devices[port_id];
3967         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
3968
3969         if (rte_is_zero_ether_addr(addr)) {
3970                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3971                         port_id);
3972                 return -EINVAL;
3973         }
3974         if (pool >= ETH_64_POOLS) {
3975                 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
3976                 return -EINVAL;
3977         }
3978
3979         index = get_mac_addr_index(port_id, addr);
3980         if (index < 0) {
3981                 index = get_mac_addr_index(port_id, &null_mac_addr);
3982                 if (index < 0) {
3983                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3984                                 port_id);
3985                         return -ENOSPC;
3986                 }
3987         } else {
3988                 pool_mask = dev->data->mac_pool_sel[index];
3989
3990                 /* Check if both MAC address and pool is already there, and do nothing */
3991                 if (pool_mask & (1ULL << pool))
3992                         return 0;
3993         }
3994
3995         /* Update NIC */
3996         ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
3997
3998         if (ret == 0) {
3999                 /* Update address in NIC data structure */
4000                 rte_ether_addr_copy(addr, &dev->data->mac_addrs[index]);
4001
4002                 /* Update pool bitmap in NIC data structure */
4003                 dev->data->mac_pool_sel[index] |= (1ULL << pool);
4004         }
4005
4006         return eth_err(port_id, ret);
4007 }
4008
4009 int
4010 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct rte_ether_addr *addr)
4011 {
4012         struct rte_eth_dev *dev;
4013         int index;
4014
4015         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4016         dev = &rte_eth_devices[port_id];
4017         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
4018
4019         index = get_mac_addr_index(port_id, addr);
4020         if (index == 0) {
4021                 RTE_ETHDEV_LOG(ERR,
4022                         "Port %u: Cannot remove default MAC address\n",
4023                         port_id);
4024                 return -EADDRINUSE;
4025         } else if (index < 0)
4026                 return 0;  /* Do nothing if address wasn't found */
4027
4028         /* Update NIC */
4029         (*dev->dev_ops->mac_addr_remove)(dev, index);
4030
4031         /* Update address in NIC data structure */
4032         rte_ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
4033
4034         /* reset pool bitmap */
4035         dev->data->mac_pool_sel[index] = 0;
4036
4037         return 0;
4038 }
4039
4040 int
4041 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct rte_ether_addr *addr)
4042 {
4043         struct rte_eth_dev *dev;
4044         int ret;
4045
4046         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4047
4048         if (!rte_is_valid_assigned_ether_addr(addr))
4049                 return -EINVAL;
4050
4051         dev = &rte_eth_devices[port_id];
4052         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
4053
4054         ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
4055         if (ret < 0)
4056                 return ret;
4057
4058         /* Update default address in NIC data structure */
4059         rte_ether_addr_copy(addr, &dev->data->mac_addrs[0]);
4060
4061         return 0;
4062 }
4063
4064
4065 /*
4066  * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
4067  * an empty spot.
4068  */
4069 static int
4070 get_hash_mac_addr_index(uint16_t port_id, const struct rte_ether_addr *addr)
4071 {
4072         struct rte_eth_dev_info dev_info;
4073         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4074         unsigned i;
4075         int ret;
4076
4077         ret = rte_eth_dev_info_get(port_id, &dev_info);
4078         if (ret != 0)
4079                 return -1;
4080
4081         if (!dev->data->hash_mac_addrs)
4082                 return -1;
4083
4084         for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
4085                 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
4086                         RTE_ETHER_ADDR_LEN) == 0)
4087                         return i;
4088
4089         return -1;
4090 }
4091
4092 int
4093 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct rte_ether_addr *addr,
4094                                 uint8_t on)
4095 {
4096         int index;
4097         int ret;
4098         struct rte_eth_dev *dev;
4099
4100         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4101
4102         dev = &rte_eth_devices[port_id];
4103         if (rte_is_zero_ether_addr(addr)) {
4104                 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
4105                         port_id);
4106                 return -EINVAL;
4107         }
4108
4109         index = get_hash_mac_addr_index(port_id, addr);
4110         /* Check if it's already there, and do nothing */
4111         if ((index >= 0) && on)
4112                 return 0;
4113
4114         if (index < 0) {
4115                 if (!on) {
4116                         RTE_ETHDEV_LOG(ERR,
4117                                 "Port %u: the MAC address was not set in UTA\n",
4118                                 port_id);
4119                         return -EINVAL;
4120                 }
4121
4122                 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
4123                 if (index < 0) {
4124                         RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
4125                                 port_id);
4126                         return -ENOSPC;
4127                 }
4128         }
4129
4130         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
4131         ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
4132         if (ret == 0) {
4133                 /* Update address in NIC data structure */
4134                 if (on)
4135                         rte_ether_addr_copy(addr,
4136                                         &dev->data->hash_mac_addrs[index]);
4137                 else
4138                         rte_ether_addr_copy(&null_mac_addr,
4139                                         &dev->data->hash_mac_addrs[index]);
4140         }
4141
4142         return eth_err(port_id, ret);
4143 }
4144
4145 int
4146 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
4147 {
4148         struct rte_eth_dev *dev;
4149
4150         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4151
4152         dev = &rte_eth_devices[port_id];
4153
4154         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
4155         return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
4156                                                                        on));
4157 }
4158
4159 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
4160                                         uint16_t tx_rate)
4161 {
4162         struct rte_eth_dev *dev;
4163         struct rte_eth_dev_info dev_info;
4164         struct rte_eth_link link;
4165         int ret;
4166
4167         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4168
4169         ret = rte_eth_dev_info_get(port_id, &dev_info);
4170         if (ret != 0)
4171                 return ret;
4172
4173         dev = &rte_eth_devices[port_id];
4174         link = dev->data->dev_link;
4175
4176         if (queue_idx > dev_info.max_tx_queues) {
4177                 RTE_ETHDEV_LOG(ERR,
4178                         "Set queue rate limit:port %u: invalid queue id=%u\n",
4179                         port_id, queue_idx);
4180                 return -EINVAL;
4181         }
4182
4183         if (tx_rate > link.link_speed) {
4184                 RTE_ETHDEV_LOG(ERR,
4185                         "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
4186                         tx_rate, link.link_speed);
4187                 return -EINVAL;
4188         }
4189
4190         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
4191         return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
4192                                                         queue_idx, tx_rate));
4193 }
4194
4195 int
4196 rte_eth_mirror_rule_set(uint16_t port_id,
4197                         struct rte_eth_mirror_conf *mirror_conf,
4198                         uint8_t rule_id, uint8_t on)
4199 {
4200         struct rte_eth_dev *dev;
4201
4202         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4203         if (mirror_conf->rule_type == 0) {
4204                 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
4205                 return -EINVAL;
4206         }
4207
4208         if (mirror_conf->dst_pool >= ETH_64_POOLS) {
4209                 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
4210                         ETH_64_POOLS - 1);
4211                 return -EINVAL;
4212         }
4213
4214         if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
4215              ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
4216             (mirror_conf->pool_mask == 0)) {
4217                 RTE_ETHDEV_LOG(ERR,
4218                         "Invalid mirror pool, pool mask can not be 0\n");
4219                 return -EINVAL;
4220         }
4221
4222         if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
4223             mirror_conf->vlan.vlan_mask == 0) {
4224                 RTE_ETHDEV_LOG(ERR,
4225                         "Invalid vlan mask, vlan mask can not be 0\n");
4226                 return -EINVAL;
4227         }
4228
4229         dev = &rte_eth_devices[port_id];
4230         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
4231
4232         return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
4233                                                 mirror_conf, rule_id, on));
4234 }
4235
4236 int
4237 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
4238 {
4239         struct rte_eth_dev *dev;
4240
4241         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4242
4243         dev = &rte_eth_devices[port_id];
4244         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
4245
4246         return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
4247                                                                    rule_id));
4248 }
4249
4250 RTE_INIT(eth_dev_init_cb_lists)
4251 {
4252         int i;
4253
4254         for (i = 0; i < RTE_MAX_ETHPORTS; i++)
4255                 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
4256 }
4257
4258 int
4259 rte_eth_dev_callback_register(uint16_t port_id,
4260                         enum rte_eth_event_type event,
4261                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4262 {
4263         struct rte_eth_dev *dev;
4264         struct rte_eth_dev_callback *user_cb;
4265         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4266         uint16_t last_port;
4267
4268         if (!cb_fn)
4269                 return -EINVAL;
4270
4271         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4272                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4273                 return -EINVAL;
4274         }
4275
4276         if (port_id == RTE_ETH_ALL) {
4277                 next_port = 0;
4278                 last_port = RTE_MAX_ETHPORTS - 1;
4279         } else {
4280                 next_port = last_port = port_id;
4281         }
4282
4283         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4284
4285         do {
4286                 dev = &rte_eth_devices[next_port];
4287
4288                 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
4289                         if (user_cb->cb_fn == cb_fn &&
4290                                 user_cb->cb_arg == cb_arg &&
4291                                 user_cb->event == event) {
4292                                 break;
4293                         }
4294                 }
4295
4296                 /* create a new callback. */
4297                 if (user_cb == NULL) {
4298                         user_cb = rte_zmalloc("INTR_USER_CALLBACK",
4299                                 sizeof(struct rte_eth_dev_callback), 0);
4300                         if (user_cb != NULL) {
4301                                 user_cb->cb_fn = cb_fn;
4302                                 user_cb->cb_arg = cb_arg;
4303                                 user_cb->event = event;
4304                                 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
4305                                                   user_cb, next);
4306                         } else {
4307                                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4308                                 rte_eth_dev_callback_unregister(port_id, event,
4309                                                                 cb_fn, cb_arg);
4310                                 return -ENOMEM;
4311                         }
4312
4313                 }
4314         } while (++next_port <= last_port);
4315
4316         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4317         return 0;
4318 }
4319
4320 int
4321 rte_eth_dev_callback_unregister(uint16_t port_id,
4322                         enum rte_eth_event_type event,
4323                         rte_eth_dev_cb_fn cb_fn, void *cb_arg)
4324 {
4325         int ret;
4326         struct rte_eth_dev *dev;
4327         struct rte_eth_dev_callback *cb, *next;
4328         uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
4329         uint16_t last_port;
4330
4331         if (!cb_fn)
4332                 return -EINVAL;
4333
4334         if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
4335                 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
4336                 return -EINVAL;
4337         }
4338
4339         if (port_id == RTE_ETH_ALL) {
4340                 next_port = 0;
4341                 last_port = RTE_MAX_ETHPORTS - 1;
4342         } else {
4343                 next_port = last_port = port_id;
4344         }
4345
4346         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4347
4348         do {
4349                 dev = &rte_eth_devices[next_port];
4350                 ret = 0;
4351                 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
4352                      cb = next) {
4353
4354                         next = TAILQ_NEXT(cb, next);
4355
4356                         if (cb->cb_fn != cb_fn || cb->event != event ||
4357                             (cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
4358                                 continue;
4359
4360                         /*
4361                          * if this callback is not executing right now,
4362                          * then remove it.
4363                          */
4364                         if (cb->active == 0) {
4365                                 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
4366                                 rte_free(cb);
4367                         } else {
4368                                 ret = -EAGAIN;
4369                         }
4370                 }
4371         } while (++next_port <= last_port);
4372
4373         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4374         return ret;
4375 }
4376
4377 int
4378 rte_eth_dev_callback_process(struct rte_eth_dev *dev,
4379         enum rte_eth_event_type event, void *ret_param)
4380 {
4381         struct rte_eth_dev_callback *cb_lst;
4382         struct rte_eth_dev_callback dev_cb;
4383         int rc = 0;
4384
4385         rte_spinlock_lock(&rte_eth_dev_cb_lock);
4386         TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
4387                 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
4388                         continue;
4389                 dev_cb = *cb_lst;
4390                 cb_lst->active = 1;
4391                 if (ret_param != NULL)
4392                         dev_cb.ret_param = ret_param;
4393
4394                 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4395                 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
4396                                 dev_cb.cb_arg, dev_cb.ret_param);
4397                 rte_spinlock_lock(&rte_eth_dev_cb_lock);
4398                 cb_lst->active = 0;
4399         }
4400         rte_spinlock_unlock(&rte_eth_dev_cb_lock);
4401         return rc;
4402 }
4403
4404 void
4405 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
4406 {
4407         if (dev == NULL)
4408                 return;
4409
4410         rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
4411
4412         dev->state = RTE_ETH_DEV_ATTACHED;
4413 }
4414
4415 int
4416 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
4417 {
4418         uint32_t vec;
4419         struct rte_eth_dev *dev;
4420         struct rte_intr_handle *intr_handle;
4421         uint16_t qid;
4422         int rc;
4423
4424         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4425
4426         dev = &rte_eth_devices[port_id];
4427
4428         if (!dev->intr_handle) {
4429                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4430                 return -ENOTSUP;
4431         }
4432
4433         intr_handle = dev->intr_handle;
4434         if (!intr_handle->intr_vec) {
4435                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4436                 return -EPERM;
4437         }
4438
4439         for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
4440                 vec = intr_handle->intr_vec[qid];
4441                 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4442                 if (rc && rc != -EEXIST) {
4443                         RTE_ETHDEV_LOG(ERR,
4444                                 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4445                                 port_id, qid, op, epfd, vec);
4446                 }
4447         }
4448
4449         return 0;
4450 }
4451
4452 int
4453 rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
4454 {
4455         struct rte_intr_handle *intr_handle;
4456         struct rte_eth_dev *dev;
4457         unsigned int efd_idx;
4458         uint32_t vec;
4459         int fd;
4460
4461         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
4462
4463         dev = &rte_eth_devices[port_id];
4464
4465         if (queue_id >= dev->data->nb_rx_queues) {
4466                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4467                 return -1;
4468         }
4469
4470         if (!dev->intr_handle) {
4471                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4472                 return -1;
4473         }
4474
4475         intr_handle = dev->intr_handle;
4476         if (!intr_handle->intr_vec) {
4477                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4478                 return -1;
4479         }
4480
4481         vec = intr_handle->intr_vec[queue_id];
4482         efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
4483                 (vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
4484         fd = intr_handle->efds[efd_idx];
4485
4486         return fd;
4487 }
4488
4489 static inline int
4490 eth_dma_mzone_name(char *name, size_t len, uint16_t port_id, uint16_t queue_id,
4491                 const char *ring_name)
4492 {
4493         return snprintf(name, len, "eth_p%d_q%d_%s",
4494                         port_id, queue_id, ring_name);
4495 }
4496
4497 const struct rte_memzone *
4498 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
4499                          uint16_t queue_id, size_t size, unsigned align,
4500                          int socket_id)
4501 {
4502         char z_name[RTE_MEMZONE_NAMESIZE];
4503         const struct rte_memzone *mz;
4504         int rc;
4505
4506         rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4507                         queue_id, ring_name);
4508         if (rc >= RTE_MEMZONE_NAMESIZE) {
4509                 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4510                 rte_errno = ENAMETOOLONG;
4511                 return NULL;
4512         }
4513
4514         mz = rte_memzone_lookup(z_name);
4515         if (mz) {
4516                 if ((socket_id != SOCKET_ID_ANY && socket_id != mz->socket_id) ||
4517                                 size > mz->len ||
4518                                 ((uintptr_t)mz->addr & (align - 1)) != 0) {
4519                         RTE_ETHDEV_LOG(ERR,
4520                                 "memzone %s does not justify the requested attributes\n",
4521                                 mz->name);
4522                         return NULL;
4523                 }
4524
4525                 return mz;
4526         }
4527
4528         return rte_memzone_reserve_aligned(z_name, size, socket_id,
4529                         RTE_MEMZONE_IOVA_CONTIG, align);
4530 }
4531
4532 int
4533 rte_eth_dma_zone_free(const struct rte_eth_dev *dev, const char *ring_name,
4534                 uint16_t queue_id)
4535 {
4536         char z_name[RTE_MEMZONE_NAMESIZE];
4537         const struct rte_memzone *mz;
4538         int rc = 0;
4539
4540         rc = eth_dma_mzone_name(z_name, sizeof(z_name), dev->data->port_id,
4541                         queue_id, ring_name);
4542         if (rc >= RTE_MEMZONE_NAMESIZE) {
4543                 RTE_ETHDEV_LOG(ERR, "ring name too long\n");
4544                 return -ENAMETOOLONG;
4545         }
4546
4547         mz = rte_memzone_lookup(z_name);
4548         if (mz)
4549                 rc = rte_memzone_free(mz);
4550         else
4551                 rc = -ENOENT;
4552
4553         return rc;
4554 }
4555
4556 int
4557 rte_eth_dev_create(struct rte_device *device, const char *name,
4558         size_t priv_data_size,
4559         ethdev_bus_specific_init ethdev_bus_specific_init,
4560         void *bus_init_params,
4561         ethdev_init_t ethdev_init, void *init_params)
4562 {
4563         struct rte_eth_dev *ethdev;
4564         int retval;
4565
4566         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
4567
4568         if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
4569                 ethdev = rte_eth_dev_allocate(name);
4570                 if (!ethdev)
4571                         return -ENODEV;
4572
4573                 if (priv_data_size) {
4574                         ethdev->data->dev_private = rte_zmalloc_socket(
4575                                 name, priv_data_size, RTE_CACHE_LINE_SIZE,
4576                                 device->numa_node);
4577
4578                         if (!ethdev->data->dev_private) {
4579                                 RTE_ETHDEV_LOG(ERR,
4580                                         "failed to allocate private data\n");
4581                                 retval = -ENOMEM;
4582                                 goto probe_failed;
4583                         }
4584                 }
4585         } else {
4586                 ethdev = rte_eth_dev_attach_secondary(name);
4587                 if (!ethdev) {
4588                         RTE_ETHDEV_LOG(ERR,
4589                                 "secondary process attach failed, ethdev doesn't exist\n");
4590                         return  -ENODEV;
4591                 }
4592         }
4593
4594         ethdev->device = device;
4595
4596         if (ethdev_bus_specific_init) {
4597                 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
4598                 if (retval) {
4599                         RTE_ETHDEV_LOG(ERR,
4600                                 "ethdev bus specific initialisation failed\n");
4601                         goto probe_failed;
4602                 }
4603         }
4604
4605         retval = ethdev_init(ethdev, init_params);
4606         if (retval) {
4607                 RTE_ETHDEV_LOG(ERR, "ethdev initialisation failed\n");
4608                 goto probe_failed;
4609         }
4610
4611         rte_eth_dev_probing_finish(ethdev);
4612
4613         return retval;
4614
4615 probe_failed:
4616         rte_eth_dev_release_port(ethdev);
4617         return retval;
4618 }
4619
4620 int
4621 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
4622         ethdev_uninit_t ethdev_uninit)
4623 {
4624         int ret;
4625
4626         ethdev = rte_eth_dev_allocated(ethdev->data->name);
4627         if (!ethdev)
4628                 return -ENODEV;
4629
4630         RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
4631
4632         ret = ethdev_uninit(ethdev);
4633         if (ret)
4634                 return ret;
4635
4636         return rte_eth_dev_release_port(ethdev);
4637 }
4638
4639 int
4640 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
4641                           int epfd, int op, void *data)
4642 {
4643         uint32_t vec;
4644         struct rte_eth_dev *dev;
4645         struct rte_intr_handle *intr_handle;
4646         int rc;
4647
4648         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4649
4650         dev = &rte_eth_devices[port_id];
4651         if (queue_id >= dev->data->nb_rx_queues) {
4652                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4653                 return -EINVAL;
4654         }
4655
4656         if (!dev->intr_handle) {
4657                 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
4658                 return -ENOTSUP;
4659         }
4660
4661         intr_handle = dev->intr_handle;
4662         if (!intr_handle->intr_vec) {
4663                 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
4664                 return -EPERM;
4665         }
4666
4667         vec = intr_handle->intr_vec[queue_id];
4668         rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
4669         if (rc && rc != -EEXIST) {
4670                 RTE_ETHDEV_LOG(ERR,
4671                         "p %u q %u rx ctl error op %d epfd %d vec %u\n",
4672                         port_id, queue_id, op, epfd, vec);
4673                 return rc;
4674         }
4675
4676         return 0;
4677 }
4678
4679 int
4680 rte_eth_dev_rx_intr_enable(uint16_t port_id,
4681                            uint16_t queue_id)
4682 {
4683         struct rte_eth_dev *dev;
4684         int ret;
4685
4686         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4687
4688         dev = &rte_eth_devices[port_id];
4689
4690         ret = eth_dev_validate_rx_queue(dev, queue_id);
4691         if (ret != 0)
4692                 return ret;
4693
4694         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
4695         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
4696                                                                 queue_id));
4697 }
4698
4699 int
4700 rte_eth_dev_rx_intr_disable(uint16_t port_id,
4701                             uint16_t queue_id)
4702 {
4703         struct rte_eth_dev *dev;
4704         int ret;
4705
4706         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4707
4708         dev = &rte_eth_devices[port_id];
4709
4710         ret = eth_dev_validate_rx_queue(dev, queue_id);
4711         if (ret != 0)
4712                 return ret;
4713
4714         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
4715         return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
4716                                                                 queue_id));
4717 }
4718
4719
4720 int
4721 rte_eth_dev_filter_supported(uint16_t port_id,
4722                              enum rte_filter_type filter_type)
4723 {
4724         struct rte_eth_dev *dev;
4725
4726         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4727
4728         dev = &rte_eth_devices[port_id];
4729         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4730         return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4731                                 RTE_ETH_FILTER_NOP, NULL);
4732 }
4733
4734 int
4735 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
4736                         enum rte_filter_op filter_op, void *arg)
4737 {
4738         struct rte_eth_dev *dev;
4739
4740         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4741
4742         dev = &rte_eth_devices[port_id];
4743         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
4744         return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
4745                                                              filter_op, arg));
4746 }
4747
4748 const struct rte_eth_rxtx_callback *
4749 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
4750                 rte_rx_callback_fn fn, void *user_param)
4751 {
4752 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4753         rte_errno = ENOTSUP;
4754         return NULL;
4755 #endif
4756         struct rte_eth_dev *dev;
4757
4758         /* check input parameters */
4759         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4760                     queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4761                 rte_errno = EINVAL;
4762                 return NULL;
4763         }
4764         dev = &rte_eth_devices[port_id];
4765         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4766                 rte_errno = EINVAL;
4767                 return NULL;
4768         }
4769         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4770
4771         if (cb == NULL) {
4772                 rte_errno = ENOMEM;
4773                 return NULL;
4774         }
4775
4776         cb->fn.rx = fn;
4777         cb->param = user_param;
4778
4779         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4780         /* Add the callbacks in fifo order. */
4781         struct rte_eth_rxtx_callback *tail =
4782                 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4783
4784         if (!tail) {
4785                 /* Stores to cb->fn and cb->param should complete before
4786                  * cb is visible to data plane.
4787                  */
4788                 __atomic_store_n(
4789                         &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4790                         cb, __ATOMIC_RELEASE);
4791
4792         } else {
4793                 while (tail->next)
4794                         tail = tail->next;
4795                 /* Stores to cb->fn and cb->param should complete before
4796                  * cb is visible to data plane.
4797                  */
4798                 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4799         }
4800         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4801
4802         return cb;
4803 }
4804
4805 const struct rte_eth_rxtx_callback *
4806 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
4807                 rte_rx_callback_fn fn, void *user_param)
4808 {
4809 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4810         rte_errno = ENOTSUP;
4811         return NULL;
4812 #endif
4813         /* check input parameters */
4814         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4815                 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
4816                 rte_errno = EINVAL;
4817                 return NULL;
4818         }
4819
4820         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4821
4822         if (cb == NULL) {
4823                 rte_errno = ENOMEM;
4824                 return NULL;
4825         }
4826
4827         cb->fn.rx = fn;
4828         cb->param = user_param;
4829
4830         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4831         /* Add the callbacks at first position */
4832         cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
4833         /* Stores to cb->fn, cb->param and cb->next should complete before
4834          * cb is visible to data plane threads.
4835          */
4836         __atomic_store_n(
4837                 &rte_eth_devices[port_id].post_rx_burst_cbs[queue_id],
4838                 cb, __ATOMIC_RELEASE);
4839         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4840
4841         return cb;
4842 }
4843
4844 const struct rte_eth_rxtx_callback *
4845 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
4846                 rte_tx_callback_fn fn, void *user_param)
4847 {
4848 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4849         rte_errno = ENOTSUP;
4850         return NULL;
4851 #endif
4852         struct rte_eth_dev *dev;
4853
4854         /* check input parameters */
4855         if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
4856                     queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
4857                 rte_errno = EINVAL;
4858                 return NULL;
4859         }
4860
4861         dev = &rte_eth_devices[port_id];
4862         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
4863                 rte_errno = EINVAL;
4864                 return NULL;
4865         }
4866
4867         struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
4868
4869         if (cb == NULL) {
4870                 rte_errno = ENOMEM;
4871                 return NULL;
4872         }
4873
4874         cb->fn.tx = fn;
4875         cb->param = user_param;
4876
4877         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4878         /* Add the callbacks in fifo order. */
4879         struct rte_eth_rxtx_callback *tail =
4880                 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
4881
4882         if (!tail) {
4883                 /* Stores to cb->fn and cb->param should complete before
4884                  * cb is visible to data plane.
4885                  */
4886                 __atomic_store_n(
4887                         &rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id],
4888                         cb, __ATOMIC_RELEASE);
4889
4890         } else {
4891                 while (tail->next)
4892                         tail = tail->next;
4893                 /* Stores to cb->fn and cb->param should complete before
4894                  * cb is visible to data plane.
4895                  */
4896                 __atomic_store_n(&tail->next, cb, __ATOMIC_RELEASE);
4897         }
4898         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4899
4900         return cb;
4901 }
4902
4903 int
4904 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
4905                 const struct rte_eth_rxtx_callback *user_cb)
4906 {
4907 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4908         return -ENOTSUP;
4909 #endif
4910         /* Check input parameters. */
4911         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4912         if (user_cb == NULL ||
4913                         queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
4914                 return -EINVAL;
4915
4916         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4917         struct rte_eth_rxtx_callback *cb;
4918         struct rte_eth_rxtx_callback **prev_cb;
4919         int ret = -EINVAL;
4920
4921         rte_spinlock_lock(&rte_eth_rx_cb_lock);
4922         prev_cb = &dev->post_rx_burst_cbs[queue_id];
4923         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4924                 cb = *prev_cb;
4925                 if (cb == user_cb) {
4926                         /* Remove the user cb from the callback list. */
4927                         __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4928                         ret = 0;
4929                         break;
4930                 }
4931         }
4932         rte_spinlock_unlock(&rte_eth_rx_cb_lock);
4933
4934         return ret;
4935 }
4936
4937 int
4938 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
4939                 const struct rte_eth_rxtx_callback *user_cb)
4940 {
4941 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
4942         return -ENOTSUP;
4943 #endif
4944         /* Check input parameters. */
4945         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
4946         if (user_cb == NULL ||
4947                         queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
4948                 return -EINVAL;
4949
4950         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
4951         int ret = -EINVAL;
4952         struct rte_eth_rxtx_callback *cb;
4953         struct rte_eth_rxtx_callback **prev_cb;
4954
4955         rte_spinlock_lock(&rte_eth_tx_cb_lock);
4956         prev_cb = &dev->pre_tx_burst_cbs[queue_id];
4957         for (; *prev_cb != NULL; prev_cb = &cb->next) {
4958                 cb = *prev_cb;
4959                 if (cb == user_cb) {
4960                         /* Remove the user cb from the callback list. */
4961                         __atomic_store_n(prev_cb, cb->next, __ATOMIC_RELAXED);
4962                         ret = 0;
4963                         break;
4964                 }
4965         }
4966         rte_spinlock_unlock(&rte_eth_tx_cb_lock);
4967
4968         return ret;
4969 }
4970
4971 int
4972 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
4973         struct rte_eth_rxq_info *qinfo)
4974 {
4975         struct rte_eth_dev *dev;
4976
4977         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4978
4979         if (qinfo == NULL)
4980                 return -EINVAL;
4981
4982         dev = &rte_eth_devices[port_id];
4983         if (queue_id >= dev->data->nb_rx_queues) {
4984                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
4985                 return -EINVAL;
4986         }
4987
4988         if (dev->data->rx_queues == NULL ||
4989                         dev->data->rx_queues[queue_id] == NULL) {
4990                 RTE_ETHDEV_LOG(ERR,
4991                                "Rx queue %"PRIu16" of device with port_id=%"
4992                                PRIu16" has not been setup\n",
4993                                queue_id, port_id);
4994                 return -EINVAL;
4995         }
4996
4997         if (rte_eth_dev_is_rx_hairpin_queue(dev, queue_id)) {
4998                 RTE_ETHDEV_LOG(INFO,
4999                         "Can't get hairpin Rx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5000                         queue_id, port_id);
5001                 return -EINVAL;
5002         }
5003
5004         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
5005
5006         memset(qinfo, 0, sizeof(*qinfo));
5007         dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
5008         return 0;
5009 }
5010
5011 int
5012 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
5013         struct rte_eth_txq_info *qinfo)
5014 {
5015         struct rte_eth_dev *dev;
5016
5017         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5018
5019         if (qinfo == NULL)
5020                 return -EINVAL;
5021
5022         dev = &rte_eth_devices[port_id];
5023         if (queue_id >= dev->data->nb_tx_queues) {
5024                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5025                 return -EINVAL;
5026         }
5027
5028         if (dev->data->tx_queues == NULL ||
5029                         dev->data->tx_queues[queue_id] == NULL) {
5030                 RTE_ETHDEV_LOG(ERR,
5031                                "Tx queue %"PRIu16" of device with port_id=%"
5032                                PRIu16" has not been setup\n",
5033                                queue_id, port_id);
5034                 return -EINVAL;
5035         }
5036
5037         if (rte_eth_dev_is_tx_hairpin_queue(dev, queue_id)) {
5038                 RTE_ETHDEV_LOG(INFO,
5039                         "Can't get hairpin Tx queue %"PRIu16" info of device with port_id=%"PRIu16"\n",
5040                         queue_id, port_id);
5041                 return -EINVAL;
5042         }
5043
5044         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
5045
5046         memset(qinfo, 0, sizeof(*qinfo));
5047         dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
5048
5049         return 0;
5050 }
5051
5052 int
5053 rte_eth_rx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5054                           struct rte_eth_burst_mode *mode)
5055 {
5056         struct rte_eth_dev *dev;
5057
5058         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5059
5060         if (mode == NULL)
5061                 return -EINVAL;
5062
5063         dev = &rte_eth_devices[port_id];
5064
5065         if (queue_id >= dev->data->nb_rx_queues) {
5066                 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
5067                 return -EINVAL;
5068         }
5069
5070         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_burst_mode_get, -ENOTSUP);
5071         memset(mode, 0, sizeof(*mode));
5072         return eth_err(port_id,
5073                        dev->dev_ops->rx_burst_mode_get(dev, queue_id, mode));
5074 }
5075
5076 int
5077 rte_eth_tx_burst_mode_get(uint16_t port_id, uint16_t queue_id,
5078                           struct rte_eth_burst_mode *mode)
5079 {
5080         struct rte_eth_dev *dev;
5081
5082         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5083
5084         if (mode == NULL)
5085                 return -EINVAL;
5086
5087         dev = &rte_eth_devices[port_id];
5088
5089         if (queue_id >= dev->data->nb_tx_queues) {
5090                 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
5091                 return -EINVAL;
5092         }
5093
5094         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_burst_mode_get, -ENOTSUP);
5095         memset(mode, 0, sizeof(*mode));
5096         return eth_err(port_id,
5097                        dev->dev_ops->tx_burst_mode_get(dev, queue_id, mode));
5098 }
5099
5100 int
5101 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
5102                              struct rte_ether_addr *mc_addr_set,
5103                              uint32_t nb_mc_addr)
5104 {
5105         struct rte_eth_dev *dev;
5106
5107         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5108
5109         dev = &rte_eth_devices[port_id];
5110         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
5111         return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
5112                                                 mc_addr_set, nb_mc_addr));
5113 }
5114
5115 int
5116 rte_eth_timesync_enable(uint16_t port_id)
5117 {
5118         struct rte_eth_dev *dev;
5119
5120         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5121         dev = &rte_eth_devices[port_id];
5122
5123         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
5124         return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
5125 }
5126
5127 int
5128 rte_eth_timesync_disable(uint16_t port_id)
5129 {
5130         struct rte_eth_dev *dev;
5131
5132         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5133         dev = &rte_eth_devices[port_id];
5134
5135         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
5136         return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
5137 }
5138
5139 int
5140 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
5141                                    uint32_t flags)
5142 {
5143         struct rte_eth_dev *dev;
5144
5145         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5146         dev = &rte_eth_devices[port_id];
5147
5148         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
5149         return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
5150                                 (dev, timestamp, flags));
5151 }
5152
5153 int
5154 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
5155                                    struct timespec *timestamp)
5156 {
5157         struct rte_eth_dev *dev;
5158
5159         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5160         dev = &rte_eth_devices[port_id];
5161
5162         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
5163         return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
5164                                 (dev, timestamp));
5165 }
5166
5167 int
5168 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
5169 {
5170         struct rte_eth_dev *dev;
5171
5172         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5173         dev = &rte_eth_devices[port_id];
5174
5175         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
5176         return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
5177                                                                       delta));
5178 }
5179
5180 int
5181 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
5182 {
5183         struct rte_eth_dev *dev;
5184
5185         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5186         dev = &rte_eth_devices[port_id];
5187
5188         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
5189         return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
5190                                                                 timestamp));
5191 }
5192
5193 int
5194 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
5195 {
5196         struct rte_eth_dev *dev;
5197
5198         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5199         dev = &rte_eth_devices[port_id];
5200
5201         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
5202         return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
5203                                                                 timestamp));
5204 }
5205
5206 int
5207 rte_eth_read_clock(uint16_t port_id, uint64_t *clock)
5208 {
5209         struct rte_eth_dev *dev;
5210
5211         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5212         dev = &rte_eth_devices[port_id];
5213
5214         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->read_clock, -ENOTSUP);
5215         return eth_err(port_id, (*dev->dev_ops->read_clock)(dev, clock));
5216 }
5217
5218 int
5219 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
5220 {
5221         struct rte_eth_dev *dev;
5222
5223         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5224
5225         dev = &rte_eth_devices[port_id];
5226         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
5227         return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
5228 }
5229
5230 int
5231 rte_eth_dev_get_eeprom_length(uint16_t port_id)
5232 {
5233         struct rte_eth_dev *dev;
5234
5235         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5236
5237         dev = &rte_eth_devices[port_id];
5238         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
5239         return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
5240 }
5241
5242 int
5243 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5244 {
5245         struct rte_eth_dev *dev;
5246
5247         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5248
5249         dev = &rte_eth_devices[port_id];
5250         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
5251         return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
5252 }
5253
5254 int
5255 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
5256 {
5257         struct rte_eth_dev *dev;
5258
5259         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5260
5261         dev = &rte_eth_devices[port_id];
5262         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
5263         return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
5264 }
5265
5266 int
5267 rte_eth_dev_get_module_info(uint16_t port_id,
5268                             struct rte_eth_dev_module_info *modinfo)
5269 {
5270         struct rte_eth_dev *dev;
5271
5272         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5273
5274         dev = &rte_eth_devices[port_id];
5275         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
5276         return (*dev->dev_ops->get_module_info)(dev, modinfo);
5277 }
5278
5279 int
5280 rte_eth_dev_get_module_eeprom(uint16_t port_id,
5281                               struct rte_dev_eeprom_info *info)
5282 {
5283         struct rte_eth_dev *dev;
5284
5285         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5286
5287         dev = &rte_eth_devices[port_id];
5288         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
5289         return (*dev->dev_ops->get_module_eeprom)(dev, info);
5290 }
5291
5292 int
5293 rte_eth_dev_get_dcb_info(uint16_t port_id,
5294                              struct rte_eth_dcb_info *dcb_info)
5295 {
5296         struct rte_eth_dev *dev;
5297
5298         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5299
5300         dev = &rte_eth_devices[port_id];
5301         memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
5302
5303         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
5304         return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
5305 }
5306
5307 int
5308 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
5309                                     struct rte_eth_l2_tunnel_conf *l2_tunnel)
5310 {
5311         struct rte_eth_dev *dev;
5312
5313         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5314         if (l2_tunnel == NULL) {
5315                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5316                 return -EINVAL;
5317         }
5318
5319         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5320                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5321                 return -EINVAL;
5322         }
5323
5324         dev = &rte_eth_devices[port_id];
5325         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
5326                                 -ENOTSUP);
5327         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
5328                                                                 l2_tunnel));
5329 }
5330
5331 int
5332 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
5333                                   struct rte_eth_l2_tunnel_conf *l2_tunnel,
5334                                   uint32_t mask,
5335                                   uint8_t en)
5336 {
5337         struct rte_eth_dev *dev;
5338
5339         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5340
5341         if (l2_tunnel == NULL) {
5342                 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
5343                 return -EINVAL;
5344         }
5345
5346         if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
5347                 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
5348                 return -EINVAL;
5349         }
5350
5351         if (mask == 0) {
5352                 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
5353                 return -EINVAL;
5354         }
5355
5356         dev = &rte_eth_devices[port_id];
5357         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
5358                                 -ENOTSUP);
5359         return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
5360                                                         l2_tunnel, mask, en));
5361 }
5362
5363 static void
5364 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
5365                            const struct rte_eth_desc_lim *desc_lim)
5366 {
5367         if (desc_lim->nb_align != 0)
5368                 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
5369
5370         if (desc_lim->nb_max != 0)
5371                 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
5372
5373         *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
5374 }
5375
5376 int
5377 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
5378                                  uint16_t *nb_rx_desc,
5379                                  uint16_t *nb_tx_desc)
5380 {
5381         struct rte_eth_dev_info dev_info;
5382         int ret;
5383
5384         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5385
5386         ret = rte_eth_dev_info_get(port_id, &dev_info);
5387         if (ret != 0)
5388                 return ret;
5389
5390         if (nb_rx_desc != NULL)
5391                 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
5392
5393         if (nb_tx_desc != NULL)
5394                 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
5395
5396         return 0;
5397 }
5398
5399 int
5400 rte_eth_dev_hairpin_capability_get(uint16_t port_id,
5401                                    struct rte_eth_hairpin_cap *cap)
5402 {
5403         struct rte_eth_dev *dev;
5404
5405         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
5406
5407         dev = &rte_eth_devices[port_id];
5408         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_cap_get, -ENOTSUP);
5409         memset(cap, 0, sizeof(*cap));
5410         return eth_err(port_id, (*dev->dev_ops->hairpin_cap_get)(dev, cap));
5411 }
5412
5413 int
5414 rte_eth_dev_is_rx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5415 {
5416         if (dev->data->rx_queue_state[queue_id] ==
5417             RTE_ETH_QUEUE_STATE_HAIRPIN)
5418                 return 1;
5419         return 0;
5420 }
5421
5422 int
5423 rte_eth_dev_is_tx_hairpin_queue(struct rte_eth_dev *dev, uint16_t queue_id)
5424 {
5425         if (dev->data->tx_queue_state[queue_id] ==
5426             RTE_ETH_QUEUE_STATE_HAIRPIN)
5427                 return 1;
5428         return 0;
5429 }
5430
5431 int
5432 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
5433 {
5434         struct rte_eth_dev *dev;
5435
5436         RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
5437
5438         if (pool == NULL)
5439                 return -EINVAL;
5440
5441         dev = &rte_eth_devices[port_id];
5442
5443         if (*dev->dev_ops->pool_ops_supported == NULL)
5444                 return 1; /* all pools are supported */
5445
5446         return (*dev->dev_ops->pool_ops_supported)(dev, pool);
5447 }
5448
5449 /**
5450  * A set of values to describe the possible states of a switch domain.
5451  */
5452 enum rte_eth_switch_domain_state {
5453         RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
5454         RTE_ETH_SWITCH_DOMAIN_ALLOCATED
5455 };
5456
5457 /**
5458  * Array of switch domains available for allocation. Array is sized to
5459  * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
5460  * ethdev ports in a single process.
5461  */
5462 static struct rte_eth_dev_switch {
5463         enum rte_eth_switch_domain_state state;
5464 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
5465
5466 int
5467 rte_eth_switch_domain_alloc(uint16_t *domain_id)
5468 {
5469         unsigned int i;
5470
5471         *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
5472
5473         for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
5474                 if (rte_eth_switch_domains[i].state ==
5475                         RTE_ETH_SWITCH_DOMAIN_UNUSED) {
5476                         rte_eth_switch_domains[i].state =
5477                                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
5478                         *domain_id = i;
5479                         return 0;
5480                 }
5481         }
5482
5483         return -ENOSPC;
5484 }
5485
5486 int
5487 rte_eth_switch_domain_free(uint16_t domain_id)
5488 {
5489         if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
5490                 domain_id >= RTE_MAX_ETHPORTS)
5491                 return -EINVAL;
5492
5493         if (rte_eth_switch_domains[domain_id].state !=
5494                 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
5495                 return -EINVAL;
5496
5497         rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
5498
5499         return 0;
5500 }
5501
5502 static int
5503 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
5504 {
5505         int state;
5506         struct rte_kvargs_pair *pair;
5507         char *letter;
5508
5509         arglist->str = strdup(str_in);
5510         if (arglist->str == NULL)
5511                 return -ENOMEM;
5512
5513         letter = arglist->str;
5514         state = 0;
5515         arglist->count = 0;
5516         pair = &arglist->pairs[0];
5517         while (1) {
5518                 switch (state) {
5519                 case 0: /* Initial */
5520                         if (*letter == '=')
5521                                 return -EINVAL;
5522                         else if (*letter == '\0')
5523                                 return 0;
5524
5525                         state = 1;
5526                         pair->key = letter;
5527                         /* fall-thru */
5528
5529                 case 1: /* Parsing key */
5530                         if (*letter == '=') {
5531                                 *letter = '\0';
5532                                 pair->value = letter + 1;
5533                                 state = 2;
5534                         } else if (*letter == ',' || *letter == '\0')
5535                                 return -EINVAL;
5536                         break;
5537
5538
5539                 case 2: /* Parsing value */
5540                         if (*letter == '[')
5541                                 state = 3;
5542                         else if (*letter == ',') {
5543                                 *letter = '\0';
5544                                 arglist->count++;
5545                                 pair = &arglist->pairs[arglist->count];
5546                                 state = 0;
5547                         } else if (*letter == '\0') {
5548                                 letter--;
5549                                 arglist->count++;
5550                                 pair = &arglist->pairs[arglist->count];
5551                                 state = 0;
5552                         }
5553                         break;
5554
5555                 case 3: /* Parsing list */
5556                         if (*letter == ']')
5557                                 state = 2;
5558                         else if (*letter == '\0')
5559                                 return -EINVAL;
5560                         break;
5561                 }
5562                 letter++;
5563         }
5564 }
5565
5566 int
5567 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
5568 {
5569         struct rte_kvargs args;
5570         struct rte_kvargs_pair *pair;
5571         unsigned int i;
5572         int result = 0;
5573
5574         memset(eth_da, 0, sizeof(*eth_da));
5575
5576         result = rte_eth_devargs_tokenise(&args, dargs);
5577         if (result < 0)
5578                 goto parse_cleanup;
5579
5580         for (i = 0; i < args.count; i++) {
5581                 pair = &args.pairs[i];
5582                 if (strcmp("representor", pair->key) == 0) {
5583                         result = rte_eth_devargs_parse_list(pair->value,
5584                                 rte_eth_devargs_parse_representor_ports,
5585                                 eth_da);
5586                         if (result < 0)
5587                                 goto parse_cleanup;
5588                 }
5589         }
5590
5591 parse_cleanup:
5592         if (args.str)
5593                 free(args.str);
5594
5595         return result;
5596 }
5597
5598 static int
5599 handle_port_list(const char *cmd __rte_unused,
5600                 const char *params __rte_unused,
5601                 struct rte_tel_data *d)
5602 {
5603         int port_id;
5604
5605         rte_tel_data_start_array(d, RTE_TEL_INT_VAL);
5606         RTE_ETH_FOREACH_DEV(port_id)
5607                 rte_tel_data_add_array_int(d, port_id);
5608         return 0;
5609 }
5610
5611 static void
5612 add_port_queue_stats(struct rte_tel_data *d, uint64_t *q_stats,
5613                 const char *stat_name)
5614 {
5615         int q;
5616         struct rte_tel_data *q_data = rte_tel_data_alloc();
5617         rte_tel_data_start_array(q_data, RTE_TEL_U64_VAL);
5618         for (q = 0; q < RTE_ETHDEV_QUEUE_STAT_CNTRS; q++)
5619                 rte_tel_data_add_array_u64(q_data, q_stats[q]);
5620         rte_tel_data_add_dict_container(d, stat_name, q_data, 0);
5621 }
5622
5623 #define ADD_DICT_STAT(stats, s) rte_tel_data_add_dict_u64(d, #s, stats.s)
5624
5625 static int
5626 handle_port_stats(const char *cmd __rte_unused,
5627                 const char *params,
5628                 struct rte_tel_data *d)
5629 {
5630         struct rte_eth_stats stats;
5631         int port_id, ret;
5632
5633         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5634                 return -1;
5635
5636         port_id = atoi(params);
5637         if (!rte_eth_dev_is_valid_port(port_id))
5638                 return -1;
5639
5640         ret = rte_eth_stats_get(port_id, &stats);
5641         if (ret < 0)
5642                 return -1;
5643
5644         rte_tel_data_start_dict(d);
5645         ADD_DICT_STAT(stats, ipackets);
5646         ADD_DICT_STAT(stats, opackets);
5647         ADD_DICT_STAT(stats, ibytes);
5648         ADD_DICT_STAT(stats, obytes);
5649         ADD_DICT_STAT(stats, imissed);
5650         ADD_DICT_STAT(stats, ierrors);
5651         ADD_DICT_STAT(stats, oerrors);
5652         ADD_DICT_STAT(stats, rx_nombuf);
5653         add_port_queue_stats(d, stats.q_ipackets, "q_ipackets");
5654         add_port_queue_stats(d, stats.q_opackets, "q_opackets");
5655         add_port_queue_stats(d, stats.q_ibytes, "q_ibytes");
5656         add_port_queue_stats(d, stats.q_obytes, "q_obytes");
5657         add_port_queue_stats(d, stats.q_errors, "q_errors");
5658
5659         return 0;
5660 }
5661
5662 static int
5663 handle_port_xstats(const char *cmd __rte_unused,
5664                 const char *params,
5665                 struct rte_tel_data *d)
5666 {
5667         struct rte_eth_xstat *eth_xstats;
5668         struct rte_eth_xstat_name *xstat_names;
5669         int port_id, num_xstats;
5670         int i, ret;
5671         char *end_param;
5672
5673         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5674                 return -1;
5675
5676         port_id = strtoul(params, &end_param, 0);
5677         if (*end_param != '\0')
5678                 RTE_ETHDEV_LOG(NOTICE,
5679                         "Extra parameters passed to ethdev telemetry command, ignoring");
5680         if (!rte_eth_dev_is_valid_port(port_id))
5681                 return -1;
5682
5683         num_xstats = rte_eth_xstats_get(port_id, NULL, 0);
5684         if (num_xstats < 0)
5685                 return -1;
5686
5687         /* use one malloc for both names and stats */
5688         eth_xstats = malloc((sizeof(struct rte_eth_xstat) +
5689                         sizeof(struct rte_eth_xstat_name)) * num_xstats);
5690         if (eth_xstats == NULL)
5691                 return -1;
5692         xstat_names = (void *)&eth_xstats[num_xstats];
5693
5694         ret = rte_eth_xstats_get_names(port_id, xstat_names, num_xstats);
5695         if (ret < 0 || ret > num_xstats) {
5696                 free(eth_xstats);
5697                 return -1;
5698         }
5699
5700         ret = rte_eth_xstats_get(port_id, eth_xstats, num_xstats);
5701         if (ret < 0 || ret > num_xstats) {
5702                 free(eth_xstats);
5703                 return -1;
5704         }
5705
5706         rte_tel_data_start_dict(d);
5707         for (i = 0; i < num_xstats; i++)
5708                 rte_tel_data_add_dict_u64(d, xstat_names[i].name,
5709                                 eth_xstats[i].value);
5710         return 0;
5711 }
5712
5713 static int
5714 handle_port_link_status(const char *cmd __rte_unused,
5715                 const char *params,
5716                 struct rte_tel_data *d)
5717 {
5718         static const char *status_str = "status";
5719         int ret, port_id;
5720         struct rte_eth_link link;
5721         char *end_param;
5722
5723         if (params == NULL || strlen(params) == 0 || !isdigit(*params))
5724                 return -1;
5725
5726         port_id = strtoul(params, &end_param, 0);
5727         if (*end_param != '\0')
5728                 RTE_ETHDEV_LOG(NOTICE,
5729                         "Extra parameters passed to ethdev telemetry command, ignoring");
5730         if (!rte_eth_dev_is_valid_port(port_id))
5731                 return -1;
5732
5733         ret = rte_eth_link_get(port_id, &link);
5734         if (ret < 0)
5735                 return -1;
5736
5737         rte_tel_data_start_dict(d);
5738         if (!link.link_status) {
5739                 rte_tel_data_add_dict_string(d, status_str, "DOWN");
5740                 return 0;
5741         }
5742         rte_tel_data_add_dict_string(d, status_str, "UP");
5743         rte_tel_data_add_dict_u64(d, "speed", link.link_speed);
5744         rte_tel_data_add_dict_string(d, "duplex",
5745                         (link.link_duplex == ETH_LINK_FULL_DUPLEX) ?
5746                                 "full-duplex" : "half-duplex");
5747         return 0;
5748 }
5749
5750 int
5751 rte_eth_hairpin_queue_peer_update(uint16_t peer_port, uint16_t peer_queue,
5752                                   struct rte_hairpin_peer_info *cur_info,
5753                                   struct rte_hairpin_peer_info *peer_info,
5754                                   uint32_t direction)
5755 {
5756         struct rte_eth_dev *dev;
5757
5758         /* Current queue information is not mandatory. */
5759         if (peer_info == NULL)
5760                 return -EINVAL;
5761
5762         /* No need to check the validity again. */
5763         dev = &rte_eth_devices[peer_port];
5764         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_update,
5765                                 -ENOTSUP);
5766
5767         return (*dev->dev_ops->hairpin_queue_peer_update)(dev, peer_queue,
5768                                         cur_info, peer_info, direction);
5769 }
5770
5771 int
5772 rte_eth_hairpin_queue_peer_bind(uint16_t cur_port, uint16_t cur_queue,
5773                                 struct rte_hairpin_peer_info *peer_info,
5774                                 uint32_t direction)
5775 {
5776         struct rte_eth_dev *dev;
5777
5778         if (peer_info == NULL)
5779                 return -EINVAL;
5780
5781         /* No need to check the validity again. */
5782         dev = &rte_eth_devices[cur_port];
5783         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_bind,
5784                                 -ENOTSUP);
5785
5786         return (*dev->dev_ops->hairpin_queue_peer_bind)(dev, cur_queue,
5787                                                         peer_info, direction);
5788 }
5789
5790 int
5791 rte_eth_hairpin_queue_peer_unbind(uint16_t cur_port, uint16_t cur_queue,
5792                                   uint32_t direction)
5793 {
5794         struct rte_eth_dev *dev;
5795
5796         /* No need to check the validity again. */
5797         dev = &rte_eth_devices[cur_port];
5798         RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->hairpin_queue_peer_unbind,
5799                                 -ENOTSUP);
5800
5801         return (*dev->dev_ops->hairpin_queue_peer_unbind)(dev, cur_queue,
5802                                                           direction);
5803 }
5804
5805 RTE_LOG_REGISTER(rte_eth_dev_logtype, lib.ethdev, INFO);
5806
5807 RTE_INIT(ethdev_init_telemetry)
5808 {
5809         rte_telemetry_register_cmd("/ethdev/list", handle_port_list,
5810                         "Returns list of available ethdev ports. Takes no parameters");
5811         rte_telemetry_register_cmd("/ethdev/stats", handle_port_stats,
5812                         "Returns the common stats for a port. Parameters: int port_id");
5813         rte_telemetry_register_cmd("/ethdev/xstats", handle_port_xstats,
5814                         "Returns the extended stats for a port. Parameters: int port_id");
5815         rte_telemetry_register_cmd("/ethdev/link_status",
5816                         handle_port_link_status,
5817                         "Returns the link status for a port. Parameters: int port_id");
5818 }