1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
16 #include <netinet/in.h>
18 #include <rte_byteorder.h>
20 #include <rte_debug.h>
21 #include <rte_interrupts.h>
22 #include <rte_memory.h>
23 #include <rte_memcpy.h>
24 #include <rte_memzone.h>
25 #include <rte_launch.h>
27 #include <rte_per_lcore.h>
28 #include <rte_lcore.h>
29 #include <rte_atomic.h>
30 #include <rte_branch_prediction.h>
31 #include <rte_common.h>
32 #include <rte_mempool.h>
33 #include <rte_malloc.h>
35 #include <rte_errno.h>
36 #include <rte_spinlock.h>
37 #include <rte_string_fns.h>
38 #include <rte_kvargs.h>
40 #include "rte_ether.h"
41 #include "rte_ethdev.h"
42 #include "rte_ethdev_driver.h"
43 #include "ethdev_profile.h"
45 int rte_eth_dev_logtype;
47 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
48 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
49 static uint16_t eth_dev_last_created_port;
51 /* spinlock for eth device callbacks */
52 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
54 /* spinlock for add/remove rx callbacks */
55 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
57 /* spinlock for add/remove tx callbacks */
58 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
60 /* spinlock for shared data allocation */
61 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
63 /* store statistics names and its offset in stats structure */
64 struct rte_eth_xstats_name_off {
65 char name[RTE_ETH_XSTATS_NAME_SIZE];
69 /* Shared memory between primary and secondary processes. */
71 uint64_t next_owner_id;
72 rte_spinlock_t ownership_lock;
73 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
74 } *rte_eth_dev_shared_data;
76 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
77 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
78 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
79 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
80 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
81 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
82 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
83 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
84 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
88 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
90 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
91 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
92 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
93 {"errors", offsetof(struct rte_eth_stats, q_errors)},
96 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
97 sizeof(rte_rxq_stats_strings[0]))
99 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
100 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
101 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
103 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
104 sizeof(rte_txq_stats_strings[0]))
106 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
107 { DEV_RX_OFFLOAD_##_name, #_name }
109 static const struct {
112 } rte_rx_offload_names[] = {
113 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
114 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
115 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
118 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
119 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
120 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
121 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
122 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
124 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
125 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
126 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
127 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
128 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
129 RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 is_allocated(const struct rte_eth_dev *ethdev)
232 return ethdev->data->name[0] != '\0';
235 static struct rte_eth_dev *
236 _rte_eth_dev_allocated(const char *name)
240 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
241 if (rte_eth_devices[i].data != NULL &&
242 strcmp(rte_eth_devices[i].data->name, name) == 0)
243 return &rte_eth_devices[i];
249 rte_eth_dev_allocated(const char *name)
251 struct rte_eth_dev *ethdev;
253 rte_eth_dev_shared_data_prepare();
255 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
257 ethdev = _rte_eth_dev_allocated(name);
259 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
265 rte_eth_dev_find_free_port(void)
269 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
270 /* Using shared name field to find a free port. */
271 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
272 RTE_ASSERT(rte_eth_devices[i].state ==
277 return RTE_MAX_ETHPORTS;
280 static struct rte_eth_dev *
281 eth_dev_get(uint16_t port_id)
283 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
285 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
287 eth_dev_last_created_port = port_id;
293 rte_eth_dev_allocate(const char *name)
296 struct rte_eth_dev *eth_dev = NULL;
298 rte_eth_dev_shared_data_prepare();
300 /* Synchronize port creation between primary and secondary threads. */
301 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
303 if (_rte_eth_dev_allocated(name) != NULL) {
305 "Ethernet device with name %s already allocated\n",
310 port_id = rte_eth_dev_find_free_port();
311 if (port_id == RTE_MAX_ETHPORTS) {
313 "Reached maximum number of Ethernet ports\n");
317 eth_dev = eth_dev_get(port_id);
318 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
319 eth_dev->data->port_id = port_id;
320 eth_dev->data->mtu = ETHER_MTU;
323 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
329 * Attach to a port already registered by the primary process, which
330 * makes sure that the same device would have the same port id both
331 * in the primary and secondary process.
334 rte_eth_dev_attach_secondary(const char *name)
337 struct rte_eth_dev *eth_dev = NULL;
339 rte_eth_dev_shared_data_prepare();
341 /* Synchronize port attachment to primary port creation and release. */
342 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
344 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
345 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
348 if (i == RTE_MAX_ETHPORTS) {
350 "Device %s is not driven by the primary process\n",
353 eth_dev = eth_dev_get(i);
354 RTE_ASSERT(eth_dev->data->port_id == i);
357 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
362 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
367 rte_eth_dev_shared_data_prepare();
369 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
371 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
373 eth_dev->state = RTE_ETH_DEV_UNUSED;
375 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
377 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
383 rte_eth_dev_is_valid_port(uint16_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
393 rte_eth_is_valid_owner_id(uint64_t owner_id)
395 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
396 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
397 RTE_ETHDEV_LOG(ERR, "Invalid owner_id=%016"PRIx64"\n",
405 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
407 while (port_id < RTE_MAX_ETHPORTS &&
408 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
409 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
410 rte_eth_devices[port_id].data->owner.id != owner_id))
413 if (port_id >= RTE_MAX_ETHPORTS)
414 return RTE_MAX_ETHPORTS;
419 int __rte_experimental
420 rte_eth_dev_owner_new(uint64_t *owner_id)
422 rte_eth_dev_shared_data_prepare();
424 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
426 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
428 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
433 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
434 const struct rte_eth_dev_owner *new_owner)
436 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
437 struct rte_eth_dev_owner *port_owner;
440 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
441 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
446 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
447 !rte_eth_is_valid_owner_id(old_owner_id))
450 port_owner = &rte_eth_devices[port_id].data->owner;
451 if (port_owner->id != old_owner_id) {
453 "Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
454 port_id, port_owner->name, port_owner->id);
458 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
460 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
461 RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
464 port_owner->id = new_owner->id;
466 RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
467 port_id, new_owner->name, new_owner->id);
472 int __rte_experimental
473 rte_eth_dev_owner_set(const uint16_t port_id,
474 const struct rte_eth_dev_owner *owner)
478 rte_eth_dev_shared_data_prepare();
480 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
482 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
484 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
488 int __rte_experimental
489 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
491 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
492 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
495 rte_eth_dev_shared_data_prepare();
497 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
499 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
501 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
505 void __rte_experimental
506 rte_eth_dev_owner_delete(const uint64_t owner_id)
510 rte_eth_dev_shared_data_prepare();
512 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
514 if (rte_eth_is_valid_owner_id(owner_id)) {
515 for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
516 if (rte_eth_devices[port_id].data->owner.id == owner_id)
517 memset(&rte_eth_devices[port_id].data->owner, 0,
518 sizeof(struct rte_eth_dev_owner));
520 "All port owners owned by %016"PRIx64" identifier have removed\n",
524 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
527 int __rte_experimental
528 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
531 struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
533 rte_eth_dev_shared_data_prepare();
535 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
537 if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
538 RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
542 rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
545 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
550 rte_eth_dev_socket_id(uint16_t port_id)
552 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
553 return rte_eth_devices[port_id].data->numa_node;
557 rte_eth_dev_get_sec_ctx(uint16_t port_id)
559 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
560 return rte_eth_devices[port_id].security_ctx;
564 rte_eth_dev_count(void)
566 return rte_eth_dev_count_avail();
570 rte_eth_dev_count_avail(void)
577 RTE_ETH_FOREACH_DEV(p)
583 uint16_t __rte_experimental
584 rte_eth_dev_count_total(void)
586 uint16_t port, count = 0;
588 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
589 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
596 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
600 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
603 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
607 /* shouldn't check 'rte_eth_devices[i].data',
608 * because it might be overwritten by VDEV PMD */
609 tmp = rte_eth_dev_shared_data->data[port_id].name;
615 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
620 RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
624 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
625 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
626 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
636 eth_err(uint16_t port_id, int ret)
640 if (rte_eth_dev_is_removed(port_id))
645 /* attach the new device, then store port_id of the device */
647 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
649 int current = rte_eth_dev_count_total();
650 struct rte_devargs da;
653 memset(&da, 0, sizeof(da));
655 if ((devargs == NULL) || (port_id == NULL)) {
661 if (rte_devargs_parse(&da, devargs))
664 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
668 /* no point looking at the port count if no port exists */
669 if (!rte_eth_dev_count_total()) {
670 RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
675 /* if nothing happened, there is a bug here, since some driver told us
676 * it did attach a device, but did not create a port.
677 * FIXME: race condition in case of plug-out of another device
679 if (current == rte_eth_dev_count_total()) {
684 *port_id = eth_dev_last_created_port;
692 /* detach the device, then store the name of the device */
694 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
696 struct rte_device *dev;
701 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
703 dev_flags = rte_eth_devices[port_id].data->dev_flags;
704 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
706 "Port %"PRIu16" is bonded, cannot detach\n", port_id);
710 dev = rte_eth_devices[port_id].device;
714 bus = rte_bus_find_by_device(dev);
718 ret = rte_eal_hotplug_remove(bus->name, dev->name);
722 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
727 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
729 uint16_t old_nb_queues = dev->data->nb_rx_queues;
733 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
734 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
735 sizeof(dev->data->rx_queues[0]) * nb_queues,
736 RTE_CACHE_LINE_SIZE);
737 if (dev->data->rx_queues == NULL) {
738 dev->data->nb_rx_queues = 0;
741 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
744 rxq = dev->data->rx_queues;
746 for (i = nb_queues; i < old_nb_queues; i++)
747 (*dev->dev_ops->rx_queue_release)(rxq[i]);
748 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
749 RTE_CACHE_LINE_SIZE);
752 if (nb_queues > old_nb_queues) {
753 uint16_t new_qs = nb_queues - old_nb_queues;
755 memset(rxq + old_nb_queues, 0,
756 sizeof(rxq[0]) * new_qs);
759 dev->data->rx_queues = rxq;
761 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
762 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
764 rxq = dev->data->rx_queues;
766 for (i = nb_queues; i < old_nb_queues; i++)
767 (*dev->dev_ops->rx_queue_release)(rxq[i]);
769 rte_free(dev->data->rx_queues);
770 dev->data->rx_queues = NULL;
772 dev->data->nb_rx_queues = nb_queues;
777 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
779 struct rte_eth_dev *dev;
781 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
783 dev = &rte_eth_devices[port_id];
784 if (!dev->data->dev_started) {
786 "Port %u must be started before start any queue\n",
791 if (rx_queue_id >= dev->data->nb_rx_queues) {
792 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
798 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
800 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
801 rx_queue_id, port_id);
805 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
811 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
813 struct rte_eth_dev *dev;
815 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
817 dev = &rte_eth_devices[port_id];
818 if (rx_queue_id >= dev->data->nb_rx_queues) {
819 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
825 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
827 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
828 rx_queue_id, port_id);
832 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
837 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
839 struct rte_eth_dev *dev;
841 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
843 dev = &rte_eth_devices[port_id];
844 if (!dev->data->dev_started) {
846 "Port %u must be started before start any queue\n",
851 if (tx_queue_id >= dev->data->nb_tx_queues) {
852 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
856 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
858 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
860 "Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
861 tx_queue_id, port_id);
865 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
869 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
871 struct rte_eth_dev *dev;
873 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
875 dev = &rte_eth_devices[port_id];
876 if (tx_queue_id >= dev->data->nb_tx_queues) {
877 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
883 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
885 "Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
886 tx_queue_id, port_id);
890 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
895 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
897 uint16_t old_nb_queues = dev->data->nb_tx_queues;
901 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
902 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
903 sizeof(dev->data->tx_queues[0]) * nb_queues,
904 RTE_CACHE_LINE_SIZE);
905 if (dev->data->tx_queues == NULL) {
906 dev->data->nb_tx_queues = 0;
909 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
910 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
912 txq = dev->data->tx_queues;
914 for (i = nb_queues; i < old_nb_queues; i++)
915 (*dev->dev_ops->tx_queue_release)(txq[i]);
916 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
917 RTE_CACHE_LINE_SIZE);
920 if (nb_queues > old_nb_queues) {
921 uint16_t new_qs = nb_queues - old_nb_queues;
923 memset(txq + old_nb_queues, 0,
924 sizeof(txq[0]) * new_qs);
927 dev->data->tx_queues = txq;
929 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
932 txq = dev->data->tx_queues;
934 for (i = nb_queues; i < old_nb_queues; i++)
935 (*dev->dev_ops->tx_queue_release)(txq[i]);
937 rte_free(dev->data->tx_queues);
938 dev->data->tx_queues = NULL;
940 dev->data->nb_tx_queues = nb_queues;
945 rte_eth_speed_bitflag(uint32_t speed, int duplex)
948 case ETH_SPEED_NUM_10M:
949 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
950 case ETH_SPEED_NUM_100M:
951 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
952 case ETH_SPEED_NUM_1G:
953 return ETH_LINK_SPEED_1G;
954 case ETH_SPEED_NUM_2_5G:
955 return ETH_LINK_SPEED_2_5G;
956 case ETH_SPEED_NUM_5G:
957 return ETH_LINK_SPEED_5G;
958 case ETH_SPEED_NUM_10G:
959 return ETH_LINK_SPEED_10G;
960 case ETH_SPEED_NUM_20G:
961 return ETH_LINK_SPEED_20G;
962 case ETH_SPEED_NUM_25G:
963 return ETH_LINK_SPEED_25G;
964 case ETH_SPEED_NUM_40G:
965 return ETH_LINK_SPEED_40G;
966 case ETH_SPEED_NUM_50G:
967 return ETH_LINK_SPEED_50G;
968 case ETH_SPEED_NUM_56G:
969 return ETH_LINK_SPEED_56G;
970 case ETH_SPEED_NUM_100G:
971 return ETH_LINK_SPEED_100G;
977 const char * __rte_experimental
978 rte_eth_dev_rx_offload_name(uint64_t offload)
980 const char *name = "UNKNOWN";
983 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
984 if (offload == rte_rx_offload_names[i].offload) {
985 name = rte_rx_offload_names[i].name;
993 const char * __rte_experimental
994 rte_eth_dev_tx_offload_name(uint64_t offload)
996 const char *name = "UNKNOWN";
999 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1000 if (offload == rte_tx_offload_names[i].offload) {
1001 name = rte_tx_offload_names[i].name;
1010 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1011 const struct rte_eth_conf *dev_conf)
1013 struct rte_eth_dev *dev;
1014 struct rte_eth_dev_info dev_info;
1015 struct rte_eth_conf local_conf = *dev_conf;
1018 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1020 dev = &rte_eth_devices[port_id];
1022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1023 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1025 rte_eth_dev_info_get(port_id, &dev_info);
1027 /* If number of queues specified by application for both Rx and Tx is
1028 * zero, use driver preferred values. This cannot be done individually
1029 * as it is valid for either Tx or Rx (but not both) to be zero.
1030 * If driver does not provide any preferred valued, fall back on
1033 if (nb_rx_q == 0 && nb_tx_q == 0) {
1034 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1036 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1037 nb_tx_q = dev_info.default_txportconf.nb_queues;
1039 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1042 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1044 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1045 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1049 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1051 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1052 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1056 if (dev->data->dev_started) {
1058 "Port %u must be stopped to allow configuration\n",
1063 /* Copy the dev_conf parameter into the dev structure */
1064 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1067 * Check that the numbers of RX and TX queues are not greater
1068 * than the maximum number of RX and TX queues supported by the
1069 * configured device.
1071 if (nb_rx_q > dev_info.max_rx_queues) {
1072 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
1073 port_id, nb_rx_q, dev_info.max_rx_queues);
1077 if (nb_tx_q > dev_info.max_tx_queues) {
1078 RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
1079 port_id, nb_tx_q, dev_info.max_tx_queues);
1083 /* Check that the device supports requested interrupts */
1084 if ((dev_conf->intr_conf.lsc == 1) &&
1085 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1086 RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
1087 dev->device->driver->name);
1090 if ((dev_conf->intr_conf.rmv == 1) &&
1091 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1092 RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
1093 dev->device->driver->name);
1098 * If jumbo frames are enabled, check that the maximum RX packet
1099 * length is supported by the configured device.
1101 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1102 if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
1104 "Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
1105 port_id, dev_conf->rxmode.max_rx_pkt_len,
1106 dev_info.max_rx_pktlen);
1108 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1110 "Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
1111 port_id, dev_conf->rxmode.max_rx_pkt_len,
1112 (unsigned)ETHER_MIN_LEN);
1116 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1117 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1118 /* Use default value */
1119 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1123 /* Any requested offloading must be within its device capabilities */
1124 if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
1125 local_conf.rxmode.offloads) {
1127 "Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
1128 "capabilities 0x%"PRIx64" in %s()\n",
1129 port_id, local_conf.rxmode.offloads,
1130 dev_info.rx_offload_capa,
1134 if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
1135 local_conf.txmode.offloads) {
1137 "Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
1138 "capabilities 0x%"PRIx64" in %s()\n",
1139 port_id, local_conf.txmode.offloads,
1140 dev_info.tx_offload_capa,
1145 if ((local_conf.rxmode.offloads & DEV_RX_OFFLOAD_CRC_STRIP) &&
1146 (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_KEEP_CRC)) {
1148 "Port id=%u not allowed to set both CRC STRIP and KEEP CRC offload flags\n",
1153 /* Check that device supports requested rss hash functions. */
1154 if ((dev_info.flow_type_rss_offloads |
1155 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1156 dev_info.flow_type_rss_offloads) {
1158 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1159 port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
1160 dev_info.flow_type_rss_offloads);
1165 * Setup new number of RX/TX queues and reconfigure device.
1167 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1170 "Port%u rte_eth_dev_rx_queue_config = %d\n",
1175 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1178 "Port%u rte_eth_dev_tx_queue_config = %d\n",
1180 rte_eth_dev_rx_queue_config(dev, 0);
1184 diag = (*dev->dev_ops->dev_configure)(dev);
1186 RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
1188 rte_eth_dev_rx_queue_config(dev, 0);
1189 rte_eth_dev_tx_queue_config(dev, 0);
1190 return eth_err(port_id, diag);
1193 /* Initialize Rx profiling if enabled at compilation time. */
1194 diag = __rte_eth_dev_profile_init(port_id, dev);
1196 RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
1198 rte_eth_dev_rx_queue_config(dev, 0);
1199 rte_eth_dev_tx_queue_config(dev, 0);
1200 return eth_err(port_id, diag);
1207 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1209 if (dev->data->dev_started) {
1210 RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
1211 dev->data->port_id);
1215 rte_eth_dev_rx_queue_config(dev, 0);
1216 rte_eth_dev_tx_queue_config(dev, 0);
1218 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1222 rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
1223 struct rte_eth_dev_info *dev_info)
1225 struct ether_addr *addr;
1230 /* replay MAC address configuration including default MAC */
1231 addr = &dev->data->mac_addrs[0];
1232 if (*dev->dev_ops->mac_addr_set != NULL)
1233 (*dev->dev_ops->mac_addr_set)(dev, addr);
1234 else if (*dev->dev_ops->mac_addr_add != NULL)
1235 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1237 if (*dev->dev_ops->mac_addr_add != NULL) {
1238 for (i = 1; i < dev_info->max_mac_addrs; i++) {
1239 addr = &dev->data->mac_addrs[i];
1241 /* skip zero address */
1242 if (is_zero_ether_addr(addr))
1246 pool_mask = dev->data->mac_pool_sel[i];
1249 if (pool_mask & 1ULL)
1250 (*dev->dev_ops->mac_addr_add)(dev,
1254 } while (pool_mask);
1260 rte_eth_dev_config_restore(struct rte_eth_dev *dev,
1261 struct rte_eth_dev_info *dev_info, uint16_t port_id)
1263 if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
1264 rte_eth_dev_mac_restore(dev, dev_info);
1266 /* replay promiscuous configuration */
1267 if (rte_eth_promiscuous_get(port_id) == 1)
1268 rte_eth_promiscuous_enable(port_id);
1269 else if (rte_eth_promiscuous_get(port_id) == 0)
1270 rte_eth_promiscuous_disable(port_id);
1272 /* replay all multicast configuration */
1273 if (rte_eth_allmulticast_get(port_id) == 1)
1274 rte_eth_allmulticast_enable(port_id);
1275 else if (rte_eth_allmulticast_get(port_id) == 0)
1276 rte_eth_allmulticast_disable(port_id);
1280 rte_eth_dev_start(uint16_t port_id)
1282 struct rte_eth_dev *dev;
1283 struct rte_eth_dev_info dev_info;
1286 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1288 dev = &rte_eth_devices[port_id];
1290 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1292 if (dev->data->dev_started != 0) {
1293 RTE_ETHDEV_LOG(INFO,
1294 "Device with port_id=%"PRIu16" already started\n",
1299 rte_eth_dev_info_get(port_id, &dev_info);
1301 /* Lets restore MAC now if device does not support live change */
1302 if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
1303 rte_eth_dev_mac_restore(dev, &dev_info);
1305 diag = (*dev->dev_ops->dev_start)(dev);
1307 dev->data->dev_started = 1;
1309 return eth_err(port_id, diag);
1311 rte_eth_dev_config_restore(dev, &dev_info, port_id);
1313 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1315 (*dev->dev_ops->link_update)(dev, 0);
1321 rte_eth_dev_stop(uint16_t port_id)
1323 struct rte_eth_dev *dev;
1325 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1326 dev = &rte_eth_devices[port_id];
1328 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1330 if (dev->data->dev_started == 0) {
1331 RTE_ETHDEV_LOG(INFO,
1332 "Device with port_id=%"PRIu16" already stopped\n",
1337 dev->data->dev_started = 0;
1338 (*dev->dev_ops->dev_stop)(dev);
1342 rte_eth_dev_set_link_up(uint16_t port_id)
1344 struct rte_eth_dev *dev;
1346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1348 dev = &rte_eth_devices[port_id];
1350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1351 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1355 rte_eth_dev_set_link_down(uint16_t port_id)
1357 struct rte_eth_dev *dev;
1359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1361 dev = &rte_eth_devices[port_id];
1363 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1364 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1368 rte_eth_dev_close(uint16_t port_id)
1370 struct rte_eth_dev *dev;
1372 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1373 dev = &rte_eth_devices[port_id];
1375 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1376 dev->data->dev_started = 0;
1377 (*dev->dev_ops->dev_close)(dev);
1379 dev->data->nb_rx_queues = 0;
1380 rte_free(dev->data->rx_queues);
1381 dev->data->rx_queues = NULL;
1382 dev->data->nb_tx_queues = 0;
1383 rte_free(dev->data->tx_queues);
1384 dev->data->tx_queues = NULL;
1388 rte_eth_dev_reset(uint16_t port_id)
1390 struct rte_eth_dev *dev;
1393 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1394 dev = &rte_eth_devices[port_id];
1396 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1398 rte_eth_dev_stop(port_id);
1399 ret = dev->dev_ops->dev_reset(dev);
1401 return eth_err(port_id, ret);
1404 int __rte_experimental
1405 rte_eth_dev_is_removed(uint16_t port_id)
1407 struct rte_eth_dev *dev;
1410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1412 dev = &rte_eth_devices[port_id];
1414 if (dev->state == RTE_ETH_DEV_REMOVED)
1417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1419 ret = dev->dev_ops->is_removed(dev);
1421 /* Device is physically removed. */
1422 dev->state = RTE_ETH_DEV_REMOVED;
1428 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1429 uint16_t nb_rx_desc, unsigned int socket_id,
1430 const struct rte_eth_rxconf *rx_conf,
1431 struct rte_mempool *mp)
1434 uint32_t mbp_buf_size;
1435 struct rte_eth_dev *dev;
1436 struct rte_eth_dev_info dev_info;
1437 struct rte_eth_rxconf local_conf;
1440 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1442 dev = &rte_eth_devices[port_id];
1443 if (rx_queue_id >= dev->data->nb_rx_queues) {
1444 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
1448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1452 * Check the size of the mbuf data buffer.
1453 * This value must be provided in the private data of the memory pool.
1454 * First check that the memory pool has a valid private data.
1456 rte_eth_dev_info_get(port_id, &dev_info);
1457 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1458 RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
1459 mp->name, (int)mp->private_data_size,
1460 (int)sizeof(struct rte_pktmbuf_pool_private));
1463 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1465 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1467 "%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
1468 mp->name, (int)mbp_buf_size,
1469 (int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
1470 (int)RTE_PKTMBUF_HEADROOM,
1471 (int)dev_info.min_rx_bufsize);
1475 /* Use default specified by driver, if nb_rx_desc is zero */
1476 if (nb_rx_desc == 0) {
1477 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1478 /* If driver default is also zero, fall back on EAL default */
1479 if (nb_rx_desc == 0)
1480 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1483 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1484 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1485 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1488 "Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1489 nb_rx_desc, dev_info.rx_desc_lim.nb_max,
1490 dev_info.rx_desc_lim.nb_min,
1491 dev_info.rx_desc_lim.nb_align);
1495 if (dev->data->dev_started &&
1496 !(dev_info.dev_capa &
1497 RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
1500 if (dev->data->dev_started &&
1501 (dev->data->rx_queue_state[rx_queue_id] !=
1502 RTE_ETH_QUEUE_STATE_STOPPED))
1505 rxq = dev->data->rx_queues;
1506 if (rxq[rx_queue_id]) {
1507 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1509 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1510 rxq[rx_queue_id] = NULL;
1513 if (rx_conf == NULL)
1514 rx_conf = &dev_info.default_rxconf;
1516 local_conf = *rx_conf;
1519 * If an offloading has already been enabled in
1520 * rte_eth_dev_configure(), it has been enabled on all queues,
1521 * so there is no need to enable it in this queue again.
1522 * The local_conf.offloads input to underlying PMD only carries
1523 * those offloadings which are only enabled on this queue and
1524 * not enabled on all queues.
1526 local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
1529 * New added offloadings for this queue are those not enabled in
1530 * rte_eth_dev_configure() and they must be per-queue type.
1531 * A pure per-port offloading can't be enabled on a queue while
1532 * disabled on another queue. A pure per-port offloading can't
1533 * be enabled for any queue as new added one if it hasn't been
1534 * enabled in rte_eth_dev_configure().
1536 if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
1537 local_conf.offloads) {
1539 "Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1540 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1541 port_id, rx_queue_id, local_conf.offloads,
1542 dev_info.rx_queue_offload_capa,
1547 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1548 socket_id, &local_conf, mp);
1550 if (!dev->data->min_rx_buf_size ||
1551 dev->data->min_rx_buf_size > mbp_buf_size)
1552 dev->data->min_rx_buf_size = mbp_buf_size;
1555 return eth_err(port_id, ret);
1559 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1560 uint16_t nb_tx_desc, unsigned int socket_id,
1561 const struct rte_eth_txconf *tx_conf)
1563 struct rte_eth_dev *dev;
1564 struct rte_eth_dev_info dev_info;
1565 struct rte_eth_txconf local_conf;
1568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1570 dev = &rte_eth_devices[port_id];
1571 if (tx_queue_id >= dev->data->nb_tx_queues) {
1572 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
1576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1577 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1579 rte_eth_dev_info_get(port_id, &dev_info);
1581 /* Use default specified by driver, if nb_tx_desc is zero */
1582 if (nb_tx_desc == 0) {
1583 nb_tx_desc = dev_info.default_txportconf.ring_size;
1584 /* If driver default is zero, fall back on EAL default */
1585 if (nb_tx_desc == 0)
1586 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1588 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1589 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1590 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1592 "Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
1593 nb_tx_desc, dev_info.tx_desc_lim.nb_max,
1594 dev_info.tx_desc_lim.nb_min,
1595 dev_info.tx_desc_lim.nb_align);
1599 if (dev->data->dev_started &&
1600 !(dev_info.dev_capa &
1601 RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
1604 if (dev->data->dev_started &&
1605 (dev->data->tx_queue_state[tx_queue_id] !=
1606 RTE_ETH_QUEUE_STATE_STOPPED))
1609 txq = dev->data->tx_queues;
1610 if (txq[tx_queue_id]) {
1611 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1613 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1614 txq[tx_queue_id] = NULL;
1617 if (tx_conf == NULL)
1618 tx_conf = &dev_info.default_txconf;
1620 local_conf = *tx_conf;
1623 * If an offloading has already been enabled in
1624 * rte_eth_dev_configure(), it has been enabled on all queues,
1625 * so there is no need to enable it in this queue again.
1626 * The local_conf.offloads input to underlying PMD only carries
1627 * those offloadings which are only enabled on this queue and
1628 * not enabled on all queues.
1630 local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
1633 * New added offloadings for this queue are those not enabled in
1634 * rte_eth_dev_configure() and they must be per-queue type.
1635 * A pure per-port offloading can't be enabled on a queue while
1636 * disabled on another queue. A pure per-port offloading can't
1637 * be enabled for any queue as new added one if it hasn't been
1638 * enabled in rte_eth_dev_configure().
1640 if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
1641 local_conf.offloads) {
1643 "Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
1644 "within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
1645 port_id, tx_queue_id, local_conf.offloads,
1646 dev_info.tx_queue_offload_capa,
1651 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1652 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1656 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1657 void *userdata __rte_unused)
1661 for (i = 0; i < unsent; i++)
1662 rte_pktmbuf_free(pkts[i]);
1666 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1669 uint64_t *count = userdata;
1672 for (i = 0; i < unsent; i++)
1673 rte_pktmbuf_free(pkts[i]);
1679 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1680 buffer_tx_error_fn cbfn, void *userdata)
1682 buffer->error_callback = cbfn;
1683 buffer->error_userdata = userdata;
1688 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1695 buffer->size = size;
1696 if (buffer->error_callback == NULL) {
1697 ret = rte_eth_tx_buffer_set_err_callback(
1698 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1705 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1707 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1710 /* Validate Input Data. Bail if not valid or not supported. */
1711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1714 /* Call driver to free pending mbufs. */
1715 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1717 return eth_err(port_id, ret);
1721 rte_eth_promiscuous_enable(uint16_t port_id)
1723 struct rte_eth_dev *dev;
1725 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1726 dev = &rte_eth_devices[port_id];
1728 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1729 (*dev->dev_ops->promiscuous_enable)(dev);
1730 dev->data->promiscuous = 1;
1734 rte_eth_promiscuous_disable(uint16_t port_id)
1736 struct rte_eth_dev *dev;
1738 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1739 dev = &rte_eth_devices[port_id];
1741 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1742 dev->data->promiscuous = 0;
1743 (*dev->dev_ops->promiscuous_disable)(dev);
1747 rte_eth_promiscuous_get(uint16_t port_id)
1749 struct rte_eth_dev *dev;
1751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1753 dev = &rte_eth_devices[port_id];
1754 return dev->data->promiscuous;
1758 rte_eth_allmulticast_enable(uint16_t port_id)
1760 struct rte_eth_dev *dev;
1762 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1763 dev = &rte_eth_devices[port_id];
1765 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1766 (*dev->dev_ops->allmulticast_enable)(dev);
1767 dev->data->all_multicast = 1;
1771 rte_eth_allmulticast_disable(uint16_t port_id)
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1776 dev = &rte_eth_devices[port_id];
1778 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1779 dev->data->all_multicast = 0;
1780 (*dev->dev_ops->allmulticast_disable)(dev);
1784 rte_eth_allmulticast_get(uint16_t port_id)
1786 struct rte_eth_dev *dev;
1788 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1790 dev = &rte_eth_devices[port_id];
1791 return dev->data->all_multicast;
1795 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1797 struct rte_eth_dev *dev;
1799 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1800 dev = &rte_eth_devices[port_id];
1802 if (dev->data->dev_conf.intr_conf.lsc &&
1803 dev->data->dev_started)
1804 rte_eth_linkstatus_get(dev, eth_link);
1806 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1807 (*dev->dev_ops->link_update)(dev, 1);
1808 *eth_link = dev->data->dev_link;
1813 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1815 struct rte_eth_dev *dev;
1817 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1818 dev = &rte_eth_devices[port_id];
1820 if (dev->data->dev_conf.intr_conf.lsc &&
1821 dev->data->dev_started)
1822 rte_eth_linkstatus_get(dev, eth_link);
1824 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1825 (*dev->dev_ops->link_update)(dev, 0);
1826 *eth_link = dev->data->dev_link;
1831 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1833 struct rte_eth_dev *dev;
1835 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1837 dev = &rte_eth_devices[port_id];
1838 memset(stats, 0, sizeof(*stats));
1840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1841 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1842 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1846 rte_eth_stats_reset(uint16_t port_id)
1848 struct rte_eth_dev *dev;
1850 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1851 dev = &rte_eth_devices[port_id];
1853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1854 (*dev->dev_ops->stats_reset)(dev);
1855 dev->data->rx_mbuf_alloc_failed = 0;
1861 get_xstats_basic_count(struct rte_eth_dev *dev)
1863 uint16_t nb_rxqs, nb_txqs;
1866 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1867 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1869 count = RTE_NB_STATS;
1870 count += nb_rxqs * RTE_NB_RXQ_STATS;
1871 count += nb_txqs * RTE_NB_TXQ_STATS;
1877 get_xstats_count(uint16_t port_id)
1879 struct rte_eth_dev *dev;
1882 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1883 dev = &rte_eth_devices[port_id];
1884 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1885 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1888 return eth_err(port_id, count);
1890 if (dev->dev_ops->xstats_get_names != NULL) {
1891 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1893 return eth_err(port_id, count);
1898 count += get_xstats_basic_count(dev);
1904 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1907 int cnt_xstats, idx_xstat;
1909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1912 RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
1917 RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
1922 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1923 if (cnt_xstats < 0) {
1924 RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
1928 /* Get id-name lookup table */
1929 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1931 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1932 port_id, xstats_names, cnt_xstats, NULL)) {
1933 RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
1937 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1938 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1947 /* retrieve basic stats names */
1949 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1950 struct rte_eth_xstat_name *xstats_names)
1952 int cnt_used_entries = 0;
1953 uint32_t idx, id_queue;
1956 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1957 snprintf(xstats_names[cnt_used_entries].name,
1958 sizeof(xstats_names[0].name),
1959 "%s", rte_stats_strings[idx].name);
1962 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1963 for (id_queue = 0; id_queue < num_q; id_queue++) {
1964 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1965 snprintf(xstats_names[cnt_used_entries].name,
1966 sizeof(xstats_names[0].name),
1968 id_queue, rte_rxq_stats_strings[idx].name);
1973 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1974 for (id_queue = 0; id_queue < num_q; id_queue++) {
1975 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1976 snprintf(xstats_names[cnt_used_entries].name,
1977 sizeof(xstats_names[0].name),
1979 id_queue, rte_txq_stats_strings[idx].name);
1983 return cnt_used_entries;
1986 /* retrieve ethdev extended statistics names */
1988 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1989 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1992 struct rte_eth_xstat_name *xstats_names_copy;
1993 unsigned int no_basic_stat_requested = 1;
1994 unsigned int no_ext_stat_requested = 1;
1995 unsigned int expected_entries;
1996 unsigned int basic_count;
1997 struct rte_eth_dev *dev;
2001 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2002 dev = &rte_eth_devices[port_id];
2004 basic_count = get_xstats_basic_count(dev);
2005 ret = get_xstats_count(port_id);
2008 expected_entries = (unsigned int)ret;
2010 /* Return max number of stats if no ids given */
2013 return expected_entries;
2014 else if (xstats_names && size < expected_entries)
2015 return expected_entries;
2018 if (ids && !xstats_names)
2021 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
2022 uint64_t ids_copy[size];
2024 for (i = 0; i < size; i++) {
2025 if (ids[i] < basic_count) {
2026 no_basic_stat_requested = 0;
2031 * Convert ids to xstats ids that PMD knows.
2032 * ids known by user are basic + extended stats.
2034 ids_copy[i] = ids[i] - basic_count;
2037 if (no_basic_stat_requested)
2038 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
2039 xstats_names, ids_copy, size);
2042 /* Retrieve all stats */
2044 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2046 if (num_stats < 0 || num_stats > (int)expected_entries)
2049 return expected_entries;
2052 xstats_names_copy = calloc(expected_entries,
2053 sizeof(struct rte_eth_xstat_name));
2055 if (!xstats_names_copy) {
2056 RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
2061 for (i = 0; i < size; i++) {
2062 if (ids[i] >= basic_count) {
2063 no_ext_stat_requested = 0;
2069 /* Fill xstats_names_copy structure */
2070 if (ids && no_ext_stat_requested) {
2071 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2073 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2076 free(xstats_names_copy);
2082 for (i = 0; i < size; i++) {
2083 if (ids[i] >= expected_entries) {
2084 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2085 free(xstats_names_copy);
2088 xstats_names[i] = xstats_names_copy[ids[i]];
2091 free(xstats_names_copy);
2096 rte_eth_xstats_get_names(uint16_t port_id,
2097 struct rte_eth_xstat_name *xstats_names,
2100 struct rte_eth_dev *dev;
2101 int cnt_used_entries;
2102 int cnt_expected_entries;
2103 int cnt_driver_entries;
2105 cnt_expected_entries = get_xstats_count(port_id);
2106 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2107 (int)size < cnt_expected_entries)
2108 return cnt_expected_entries;
2110 /* port_id checked in get_xstats_count() */
2111 dev = &rte_eth_devices[port_id];
2113 cnt_used_entries = rte_eth_basic_stats_get_names(
2116 if (dev->dev_ops->xstats_get_names != NULL) {
2117 /* If there are any driver-specific xstats, append them
2120 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2122 xstats_names + cnt_used_entries,
2123 size - cnt_used_entries);
2124 if (cnt_driver_entries < 0)
2125 return eth_err(port_id, cnt_driver_entries);
2126 cnt_used_entries += cnt_driver_entries;
2129 return cnt_used_entries;
2134 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2136 struct rte_eth_dev *dev;
2137 struct rte_eth_stats eth_stats;
2138 unsigned int count = 0, i, q;
2139 uint64_t val, *stats_ptr;
2140 uint16_t nb_rxqs, nb_txqs;
2143 ret = rte_eth_stats_get(port_id, ð_stats);
2147 dev = &rte_eth_devices[port_id];
2149 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2150 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2153 for (i = 0; i < RTE_NB_STATS; i++) {
2154 stats_ptr = RTE_PTR_ADD(ð_stats,
2155 rte_stats_strings[i].offset);
2157 xstats[count++].value = val;
2161 for (q = 0; q < nb_rxqs; q++) {
2162 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2163 stats_ptr = RTE_PTR_ADD(ð_stats,
2164 rte_rxq_stats_strings[i].offset +
2165 q * sizeof(uint64_t));
2167 xstats[count++].value = val;
2172 for (q = 0; q < nb_txqs; q++) {
2173 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2174 stats_ptr = RTE_PTR_ADD(ð_stats,
2175 rte_txq_stats_strings[i].offset +
2176 q * sizeof(uint64_t));
2178 xstats[count++].value = val;
2184 /* retrieve ethdev extended statistics */
2186 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2187 uint64_t *values, unsigned int size)
2189 unsigned int no_basic_stat_requested = 1;
2190 unsigned int no_ext_stat_requested = 1;
2191 unsigned int num_xstats_filled;
2192 unsigned int basic_count;
2193 uint16_t expected_entries;
2194 struct rte_eth_dev *dev;
2198 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2199 ret = get_xstats_count(port_id);
2202 expected_entries = (uint16_t)ret;
2203 struct rte_eth_xstat xstats[expected_entries];
2204 dev = &rte_eth_devices[port_id];
2205 basic_count = get_xstats_basic_count(dev);
2207 /* Return max number of stats if no ids given */
2210 return expected_entries;
2211 else if (values && size < expected_entries)
2212 return expected_entries;
2218 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2219 unsigned int basic_count = get_xstats_basic_count(dev);
2220 uint64_t ids_copy[size];
2222 for (i = 0; i < size; i++) {
2223 if (ids[i] < basic_count) {
2224 no_basic_stat_requested = 0;
2229 * Convert ids to xstats ids that PMD knows.
2230 * ids known by user are basic + extended stats.
2232 ids_copy[i] = ids[i] - basic_count;
2235 if (no_basic_stat_requested)
2236 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2241 for (i = 0; i < size; i++) {
2242 if (ids[i] >= basic_count) {
2243 no_ext_stat_requested = 0;
2249 /* Fill the xstats structure */
2250 if (ids && no_ext_stat_requested)
2251 ret = rte_eth_basic_stats_get(port_id, xstats);
2253 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2257 num_xstats_filled = (unsigned int)ret;
2259 /* Return all stats */
2261 for (i = 0; i < num_xstats_filled; i++)
2262 values[i] = xstats[i].value;
2263 return expected_entries;
2267 for (i = 0; i < size; i++) {
2268 if (ids[i] >= expected_entries) {
2269 RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
2272 values[i] = xstats[ids[i]].value;
2278 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2281 struct rte_eth_dev *dev;
2282 unsigned int count = 0, i;
2283 signed int xcount = 0;
2284 uint16_t nb_rxqs, nb_txqs;
2287 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2289 dev = &rte_eth_devices[port_id];
2291 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2292 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2294 /* Return generic statistics */
2295 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2296 (nb_txqs * RTE_NB_TXQ_STATS);
2298 /* implemented by the driver */
2299 if (dev->dev_ops->xstats_get != NULL) {
2300 /* Retrieve the xstats from the driver at the end of the
2303 xcount = (*dev->dev_ops->xstats_get)(dev,
2304 xstats ? xstats + count : NULL,
2305 (n > count) ? n - count : 0);
2308 return eth_err(port_id, xcount);
2311 if (n < count + xcount || xstats == NULL)
2312 return count + xcount;
2314 /* now fill the xstats structure */
2315 ret = rte_eth_basic_stats_get(port_id, xstats);
2320 for (i = 0; i < count; i++)
2322 /* add an offset to driver-specific stats */
2323 for ( ; i < count + xcount; i++)
2324 xstats[i].id += count;
2326 return count + xcount;
2329 /* reset ethdev extended statistics */
2331 rte_eth_xstats_reset(uint16_t port_id)
2333 struct rte_eth_dev *dev;
2335 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2336 dev = &rte_eth_devices[port_id];
2338 /* implemented by the driver */
2339 if (dev->dev_ops->xstats_reset != NULL) {
2340 (*dev->dev_ops->xstats_reset)(dev);
2344 /* fallback to default */
2345 rte_eth_stats_reset(port_id);
2349 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2352 struct rte_eth_dev *dev;
2354 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2356 dev = &rte_eth_devices[port_id];
2358 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2360 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
2363 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
2366 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
2369 return (*dev->dev_ops->queue_stats_mapping_set)
2370 (dev, queue_id, stat_idx, is_rx);
2375 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2378 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2379 stat_idx, STAT_QMAP_TX));
2384 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2387 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2388 stat_idx, STAT_QMAP_RX));
2392 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2394 struct rte_eth_dev *dev;
2396 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2397 dev = &rte_eth_devices[port_id];
2399 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2400 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2401 fw_version, fw_size));
2405 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2407 struct rte_eth_dev *dev;
2408 const struct rte_eth_desc_lim lim = {
2409 .nb_max = UINT16_MAX,
2414 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2415 dev = &rte_eth_devices[port_id];
2417 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2418 dev_info->rx_desc_lim = lim;
2419 dev_info->tx_desc_lim = lim;
2420 dev_info->device = dev->device;
2422 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2423 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2424 dev_info->driver_name = dev->device->driver->name;
2425 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2426 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2428 dev_info->dev_flags = &dev->data->dev_flags;
2432 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2433 uint32_t *ptypes, int num)
2436 struct rte_eth_dev *dev;
2437 const uint32_t *all_ptypes;
2439 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2440 dev = &rte_eth_devices[port_id];
2441 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2442 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2447 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2448 if (all_ptypes[i] & ptype_mask) {
2450 ptypes[j] = all_ptypes[i];
2458 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2460 struct rte_eth_dev *dev;
2462 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2463 dev = &rte_eth_devices[port_id];
2464 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2469 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2471 struct rte_eth_dev *dev;
2473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2475 dev = &rte_eth_devices[port_id];
2476 *mtu = dev->data->mtu;
2481 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2484 struct rte_eth_dev *dev;
2486 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2487 dev = &rte_eth_devices[port_id];
2488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2490 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2492 dev->data->mtu = mtu;
2494 return eth_err(port_id, ret);
2498 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2500 struct rte_eth_dev *dev;
2503 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2504 dev = &rte_eth_devices[port_id];
2505 if (!(dev->data->dev_conf.rxmode.offloads &
2506 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2507 RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
2512 if (vlan_id > 4095) {
2513 RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
2517 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2519 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2521 struct rte_vlan_filter_conf *vfc;
2525 vfc = &dev->data->vlan_filter_conf;
2526 vidx = vlan_id / 64;
2527 vbit = vlan_id % 64;
2530 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2532 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2535 return eth_err(port_id, ret);
2539 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2542 struct rte_eth_dev *dev;
2544 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2545 dev = &rte_eth_devices[port_id];
2546 if (rx_queue_id >= dev->data->nb_rx_queues) {
2547 RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
2551 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2552 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2558 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2559 enum rte_vlan_type vlan_type,
2562 struct rte_eth_dev *dev;
2564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2565 dev = &rte_eth_devices[port_id];
2566 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2568 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2573 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2575 struct rte_eth_dev *dev;
2579 uint64_t orig_offloads;
2581 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2582 dev = &rte_eth_devices[port_id];
2584 /* save original values in case of failure */
2585 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2587 /*check which option changed by application*/
2588 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2589 org = !!(dev->data->dev_conf.rxmode.offloads &
2590 DEV_RX_OFFLOAD_VLAN_STRIP);
2593 dev->data->dev_conf.rxmode.offloads |=
2594 DEV_RX_OFFLOAD_VLAN_STRIP;
2596 dev->data->dev_conf.rxmode.offloads &=
2597 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2598 mask |= ETH_VLAN_STRIP_MASK;
2601 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2602 org = !!(dev->data->dev_conf.rxmode.offloads &
2603 DEV_RX_OFFLOAD_VLAN_FILTER);
2606 dev->data->dev_conf.rxmode.offloads |=
2607 DEV_RX_OFFLOAD_VLAN_FILTER;
2609 dev->data->dev_conf.rxmode.offloads &=
2610 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2611 mask |= ETH_VLAN_FILTER_MASK;
2614 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2615 org = !!(dev->data->dev_conf.rxmode.offloads &
2616 DEV_RX_OFFLOAD_VLAN_EXTEND);
2619 dev->data->dev_conf.rxmode.offloads |=
2620 DEV_RX_OFFLOAD_VLAN_EXTEND;
2622 dev->data->dev_conf.rxmode.offloads &=
2623 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2624 mask |= ETH_VLAN_EXTEND_MASK;
2631 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2632 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2634 /* hit an error restore original values */
2635 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2638 return eth_err(port_id, ret);
2642 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2644 struct rte_eth_dev *dev;
2647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2648 dev = &rte_eth_devices[port_id];
2650 if (dev->data->dev_conf.rxmode.offloads &
2651 DEV_RX_OFFLOAD_VLAN_STRIP)
2652 ret |= ETH_VLAN_STRIP_OFFLOAD;
2654 if (dev->data->dev_conf.rxmode.offloads &
2655 DEV_RX_OFFLOAD_VLAN_FILTER)
2656 ret |= ETH_VLAN_FILTER_OFFLOAD;
2658 if (dev->data->dev_conf.rxmode.offloads &
2659 DEV_RX_OFFLOAD_VLAN_EXTEND)
2660 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2666 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2668 struct rte_eth_dev *dev;
2670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2671 dev = &rte_eth_devices[port_id];
2672 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2674 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2678 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2680 struct rte_eth_dev *dev;
2682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2683 dev = &rte_eth_devices[port_id];
2684 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2685 memset(fc_conf, 0, sizeof(*fc_conf));
2686 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2690 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2692 struct rte_eth_dev *dev;
2694 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2695 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2696 RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
2700 dev = &rte_eth_devices[port_id];
2701 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2702 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2706 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2707 struct rte_eth_pfc_conf *pfc_conf)
2709 struct rte_eth_dev *dev;
2711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2712 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2713 RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
2717 dev = &rte_eth_devices[port_id];
2718 /* High water, low water validation are device specific */
2719 if (*dev->dev_ops->priority_flow_ctrl_set)
2720 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2726 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2734 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2735 for (i = 0; i < num; i++) {
2736 if (reta_conf[i].mask)
2744 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2748 uint16_t i, idx, shift;
2754 RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
2758 for (i = 0; i < reta_size; i++) {
2759 idx = i / RTE_RETA_GROUP_SIZE;
2760 shift = i % RTE_RETA_GROUP_SIZE;
2761 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2762 (reta_conf[idx].reta[shift] >= max_rxq)) {
2764 "reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
2766 reta_conf[idx].reta[shift], max_rxq);
2775 rte_eth_dev_rss_reta_update(uint16_t port_id,
2776 struct rte_eth_rss_reta_entry64 *reta_conf,
2779 struct rte_eth_dev *dev;
2782 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2783 /* Check mask bits */
2784 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2788 dev = &rte_eth_devices[port_id];
2790 /* Check entry value */
2791 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2792 dev->data->nb_rx_queues);
2796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2797 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2802 rte_eth_dev_rss_reta_query(uint16_t port_id,
2803 struct rte_eth_rss_reta_entry64 *reta_conf,
2806 struct rte_eth_dev *dev;
2809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2811 /* Check mask bits */
2812 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2816 dev = &rte_eth_devices[port_id];
2817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2818 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2823 rte_eth_dev_rss_hash_update(uint16_t port_id,
2824 struct rte_eth_rss_conf *rss_conf)
2826 struct rte_eth_dev *dev;
2827 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2830 dev = &rte_eth_devices[port_id];
2831 rte_eth_dev_info_get(port_id, &dev_info);
2832 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2833 dev_info.flow_type_rss_offloads) {
2835 "Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2836 port_id, rss_conf->rss_hf,
2837 dev_info.flow_type_rss_offloads);
2840 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2841 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2846 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2847 struct rte_eth_rss_conf *rss_conf)
2849 struct rte_eth_dev *dev;
2851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2852 dev = &rte_eth_devices[port_id];
2853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2854 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2859 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2860 struct rte_eth_udp_tunnel *udp_tunnel)
2862 struct rte_eth_dev *dev;
2864 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2865 if (udp_tunnel == NULL) {
2866 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2870 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2871 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2875 dev = &rte_eth_devices[port_id];
2876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2877 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2882 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2883 struct rte_eth_udp_tunnel *udp_tunnel)
2885 struct rte_eth_dev *dev;
2887 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2888 dev = &rte_eth_devices[port_id];
2890 if (udp_tunnel == NULL) {
2891 RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
2895 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2896 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
2900 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2901 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2906 rte_eth_led_on(uint16_t port_id)
2908 struct rte_eth_dev *dev;
2910 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2911 dev = &rte_eth_devices[port_id];
2912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2913 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2917 rte_eth_led_off(uint16_t port_id)
2919 struct rte_eth_dev *dev;
2921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2922 dev = &rte_eth_devices[port_id];
2923 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2924 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2928 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2932 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2934 struct rte_eth_dev_info dev_info;
2935 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2938 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2939 rte_eth_dev_info_get(port_id, &dev_info);
2941 for (i = 0; i < dev_info.max_mac_addrs; i++)
2942 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2948 static const struct ether_addr null_mac_addr;
2951 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2954 struct rte_eth_dev *dev;
2959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2960 dev = &rte_eth_devices[port_id];
2961 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2963 if (is_zero_ether_addr(addr)) {
2964 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
2968 if (pool >= ETH_64_POOLS) {
2969 RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
2973 index = get_mac_addr_index(port_id, addr);
2975 index = get_mac_addr_index(port_id, &null_mac_addr);
2977 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
2982 pool_mask = dev->data->mac_pool_sel[index];
2984 /* Check if both MAC address and pool is already there, and do nothing */
2985 if (pool_mask & (1ULL << pool))
2990 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2993 /* Update address in NIC data structure */
2994 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2996 /* Update pool bitmap in NIC data structure */
2997 dev->data->mac_pool_sel[index] |= (1ULL << pool);
3000 return eth_err(port_id, ret);
3004 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
3006 struct rte_eth_dev *dev;
3009 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3010 dev = &rte_eth_devices[port_id];
3011 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
3013 index = get_mac_addr_index(port_id, addr);
3016 "Port %u: Cannot remove default MAC address\n",
3019 } else if (index < 0)
3020 return 0; /* Do nothing if address wasn't found */
3023 (*dev->dev_ops->mac_addr_remove)(dev, index);
3025 /* Update address in NIC data structure */
3026 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
3028 /* reset pool bitmap */
3029 dev->data->mac_pool_sel[index] = 0;
3035 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
3037 struct rte_eth_dev *dev;
3040 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3042 if (!is_valid_assigned_ether_addr(addr))
3045 dev = &rte_eth_devices[port_id];
3046 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
3048 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
3052 /* Update default address in NIC data structure */
3053 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3060 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3064 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3066 struct rte_eth_dev_info dev_info;
3067 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3070 rte_eth_dev_info_get(port_id, &dev_info);
3071 if (!dev->data->hash_mac_addrs)
3074 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3075 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3076 ETHER_ADDR_LEN) == 0)
3083 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3088 struct rte_eth_dev *dev;
3090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3092 dev = &rte_eth_devices[port_id];
3093 if (is_zero_ether_addr(addr)) {
3094 RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
3099 index = get_hash_mac_addr_index(port_id, addr);
3100 /* Check if it's already there, and do nothing */
3101 if ((index >= 0) && on)
3107 "Port %u: the MAC address was not set in UTA\n",
3112 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3114 RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
3120 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3121 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3123 /* Update address in NIC data structure */
3125 ether_addr_copy(addr,
3126 &dev->data->hash_mac_addrs[index]);
3128 ether_addr_copy(&null_mac_addr,
3129 &dev->data->hash_mac_addrs[index]);
3132 return eth_err(port_id, ret);
3136 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3138 struct rte_eth_dev *dev;
3140 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3142 dev = &rte_eth_devices[port_id];
3144 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3145 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3149 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3152 struct rte_eth_dev *dev;
3153 struct rte_eth_dev_info dev_info;
3154 struct rte_eth_link link;
3156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3158 dev = &rte_eth_devices[port_id];
3159 rte_eth_dev_info_get(port_id, &dev_info);
3160 link = dev->data->dev_link;
3162 if (queue_idx > dev_info.max_tx_queues) {
3164 "Set queue rate limit:port %u: invalid queue id=%u\n",
3165 port_id, queue_idx);
3169 if (tx_rate > link.link_speed) {
3171 "Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
3172 tx_rate, link.link_speed);
3176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3177 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3178 queue_idx, tx_rate));
3182 rte_eth_mirror_rule_set(uint16_t port_id,
3183 struct rte_eth_mirror_conf *mirror_conf,
3184 uint8_t rule_id, uint8_t on)
3186 struct rte_eth_dev *dev;
3188 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3189 if (mirror_conf->rule_type == 0) {
3190 RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
3194 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3195 RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
3200 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3201 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3202 (mirror_conf->pool_mask == 0)) {
3204 "Invalid mirror pool, pool mask can not be 0\n");
3208 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3209 mirror_conf->vlan.vlan_mask == 0) {
3211 "Invalid vlan mask, vlan mask can not be 0\n");
3215 dev = &rte_eth_devices[port_id];
3216 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3218 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3219 mirror_conf, rule_id, on));
3223 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3225 struct rte_eth_dev *dev;
3227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3230 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3232 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3236 RTE_INIT(eth_dev_init_cb_lists)
3240 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3241 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3245 rte_eth_dev_callback_register(uint16_t port_id,
3246 enum rte_eth_event_type event,
3247 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3249 struct rte_eth_dev *dev;
3250 struct rte_eth_dev_callback *user_cb;
3251 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3257 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3258 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3262 if (port_id == RTE_ETH_ALL) {
3264 last_port = RTE_MAX_ETHPORTS - 1;
3266 next_port = last_port = port_id;
3269 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3272 dev = &rte_eth_devices[next_port];
3274 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3275 if (user_cb->cb_fn == cb_fn &&
3276 user_cb->cb_arg == cb_arg &&
3277 user_cb->event == event) {
3282 /* create a new callback. */
3283 if (user_cb == NULL) {
3284 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3285 sizeof(struct rte_eth_dev_callback), 0);
3286 if (user_cb != NULL) {
3287 user_cb->cb_fn = cb_fn;
3288 user_cb->cb_arg = cb_arg;
3289 user_cb->event = event;
3290 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3293 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3294 rte_eth_dev_callback_unregister(port_id, event,
3300 } while (++next_port <= last_port);
3302 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3307 rte_eth_dev_callback_unregister(uint16_t port_id,
3308 enum rte_eth_event_type event,
3309 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3312 struct rte_eth_dev *dev;
3313 struct rte_eth_dev_callback *cb, *next;
3314 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3320 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3321 RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
3325 if (port_id == RTE_ETH_ALL) {
3327 last_port = RTE_MAX_ETHPORTS - 1;
3329 next_port = last_port = port_id;
3332 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3335 dev = &rte_eth_devices[next_port];
3337 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3340 next = TAILQ_NEXT(cb, next);
3342 if (cb->cb_fn != cb_fn || cb->event != event ||
3343 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3347 * if this callback is not executing right now,
3350 if (cb->active == 0) {
3351 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3357 } while (++next_port <= last_port);
3359 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3364 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3365 enum rte_eth_event_type event, void *ret_param)
3367 struct rte_eth_dev_callback *cb_lst;
3368 struct rte_eth_dev_callback dev_cb;
3371 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3372 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3373 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3377 if (ret_param != NULL)
3378 dev_cb.ret_param = ret_param;
3380 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3381 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3382 dev_cb.cb_arg, dev_cb.ret_param);
3383 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3386 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3391 rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
3396 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
3398 dev->state = RTE_ETH_DEV_ATTACHED;
3402 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3405 struct rte_eth_dev *dev;
3406 struct rte_intr_handle *intr_handle;
3410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3412 dev = &rte_eth_devices[port_id];
3414 if (!dev->intr_handle) {
3415 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3419 intr_handle = dev->intr_handle;
3420 if (!intr_handle->intr_vec) {
3421 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3425 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3426 vec = intr_handle->intr_vec[qid];
3427 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3428 if (rc && rc != -EEXIST) {
3430 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3431 port_id, qid, op, epfd, vec);
3438 const struct rte_memzone *
3439 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3440 uint16_t queue_id, size_t size, unsigned align,
3443 char z_name[RTE_MEMZONE_NAMESIZE];
3444 const struct rte_memzone *mz;
3446 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3447 dev->device->driver->name, ring_name,
3448 dev->data->port_id, queue_id);
3450 mz = rte_memzone_lookup(z_name);
3454 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3455 RTE_MEMZONE_IOVA_CONTIG, align);
3458 int __rte_experimental
3459 rte_eth_dev_create(struct rte_device *device, const char *name,
3460 size_t priv_data_size,
3461 ethdev_bus_specific_init ethdev_bus_specific_init,
3462 void *bus_init_params,
3463 ethdev_init_t ethdev_init, void *init_params)
3465 struct rte_eth_dev *ethdev;
3468 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
3470 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
3471 ethdev = rte_eth_dev_allocate(name);
3477 if (priv_data_size) {
3478 ethdev->data->dev_private = rte_zmalloc_socket(
3479 name, priv_data_size, RTE_CACHE_LINE_SIZE,
3482 if (!ethdev->data->dev_private) {
3483 RTE_LOG(ERR, EAL, "failed to allocate private data");
3489 ethdev = rte_eth_dev_attach_secondary(name);
3491 RTE_LOG(ERR, EAL, "secondary process attach failed, "
3492 "ethdev doesn't exist");
3498 ethdev->device = device;
3500 if (ethdev_bus_specific_init) {
3501 retval = ethdev_bus_specific_init(ethdev, bus_init_params);
3504 "ethdev bus specific initialisation failed");
3509 retval = ethdev_init(ethdev, init_params);
3511 RTE_LOG(ERR, EAL, "ethdev initialisation failed");
3515 rte_eth_dev_probing_finish(ethdev);
3519 /* free ports private data if primary process */
3520 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3521 rte_free(ethdev->data->dev_private);
3523 rte_eth_dev_release_port(ethdev);
3528 int __rte_experimental
3529 rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
3530 ethdev_uninit_t ethdev_uninit)
3534 ethdev = rte_eth_dev_allocated(ethdev->data->name);
3538 RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
3539 if (ethdev_uninit) {
3540 ret = ethdev_uninit(ethdev);
3545 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
3546 rte_free(ethdev->data->dev_private);
3548 ethdev->data->dev_private = NULL;
3550 return rte_eth_dev_release_port(ethdev);
3554 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3555 int epfd, int op, void *data)
3558 struct rte_eth_dev *dev;
3559 struct rte_intr_handle *intr_handle;
3562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3564 dev = &rte_eth_devices[port_id];
3565 if (queue_id >= dev->data->nb_rx_queues) {
3566 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3570 if (!dev->intr_handle) {
3571 RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
3575 intr_handle = dev->intr_handle;
3576 if (!intr_handle->intr_vec) {
3577 RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
3581 vec = intr_handle->intr_vec[queue_id];
3582 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3583 if (rc && rc != -EEXIST) {
3585 "p %u q %u rx ctl error op %d epfd %d vec %u\n",
3586 port_id, queue_id, op, epfd, vec);
3594 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3597 struct rte_eth_dev *dev;
3599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3601 dev = &rte_eth_devices[port_id];
3603 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3604 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3609 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3612 struct rte_eth_dev *dev;
3614 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3616 dev = &rte_eth_devices[port_id];
3618 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3619 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3625 rte_eth_dev_filter_supported(uint16_t port_id,
3626 enum rte_filter_type filter_type)
3628 struct rte_eth_dev *dev;
3630 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3632 dev = &rte_eth_devices[port_id];
3633 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3634 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3635 RTE_ETH_FILTER_NOP, NULL);
3639 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3640 enum rte_filter_op filter_op, void *arg)
3642 struct rte_eth_dev *dev;
3644 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3646 dev = &rte_eth_devices[port_id];
3647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3648 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3652 const struct rte_eth_rxtx_callback *
3653 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3654 rte_rx_callback_fn fn, void *user_param)
3656 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3657 rte_errno = ENOTSUP;
3660 /* check input parameters */
3661 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3662 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3666 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3674 cb->param = user_param;
3676 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3677 /* Add the callbacks in fifo order. */
3678 struct rte_eth_rxtx_callback *tail =
3679 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3682 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3689 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3694 const struct rte_eth_rxtx_callback *
3695 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3696 rte_rx_callback_fn fn, void *user_param)
3698 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3699 rte_errno = ENOTSUP;
3702 /* check input parameters */
3703 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3704 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3709 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3717 cb->param = user_param;
3719 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3720 /* Add the callbacks at fisrt position*/
3721 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3723 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3724 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3729 const struct rte_eth_rxtx_callback *
3730 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3731 rte_tx_callback_fn fn, void *user_param)
3733 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3734 rte_errno = ENOTSUP;
3737 /* check input parameters */
3738 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3739 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3744 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3752 cb->param = user_param;
3754 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3755 /* Add the callbacks in fifo order. */
3756 struct rte_eth_rxtx_callback *tail =
3757 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3760 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3767 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3773 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3774 const struct rte_eth_rxtx_callback *user_cb)
3776 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3779 /* Check input parameters. */
3780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3781 if (user_cb == NULL ||
3782 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3785 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3786 struct rte_eth_rxtx_callback *cb;
3787 struct rte_eth_rxtx_callback **prev_cb;
3790 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3791 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3792 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3794 if (cb == user_cb) {
3795 /* Remove the user cb from the callback list. */
3796 *prev_cb = cb->next;
3801 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3807 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3808 const struct rte_eth_rxtx_callback *user_cb)
3810 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3813 /* Check input parameters. */
3814 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3815 if (user_cb == NULL ||
3816 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3819 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3821 struct rte_eth_rxtx_callback *cb;
3822 struct rte_eth_rxtx_callback **prev_cb;
3824 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3825 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3826 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3828 if (cb == user_cb) {
3829 /* Remove the user cb from the callback list. */
3830 *prev_cb = cb->next;
3835 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3841 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3842 struct rte_eth_rxq_info *qinfo)
3844 struct rte_eth_dev *dev;
3846 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3851 dev = &rte_eth_devices[port_id];
3852 if (queue_id >= dev->data->nb_rx_queues) {
3853 RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
3857 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3859 memset(qinfo, 0, sizeof(*qinfo));
3860 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3865 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3866 struct rte_eth_txq_info *qinfo)
3868 struct rte_eth_dev *dev;
3870 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3875 dev = &rte_eth_devices[port_id];
3876 if (queue_id >= dev->data->nb_tx_queues) {
3877 RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
3881 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3883 memset(qinfo, 0, sizeof(*qinfo));
3884 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3890 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3891 struct ether_addr *mc_addr_set,
3892 uint32_t nb_mc_addr)
3894 struct rte_eth_dev *dev;
3896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3898 dev = &rte_eth_devices[port_id];
3899 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3900 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3901 mc_addr_set, nb_mc_addr));
3905 rte_eth_timesync_enable(uint16_t port_id)
3907 struct rte_eth_dev *dev;
3909 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3910 dev = &rte_eth_devices[port_id];
3912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3913 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3917 rte_eth_timesync_disable(uint16_t port_id)
3919 struct rte_eth_dev *dev;
3921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3922 dev = &rte_eth_devices[port_id];
3924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3925 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3929 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3932 struct rte_eth_dev *dev;
3934 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3935 dev = &rte_eth_devices[port_id];
3937 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3938 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3939 (dev, timestamp, flags));
3943 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3944 struct timespec *timestamp)
3946 struct rte_eth_dev *dev;
3948 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3949 dev = &rte_eth_devices[port_id];
3951 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3952 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3957 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3959 struct rte_eth_dev *dev;
3961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3962 dev = &rte_eth_devices[port_id];
3964 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3965 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3970 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3972 struct rte_eth_dev *dev;
3974 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3975 dev = &rte_eth_devices[port_id];
3977 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3978 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3983 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3985 struct rte_eth_dev *dev;
3987 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3988 dev = &rte_eth_devices[port_id];
3990 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3991 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3996 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3998 struct rte_eth_dev *dev;
4000 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4002 dev = &rte_eth_devices[port_id];
4003 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
4004 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
4008 rte_eth_dev_get_eeprom_length(uint16_t port_id)
4010 struct rte_eth_dev *dev;
4012 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4014 dev = &rte_eth_devices[port_id];
4015 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
4016 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
4020 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4022 struct rte_eth_dev *dev;
4024 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4026 dev = &rte_eth_devices[port_id];
4027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
4028 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
4032 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
4034 struct rte_eth_dev *dev;
4036 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4038 dev = &rte_eth_devices[port_id];
4039 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
4040 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
4043 int __rte_experimental
4044 rte_eth_dev_get_module_info(uint16_t port_id,
4045 struct rte_eth_dev_module_info *modinfo)
4047 struct rte_eth_dev *dev;
4049 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4051 dev = &rte_eth_devices[port_id];
4052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
4053 return (*dev->dev_ops->get_module_info)(dev, modinfo);
4056 int __rte_experimental
4057 rte_eth_dev_get_module_eeprom(uint16_t port_id,
4058 struct rte_dev_eeprom_info *info)
4060 struct rte_eth_dev *dev;
4062 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4064 dev = &rte_eth_devices[port_id];
4065 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
4066 return (*dev->dev_ops->get_module_eeprom)(dev, info);
4070 rte_eth_dev_get_dcb_info(uint16_t port_id,
4071 struct rte_eth_dcb_info *dcb_info)
4073 struct rte_eth_dev *dev;
4075 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4077 dev = &rte_eth_devices[port_id];
4078 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
4080 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
4081 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
4085 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
4086 struct rte_eth_l2_tunnel_conf *l2_tunnel)
4088 struct rte_eth_dev *dev;
4090 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4091 if (l2_tunnel == NULL) {
4092 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4096 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4097 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4101 dev = &rte_eth_devices[port_id];
4102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
4104 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
4109 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
4110 struct rte_eth_l2_tunnel_conf *l2_tunnel,
4114 struct rte_eth_dev *dev;
4116 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4118 if (l2_tunnel == NULL) {
4119 RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
4123 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
4124 RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
4129 RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
4133 dev = &rte_eth_devices[port_id];
4134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
4136 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
4137 l2_tunnel, mask, en));
4141 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
4142 const struct rte_eth_desc_lim *desc_lim)
4144 if (desc_lim->nb_align != 0)
4145 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
4147 if (desc_lim->nb_max != 0)
4148 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
4150 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
4154 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
4155 uint16_t *nb_rx_desc,
4156 uint16_t *nb_tx_desc)
4158 struct rte_eth_dev *dev;
4159 struct rte_eth_dev_info dev_info;
4161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4163 dev = &rte_eth_devices[port_id];
4164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
4166 rte_eth_dev_info_get(port_id, &dev_info);
4168 if (nb_rx_desc != NULL)
4169 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
4171 if (nb_tx_desc != NULL)
4172 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
4178 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
4180 struct rte_eth_dev *dev;
4182 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
4187 dev = &rte_eth_devices[port_id];
4189 if (*dev->dev_ops->pool_ops_supported == NULL)
4190 return 1; /* all pools are supported */
4192 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4196 * A set of values to describe the possible states of a switch domain.
4198 enum rte_eth_switch_domain_state {
4199 RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
4200 RTE_ETH_SWITCH_DOMAIN_ALLOCATED
4204 * Array of switch domains available for allocation. Array is sized to
4205 * RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
4206 * ethdev ports in a single process.
4208 struct rte_eth_dev_switch {
4209 enum rte_eth_switch_domain_state state;
4210 } rte_eth_switch_domains[RTE_MAX_ETHPORTS];
4212 int __rte_experimental
4213 rte_eth_switch_domain_alloc(uint16_t *domain_id)
4217 *domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
4219 for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
4220 i < RTE_MAX_ETHPORTS; i++) {
4221 if (rte_eth_switch_domains[i].state ==
4222 RTE_ETH_SWITCH_DOMAIN_UNUSED) {
4223 rte_eth_switch_domains[i].state =
4224 RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
4233 int __rte_experimental
4234 rte_eth_switch_domain_free(uint16_t domain_id)
4236 if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
4237 domain_id >= RTE_MAX_ETHPORTS)
4240 if (rte_eth_switch_domains[domain_id].state !=
4241 RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
4244 rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
4249 typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
4252 rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
4255 struct rte_kvargs_pair *pair;
4258 arglist->str = strdup(str_in);
4259 if (arglist->str == NULL)
4262 letter = arglist->str;
4265 pair = &arglist->pairs[0];
4268 case 0: /* Initial */
4271 else if (*letter == '\0')
4278 case 1: /* Parsing key */
4279 if (*letter == '=') {
4281 pair->value = letter + 1;
4283 } else if (*letter == ',' || *letter == '\0')
4288 case 2: /* Parsing value */
4291 else if (*letter == ',') {
4294 pair = &arglist->pairs[arglist->count];
4296 } else if (*letter == '\0') {
4299 pair = &arglist->pairs[arglist->count];
4304 case 3: /* Parsing list */
4307 else if (*letter == '\0')
4316 rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
4324 /* Single element, not a list */
4325 return callback(str, data);
4327 /* Sanity check, then strip the brackets */
4328 str_start = &str[strlen(str) - 1];
4329 if (*str_start != ']') {
4330 RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
4336 /* Process list elements */
4346 } else if (state == 1) {
4347 if (*str == ',' || *str == '\0') {
4348 if (str > str_start) {
4349 /* Non-empty string fragment */
4351 result = callback(str_start, data);
4364 rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
4365 const uint16_t max_list)
4367 uint16_t lo, hi, val;
4370 result = sscanf(str, "%hu-%hu", &lo, &hi);
4372 if (*len_list >= max_list)
4374 list[(*len_list)++] = lo;
4375 } else if (result == 2) {
4376 if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
4378 for (val = lo; val <= hi; val++) {
4379 if (*len_list >= max_list)
4381 list[(*len_list)++] = val;
4390 rte_eth_devargs_parse_representor_ports(char *str, void *data)
4392 struct rte_eth_devargs *eth_da = data;
4394 return rte_eth_devargs_process_range(str, eth_da->representor_ports,
4395 ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
4398 int __rte_experimental
4399 rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
4401 struct rte_kvargs args;
4402 struct rte_kvargs_pair *pair;
4406 memset(eth_da, 0, sizeof(*eth_da));
4408 result = rte_eth_devargs_tokenise(&args, dargs);
4412 for (i = 0; i < args.count; i++) {
4413 pair = &args.pairs[i];
4414 if (strcmp("representor", pair->key) == 0) {
4415 result = rte_eth_devargs_parse_list(pair->value,
4416 rte_eth_devargs_parse_representor_ports,
4430 RTE_INIT(ethdev_init_log)
4432 rte_eth_dev_logtype = rte_log_register("lib.ethdev");
4433 if (rte_eth_dev_logtype >= 0)
4434 rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);