4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t nb_ports;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
97 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
98 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
102 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
104 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
105 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
106 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
107 {"errors", offsetof(struct rte_eth_stats, q_errors)},
110 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
111 sizeof(rte_rxq_stats_strings[0]))
113 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
114 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
115 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
117 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
118 sizeof(rte_txq_stats_strings[0]))
122 * The user application callback description.
124 * It contains callback address to be registered by user application,
125 * the pointer to the parameters for callback, and the event type.
127 struct rte_eth_dev_callback {
128 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
129 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
130 void *cb_arg; /**< Parameter for callback */
131 enum rte_eth_event_type event; /**< Interrupt event type */
132 uint32_t active; /**< Callback is executing */
146 rte_eth_dev_data_alloc(void)
148 const unsigned flags = 0;
149 const struct rte_memzone *mz;
151 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
152 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
153 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
154 rte_socket_id(), flags);
156 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
158 rte_panic("Cannot allocate memzone for ethernet port data\n");
160 rte_eth_dev_data = mz->addr;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
162 memset(rte_eth_dev_data, 0,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
167 rte_eth_dev_allocated(const char *name)
171 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
172 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
173 strcmp(rte_eth_devices[i].data->name, name) == 0)
174 return &rte_eth_devices[i];
180 rte_eth_dev_find_free_port(void)
184 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
185 if (rte_eth_devices[i].attached == DEV_DETACHED)
188 return RTE_MAX_ETHPORTS;
192 rte_eth_dev_allocate(const char *name, enum rte_eth_dev_type type)
195 struct rte_eth_dev *eth_dev;
197 port_id = rte_eth_dev_find_free_port();
198 if (port_id == RTE_MAX_ETHPORTS) {
199 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
203 if (rte_eth_dev_data == NULL)
204 rte_eth_dev_data_alloc();
206 if (rte_eth_dev_allocated(name) != NULL) {
207 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
212 eth_dev = &rte_eth_devices[port_id];
213 eth_dev->data = &rte_eth_dev_data[port_id];
214 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
215 eth_dev->data->port_id = port_id;
216 eth_dev->attached = DEV_ATTACHED;
217 eth_dev->dev_type = type;
223 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
228 eth_dev->attached = DEV_DETACHED;
234 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
235 struct rte_pci_device *pci_dev)
237 struct eth_driver *eth_drv;
238 struct rte_eth_dev *eth_dev;
239 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
243 eth_drv = (struct eth_driver *)pci_drv;
245 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
246 sizeof(ethdev_name));
248 eth_dev = rte_eth_dev_allocate(ethdev_name, RTE_ETH_DEV_PCI);
252 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
253 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
254 eth_drv->dev_private_size,
255 RTE_CACHE_LINE_SIZE);
256 if (eth_dev->data->dev_private == NULL)
257 rte_panic("Cannot allocate memzone for private port data\n");
259 eth_dev->pci_dev = pci_dev;
260 eth_dev->driver = eth_drv;
261 eth_dev->data->rx_mbuf_alloc_failed = 0;
263 /* init user callbacks */
264 TAILQ_INIT(&(eth_dev->link_intr_cbs));
267 * Set the default MTU.
269 eth_dev->data->mtu = ETHER_MTU;
271 /* Invoke PMD device initialization function */
272 diag = (*eth_drv->eth_dev_init)(eth_dev);
276 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%u device_id=0x%x) failed\n",
278 (unsigned) pci_dev->id.vendor_id,
279 (unsigned) pci_dev->id.device_id);
280 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
281 rte_free(eth_dev->data->dev_private);
282 rte_eth_dev_release_port(eth_dev);
287 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
289 const struct eth_driver *eth_drv;
290 struct rte_eth_dev *eth_dev;
291 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
297 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
298 sizeof(ethdev_name));
300 eth_dev = rte_eth_dev_allocated(ethdev_name);
304 eth_drv = (const struct eth_driver *)pci_dev->driver;
306 /* Invoke PMD device uninit function */
307 if (*eth_drv->eth_dev_uninit) {
308 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
313 /* free ether device */
314 rte_eth_dev_release_port(eth_dev);
316 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
317 rte_free(eth_dev->data->dev_private);
319 eth_dev->pci_dev = NULL;
320 eth_dev->driver = NULL;
321 eth_dev->data = NULL;
327 rte_eth_dev_is_valid_port(uint8_t port_id)
329 if (port_id >= RTE_MAX_ETHPORTS ||
330 rte_eth_devices[port_id].attached != DEV_ATTACHED)
337 rte_eth_dev_socket_id(uint8_t port_id)
339 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
340 return rte_eth_devices[port_id].data->numa_node;
344 rte_eth_dev_count(void)
349 static enum rte_eth_dev_type
350 rte_eth_dev_get_device_type(uint8_t port_id)
352 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, RTE_ETH_DEV_UNKNOWN);
353 return rte_eth_devices[port_id].dev_type;
357 rte_eth_dev_get_addr_by_port(uint8_t port_id, struct rte_pci_addr *addr)
359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
362 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
366 *addr = rte_eth_devices[port_id].pci_dev->addr;
371 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
375 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
378 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
382 /* shouldn't check 'rte_eth_devices[i].data',
383 * because it might be overwritten by VDEV PMD */
384 tmp = rte_eth_dev_data[port_id].name;
390 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
395 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
399 *port_id = RTE_MAX_ETHPORTS;
401 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
404 rte_eth_dev_data[i].name, strlen(name))) {
415 rte_eth_dev_get_port_by_addr(const struct rte_pci_addr *addr, uint8_t *port_id)
418 struct rte_pci_device *pci_dev = NULL;
421 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
425 *port_id = RTE_MAX_ETHPORTS;
427 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
429 pci_dev = rte_eth_devices[i].pci_dev;
432 !rte_eal_compare_pci_addr(&pci_dev->addr, addr)) {
443 rte_eth_dev_is_detachable(uint8_t port_id)
447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
449 switch (rte_eth_devices[port_id].data->kdrv) {
450 case RTE_KDRV_IGB_UIO:
451 case RTE_KDRV_UIO_GENERIC:
452 case RTE_KDRV_NIC_UIO:
459 dev_flags = rte_eth_devices[port_id].data->dev_flags;
460 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
461 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
467 /* attach the new physical device, then store port_id of the device */
469 rte_eth_dev_attach_pdev(struct rte_pci_addr *addr, uint8_t *port_id)
471 /* Invoke probe func of the driver can handle the new device. */
472 if (rte_eal_pci_probe_one(addr))
475 if (rte_eth_dev_get_port_by_addr(addr, port_id))
483 /* detach the new physical device, then store pci_addr of the device */
485 rte_eth_dev_detach_pdev(uint8_t port_id, struct rte_pci_addr *addr)
487 struct rte_pci_addr freed_addr;
488 struct rte_pci_addr vp;
490 /* get pci address by port id */
491 if (rte_eth_dev_get_addr_by_port(port_id, &freed_addr))
494 /* Zeroed pci addr means the port comes from virtual device */
495 vp.domain = vp.bus = vp.devid = vp.function = 0;
496 if (rte_eal_compare_pci_addr(&vp, &freed_addr) == 0)
499 /* invoke remove func of the pci driver,
500 * also remove the device from pci_device_list */
501 if (rte_eal_pci_detach(&freed_addr))
510 /* attach the new virtual device, then store port_id of the device */
512 rte_eth_dev_attach_vdev(const char *vdevargs, uint8_t *port_id)
514 char *name = NULL, *args = NULL;
517 /* parse vdevargs, then retrieve device name and args */
518 if (rte_eal_parse_devargs_str(vdevargs, &name, &args))
521 /* walk around dev_driver_list to find the driver of the device,
522 * then invoke probe function of the driver.
523 * rte_eal_vdev_init() updates port_id allocated after
526 if (rte_eal_vdev_init(name, args))
529 if (rte_eth_dev_get_port_by_name(name, port_id))
540 /* detach the new virtual device, then store the name of the device */
542 rte_eth_dev_detach_vdev(uint8_t port_id, char *vdevname)
544 char name[RTE_ETH_NAME_MAX_LEN];
546 /* get device name by port id */
547 if (rte_eth_dev_get_name_by_port(port_id, name))
549 /* walk around dev_driver_list to find the driver of the device,
550 * then invoke uninit function of the driver */
551 if (rte_eal_vdev_uninit(name))
554 strncpy(vdevname, name, sizeof(name));
560 /* attach the new device, then store port_id of the device */
562 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
564 struct rte_pci_addr addr;
567 if ((devargs == NULL) || (port_id == NULL)) {
572 if (eal_parse_pci_DomBDF(devargs, &addr) == 0) {
573 ret = rte_eth_dev_attach_pdev(&addr, port_id);
577 ret = rte_eth_dev_attach_vdev(devargs, port_id);
584 RTE_LOG(ERR, EAL, "Driver, cannot attach the device\n");
588 /* detach the device, then store the name of the device */
590 rte_eth_dev_detach(uint8_t port_id, char *name)
592 struct rte_pci_addr addr;
600 /* check whether the driver supports detach feature, or not */
601 if (rte_eth_dev_is_detachable(port_id))
604 if (rte_eth_dev_get_device_type(port_id) == RTE_ETH_DEV_PCI) {
605 ret = rte_eth_dev_get_addr_by_port(port_id, &addr);
609 ret = rte_eth_dev_detach_pdev(port_id, &addr);
613 snprintf(name, RTE_ETH_NAME_MAX_LEN,
615 addr.domain, addr.bus,
616 addr.devid, addr.function);
618 ret = rte_eth_dev_detach_vdev(port_id, name);
626 RTE_LOG(ERR, EAL, "Driver, cannot detach the device\n");
631 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
633 uint16_t old_nb_queues = dev->data->nb_rx_queues;
637 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
638 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
639 sizeof(dev->data->rx_queues[0]) * nb_queues,
640 RTE_CACHE_LINE_SIZE);
641 if (dev->data->rx_queues == NULL) {
642 dev->data->nb_rx_queues = 0;
645 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
648 rxq = dev->data->rx_queues;
650 for (i = nb_queues; i < old_nb_queues; i++)
651 (*dev->dev_ops->rx_queue_release)(rxq[i]);
652 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
653 RTE_CACHE_LINE_SIZE);
656 if (nb_queues > old_nb_queues) {
657 uint16_t new_qs = nb_queues - old_nb_queues;
659 memset(rxq + old_nb_queues, 0,
660 sizeof(rxq[0]) * new_qs);
663 dev->data->rx_queues = rxq;
665 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
666 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
668 rxq = dev->data->rx_queues;
670 for (i = nb_queues; i < old_nb_queues; i++)
671 (*dev->dev_ops->rx_queue_release)(rxq[i]);
673 dev->data->nb_rx_queues = nb_queues;
678 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
680 struct rte_eth_dev *dev;
682 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
684 dev = &rte_eth_devices[port_id];
685 if (rx_queue_id >= dev->data->nb_rx_queues) {
686 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
692 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
693 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
694 " already started\n",
695 rx_queue_id, port_id);
699 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
704 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
706 struct rte_eth_dev *dev;
708 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
710 dev = &rte_eth_devices[port_id];
711 if (rx_queue_id >= dev->data->nb_rx_queues) {
712 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
716 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
718 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
719 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
720 " already stopped\n",
721 rx_queue_id, port_id);
725 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
730 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
732 struct rte_eth_dev *dev;
734 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
736 dev = &rte_eth_devices[port_id];
737 if (tx_queue_id >= dev->data->nb_tx_queues) {
738 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
744 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
745 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
746 " already started\n",
747 tx_queue_id, port_id);
751 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
756 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
758 struct rte_eth_dev *dev;
760 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
762 dev = &rte_eth_devices[port_id];
763 if (tx_queue_id >= dev->data->nb_tx_queues) {
764 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
768 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
770 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
771 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
772 " already stopped\n",
773 tx_queue_id, port_id);
777 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
782 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
784 uint16_t old_nb_queues = dev->data->nb_tx_queues;
788 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
789 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
790 sizeof(dev->data->tx_queues[0]) * nb_queues,
791 RTE_CACHE_LINE_SIZE);
792 if (dev->data->tx_queues == NULL) {
793 dev->data->nb_tx_queues = 0;
796 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
797 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
799 txq = dev->data->tx_queues;
801 for (i = nb_queues; i < old_nb_queues; i++)
802 (*dev->dev_ops->tx_queue_release)(txq[i]);
803 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
804 RTE_CACHE_LINE_SIZE);
807 if (nb_queues > old_nb_queues) {
808 uint16_t new_qs = nb_queues - old_nb_queues;
810 memset(txq + old_nb_queues, 0,
811 sizeof(txq[0]) * new_qs);
814 dev->data->tx_queues = txq;
816 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
819 txq = dev->data->tx_queues;
821 for (i = nb_queues; i < old_nb_queues; i++)
822 (*dev->dev_ops->tx_queue_release)(txq[i]);
824 dev->data->nb_tx_queues = nb_queues;
829 rte_eth_speed_bitflag(uint32_t speed, int duplex)
832 case ETH_SPEED_NUM_10M:
833 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
834 case ETH_SPEED_NUM_100M:
835 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
836 case ETH_SPEED_NUM_1G:
837 return ETH_LINK_SPEED_1G;
838 case ETH_SPEED_NUM_2_5G:
839 return ETH_LINK_SPEED_2_5G;
840 case ETH_SPEED_NUM_5G:
841 return ETH_LINK_SPEED_5G;
842 case ETH_SPEED_NUM_10G:
843 return ETH_LINK_SPEED_10G;
844 case ETH_SPEED_NUM_20G:
845 return ETH_LINK_SPEED_20G;
846 case ETH_SPEED_NUM_25G:
847 return ETH_LINK_SPEED_25G;
848 case ETH_SPEED_NUM_40G:
849 return ETH_LINK_SPEED_40G;
850 case ETH_SPEED_NUM_50G:
851 return ETH_LINK_SPEED_50G;
852 case ETH_SPEED_NUM_56G:
853 return ETH_LINK_SPEED_56G;
854 case ETH_SPEED_NUM_100G:
855 return ETH_LINK_SPEED_100G;
862 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
863 const struct rte_eth_conf *dev_conf)
865 struct rte_eth_dev *dev;
866 struct rte_eth_dev_info dev_info;
869 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
871 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
873 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
874 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
878 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
880 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
881 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
885 dev = &rte_eth_devices[port_id];
887 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
888 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
890 if (dev->data->dev_started) {
892 "port %d must be stopped to allow configuration\n", port_id);
896 /* Copy the dev_conf parameter into the dev structure */
897 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
900 * Check that the numbers of RX and TX queues are not greater
901 * than the maximum number of RX and TX queues supported by the
904 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
906 if (nb_rx_q == 0 && nb_tx_q == 0) {
907 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
911 if (nb_rx_q > dev_info.max_rx_queues) {
912 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
913 port_id, nb_rx_q, dev_info.max_rx_queues);
917 if (nb_tx_q > dev_info.max_tx_queues) {
918 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
919 port_id, nb_tx_q, dev_info.max_tx_queues);
924 * If link state interrupt is enabled, check that the
925 * device supports it.
927 if ((dev_conf->intr_conf.lsc == 1) &&
928 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
929 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
930 dev->data->drv_name);
935 * If jumbo frames are enabled, check that the maximum RX packet
936 * length is supported by the configured device.
938 if (dev_conf->rxmode.jumbo_frame == 1) {
939 if (dev_conf->rxmode.max_rx_pkt_len >
940 dev_info.max_rx_pktlen) {
941 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
942 " > max valid value %u\n",
944 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
945 (unsigned)dev_info.max_rx_pktlen);
947 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
948 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
949 " < min valid value %u\n",
951 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
952 (unsigned)ETHER_MIN_LEN);
956 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
957 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
958 /* Use default value */
959 dev->data->dev_conf.rxmode.max_rx_pkt_len =
964 * Setup new number of RX/TX queues and reconfigure device.
966 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
968 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
973 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
975 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
977 rte_eth_dev_rx_queue_config(dev, 0);
981 diag = (*dev->dev_ops->dev_configure)(dev);
983 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
985 rte_eth_dev_rx_queue_config(dev, 0);
986 rte_eth_dev_tx_queue_config(dev, 0);
994 rte_eth_dev_config_restore(uint8_t port_id)
996 struct rte_eth_dev *dev;
997 struct rte_eth_dev_info dev_info;
998 struct ether_addr addr;
1002 dev = &rte_eth_devices[port_id];
1004 rte_eth_dev_info_get(port_id, &dev_info);
1006 if (RTE_ETH_DEV_SRIOV(dev).active)
1007 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
1009 /* replay MAC address configuration */
1010 for (i = 0; i < dev_info.max_mac_addrs; i++) {
1011 addr = dev->data->mac_addrs[i];
1013 /* skip zero address */
1014 if (is_zero_ether_addr(&addr))
1017 /* add address to the hardware */
1018 if (*dev->dev_ops->mac_addr_add &&
1019 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
1020 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
1022 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
1024 /* exit the loop but not return an error */
1029 /* replay promiscuous configuration */
1030 if (rte_eth_promiscuous_get(port_id) == 1)
1031 rte_eth_promiscuous_enable(port_id);
1032 else if (rte_eth_promiscuous_get(port_id) == 0)
1033 rte_eth_promiscuous_disable(port_id);
1035 /* replay all multicast configuration */
1036 if (rte_eth_allmulticast_get(port_id) == 1)
1037 rte_eth_allmulticast_enable(port_id);
1038 else if (rte_eth_allmulticast_get(port_id) == 0)
1039 rte_eth_allmulticast_disable(port_id);
1043 rte_eth_dev_start(uint8_t port_id)
1045 struct rte_eth_dev *dev;
1048 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1050 dev = &rte_eth_devices[port_id];
1052 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1054 if (dev->data->dev_started != 0) {
1055 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1056 " already started\n",
1061 diag = (*dev->dev_ops->dev_start)(dev);
1063 dev->data->dev_started = 1;
1067 rte_eth_dev_config_restore(port_id);
1069 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1071 (*dev->dev_ops->link_update)(dev, 0);
1077 rte_eth_dev_stop(uint8_t port_id)
1079 struct rte_eth_dev *dev;
1081 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1082 dev = &rte_eth_devices[port_id];
1084 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1086 if (dev->data->dev_started == 0) {
1087 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1088 " already stopped\n",
1093 dev->data->dev_started = 0;
1094 (*dev->dev_ops->dev_stop)(dev);
1098 rte_eth_dev_set_link_up(uint8_t port_id)
1100 struct rte_eth_dev *dev;
1102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1104 dev = &rte_eth_devices[port_id];
1106 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1107 return (*dev->dev_ops->dev_set_link_up)(dev);
1111 rte_eth_dev_set_link_down(uint8_t port_id)
1113 struct rte_eth_dev *dev;
1115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1117 dev = &rte_eth_devices[port_id];
1119 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1120 return (*dev->dev_ops->dev_set_link_down)(dev);
1124 rte_eth_dev_close(uint8_t port_id)
1126 struct rte_eth_dev *dev;
1128 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1129 dev = &rte_eth_devices[port_id];
1131 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1132 dev->data->dev_started = 0;
1133 (*dev->dev_ops->dev_close)(dev);
1135 rte_free(dev->data->rx_queues);
1136 dev->data->rx_queues = NULL;
1137 rte_free(dev->data->tx_queues);
1138 dev->data->tx_queues = NULL;
1142 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1143 uint16_t nb_rx_desc, unsigned int socket_id,
1144 const struct rte_eth_rxconf *rx_conf,
1145 struct rte_mempool *mp)
1148 uint32_t mbp_buf_size;
1149 struct rte_eth_dev *dev;
1150 struct rte_eth_dev_info dev_info;
1152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1154 dev = &rte_eth_devices[port_id];
1155 if (rx_queue_id >= dev->data->nb_rx_queues) {
1156 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1160 if (dev->data->dev_started) {
1161 RTE_PMD_DEBUG_TRACE(
1162 "port %d must be stopped to allow configuration\n", port_id);
1166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1170 * Check the size of the mbuf data buffer.
1171 * This value must be provided in the private data of the memory pool.
1172 * First check that the memory pool has a valid private data.
1174 rte_eth_dev_info_get(port_id, &dev_info);
1175 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1176 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1177 mp->name, (int) mp->private_data_size,
1178 (int) sizeof(struct rte_pktmbuf_pool_private));
1181 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1183 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1184 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1185 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1189 (int)(RTE_PKTMBUF_HEADROOM +
1190 dev_info.min_rx_bufsize),
1191 (int)RTE_PKTMBUF_HEADROOM,
1192 (int)dev_info.min_rx_bufsize);
1196 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1197 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1198 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1200 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1201 "should be: <= %hu, = %hu, and a product of %hu\n",
1203 dev_info.rx_desc_lim.nb_max,
1204 dev_info.rx_desc_lim.nb_min,
1205 dev_info.rx_desc_lim.nb_align);
1209 if (rx_conf == NULL)
1210 rx_conf = &dev_info.default_rxconf;
1212 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1213 socket_id, rx_conf, mp);
1215 if (!dev->data->min_rx_buf_size ||
1216 dev->data->min_rx_buf_size > mbp_buf_size)
1217 dev->data->min_rx_buf_size = mbp_buf_size;
1224 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1225 uint16_t nb_tx_desc, unsigned int socket_id,
1226 const struct rte_eth_txconf *tx_conf)
1228 struct rte_eth_dev *dev;
1229 struct rte_eth_dev_info dev_info;
1231 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1233 dev = &rte_eth_devices[port_id];
1234 if (tx_queue_id >= dev->data->nb_tx_queues) {
1235 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1239 if (dev->data->dev_started) {
1240 RTE_PMD_DEBUG_TRACE(
1241 "port %d must be stopped to allow configuration\n", port_id);
1245 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1246 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1248 rte_eth_dev_info_get(port_id, &dev_info);
1250 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1251 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1252 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1253 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1254 "should be: <= %hu, = %hu, and a product of %hu\n",
1256 dev_info.tx_desc_lim.nb_max,
1257 dev_info.tx_desc_lim.nb_min,
1258 dev_info.tx_desc_lim.nb_align);
1262 if (tx_conf == NULL)
1263 tx_conf = &dev_info.default_txconf;
1265 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1266 socket_id, tx_conf);
1270 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1271 void *userdata __rte_unused)
1275 for (i = 0; i < unsent; i++)
1276 rte_pktmbuf_free(pkts[i]);
1280 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1283 uint64_t *count = userdata;
1286 for (i = 0; i < unsent; i++)
1287 rte_pktmbuf_free(pkts[i]);
1293 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1294 buffer_tx_error_fn cbfn, void *userdata)
1296 buffer->error_callback = cbfn;
1297 buffer->error_userdata = userdata;
1302 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1309 buffer->size = size;
1310 if (buffer->error_callback == NULL) {
1311 ret = rte_eth_tx_buffer_set_err_callback(
1312 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1319 rte_eth_promiscuous_enable(uint8_t port_id)
1321 struct rte_eth_dev *dev;
1323 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1324 dev = &rte_eth_devices[port_id];
1326 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1327 (*dev->dev_ops->promiscuous_enable)(dev);
1328 dev->data->promiscuous = 1;
1332 rte_eth_promiscuous_disable(uint8_t port_id)
1334 struct rte_eth_dev *dev;
1336 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1337 dev = &rte_eth_devices[port_id];
1339 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1340 dev->data->promiscuous = 0;
1341 (*dev->dev_ops->promiscuous_disable)(dev);
1345 rte_eth_promiscuous_get(uint8_t port_id)
1347 struct rte_eth_dev *dev;
1349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1351 dev = &rte_eth_devices[port_id];
1352 return dev->data->promiscuous;
1356 rte_eth_allmulticast_enable(uint8_t port_id)
1358 struct rte_eth_dev *dev;
1360 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1361 dev = &rte_eth_devices[port_id];
1363 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1364 (*dev->dev_ops->allmulticast_enable)(dev);
1365 dev->data->all_multicast = 1;
1369 rte_eth_allmulticast_disable(uint8_t port_id)
1371 struct rte_eth_dev *dev;
1373 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1374 dev = &rte_eth_devices[port_id];
1376 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1377 dev->data->all_multicast = 0;
1378 (*dev->dev_ops->allmulticast_disable)(dev);
1382 rte_eth_allmulticast_get(uint8_t port_id)
1384 struct rte_eth_dev *dev;
1386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1388 dev = &rte_eth_devices[port_id];
1389 return dev->data->all_multicast;
1393 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1394 struct rte_eth_link *link)
1396 struct rte_eth_link *dst = link;
1397 struct rte_eth_link *src = &(dev->data->dev_link);
1399 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1400 *(uint64_t *)src) == 0)
1407 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1409 struct rte_eth_dev *dev;
1411 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1412 dev = &rte_eth_devices[port_id];
1414 if (dev->data->dev_conf.intr_conf.lsc != 0)
1415 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1417 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1418 (*dev->dev_ops->link_update)(dev, 1);
1419 *eth_link = dev->data->dev_link;
1424 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1426 struct rte_eth_dev *dev;
1428 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1429 dev = &rte_eth_devices[port_id];
1431 if (dev->data->dev_conf.intr_conf.lsc != 0)
1432 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1434 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1435 (*dev->dev_ops->link_update)(dev, 0);
1436 *eth_link = dev->data->dev_link;
1441 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1443 struct rte_eth_dev *dev;
1445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1447 dev = &rte_eth_devices[port_id];
1448 memset(stats, 0, sizeof(*stats));
1450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1451 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1452 (*dev->dev_ops->stats_get)(dev, stats);
1457 rte_eth_stats_reset(uint8_t port_id)
1459 struct rte_eth_dev *dev;
1461 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1462 dev = &rte_eth_devices[port_id];
1464 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1465 (*dev->dev_ops->stats_reset)(dev);
1466 dev->data->rx_mbuf_alloc_failed = 0;
1470 get_xstats_count(uint8_t port_id)
1472 struct rte_eth_dev *dev;
1475 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1476 dev = &rte_eth_devices[port_id];
1477 if (dev->dev_ops->xstats_get_names != NULL) {
1478 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1483 count += RTE_NB_STATS;
1484 count += dev->data->nb_rx_queues * RTE_NB_RXQ_STATS;
1485 count += dev->data->nb_tx_queues * RTE_NB_TXQ_STATS;
1490 rte_eth_xstats_get_names(uint8_t port_id,
1491 struct rte_eth_xstat_name *xstats_names,
1494 struct rte_eth_dev *dev;
1495 int cnt_used_entries;
1496 int cnt_expected_entries;
1497 int cnt_driver_entries;
1498 uint32_t idx, id_queue;
1500 cnt_expected_entries = get_xstats_count(port_id);
1501 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1502 (int)size < cnt_expected_entries)
1503 return cnt_expected_entries;
1505 /* port_id checked in get_xstats_count() */
1506 dev = &rte_eth_devices[port_id];
1507 cnt_used_entries = 0;
1509 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1510 snprintf(xstats_names[cnt_used_entries].name,
1511 sizeof(xstats_names[0].name),
1512 "%s", rte_stats_strings[idx].name);
1515 for (id_queue = 0; id_queue < dev->data->nb_rx_queues; id_queue++) {
1516 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1517 snprintf(xstats_names[cnt_used_entries].name,
1518 sizeof(xstats_names[0].name),
1520 id_queue, rte_rxq_stats_strings[idx].name);
1525 for (id_queue = 0; id_queue < dev->data->nb_tx_queues; id_queue++) {
1526 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1527 snprintf(xstats_names[cnt_used_entries].name,
1528 sizeof(xstats_names[0].name),
1530 id_queue, rte_txq_stats_strings[idx].name);
1535 if (dev->dev_ops->xstats_get_names != NULL) {
1536 /* If there are any driver-specific xstats, append them
1539 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1541 xstats_names + cnt_used_entries,
1542 size - cnt_used_entries);
1543 if (cnt_driver_entries < 0)
1544 return cnt_driver_entries;
1545 cnt_used_entries += cnt_driver_entries;
1548 return cnt_used_entries;
1551 /* retrieve ethdev extended statistics */
1553 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1556 struct rte_eth_stats eth_stats;
1557 struct rte_eth_dev *dev;
1558 unsigned count = 0, i, q;
1560 uint64_t val, *stats_ptr;
1562 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1564 dev = &rte_eth_devices[port_id];
1566 /* Return generic statistics */
1567 count = RTE_NB_STATS + (dev->data->nb_rx_queues * RTE_NB_RXQ_STATS) +
1568 (dev->data->nb_tx_queues * RTE_NB_TXQ_STATS);
1570 /* implemented by the driver */
1571 if (dev->dev_ops->xstats_get != NULL) {
1572 /* Retrieve the xstats from the driver at the end of the
1575 xcount = (*dev->dev_ops->xstats_get)(dev,
1576 xstats ? xstats + count : NULL,
1577 (n > count) ? n - count : 0);
1583 if (n < count + xcount || xstats == NULL)
1584 return count + xcount;
1586 /* now fill the xstats structure */
1588 rte_eth_stats_get(port_id, ð_stats);
1591 for (i = 0; i < RTE_NB_STATS; i++) {
1592 stats_ptr = RTE_PTR_ADD(ð_stats,
1593 rte_stats_strings[i].offset);
1595 xstats[count++].value = val;
1599 for (q = 0; q < dev->data->nb_rx_queues; q++) {
1600 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1601 stats_ptr = RTE_PTR_ADD(ð_stats,
1602 rte_rxq_stats_strings[i].offset +
1603 q * sizeof(uint64_t));
1605 xstats[count++].value = val;
1610 for (q = 0; q < dev->data->nb_tx_queues; q++) {
1611 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1612 stats_ptr = RTE_PTR_ADD(ð_stats,
1613 rte_txq_stats_strings[i].offset +
1614 q * sizeof(uint64_t));
1616 xstats[count++].value = val;
1620 for (i = 0; i < count + xcount; i++)
1623 return count + xcount;
1626 /* reset ethdev extended statistics */
1628 rte_eth_xstats_reset(uint8_t port_id)
1630 struct rte_eth_dev *dev;
1632 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1633 dev = &rte_eth_devices[port_id];
1635 /* implemented by the driver */
1636 if (dev->dev_ops->xstats_reset != NULL) {
1637 (*dev->dev_ops->xstats_reset)(dev);
1641 /* fallback to default */
1642 rte_eth_stats_reset(port_id);
1646 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1649 struct rte_eth_dev *dev;
1651 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1653 dev = &rte_eth_devices[port_id];
1655 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1656 return (*dev->dev_ops->queue_stats_mapping_set)
1657 (dev, queue_id, stat_idx, is_rx);
1662 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1665 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1671 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1674 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1679 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1681 struct rte_eth_dev *dev;
1682 const struct rte_eth_desc_lim lim = {
1683 .nb_max = UINT16_MAX,
1688 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1689 dev = &rte_eth_devices[port_id];
1691 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1692 dev_info->rx_desc_lim = lim;
1693 dev_info->tx_desc_lim = lim;
1695 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1696 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1697 dev_info->pci_dev = dev->pci_dev;
1698 dev_info->driver_name = dev->data->drv_name;
1699 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1700 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1704 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1705 uint32_t *ptypes, int num)
1708 struct rte_eth_dev *dev;
1709 const uint32_t *all_ptypes;
1711 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1712 dev = &rte_eth_devices[port_id];
1713 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1714 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1719 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1720 if (all_ptypes[i] & ptype_mask) {
1722 ptypes[j] = all_ptypes[i];
1730 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1732 struct rte_eth_dev *dev;
1734 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1735 dev = &rte_eth_devices[port_id];
1736 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1741 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1743 struct rte_eth_dev *dev;
1745 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1747 dev = &rte_eth_devices[port_id];
1748 *mtu = dev->data->mtu;
1753 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1756 struct rte_eth_dev *dev;
1758 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1759 dev = &rte_eth_devices[port_id];
1760 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1762 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1764 dev->data->mtu = mtu;
1770 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1772 struct rte_eth_dev *dev;
1774 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1775 dev = &rte_eth_devices[port_id];
1776 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1777 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1781 if (vlan_id > 4095) {
1782 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1783 port_id, (unsigned) vlan_id);
1786 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1788 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1792 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1794 struct rte_eth_dev *dev;
1796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1797 dev = &rte_eth_devices[port_id];
1798 if (rx_queue_id >= dev->data->nb_rx_queues) {
1799 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1803 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1804 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1810 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1811 enum rte_vlan_type vlan_type,
1814 struct rte_eth_dev *dev;
1816 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1817 dev = &rte_eth_devices[port_id];
1818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1820 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1824 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1826 struct rte_eth_dev *dev;
1831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1832 dev = &rte_eth_devices[port_id];
1834 /*check which option changed by application*/
1835 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1836 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1838 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1839 mask |= ETH_VLAN_STRIP_MASK;
1842 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1843 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1845 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1846 mask |= ETH_VLAN_FILTER_MASK;
1849 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1850 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1852 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1853 mask |= ETH_VLAN_EXTEND_MASK;
1860 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1861 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1867 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1869 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1873 dev = &rte_eth_devices[port_id];
1875 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1876 ret |= ETH_VLAN_STRIP_OFFLOAD;
1878 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1879 ret |= ETH_VLAN_FILTER_OFFLOAD;
1881 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1882 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1888 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1890 struct rte_eth_dev *dev;
1892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1893 dev = &rte_eth_devices[port_id];
1894 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1895 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1901 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1903 struct rte_eth_dev *dev;
1905 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1906 dev = &rte_eth_devices[port_id];
1907 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1908 memset(fc_conf, 0, sizeof(*fc_conf));
1909 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1913 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1915 struct rte_eth_dev *dev;
1917 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1918 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1919 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1923 dev = &rte_eth_devices[port_id];
1924 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1925 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1929 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1931 struct rte_eth_dev *dev;
1933 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1934 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1935 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1939 dev = &rte_eth_devices[port_id];
1940 /* High water, low water validation are device specific */
1941 if (*dev->dev_ops->priority_flow_ctrl_set)
1942 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1947 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1955 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1956 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1957 RTE_RETA_GROUP_SIZE);
1961 num = reta_size / RTE_RETA_GROUP_SIZE;
1962 for (i = 0; i < num; i++) {
1963 if (reta_conf[i].mask)
1971 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1975 uint16_t i, idx, shift;
1981 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1985 for (i = 0; i < reta_size; i++) {
1986 idx = i / RTE_RETA_GROUP_SIZE;
1987 shift = i % RTE_RETA_GROUP_SIZE;
1988 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1989 (reta_conf[idx].reta[shift] >= max_rxq)) {
1990 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1991 "the maximum rxq index: %u\n", idx, shift,
1992 reta_conf[idx].reta[shift], max_rxq);
2001 rte_eth_dev_rss_reta_update(uint8_t port_id,
2002 struct rte_eth_rss_reta_entry64 *reta_conf,
2005 struct rte_eth_dev *dev;
2008 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2009 /* Check mask bits */
2010 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2014 dev = &rte_eth_devices[port_id];
2016 /* Check entry value */
2017 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2018 dev->data->nb_rx_queues);
2022 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2023 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2027 rte_eth_dev_rss_reta_query(uint8_t port_id,
2028 struct rte_eth_rss_reta_entry64 *reta_conf,
2031 struct rte_eth_dev *dev;
2034 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2036 /* Check mask bits */
2037 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2041 dev = &rte_eth_devices[port_id];
2042 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2043 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2047 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2049 struct rte_eth_dev *dev;
2050 uint16_t rss_hash_protos;
2052 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2053 rss_hash_protos = rss_conf->rss_hf;
2054 if ((rss_hash_protos != 0) &&
2055 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2056 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2060 dev = &rte_eth_devices[port_id];
2061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2062 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2066 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2067 struct rte_eth_rss_conf *rss_conf)
2069 struct rte_eth_dev *dev;
2071 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2072 dev = &rte_eth_devices[port_id];
2073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2074 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2078 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2079 struct rte_eth_udp_tunnel *udp_tunnel)
2081 struct rte_eth_dev *dev;
2083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2084 if (udp_tunnel == NULL) {
2085 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2089 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2090 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2094 dev = &rte_eth_devices[port_id];
2095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2096 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2100 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2101 struct rte_eth_udp_tunnel *udp_tunnel)
2103 struct rte_eth_dev *dev;
2105 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2106 dev = &rte_eth_devices[port_id];
2108 if (udp_tunnel == NULL) {
2109 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2113 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2114 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2118 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2119 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2123 rte_eth_led_on(uint8_t port_id)
2125 struct rte_eth_dev *dev;
2127 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2128 dev = &rte_eth_devices[port_id];
2129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2130 return (*dev->dev_ops->dev_led_on)(dev);
2134 rte_eth_led_off(uint8_t port_id)
2136 struct rte_eth_dev *dev;
2138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2139 dev = &rte_eth_devices[port_id];
2140 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2141 return (*dev->dev_ops->dev_led_off)(dev);
2145 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2149 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2151 struct rte_eth_dev_info dev_info;
2152 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2155 rte_eth_dev_info_get(port_id, &dev_info);
2157 for (i = 0; i < dev_info.max_mac_addrs; i++)
2158 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2164 static const struct ether_addr null_mac_addr;
2167 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2170 struct rte_eth_dev *dev;
2174 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2175 dev = &rte_eth_devices[port_id];
2176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2178 if (is_zero_ether_addr(addr)) {
2179 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2183 if (pool >= ETH_64_POOLS) {
2184 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2188 index = get_mac_addr_index(port_id, addr);
2190 index = get_mac_addr_index(port_id, &null_mac_addr);
2192 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2197 pool_mask = dev->data->mac_pool_sel[index];
2199 /* Check if both MAC address and pool is already there, and do nothing */
2200 if (pool_mask & (1ULL << pool))
2205 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2207 /* Update address in NIC data structure */
2208 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2210 /* Update pool bitmap in NIC data structure */
2211 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2217 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2219 struct rte_eth_dev *dev;
2222 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2223 dev = &rte_eth_devices[port_id];
2224 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2226 index = get_mac_addr_index(port_id, addr);
2228 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2230 } else if (index < 0)
2231 return 0; /* Do nothing if address wasn't found */
2234 (*dev->dev_ops->mac_addr_remove)(dev, index);
2236 /* Update address in NIC data structure */
2237 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2239 /* reset pool bitmap */
2240 dev->data->mac_pool_sel[index] = 0;
2246 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2248 struct rte_eth_dev *dev;
2250 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2252 if (!is_valid_assigned_ether_addr(addr))
2255 dev = &rte_eth_devices[port_id];
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2258 /* Update default address in NIC data structure */
2259 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2261 (*dev->dev_ops->mac_addr_set)(dev, addr);
2267 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2268 uint16_t rx_mode, uint8_t on)
2271 struct rte_eth_dev *dev;
2272 struct rte_eth_dev_info dev_info;
2274 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2276 dev = &rte_eth_devices[port_id];
2277 rte_eth_dev_info_get(port_id, &dev_info);
2279 num_vfs = dev_info.max_vfs;
2281 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2286 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2289 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2290 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2294 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2298 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2300 struct rte_eth_dev_info dev_info;
2301 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2304 rte_eth_dev_info_get(port_id, &dev_info);
2305 if (!dev->data->hash_mac_addrs)
2308 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2309 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2310 ETHER_ADDR_LEN) == 0)
2317 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2322 struct rte_eth_dev *dev;
2324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2326 dev = &rte_eth_devices[port_id];
2327 if (is_zero_ether_addr(addr)) {
2328 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2333 index = get_hash_mac_addr_index(port_id, addr);
2334 /* Check if it's already there, and do nothing */
2335 if ((index >= 0) && (on))
2340 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2341 "set in UTA\n", port_id);
2345 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2347 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2353 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2354 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2356 /* Update address in NIC data structure */
2358 ether_addr_copy(addr,
2359 &dev->data->hash_mac_addrs[index]);
2361 ether_addr_copy(&null_mac_addr,
2362 &dev->data->hash_mac_addrs[index]);
2369 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2371 struct rte_eth_dev *dev;
2373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2375 dev = &rte_eth_devices[port_id];
2377 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2378 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2382 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2385 struct rte_eth_dev *dev;
2386 struct rte_eth_dev_info dev_info;
2388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2390 dev = &rte_eth_devices[port_id];
2391 rte_eth_dev_info_get(port_id, &dev_info);
2393 num_vfs = dev_info.max_vfs;
2395 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2399 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2400 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2404 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2407 struct rte_eth_dev *dev;
2408 struct rte_eth_dev_info dev_info;
2410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2412 dev = &rte_eth_devices[port_id];
2413 rte_eth_dev_info_get(port_id, &dev_info);
2415 num_vfs = dev_info.max_vfs;
2417 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2421 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2422 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2426 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2427 uint64_t vf_mask, uint8_t vlan_on)
2429 struct rte_eth_dev *dev;
2431 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 dev = &rte_eth_devices[port_id];
2435 if (vlan_id > ETHER_MAX_VLAN_ID) {
2436 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2442 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2446 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2447 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2451 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2454 struct rte_eth_dev *dev;
2455 struct rte_eth_dev_info dev_info;
2456 struct rte_eth_link link;
2458 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2461 rte_eth_dev_info_get(port_id, &dev_info);
2462 link = dev->data->dev_link;
2464 if (queue_idx > dev_info.max_tx_queues) {
2465 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2466 "invalid queue id=%d\n", port_id, queue_idx);
2470 if (tx_rate > link.link_speed) {
2471 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2472 "bigger than link speed= %d\n",
2473 tx_rate, link.link_speed);
2477 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2478 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2481 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2484 struct rte_eth_dev *dev;
2485 struct rte_eth_dev_info dev_info;
2486 struct rte_eth_link link;
2491 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2493 dev = &rte_eth_devices[port_id];
2494 rte_eth_dev_info_get(port_id, &dev_info);
2495 link = dev->data->dev_link;
2497 if (vf > dev_info.max_vfs) {
2498 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2499 "invalid vf id=%d\n", port_id, vf);
2503 if (tx_rate > link.link_speed) {
2504 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2505 "bigger than link speed= %d\n",
2506 tx_rate, link.link_speed);
2510 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2511 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2515 rte_eth_mirror_rule_set(uint8_t port_id,
2516 struct rte_eth_mirror_conf *mirror_conf,
2517 uint8_t rule_id, uint8_t on)
2519 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2521 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2522 if (mirror_conf->rule_type == 0) {
2523 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2527 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2528 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2533 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2534 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2535 (mirror_conf->pool_mask == 0)) {
2536 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2540 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2541 mirror_conf->vlan.vlan_mask == 0) {
2542 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2546 dev = &rte_eth_devices[port_id];
2547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2549 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2553 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2555 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2559 dev = &rte_eth_devices[port_id];
2560 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2562 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2566 rte_eth_dev_callback_register(uint8_t port_id,
2567 enum rte_eth_event_type event,
2568 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2570 struct rte_eth_dev *dev;
2571 struct rte_eth_dev_callback *user_cb;
2576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2578 dev = &rte_eth_devices[port_id];
2579 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2581 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2582 if (user_cb->cb_fn == cb_fn &&
2583 user_cb->cb_arg == cb_arg &&
2584 user_cb->event == event) {
2589 /* create a new callback. */
2590 if (user_cb == NULL)
2591 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2592 sizeof(struct rte_eth_dev_callback), 0);
2593 if (user_cb != NULL) {
2594 user_cb->cb_fn = cb_fn;
2595 user_cb->cb_arg = cb_arg;
2596 user_cb->event = event;
2597 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2600 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2601 return (user_cb == NULL) ? -ENOMEM : 0;
2605 rte_eth_dev_callback_unregister(uint8_t port_id,
2606 enum rte_eth_event_type event,
2607 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2610 struct rte_eth_dev *dev;
2611 struct rte_eth_dev_callback *cb, *next;
2616 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2618 dev = &rte_eth_devices[port_id];
2619 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2622 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2624 next = TAILQ_NEXT(cb, next);
2626 if (cb->cb_fn != cb_fn || cb->event != event ||
2627 (cb->cb_arg != (void *)-1 &&
2628 cb->cb_arg != cb_arg))
2632 * if this callback is not executing right now,
2635 if (cb->active == 0) {
2636 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2643 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2648 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2649 enum rte_eth_event_type event)
2651 struct rte_eth_dev_callback *cb_lst;
2652 struct rte_eth_dev_callback dev_cb;
2654 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2655 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2656 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2660 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2661 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2663 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2666 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2670 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2673 struct rte_eth_dev *dev;
2674 struct rte_intr_handle *intr_handle;
2678 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2680 dev = &rte_eth_devices[port_id];
2681 intr_handle = &dev->pci_dev->intr_handle;
2682 if (!intr_handle->intr_vec) {
2683 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2687 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2688 vec = intr_handle->intr_vec[qid];
2689 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2690 if (rc && rc != -EEXIST) {
2691 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2692 " op %d epfd %d vec %u\n",
2693 port_id, qid, op, epfd, vec);
2700 const struct rte_memzone *
2701 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2702 uint16_t queue_id, size_t size, unsigned align,
2705 char z_name[RTE_MEMZONE_NAMESIZE];
2706 const struct rte_memzone *mz;
2708 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2709 dev->driver->pci_drv.name, ring_name,
2710 dev->data->port_id, queue_id);
2712 mz = rte_memzone_lookup(z_name);
2716 if (rte_xen_dom0_supported())
2717 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2718 0, align, RTE_PGSIZE_2M);
2720 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2725 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2726 int epfd, int op, void *data)
2729 struct rte_eth_dev *dev;
2730 struct rte_intr_handle *intr_handle;
2733 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2735 dev = &rte_eth_devices[port_id];
2736 if (queue_id >= dev->data->nb_rx_queues) {
2737 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2741 intr_handle = &dev->pci_dev->intr_handle;
2742 if (!intr_handle->intr_vec) {
2743 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2747 vec = intr_handle->intr_vec[queue_id];
2748 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2749 if (rc && rc != -EEXIST) {
2750 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2751 " op %d epfd %d vec %u\n",
2752 port_id, queue_id, op, epfd, vec);
2760 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2763 struct rte_eth_dev *dev;
2765 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2767 dev = &rte_eth_devices[port_id];
2769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2770 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2774 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2777 struct rte_eth_dev *dev;
2779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2781 dev = &rte_eth_devices[port_id];
2783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2784 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2787 #ifdef RTE_NIC_BYPASS
2788 int rte_eth_dev_bypass_init(uint8_t port_id)
2790 struct rte_eth_dev *dev;
2792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2794 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2796 (*dev->dev_ops->bypass_init)(dev);
2801 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2803 struct rte_eth_dev *dev;
2805 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2807 dev = &rte_eth_devices[port_id];
2808 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2809 (*dev->dev_ops->bypass_state_show)(dev, state);
2814 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2816 struct rte_eth_dev *dev;
2818 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2820 dev = &rte_eth_devices[port_id];
2821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2822 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2827 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 dev = &rte_eth_devices[port_id];
2834 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2835 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2840 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2842 struct rte_eth_dev *dev;
2844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2846 dev = &rte_eth_devices[port_id];
2848 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2849 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2854 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2856 struct rte_eth_dev *dev;
2858 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2860 dev = &rte_eth_devices[port_id];
2862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2863 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2868 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2870 struct rte_eth_dev *dev;
2872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2874 dev = &rte_eth_devices[port_id];
2876 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2877 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2882 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2884 struct rte_eth_dev *dev;
2886 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2888 dev = &rte_eth_devices[port_id];
2890 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2891 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2896 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2898 struct rte_eth_dev *dev;
2900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2902 dev = &rte_eth_devices[port_id];
2904 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2905 (*dev->dev_ops->bypass_wd_reset)(dev);
2911 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2913 struct rte_eth_dev *dev;
2915 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2917 dev = &rte_eth_devices[port_id];
2918 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2919 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2920 RTE_ETH_FILTER_NOP, NULL);
2924 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2925 enum rte_filter_op filter_op, void *arg)
2927 struct rte_eth_dev *dev;
2929 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2931 dev = &rte_eth_devices[port_id];
2932 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2933 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2937 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2938 rte_rx_callback_fn fn, void *user_param)
2940 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2941 rte_errno = ENOTSUP;
2944 /* check input parameters */
2945 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2946 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2950 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2958 cb->param = user_param;
2960 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2961 /* Add the callbacks in fifo order. */
2962 struct rte_eth_rxtx_callback *tail =
2963 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2966 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2973 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2979 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2980 rte_rx_callback_fn fn, void *user_param)
2982 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2983 rte_errno = ENOTSUP;
2986 /* check input parameters */
2987 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2988 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2993 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3001 cb->param = user_param;
3003 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3004 /* Add the callbacks at fisrt position*/
3005 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3007 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3008 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3014 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
3015 rte_tx_callback_fn fn, void *user_param)
3017 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3018 rte_errno = ENOTSUP;
3021 /* check input parameters */
3022 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3023 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3028 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3036 cb->param = user_param;
3038 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3039 /* Add the callbacks in fifo order. */
3040 struct rte_eth_rxtx_callback *tail =
3041 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3044 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3051 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3057 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3058 struct rte_eth_rxtx_callback *user_cb)
3060 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3063 /* Check input parameters. */
3064 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3065 if (user_cb == NULL ||
3066 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3069 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3070 struct rte_eth_rxtx_callback *cb;
3071 struct rte_eth_rxtx_callback **prev_cb;
3074 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3075 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3076 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3078 if (cb == user_cb) {
3079 /* Remove the user cb from the callback list. */
3080 *prev_cb = cb->next;
3085 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3091 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3092 struct rte_eth_rxtx_callback *user_cb)
3094 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3097 /* Check input parameters. */
3098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3099 if (user_cb == NULL ||
3100 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3103 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3105 struct rte_eth_rxtx_callback *cb;
3106 struct rte_eth_rxtx_callback **prev_cb;
3108 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3109 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3110 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3112 if (cb == user_cb) {
3113 /* Remove the user cb from the callback list. */
3114 *prev_cb = cb->next;
3119 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3125 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3126 struct rte_eth_rxq_info *qinfo)
3128 struct rte_eth_dev *dev;
3130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3135 dev = &rte_eth_devices[port_id];
3136 if (queue_id >= dev->data->nb_rx_queues) {
3137 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3143 memset(qinfo, 0, sizeof(*qinfo));
3144 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3149 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3150 struct rte_eth_txq_info *qinfo)
3152 struct rte_eth_dev *dev;
3154 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3159 dev = &rte_eth_devices[port_id];
3160 if (queue_id >= dev->data->nb_tx_queues) {
3161 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3167 memset(qinfo, 0, sizeof(*qinfo));
3168 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3173 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3174 struct ether_addr *mc_addr_set,
3175 uint32_t nb_mc_addr)
3177 struct rte_eth_dev *dev;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3181 dev = &rte_eth_devices[port_id];
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3183 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3187 rte_eth_timesync_enable(uint8_t port_id)
3189 struct rte_eth_dev *dev;
3191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3192 dev = &rte_eth_devices[port_id];
3194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3195 return (*dev->dev_ops->timesync_enable)(dev);
3199 rte_eth_timesync_disable(uint8_t port_id)
3201 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3204 dev = &rte_eth_devices[port_id];
3206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3207 return (*dev->dev_ops->timesync_disable)(dev);
3211 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3217 dev = &rte_eth_devices[port_id];
3219 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3220 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3224 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3226 struct rte_eth_dev *dev;
3228 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3229 dev = &rte_eth_devices[port_id];
3231 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3232 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3236 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3238 struct rte_eth_dev *dev;
3240 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3241 dev = &rte_eth_devices[port_id];
3243 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3244 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3248 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3250 struct rte_eth_dev *dev;
3252 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3253 dev = &rte_eth_devices[port_id];
3255 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3256 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3260 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3262 struct rte_eth_dev *dev;
3264 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3265 dev = &rte_eth_devices[port_id];
3267 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3268 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3272 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 dev = &rte_eth_devices[port_id];
3279 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3280 return (*dev->dev_ops->get_reg)(dev, info);
3284 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3286 struct rte_eth_dev *dev;
3288 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3290 dev = &rte_eth_devices[port_id];
3291 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3292 return (*dev->dev_ops->get_eeprom_length)(dev);
3296 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3298 struct rte_eth_dev *dev;
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3302 dev = &rte_eth_devices[port_id];
3303 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3304 return (*dev->dev_ops->get_eeprom)(dev, info);
3308 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3310 struct rte_eth_dev *dev;
3312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3314 dev = &rte_eth_devices[port_id];
3315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3316 return (*dev->dev_ops->set_eeprom)(dev, info);
3320 rte_eth_dev_get_dcb_info(uint8_t port_id,
3321 struct rte_eth_dcb_info *dcb_info)
3323 struct rte_eth_dev *dev;
3325 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3327 dev = &rte_eth_devices[port_id];
3328 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3330 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3331 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3335 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3337 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3338 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3343 eth_dev->data->dev_flags = 0;
3344 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3345 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3346 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3347 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3349 eth_dev->data->kdrv = pci_dev->kdrv;
3350 eth_dev->data->numa_node = pci_dev->numa_node;
3351 eth_dev->data->drv_name = pci_dev->driver->name;
3355 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3356 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3358 struct rte_eth_dev *dev;
3360 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3361 if (l2_tunnel == NULL) {
3362 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3366 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3367 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3371 dev = &rte_eth_devices[port_id];
3372 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3374 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3378 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3379 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3383 struct rte_eth_dev *dev;
3385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387 if (l2_tunnel == NULL) {
3388 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3392 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3393 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3398 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3402 dev = &rte_eth_devices[port_id];
3403 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3405 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);