1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2010-2017 Intel Corporation
15 #include <netinet/in.h>
17 #include <rte_byteorder.h>
19 #include <rte_debug.h>
20 #include <rte_interrupts.h>
21 #include <rte_memory.h>
22 #include <rte_memcpy.h>
23 #include <rte_memzone.h>
24 #include <rte_launch.h>
26 #include <rte_per_lcore.h>
27 #include <rte_lcore.h>
28 #include <rte_atomic.h>
29 #include <rte_branch_prediction.h>
30 #include <rte_common.h>
31 #include <rte_mempool.h>
32 #include <rte_malloc.h>
34 #include <rte_errno.h>
35 #include <rte_spinlock.h>
36 #include <rte_string_fns.h>
38 #include "rte_ether.h"
39 #include "rte_ethdev.h"
40 #include "rte_ethdev_driver.h"
41 #include "ethdev_profile.h"
43 static int ethdev_logtype;
45 #define ethdev_log(level, fmt, ...) \
46 rte_log(RTE_LOG_ ## level, ethdev_logtype, fmt "\n", ## __VA_ARGS__)
48 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
49 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
50 static uint8_t eth_dev_last_created_port;
52 /* spinlock for eth device callbacks */
53 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
55 /* spinlock for add/remove rx callbacks */
56 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
58 /* spinlock for add/remove tx callbacks */
59 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
61 /* spinlock for shared data allocation */
62 static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
64 /* store statistics names and its offset in stats structure */
65 struct rte_eth_xstats_name_off {
66 char name[RTE_ETH_XSTATS_NAME_SIZE];
70 /* Shared memory between primary and secondary processes. */
72 uint64_t next_owner_id;
73 rte_spinlock_t ownership_lock;
74 struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
75 } *rte_eth_dev_shared_data;
77 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
78 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
79 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
80 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
81 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
82 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
83 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
84 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
85 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
89 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
91 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
92 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
93 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
94 {"errors", offsetof(struct rte_eth_stats, q_errors)},
97 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
98 sizeof(rte_rxq_stats_strings[0]))
100 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
101 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
102 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
104 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
105 sizeof(rte_txq_stats_strings[0]))
107 #define RTE_RX_OFFLOAD_BIT2STR(_name) \
108 { DEV_RX_OFFLOAD_##_name, #_name }
110 static const struct {
113 } rte_rx_offload_names[] = {
114 RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
115 RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
116 RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
117 RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
118 RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
119 RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
120 RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
121 RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
122 RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
123 RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
124 RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
125 RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
126 RTE_RX_OFFLOAD_BIT2STR(CRC_STRIP),
127 RTE_RX_OFFLOAD_BIT2STR(SCATTER),
128 RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
129 RTE_RX_OFFLOAD_BIT2STR(SECURITY),
132 #undef RTE_RX_OFFLOAD_BIT2STR
134 #define RTE_TX_OFFLOAD_BIT2STR(_name) \
135 { DEV_TX_OFFLOAD_##_name, #_name }
137 static const struct {
140 } rte_tx_offload_names[] = {
141 RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
142 RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
143 RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
144 RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
145 RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
146 RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
147 RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
148 RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
149 RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
150 RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
151 RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
152 RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
153 RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
154 RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
155 RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
156 RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
157 RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
158 RTE_TX_OFFLOAD_BIT2STR(SECURITY),
161 #undef RTE_TX_OFFLOAD_BIT2STR
164 * The user application callback description.
166 * It contains callback address to be registered by user application,
167 * the pointer to the parameters for callback, and the event type.
169 struct rte_eth_dev_callback {
170 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
171 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
172 void *cb_arg; /**< Parameter for callback */
173 void *ret_param; /**< Return parameter */
174 enum rte_eth_event_type event; /**< Interrupt event type */
175 uint32_t active; /**< Callback is executing */
184 rte_eth_find_next(uint16_t port_id)
186 while (port_id < RTE_MAX_ETHPORTS &&
187 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
188 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
191 if (port_id >= RTE_MAX_ETHPORTS)
192 return RTE_MAX_ETHPORTS;
198 rte_eth_dev_shared_data_prepare(void)
200 const unsigned flags = 0;
201 const struct rte_memzone *mz;
203 rte_spinlock_lock(&rte_eth_shared_data_lock);
205 if (rte_eth_dev_shared_data == NULL) {
206 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
207 /* Allocate port data and ownership shared memory. */
208 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
209 sizeof(*rte_eth_dev_shared_data),
210 rte_socket_id(), flags);
212 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
214 rte_panic("Cannot allocate ethdev shared data\n");
216 rte_eth_dev_shared_data = mz->addr;
217 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
218 rte_eth_dev_shared_data->next_owner_id =
219 RTE_ETH_DEV_NO_OWNER + 1;
220 rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
221 memset(rte_eth_dev_shared_data->data, 0,
222 sizeof(rte_eth_dev_shared_data->data));
226 rte_spinlock_unlock(&rte_eth_shared_data_lock);
230 rte_eth_dev_allocated(const char *name)
234 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
235 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
236 strcmp(rte_eth_devices[i].data->name, name) == 0)
237 return &rte_eth_devices[i];
243 rte_eth_dev_find_free_port(void)
247 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
248 /* Using shared name field to find a free port. */
249 if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
250 RTE_ASSERT(rte_eth_devices[i].state ==
255 return RTE_MAX_ETHPORTS;
258 static struct rte_eth_dev *
259 eth_dev_get(uint16_t port_id)
261 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
263 eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
264 eth_dev->state = RTE_ETH_DEV_ATTACHED;
266 eth_dev_last_created_port = port_id;
272 rte_eth_dev_allocate(const char *name)
275 struct rte_eth_dev *eth_dev = NULL;
277 rte_eth_dev_shared_data_prepare();
279 /* Synchronize port creation between primary and secondary threads. */
280 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
282 port_id = rte_eth_dev_find_free_port();
283 if (port_id == RTE_MAX_ETHPORTS) {
284 ethdev_log(ERR, "Reached maximum number of Ethernet ports");
288 if (rte_eth_dev_allocated(name) != NULL) {
290 "Ethernet Device with name %s already allocated!",
295 eth_dev = eth_dev_get(port_id);
296 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
297 eth_dev->data->port_id = port_id;
298 eth_dev->data->mtu = ETHER_MTU;
301 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
304 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_NEW, NULL);
310 * Attach to a port already registered by the primary process, which
311 * makes sure that the same device would have the same port id both
312 * in the primary and secondary process.
315 rte_eth_dev_attach_secondary(const char *name)
318 struct rte_eth_dev *eth_dev = NULL;
320 rte_eth_dev_shared_data_prepare();
322 /* Synchronize port attachment to primary port creation and release. */
323 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
325 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
326 if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
329 if (i == RTE_MAX_ETHPORTS) {
331 "device %s is not driven by the primary process\n",
334 eth_dev = eth_dev_get(i);
335 RTE_ASSERT(eth_dev->data->port_id == i);
338 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
343 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
348 rte_eth_dev_shared_data_prepare();
350 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
352 eth_dev->state = RTE_ETH_DEV_UNUSED;
354 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
356 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
358 _rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
364 rte_eth_dev_is_valid_port(uint16_t port_id)
366 if (port_id >= RTE_MAX_ETHPORTS ||
367 (rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
374 rte_eth_is_valid_owner_id(uint64_t owner_id)
376 if (owner_id == RTE_ETH_DEV_NO_OWNER ||
377 rte_eth_dev_shared_data->next_owner_id <= owner_id) {
378 RTE_PMD_DEBUG_TRACE("Invalid owner_id=%016lX.\n", owner_id);
384 uint64_t __rte_experimental
385 rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
387 while (port_id < RTE_MAX_ETHPORTS &&
388 ((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
389 rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
390 rte_eth_devices[port_id].data->owner.id != owner_id))
393 if (port_id >= RTE_MAX_ETHPORTS)
394 return RTE_MAX_ETHPORTS;
399 int __rte_experimental
400 rte_eth_dev_owner_new(uint64_t *owner_id)
402 rte_eth_dev_shared_data_prepare();
404 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
406 *owner_id = rte_eth_dev_shared_data->next_owner_id++;
408 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
413 _rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
414 const struct rte_eth_dev_owner *new_owner)
416 struct rte_eth_dev_owner *port_owner;
419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
421 if (!rte_eth_is_valid_owner_id(new_owner->id) &&
422 !rte_eth_is_valid_owner_id(old_owner_id))
425 port_owner = &rte_eth_devices[port_id].data->owner;
426 if (port_owner->id != old_owner_id) {
427 RTE_PMD_DEBUG_TRACE("Cannot set owner to port %d already owned"
428 " by %s_%016lX.\n", port_id,
429 port_owner->name, port_owner->id);
433 sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
435 if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
436 RTE_PMD_DEBUG_TRACE("Port %d owner name was truncated.\n",
439 port_owner->id = new_owner->id;
441 RTE_PMD_DEBUG_TRACE("Port %d owner is %s_%016lX.\n", port_id,
442 new_owner->name, new_owner->id);
447 int __rte_experimental
448 rte_eth_dev_owner_set(const uint16_t port_id,
449 const struct rte_eth_dev_owner *owner)
453 rte_eth_dev_shared_data_prepare();
455 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
457 ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
459 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
463 int __rte_experimental
464 rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
466 const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
467 {.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
470 rte_eth_dev_shared_data_prepare();
472 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
474 ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
476 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
480 void __rte_experimental
481 rte_eth_dev_owner_delete(const uint64_t owner_id)
485 rte_eth_dev_shared_data_prepare();
487 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
489 if (rte_eth_is_valid_owner_id(owner_id)) {
490 RTE_ETH_FOREACH_DEV_OWNED_BY(port_id, owner_id)
491 memset(&rte_eth_devices[port_id].data->owner, 0,
492 sizeof(struct rte_eth_dev_owner));
493 RTE_PMD_DEBUG_TRACE("All port owners owned by %016X identifier"
494 " have removed.\n", owner_id);
497 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
500 int __rte_experimental
501 rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
505 rte_eth_dev_shared_data_prepare();
507 rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
509 if (!rte_eth_dev_is_valid_port(port_id)) {
510 RTE_PMD_DEBUG_TRACE("Invalid port_id=%d\n", port_id);
513 rte_memcpy(owner, &rte_eth_devices[port_id].data->owner,
517 rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
522 rte_eth_dev_socket_id(uint16_t port_id)
524 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
525 return rte_eth_devices[port_id].data->numa_node;
529 rte_eth_dev_get_sec_ctx(uint16_t port_id)
531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
532 return rte_eth_devices[port_id].security_ctx;
536 rte_eth_dev_count(void)
538 return rte_eth_dev_count_avail();
542 rte_eth_dev_count_avail(void)
549 RTE_ETH_FOREACH_DEV(p)
556 rte_eth_dev_count_total(void)
558 uint16_t port, count = 0;
560 for (port = 0; port < RTE_MAX_ETHPORTS; port++)
561 if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
568 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
575 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
579 /* shouldn't check 'rte_eth_devices[i].data',
580 * because it might be overwritten by VDEV PMD */
581 tmp = rte_eth_dev_shared_data->data[port_id].name;
587 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
592 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
596 for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
597 if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
598 !strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
608 eth_err(uint16_t port_id, int ret)
612 if (rte_eth_dev_is_removed(port_id))
617 /* attach the new device, then store port_id of the device */
619 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
621 int current = rte_eth_dev_count_total();
622 struct rte_devargs da;
625 memset(&da, 0, sizeof(da));
627 if ((devargs == NULL) || (port_id == NULL)) {
633 if (rte_devargs_parse(&da, "%s", devargs))
636 ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
640 /* no point looking at the port count if no port exists */
641 if (!rte_eth_dev_count_total()) {
642 ethdev_log(ERR, "No port found for device (%s)", da.name);
647 /* if nothing happened, there is a bug here, since some driver told us
648 * it did attach a device, but did not create a port.
649 * FIXME: race condition in case of plug-out of another device
651 if (current == rte_eth_dev_count_total()) {
656 *port_id = eth_dev_last_created_port;
664 /* detach the device, then store the name of the device */
666 rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
668 struct rte_device *dev;
673 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
675 dev_flags = rte_eth_devices[port_id].data->dev_flags;
676 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
678 "Port %" PRIu16 " is bonded, cannot detach", port_id);
682 dev = rte_eth_devices[port_id].device;
686 bus = rte_bus_find_by_device(dev);
690 ret = rte_eal_hotplug_remove(bus->name, dev->name);
694 rte_eth_dev_release_port(&rte_eth_devices[port_id]);
699 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
701 uint16_t old_nb_queues = dev->data->nb_rx_queues;
705 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
706 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
707 sizeof(dev->data->rx_queues[0]) * nb_queues,
708 RTE_CACHE_LINE_SIZE);
709 if (dev->data->rx_queues == NULL) {
710 dev->data->nb_rx_queues = 0;
713 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
716 rxq = dev->data->rx_queues;
718 for (i = nb_queues; i < old_nb_queues; i++)
719 (*dev->dev_ops->rx_queue_release)(rxq[i]);
720 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
721 RTE_CACHE_LINE_SIZE);
724 if (nb_queues > old_nb_queues) {
725 uint16_t new_qs = nb_queues - old_nb_queues;
727 memset(rxq + old_nb_queues, 0,
728 sizeof(rxq[0]) * new_qs);
731 dev->data->rx_queues = rxq;
733 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
734 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
736 rxq = dev->data->rx_queues;
738 for (i = nb_queues; i < old_nb_queues; i++)
739 (*dev->dev_ops->rx_queue_release)(rxq[i]);
741 rte_free(dev->data->rx_queues);
742 dev->data->rx_queues = NULL;
744 dev->data->nb_rx_queues = nb_queues;
749 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
751 struct rte_eth_dev *dev;
753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
755 dev = &rte_eth_devices[port_id];
756 if (!dev->data->dev_started) {
758 "port %d must be started before start any queue\n", port_id);
762 if (rx_queue_id >= dev->data->nb_rx_queues) {
763 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
769 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
770 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
771 " already started\n",
772 rx_queue_id, port_id);
776 return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
782 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
784 struct rte_eth_dev *dev;
786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
788 dev = &rte_eth_devices[port_id];
789 if (rx_queue_id >= dev->data->nb_rx_queues) {
790 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
796 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
797 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
798 " already stopped\n",
799 rx_queue_id, port_id);
803 return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
808 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
810 struct rte_eth_dev *dev;
812 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
814 dev = &rte_eth_devices[port_id];
815 if (!dev->data->dev_started) {
817 "port %d must be started before start any queue\n", port_id);
821 if (tx_queue_id >= dev->data->nb_tx_queues) {
822 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
826 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
828 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
829 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
830 " already started\n",
831 tx_queue_id, port_id);
835 return eth_err(port_id, dev->dev_ops->tx_queue_start(dev,
841 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
843 struct rte_eth_dev *dev;
845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
847 dev = &rte_eth_devices[port_id];
848 if (tx_queue_id >= dev->data->nb_tx_queues) {
849 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
853 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
855 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
856 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
857 " already stopped\n",
858 tx_queue_id, port_id);
862 return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
867 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
869 uint16_t old_nb_queues = dev->data->nb_tx_queues;
873 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
874 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
875 sizeof(dev->data->tx_queues[0]) * nb_queues,
876 RTE_CACHE_LINE_SIZE);
877 if (dev->data->tx_queues == NULL) {
878 dev->data->nb_tx_queues = 0;
881 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
882 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
884 txq = dev->data->tx_queues;
886 for (i = nb_queues; i < old_nb_queues; i++)
887 (*dev->dev_ops->tx_queue_release)(txq[i]);
888 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
889 RTE_CACHE_LINE_SIZE);
892 if (nb_queues > old_nb_queues) {
893 uint16_t new_qs = nb_queues - old_nb_queues;
895 memset(txq + old_nb_queues, 0,
896 sizeof(txq[0]) * new_qs);
899 dev->data->tx_queues = txq;
901 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
902 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
904 txq = dev->data->tx_queues;
906 for (i = nb_queues; i < old_nb_queues; i++)
907 (*dev->dev_ops->tx_queue_release)(txq[i]);
909 rte_free(dev->data->tx_queues);
910 dev->data->tx_queues = NULL;
912 dev->data->nb_tx_queues = nb_queues;
917 rte_eth_speed_bitflag(uint32_t speed, int duplex)
920 case ETH_SPEED_NUM_10M:
921 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
922 case ETH_SPEED_NUM_100M:
923 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
924 case ETH_SPEED_NUM_1G:
925 return ETH_LINK_SPEED_1G;
926 case ETH_SPEED_NUM_2_5G:
927 return ETH_LINK_SPEED_2_5G;
928 case ETH_SPEED_NUM_5G:
929 return ETH_LINK_SPEED_5G;
930 case ETH_SPEED_NUM_10G:
931 return ETH_LINK_SPEED_10G;
932 case ETH_SPEED_NUM_20G:
933 return ETH_LINK_SPEED_20G;
934 case ETH_SPEED_NUM_25G:
935 return ETH_LINK_SPEED_25G;
936 case ETH_SPEED_NUM_40G:
937 return ETH_LINK_SPEED_40G;
938 case ETH_SPEED_NUM_50G:
939 return ETH_LINK_SPEED_50G;
940 case ETH_SPEED_NUM_56G:
941 return ETH_LINK_SPEED_56G;
942 case ETH_SPEED_NUM_100G:
943 return ETH_LINK_SPEED_100G;
950 * A conversion function from rxmode bitfield API.
953 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
954 uint64_t *rx_offloads)
956 uint64_t offloads = 0;
958 if (rxmode->header_split == 1)
959 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
960 if (rxmode->hw_ip_checksum == 1)
961 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
962 if (rxmode->hw_vlan_filter == 1)
963 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
964 if (rxmode->hw_vlan_strip == 1)
965 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
966 if (rxmode->hw_vlan_extend == 1)
967 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
968 if (rxmode->jumbo_frame == 1)
969 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
970 if (rxmode->hw_strip_crc == 1)
971 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
972 if (rxmode->enable_scatter == 1)
973 offloads |= DEV_RX_OFFLOAD_SCATTER;
974 if (rxmode->enable_lro == 1)
975 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
976 if (rxmode->hw_timestamp == 1)
977 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
978 if (rxmode->security == 1)
979 offloads |= DEV_RX_OFFLOAD_SECURITY;
981 *rx_offloads = offloads;
984 const char * __rte_experimental
985 rte_eth_dev_rx_offload_name(uint64_t offload)
987 const char *name = "UNKNOWN";
990 for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
991 if (offload == rte_rx_offload_names[i].offload) {
992 name = rte_rx_offload_names[i].name;
1000 const char * __rte_experimental
1001 rte_eth_dev_tx_offload_name(uint64_t offload)
1003 const char *name = "UNKNOWN";
1006 for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
1007 if (offload == rte_tx_offload_names[i].offload) {
1008 name = rte_tx_offload_names[i].name;
1017 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
1018 const struct rte_eth_conf *dev_conf)
1020 struct rte_eth_dev *dev;
1021 struct rte_eth_dev_info dev_info;
1022 struct rte_eth_conf local_conf = *dev_conf;
1025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1027 dev = &rte_eth_devices[port_id];
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1030 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
1032 /* If number of queues specified by application for both Rx and Tx is
1033 * zero, use driver preferred values. This cannot be done individually
1034 * as it is valid for either Tx or Rx (but not both) to be zero.
1035 * If driver does not provide any preferred valued, fall back on
1038 if (nb_rx_q == 0 && nb_tx_q == 0) {
1039 nb_rx_q = dev_info.default_rxportconf.nb_queues;
1041 nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
1042 nb_tx_q = dev_info.default_txportconf.nb_queues;
1044 nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
1047 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
1048 RTE_PMD_DEBUG_TRACE(
1049 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
1050 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
1054 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
1055 RTE_PMD_DEBUG_TRACE(
1056 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
1057 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
1061 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
1064 if (dev->data->dev_started) {
1065 RTE_PMD_DEBUG_TRACE(
1066 "port %d must be stopped to allow configuration\n", port_id);
1071 * Convert between the offloads API to enable PMDs to support
1074 if (dev_conf->rxmode.ignore_offload_bitfield == 0)
1075 rte_eth_convert_rx_offload_bitfield(
1076 &dev_conf->rxmode, &local_conf.rxmode.offloads);
1078 /* Copy the dev_conf parameter into the dev structure */
1079 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
1082 * Check that the numbers of RX and TX queues are not greater
1083 * than the maximum number of RX and TX queues supported by the
1084 * configured device.
1086 if (nb_rx_q > dev_info.max_rx_queues) {
1087 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
1088 port_id, nb_rx_q, dev_info.max_rx_queues);
1092 if (nb_tx_q > dev_info.max_tx_queues) {
1093 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
1094 port_id, nb_tx_q, dev_info.max_tx_queues);
1098 /* Check that the device supports requested interrupts */
1099 if ((dev_conf->intr_conf.lsc == 1) &&
1100 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
1101 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
1102 dev->device->driver->name);
1105 if ((dev_conf->intr_conf.rmv == 1) &&
1106 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
1107 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
1108 dev->device->driver->name);
1113 * If jumbo frames are enabled, check that the maximum RX packet
1114 * length is supported by the configured device.
1116 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
1117 if (dev_conf->rxmode.max_rx_pkt_len >
1118 dev_info.max_rx_pktlen) {
1119 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1120 " > max valid value %u\n",
1122 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1123 (unsigned)dev_info.max_rx_pktlen);
1125 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
1126 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
1127 " < min valid value %u\n",
1129 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
1130 (unsigned)ETHER_MIN_LEN);
1134 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
1135 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
1136 /* Use default value */
1137 dev->data->dev_conf.rxmode.max_rx_pkt_len =
1141 /* Check that device supports requested rss hash functions. */
1142 if ((dev_info.flow_type_rss_offloads |
1143 dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
1144 dev_info.flow_type_rss_offloads) {
1145 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
1146 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
1148 dev_conf->rx_adv_conf.rss_conf.rss_hf,
1149 dev_info.flow_type_rss_offloads);
1154 * Setup new number of RX/TX queues and reconfigure device.
1156 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
1158 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
1163 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
1165 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
1167 rte_eth_dev_rx_queue_config(dev, 0);
1171 diag = (*dev->dev_ops->dev_configure)(dev);
1173 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
1175 rte_eth_dev_rx_queue_config(dev, 0);
1176 rte_eth_dev_tx_queue_config(dev, 0);
1177 return eth_err(port_id, diag);
1180 /* Initialize Rx profiling if enabled at compilation time. */
1181 diag = __rte_eth_profile_rx_init(port_id, dev);
1183 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
1185 rte_eth_dev_rx_queue_config(dev, 0);
1186 rte_eth_dev_tx_queue_config(dev, 0);
1187 return eth_err(port_id, diag);
1194 _rte_eth_dev_reset(struct rte_eth_dev *dev)
1196 if (dev->data->dev_started) {
1197 RTE_PMD_DEBUG_TRACE(
1198 "port %d must be stopped to allow reset\n",
1199 dev->data->port_id);
1203 rte_eth_dev_rx_queue_config(dev, 0);
1204 rte_eth_dev_tx_queue_config(dev, 0);
1206 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
1210 rte_eth_dev_config_restore(uint16_t port_id)
1212 struct rte_eth_dev *dev;
1213 struct rte_eth_dev_info dev_info;
1214 struct ether_addr *addr;
1219 dev = &rte_eth_devices[port_id];
1221 rte_eth_dev_info_get(port_id, &dev_info);
1223 /* replay MAC address configuration including default MAC */
1224 addr = &dev->data->mac_addrs[0];
1225 if (*dev->dev_ops->mac_addr_set != NULL)
1226 (*dev->dev_ops->mac_addr_set)(dev, addr);
1227 else if (*dev->dev_ops->mac_addr_add != NULL)
1228 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
1230 if (*dev->dev_ops->mac_addr_add != NULL) {
1231 for (i = 1; i < dev_info.max_mac_addrs; i++) {
1232 addr = &dev->data->mac_addrs[i];
1234 /* skip zero address */
1235 if (is_zero_ether_addr(addr))
1239 pool_mask = dev->data->mac_pool_sel[i];
1242 if (pool_mask & 1ULL)
1243 (*dev->dev_ops->mac_addr_add)(dev,
1247 } while (pool_mask);
1251 /* replay promiscuous configuration */
1252 if (rte_eth_promiscuous_get(port_id) == 1)
1253 rte_eth_promiscuous_enable(port_id);
1254 else if (rte_eth_promiscuous_get(port_id) == 0)
1255 rte_eth_promiscuous_disable(port_id);
1257 /* replay all multicast configuration */
1258 if (rte_eth_allmulticast_get(port_id) == 1)
1259 rte_eth_allmulticast_enable(port_id);
1260 else if (rte_eth_allmulticast_get(port_id) == 0)
1261 rte_eth_allmulticast_disable(port_id);
1265 rte_eth_dev_start(uint16_t port_id)
1267 struct rte_eth_dev *dev;
1270 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1272 dev = &rte_eth_devices[port_id];
1274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1276 if (dev->data->dev_started != 0) {
1277 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1278 " already started\n",
1283 diag = (*dev->dev_ops->dev_start)(dev);
1285 dev->data->dev_started = 1;
1287 return eth_err(port_id, diag);
1289 rte_eth_dev_config_restore(port_id);
1291 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1292 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1293 (*dev->dev_ops->link_update)(dev, 0);
1299 rte_eth_dev_stop(uint16_t port_id)
1301 struct rte_eth_dev *dev;
1303 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1304 dev = &rte_eth_devices[port_id];
1306 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1308 if (dev->data->dev_started == 0) {
1309 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1310 " already stopped\n",
1315 dev->data->dev_started = 0;
1316 (*dev->dev_ops->dev_stop)(dev);
1320 rte_eth_dev_set_link_up(uint16_t port_id)
1322 struct rte_eth_dev *dev;
1324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1326 dev = &rte_eth_devices[port_id];
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1329 return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
1333 rte_eth_dev_set_link_down(uint16_t port_id)
1335 struct rte_eth_dev *dev;
1337 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1339 dev = &rte_eth_devices[port_id];
1341 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1342 return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
1346 rte_eth_dev_close(uint16_t port_id)
1348 struct rte_eth_dev *dev;
1350 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1351 dev = &rte_eth_devices[port_id];
1353 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1354 dev->data->dev_started = 0;
1355 (*dev->dev_ops->dev_close)(dev);
1357 dev->data->nb_rx_queues = 0;
1358 rte_free(dev->data->rx_queues);
1359 dev->data->rx_queues = NULL;
1360 dev->data->nb_tx_queues = 0;
1361 rte_free(dev->data->tx_queues);
1362 dev->data->tx_queues = NULL;
1366 rte_eth_dev_reset(uint16_t port_id)
1368 struct rte_eth_dev *dev;
1371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1372 dev = &rte_eth_devices[port_id];
1374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1376 rte_eth_dev_stop(port_id);
1377 ret = dev->dev_ops->dev_reset(dev);
1379 return eth_err(port_id, ret);
1382 int __rte_experimental
1383 rte_eth_dev_is_removed(uint16_t port_id)
1385 struct rte_eth_dev *dev;
1388 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
1390 dev = &rte_eth_devices[port_id];
1392 if (dev->state == RTE_ETH_DEV_REMOVED)
1395 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
1397 ret = dev->dev_ops->is_removed(dev);
1399 /* Device is physically removed. */
1400 dev->state = RTE_ETH_DEV_REMOVED;
1406 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1407 uint16_t nb_rx_desc, unsigned int socket_id,
1408 const struct rte_eth_rxconf *rx_conf,
1409 struct rte_mempool *mp)
1412 uint32_t mbp_buf_size;
1413 struct rte_eth_dev *dev;
1414 struct rte_eth_dev_info dev_info;
1415 struct rte_eth_rxconf local_conf;
1418 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1420 dev = &rte_eth_devices[port_id];
1421 if (rx_queue_id >= dev->data->nb_rx_queues) {
1422 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1426 if (dev->data->dev_started) {
1427 RTE_PMD_DEBUG_TRACE(
1428 "port %d must be stopped to allow configuration\n", port_id);
1432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1433 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1436 * Check the size of the mbuf data buffer.
1437 * This value must be provided in the private data of the memory pool.
1438 * First check that the memory pool has a valid private data.
1440 rte_eth_dev_info_get(port_id, &dev_info);
1441 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1442 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1443 mp->name, (int) mp->private_data_size,
1444 (int) sizeof(struct rte_pktmbuf_pool_private));
1447 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1449 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1450 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1451 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1455 (int)(RTE_PKTMBUF_HEADROOM +
1456 dev_info.min_rx_bufsize),
1457 (int)RTE_PKTMBUF_HEADROOM,
1458 (int)dev_info.min_rx_bufsize);
1462 /* Use default specified by driver, if nb_rx_desc is zero */
1463 if (nb_rx_desc == 0) {
1464 nb_rx_desc = dev_info.default_rxportconf.ring_size;
1465 /* If driver default is also zero, fall back on EAL default */
1466 if (nb_rx_desc == 0)
1467 nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
1470 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1471 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1472 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1474 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1475 "should be: <= %hu, = %hu, and a product of %hu\n",
1477 dev_info.rx_desc_lim.nb_max,
1478 dev_info.rx_desc_lim.nb_min,
1479 dev_info.rx_desc_lim.nb_align);
1483 rxq = dev->data->rx_queues;
1484 if (rxq[rx_queue_id]) {
1485 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1487 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1488 rxq[rx_queue_id] = NULL;
1491 if (rx_conf == NULL)
1492 rx_conf = &dev_info.default_rxconf;
1494 local_conf = *rx_conf;
1495 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1497 * Reflect port offloads to queue offloads in order for
1498 * offloads to not be discarded.
1500 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1501 &local_conf.offloads);
1504 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1505 socket_id, &local_conf, mp);
1507 if (!dev->data->min_rx_buf_size ||
1508 dev->data->min_rx_buf_size > mbp_buf_size)
1509 dev->data->min_rx_buf_size = mbp_buf_size;
1512 return eth_err(port_id, ret);
1516 * A conversion function from txq_flags API.
1519 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1521 uint64_t offloads = 0;
1523 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1524 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1525 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1526 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1527 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1528 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1529 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1530 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1531 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1532 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1533 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1534 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1535 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1537 *tx_offloads = offloads;
1541 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1542 uint16_t nb_tx_desc, unsigned int socket_id,
1543 const struct rte_eth_txconf *tx_conf)
1545 struct rte_eth_dev *dev;
1546 struct rte_eth_dev_info dev_info;
1547 struct rte_eth_txconf local_conf;
1550 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1552 dev = &rte_eth_devices[port_id];
1553 if (tx_queue_id >= dev->data->nb_tx_queues) {
1554 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1558 if (dev->data->dev_started) {
1559 RTE_PMD_DEBUG_TRACE(
1560 "port %d must be stopped to allow configuration\n", port_id);
1564 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1567 rte_eth_dev_info_get(port_id, &dev_info);
1569 /* Use default specified by driver, if nb_tx_desc is zero */
1570 if (nb_tx_desc == 0) {
1571 nb_tx_desc = dev_info.default_txportconf.ring_size;
1572 /* If driver default is zero, fall back on EAL default */
1573 if (nb_tx_desc == 0)
1574 nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
1576 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1577 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1578 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1579 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1580 "should be: <= %hu, = %hu, and a product of %hu\n",
1582 dev_info.tx_desc_lim.nb_max,
1583 dev_info.tx_desc_lim.nb_min,
1584 dev_info.tx_desc_lim.nb_align);
1588 txq = dev->data->tx_queues;
1589 if (txq[tx_queue_id]) {
1590 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1592 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1593 txq[tx_queue_id] = NULL;
1596 if (tx_conf == NULL)
1597 tx_conf = &dev_info.default_txconf;
1600 * Convert between the offloads API to enable PMDs to support
1603 local_conf = *tx_conf;
1604 if (!(tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE)) {
1605 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1606 &local_conf.offloads);
1609 return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
1610 tx_queue_id, nb_tx_desc, socket_id, &local_conf));
1614 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1615 void *userdata __rte_unused)
1619 for (i = 0; i < unsent; i++)
1620 rte_pktmbuf_free(pkts[i]);
1624 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1627 uint64_t *count = userdata;
1630 for (i = 0; i < unsent; i++)
1631 rte_pktmbuf_free(pkts[i]);
1637 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1638 buffer_tx_error_fn cbfn, void *userdata)
1640 buffer->error_callback = cbfn;
1641 buffer->error_userdata = userdata;
1646 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1653 buffer->size = size;
1654 if (buffer->error_callback == NULL) {
1655 ret = rte_eth_tx_buffer_set_err_callback(
1656 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1663 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1665 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1668 /* Validate Input Data. Bail if not valid or not supported. */
1669 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1670 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1672 /* Call driver to free pending mbufs. */
1673 ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1675 return eth_err(port_id, ret);
1679 rte_eth_promiscuous_enable(uint16_t port_id)
1681 struct rte_eth_dev *dev;
1683 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1684 dev = &rte_eth_devices[port_id];
1686 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1687 (*dev->dev_ops->promiscuous_enable)(dev);
1688 dev->data->promiscuous = 1;
1692 rte_eth_promiscuous_disable(uint16_t port_id)
1694 struct rte_eth_dev *dev;
1696 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1697 dev = &rte_eth_devices[port_id];
1699 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1700 dev->data->promiscuous = 0;
1701 (*dev->dev_ops->promiscuous_disable)(dev);
1705 rte_eth_promiscuous_get(uint16_t port_id)
1707 struct rte_eth_dev *dev;
1709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1711 dev = &rte_eth_devices[port_id];
1712 return dev->data->promiscuous;
1716 rte_eth_allmulticast_enable(uint16_t port_id)
1718 struct rte_eth_dev *dev;
1720 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1721 dev = &rte_eth_devices[port_id];
1723 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1724 (*dev->dev_ops->allmulticast_enable)(dev);
1725 dev->data->all_multicast = 1;
1729 rte_eth_allmulticast_disable(uint16_t port_id)
1731 struct rte_eth_dev *dev;
1733 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1734 dev = &rte_eth_devices[port_id];
1736 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1737 dev->data->all_multicast = 0;
1738 (*dev->dev_ops->allmulticast_disable)(dev);
1742 rte_eth_allmulticast_get(uint16_t port_id)
1744 struct rte_eth_dev *dev;
1746 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1748 dev = &rte_eth_devices[port_id];
1749 return dev->data->all_multicast;
1753 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1755 struct rte_eth_dev *dev;
1757 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1758 dev = &rte_eth_devices[port_id];
1760 if (dev->data->dev_conf.intr_conf.lsc &&
1761 dev->data->dev_started)
1762 rte_eth_linkstatus_get(dev, eth_link);
1764 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1765 (*dev->dev_ops->link_update)(dev, 1);
1766 *eth_link = dev->data->dev_link;
1771 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1773 struct rte_eth_dev *dev;
1775 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1776 dev = &rte_eth_devices[port_id];
1778 if (dev->data->dev_conf.intr_conf.lsc &&
1779 dev->data->dev_started)
1780 rte_eth_linkstatus_get(dev, eth_link);
1782 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1783 (*dev->dev_ops->link_update)(dev, 0);
1784 *eth_link = dev->data->dev_link;
1789 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1791 struct rte_eth_dev *dev;
1793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1795 dev = &rte_eth_devices[port_id];
1796 memset(stats, 0, sizeof(*stats));
1798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1799 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1800 return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
1804 rte_eth_stats_reset(uint16_t port_id)
1806 struct rte_eth_dev *dev;
1808 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1809 dev = &rte_eth_devices[port_id];
1811 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1812 (*dev->dev_ops->stats_reset)(dev);
1813 dev->data->rx_mbuf_alloc_failed = 0;
1819 get_xstats_basic_count(struct rte_eth_dev *dev)
1821 uint16_t nb_rxqs, nb_txqs;
1824 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1825 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1827 count = RTE_NB_STATS;
1828 count += nb_rxqs * RTE_NB_RXQ_STATS;
1829 count += nb_txqs * RTE_NB_TXQ_STATS;
1835 get_xstats_count(uint16_t port_id)
1837 struct rte_eth_dev *dev;
1840 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1841 dev = &rte_eth_devices[port_id];
1842 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1843 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1846 return eth_err(port_id, count);
1848 if (dev->dev_ops->xstats_get_names != NULL) {
1849 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1851 return eth_err(port_id, count);
1856 count += get_xstats_basic_count(dev);
1862 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1865 int cnt_xstats, idx_xstat;
1867 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1870 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1875 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1880 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1881 if (cnt_xstats < 0) {
1882 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1886 /* Get id-name lookup table */
1887 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1889 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1890 port_id, xstats_names, cnt_xstats, NULL)) {
1891 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1895 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1896 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1905 /* retrieve basic stats names */
1907 rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
1908 struct rte_eth_xstat_name *xstats_names)
1910 int cnt_used_entries = 0;
1911 uint32_t idx, id_queue;
1914 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1915 snprintf(xstats_names[cnt_used_entries].name,
1916 sizeof(xstats_names[0].name),
1917 "%s", rte_stats_strings[idx].name);
1920 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1921 for (id_queue = 0; id_queue < num_q; id_queue++) {
1922 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1923 snprintf(xstats_names[cnt_used_entries].name,
1924 sizeof(xstats_names[0].name),
1926 id_queue, rte_rxq_stats_strings[idx].name);
1931 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1932 for (id_queue = 0; id_queue < num_q; id_queue++) {
1933 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1934 snprintf(xstats_names[cnt_used_entries].name,
1935 sizeof(xstats_names[0].name),
1937 id_queue, rte_txq_stats_strings[idx].name);
1941 return cnt_used_entries;
1944 /* retrieve ethdev extended statistics names */
1946 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1947 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1950 struct rte_eth_xstat_name *xstats_names_copy;
1951 unsigned int no_basic_stat_requested = 1;
1952 unsigned int no_ext_stat_requested = 1;
1953 unsigned int expected_entries;
1954 unsigned int basic_count;
1955 struct rte_eth_dev *dev;
1959 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1960 dev = &rte_eth_devices[port_id];
1962 basic_count = get_xstats_basic_count(dev);
1963 ret = get_xstats_count(port_id);
1966 expected_entries = (unsigned int)ret;
1968 /* Return max number of stats if no ids given */
1971 return expected_entries;
1972 else if (xstats_names && size < expected_entries)
1973 return expected_entries;
1976 if (ids && !xstats_names)
1979 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1980 uint64_t ids_copy[size];
1982 for (i = 0; i < size; i++) {
1983 if (ids[i] < basic_count) {
1984 no_basic_stat_requested = 0;
1989 * Convert ids to xstats ids that PMD knows.
1990 * ids known by user are basic + extended stats.
1992 ids_copy[i] = ids[i] - basic_count;
1995 if (no_basic_stat_requested)
1996 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1997 xstats_names, ids_copy, size);
2000 /* Retrieve all stats */
2002 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
2004 if (num_stats < 0 || num_stats > (int)expected_entries)
2007 return expected_entries;
2010 xstats_names_copy = calloc(expected_entries,
2011 sizeof(struct rte_eth_xstat_name));
2013 if (!xstats_names_copy) {
2014 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
2019 for (i = 0; i < size; i++) {
2020 if (ids[i] >= basic_count) {
2021 no_ext_stat_requested = 0;
2027 /* Fill xstats_names_copy structure */
2028 if (ids && no_ext_stat_requested) {
2029 rte_eth_basic_stats_get_names(dev, xstats_names_copy);
2031 ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
2034 free(xstats_names_copy);
2040 for (i = 0; i < size; i++) {
2041 if (ids[i] >= expected_entries) {
2042 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2043 free(xstats_names_copy);
2046 xstats_names[i] = xstats_names_copy[ids[i]];
2049 free(xstats_names_copy);
2054 rte_eth_xstats_get_names(uint16_t port_id,
2055 struct rte_eth_xstat_name *xstats_names,
2058 struct rte_eth_dev *dev;
2059 int cnt_used_entries;
2060 int cnt_expected_entries;
2061 int cnt_driver_entries;
2063 cnt_expected_entries = get_xstats_count(port_id);
2064 if (xstats_names == NULL || cnt_expected_entries < 0 ||
2065 (int)size < cnt_expected_entries)
2066 return cnt_expected_entries;
2068 /* port_id checked in get_xstats_count() */
2069 dev = &rte_eth_devices[port_id];
2071 cnt_used_entries = rte_eth_basic_stats_get_names(
2074 if (dev->dev_ops->xstats_get_names != NULL) {
2075 /* If there are any driver-specific xstats, append them
2078 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
2080 xstats_names + cnt_used_entries,
2081 size - cnt_used_entries);
2082 if (cnt_driver_entries < 0)
2083 return eth_err(port_id, cnt_driver_entries);
2084 cnt_used_entries += cnt_driver_entries;
2087 return cnt_used_entries;
2092 rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
2094 struct rte_eth_dev *dev;
2095 struct rte_eth_stats eth_stats;
2096 unsigned int count = 0, i, q;
2097 uint64_t val, *stats_ptr;
2098 uint16_t nb_rxqs, nb_txqs;
2101 ret = rte_eth_stats_get(port_id, ð_stats);
2105 dev = &rte_eth_devices[port_id];
2107 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2108 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2111 for (i = 0; i < RTE_NB_STATS; i++) {
2112 stats_ptr = RTE_PTR_ADD(ð_stats,
2113 rte_stats_strings[i].offset);
2115 xstats[count++].value = val;
2119 for (q = 0; q < nb_rxqs; q++) {
2120 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
2121 stats_ptr = RTE_PTR_ADD(ð_stats,
2122 rte_rxq_stats_strings[i].offset +
2123 q * sizeof(uint64_t));
2125 xstats[count++].value = val;
2130 for (q = 0; q < nb_txqs; q++) {
2131 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
2132 stats_ptr = RTE_PTR_ADD(ð_stats,
2133 rte_txq_stats_strings[i].offset +
2134 q * sizeof(uint64_t));
2136 xstats[count++].value = val;
2142 /* retrieve ethdev extended statistics */
2144 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
2145 uint64_t *values, unsigned int size)
2147 unsigned int no_basic_stat_requested = 1;
2148 unsigned int no_ext_stat_requested = 1;
2149 unsigned int num_xstats_filled;
2150 unsigned int basic_count;
2151 uint16_t expected_entries;
2152 struct rte_eth_dev *dev;
2156 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2157 ret = get_xstats_count(port_id);
2160 expected_entries = (uint16_t)ret;
2161 struct rte_eth_xstat xstats[expected_entries];
2162 dev = &rte_eth_devices[port_id];
2163 basic_count = get_xstats_basic_count(dev);
2165 /* Return max number of stats if no ids given */
2168 return expected_entries;
2169 else if (values && size < expected_entries)
2170 return expected_entries;
2176 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
2177 unsigned int basic_count = get_xstats_basic_count(dev);
2178 uint64_t ids_copy[size];
2180 for (i = 0; i < size; i++) {
2181 if (ids[i] < basic_count) {
2182 no_basic_stat_requested = 0;
2187 * Convert ids to xstats ids that PMD knows.
2188 * ids known by user are basic + extended stats.
2190 ids_copy[i] = ids[i] - basic_count;
2193 if (no_basic_stat_requested)
2194 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
2199 for (i = 0; i < size; i++) {
2200 if (ids[i] >= basic_count) {
2201 no_ext_stat_requested = 0;
2207 /* Fill the xstats structure */
2208 if (ids && no_ext_stat_requested)
2209 ret = rte_eth_basic_stats_get(port_id, xstats);
2211 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
2215 num_xstats_filled = (unsigned int)ret;
2217 /* Return all stats */
2219 for (i = 0; i < num_xstats_filled; i++)
2220 values[i] = xstats[i].value;
2221 return expected_entries;
2225 for (i = 0; i < size; i++) {
2226 if (ids[i] >= expected_entries) {
2227 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
2230 values[i] = xstats[ids[i]].value;
2236 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
2239 struct rte_eth_dev *dev;
2240 unsigned int count = 0, i;
2241 signed int xcount = 0;
2242 uint16_t nb_rxqs, nb_txqs;
2245 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2247 dev = &rte_eth_devices[port_id];
2249 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2250 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
2252 /* Return generic statistics */
2253 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
2254 (nb_txqs * RTE_NB_TXQ_STATS);
2256 /* implemented by the driver */
2257 if (dev->dev_ops->xstats_get != NULL) {
2258 /* Retrieve the xstats from the driver at the end of the
2261 xcount = (*dev->dev_ops->xstats_get)(dev,
2262 xstats ? xstats + count : NULL,
2263 (n > count) ? n - count : 0);
2266 return eth_err(port_id, xcount);
2269 if (n < count + xcount || xstats == NULL)
2270 return count + xcount;
2272 /* now fill the xstats structure */
2273 ret = rte_eth_basic_stats_get(port_id, xstats);
2278 for (i = 0; i < count; i++)
2280 /* add an offset to driver-specific stats */
2281 for ( ; i < count + xcount; i++)
2282 xstats[i].id += count;
2284 return count + xcount;
2287 /* reset ethdev extended statistics */
2289 rte_eth_xstats_reset(uint16_t port_id)
2291 struct rte_eth_dev *dev;
2293 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2294 dev = &rte_eth_devices[port_id];
2296 /* implemented by the driver */
2297 if (dev->dev_ops->xstats_reset != NULL) {
2298 (*dev->dev_ops->xstats_reset)(dev);
2302 /* fallback to default */
2303 rte_eth_stats_reset(port_id);
2307 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
2310 struct rte_eth_dev *dev;
2312 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2314 dev = &rte_eth_devices[port_id];
2316 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2317 return (*dev->dev_ops->queue_stats_mapping_set)
2318 (dev, queue_id, stat_idx, is_rx);
2323 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2326 return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
2327 stat_idx, STAT_QMAP_TX));
2332 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2335 return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
2336 stat_idx, STAT_QMAP_RX));
2340 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2342 struct rte_eth_dev *dev;
2344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2345 dev = &rte_eth_devices[port_id];
2347 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2348 return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
2349 fw_version, fw_size));
2353 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2355 struct rte_eth_dev *dev;
2356 const struct rte_eth_desc_lim lim = {
2357 .nb_max = UINT16_MAX,
2362 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2363 dev = &rte_eth_devices[port_id];
2365 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2366 dev_info->rx_desc_lim = lim;
2367 dev_info->tx_desc_lim = lim;
2368 dev_info->device = dev->device;
2370 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2371 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2372 dev_info->driver_name = dev->device->driver->name;
2373 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2374 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2378 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2379 uint32_t *ptypes, int num)
2382 struct rte_eth_dev *dev;
2383 const uint32_t *all_ptypes;
2385 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2386 dev = &rte_eth_devices[port_id];
2387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2388 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2393 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2394 if (all_ptypes[i] & ptype_mask) {
2396 ptypes[j] = all_ptypes[i];
2404 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2406 struct rte_eth_dev *dev;
2408 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2409 dev = &rte_eth_devices[port_id];
2410 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2415 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2417 struct rte_eth_dev *dev;
2419 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2421 dev = &rte_eth_devices[port_id];
2422 *mtu = dev->data->mtu;
2427 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2430 struct rte_eth_dev *dev;
2432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2433 dev = &rte_eth_devices[port_id];
2434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2436 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2438 dev->data->mtu = mtu;
2440 return eth_err(port_id, ret);
2444 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2446 struct rte_eth_dev *dev;
2449 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2450 dev = &rte_eth_devices[port_id];
2451 if (!(dev->data->dev_conf.rxmode.offloads &
2452 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2453 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2457 if (vlan_id > 4095) {
2458 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2459 port_id, (unsigned) vlan_id);
2462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2464 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2466 struct rte_vlan_filter_conf *vfc;
2470 vfc = &dev->data->vlan_filter_conf;
2471 vidx = vlan_id / 64;
2472 vbit = vlan_id % 64;
2475 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2477 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2480 return eth_err(port_id, ret);
2484 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2487 struct rte_eth_dev *dev;
2489 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2490 dev = &rte_eth_devices[port_id];
2491 if (rx_queue_id >= dev->data->nb_rx_queues) {
2492 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2496 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2497 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2503 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2504 enum rte_vlan_type vlan_type,
2507 struct rte_eth_dev *dev;
2509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2510 dev = &rte_eth_devices[port_id];
2511 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2513 return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
2518 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2520 struct rte_eth_dev *dev;
2524 uint64_t orig_offloads;
2526 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2527 dev = &rte_eth_devices[port_id];
2529 /* save original values in case of failure */
2530 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2532 /*check which option changed by application*/
2533 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2534 org = !!(dev->data->dev_conf.rxmode.offloads &
2535 DEV_RX_OFFLOAD_VLAN_STRIP);
2538 dev->data->dev_conf.rxmode.offloads |=
2539 DEV_RX_OFFLOAD_VLAN_STRIP;
2541 dev->data->dev_conf.rxmode.offloads &=
2542 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2543 mask |= ETH_VLAN_STRIP_MASK;
2546 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2547 org = !!(dev->data->dev_conf.rxmode.offloads &
2548 DEV_RX_OFFLOAD_VLAN_FILTER);
2551 dev->data->dev_conf.rxmode.offloads |=
2552 DEV_RX_OFFLOAD_VLAN_FILTER;
2554 dev->data->dev_conf.rxmode.offloads &=
2555 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2556 mask |= ETH_VLAN_FILTER_MASK;
2559 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2560 org = !!(dev->data->dev_conf.rxmode.offloads &
2561 DEV_RX_OFFLOAD_VLAN_EXTEND);
2564 dev->data->dev_conf.rxmode.offloads |=
2565 DEV_RX_OFFLOAD_VLAN_EXTEND;
2567 dev->data->dev_conf.rxmode.offloads &=
2568 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2569 mask |= ETH_VLAN_EXTEND_MASK;
2576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2577 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2579 /* hit an error restore original values */
2580 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2583 return eth_err(port_id, ret);
2587 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2589 struct rte_eth_dev *dev;
2592 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2593 dev = &rte_eth_devices[port_id];
2595 if (dev->data->dev_conf.rxmode.offloads &
2596 DEV_RX_OFFLOAD_VLAN_STRIP)
2597 ret |= ETH_VLAN_STRIP_OFFLOAD;
2599 if (dev->data->dev_conf.rxmode.offloads &
2600 DEV_RX_OFFLOAD_VLAN_FILTER)
2601 ret |= ETH_VLAN_FILTER_OFFLOAD;
2603 if (dev->data->dev_conf.rxmode.offloads &
2604 DEV_RX_OFFLOAD_VLAN_EXTEND)
2605 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2611 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2613 struct rte_eth_dev *dev;
2615 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2616 dev = &rte_eth_devices[port_id];
2617 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2619 return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
2623 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2625 struct rte_eth_dev *dev;
2627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2628 dev = &rte_eth_devices[port_id];
2629 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2630 memset(fc_conf, 0, sizeof(*fc_conf));
2631 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
2635 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2637 struct rte_eth_dev *dev;
2639 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2640 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2641 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2645 dev = &rte_eth_devices[port_id];
2646 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2647 return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
2651 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2652 struct rte_eth_pfc_conf *pfc_conf)
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2657 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2658 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2662 dev = &rte_eth_devices[port_id];
2663 /* High water, low water validation are device specific */
2664 if (*dev->dev_ops->priority_flow_ctrl_set)
2665 return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
2671 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2679 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2680 for (i = 0; i < num; i++) {
2681 if (reta_conf[i].mask)
2689 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2693 uint16_t i, idx, shift;
2699 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2703 for (i = 0; i < reta_size; i++) {
2704 idx = i / RTE_RETA_GROUP_SIZE;
2705 shift = i % RTE_RETA_GROUP_SIZE;
2706 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2707 (reta_conf[idx].reta[shift] >= max_rxq)) {
2708 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2709 "the maximum rxq index: %u\n", idx, shift,
2710 reta_conf[idx].reta[shift], max_rxq);
2719 rte_eth_dev_rss_reta_update(uint16_t port_id,
2720 struct rte_eth_rss_reta_entry64 *reta_conf,
2723 struct rte_eth_dev *dev;
2726 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2727 /* Check mask bits */
2728 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2732 dev = &rte_eth_devices[port_id];
2734 /* Check entry value */
2735 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2736 dev->data->nb_rx_queues);
2740 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2741 return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
2746 rte_eth_dev_rss_reta_query(uint16_t port_id,
2747 struct rte_eth_rss_reta_entry64 *reta_conf,
2750 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2755 /* Check mask bits */
2756 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2760 dev = &rte_eth_devices[port_id];
2761 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2762 return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
2767 rte_eth_dev_rss_hash_update(uint16_t port_id,
2768 struct rte_eth_rss_conf *rss_conf)
2770 struct rte_eth_dev *dev;
2771 struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
2773 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2774 dev = &rte_eth_devices[port_id];
2775 rte_eth_dev_info_get(port_id, &dev_info);
2776 if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
2777 dev_info.flow_type_rss_offloads) {
2778 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d invalid rss_hf: "
2779 "0x%"PRIx64", valid value: 0x%"PRIx64"\n",
2782 dev_info.flow_type_rss_offloads);
2785 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2786 return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
2791 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2792 struct rte_eth_rss_conf *rss_conf)
2794 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2797 dev = &rte_eth_devices[port_id];
2798 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2799 return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
2804 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2805 struct rte_eth_udp_tunnel *udp_tunnel)
2807 struct rte_eth_dev *dev;
2809 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2810 if (udp_tunnel == NULL) {
2811 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2815 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2816 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2820 dev = &rte_eth_devices[port_id];
2821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2822 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
2827 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2828 struct rte_eth_udp_tunnel *udp_tunnel)
2830 struct rte_eth_dev *dev;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 dev = &rte_eth_devices[port_id];
2835 if (udp_tunnel == NULL) {
2836 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2840 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2841 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2845 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2846 return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
2851 rte_eth_led_on(uint16_t port_id)
2853 struct rte_eth_dev *dev;
2855 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2856 dev = &rte_eth_devices[port_id];
2857 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2858 return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
2862 rte_eth_led_off(uint16_t port_id)
2864 struct rte_eth_dev *dev;
2866 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2867 dev = &rte_eth_devices[port_id];
2868 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2869 return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
2873 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2877 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2879 struct rte_eth_dev_info dev_info;
2880 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2883 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2884 rte_eth_dev_info_get(port_id, &dev_info);
2886 for (i = 0; i < dev_info.max_mac_addrs; i++)
2887 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2893 static const struct ether_addr null_mac_addr;
2896 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2899 struct rte_eth_dev *dev;
2904 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2905 dev = &rte_eth_devices[port_id];
2906 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2908 if (is_zero_ether_addr(addr)) {
2909 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2913 if (pool >= ETH_64_POOLS) {
2914 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2918 index = get_mac_addr_index(port_id, addr);
2920 index = get_mac_addr_index(port_id, &null_mac_addr);
2922 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2927 pool_mask = dev->data->mac_pool_sel[index];
2929 /* Check if both MAC address and pool is already there, and do nothing */
2930 if (pool_mask & (1ULL << pool))
2935 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2938 /* Update address in NIC data structure */
2939 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2941 /* Update pool bitmap in NIC data structure */
2942 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2945 return eth_err(port_id, ret);
2949 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2951 struct rte_eth_dev *dev;
2954 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2955 dev = &rte_eth_devices[port_id];
2956 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2958 index = get_mac_addr_index(port_id, addr);
2960 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2962 } else if (index < 0)
2963 return 0; /* Do nothing if address wasn't found */
2966 (*dev->dev_ops->mac_addr_remove)(dev, index);
2968 /* Update address in NIC data structure */
2969 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2971 /* reset pool bitmap */
2972 dev->data->mac_pool_sel[index] = 0;
2978 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2980 struct rte_eth_dev *dev;
2983 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2985 if (!is_valid_assigned_ether_addr(addr))
2988 dev = &rte_eth_devices[port_id];
2989 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2991 ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
2995 /* Update default address in NIC data structure */
2996 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
3003 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
3007 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
3009 struct rte_eth_dev_info dev_info;
3010 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3013 rte_eth_dev_info_get(port_id, &dev_info);
3014 if (!dev->data->hash_mac_addrs)
3017 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
3018 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
3019 ETHER_ADDR_LEN) == 0)
3026 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
3031 struct rte_eth_dev *dev;
3033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3035 dev = &rte_eth_devices[port_id];
3036 if (is_zero_ether_addr(addr)) {
3037 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
3042 index = get_hash_mac_addr_index(port_id, addr);
3043 /* Check if it's already there, and do nothing */
3044 if ((index >= 0) && on)
3049 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
3050 "set in UTA\n", port_id);
3054 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
3056 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
3062 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
3063 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
3065 /* Update address in NIC data structure */
3067 ether_addr_copy(addr,
3068 &dev->data->hash_mac_addrs[index]);
3070 ether_addr_copy(&null_mac_addr,
3071 &dev->data->hash_mac_addrs[index]);
3074 return eth_err(port_id, ret);
3078 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
3080 struct rte_eth_dev *dev;
3082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3084 dev = &rte_eth_devices[port_id];
3086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
3087 return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
3091 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
3094 struct rte_eth_dev *dev;
3095 struct rte_eth_dev_info dev_info;
3096 struct rte_eth_link link;
3098 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3100 dev = &rte_eth_devices[port_id];
3101 rte_eth_dev_info_get(port_id, &dev_info);
3102 link = dev->data->dev_link;
3104 if (queue_idx > dev_info.max_tx_queues) {
3105 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
3106 "invalid queue id=%d\n", port_id, queue_idx);
3110 if (tx_rate > link.link_speed) {
3111 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
3112 "bigger than link speed= %d\n",
3113 tx_rate, link.link_speed);
3117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
3118 return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
3119 queue_idx, tx_rate));
3123 rte_eth_mirror_rule_set(uint16_t port_id,
3124 struct rte_eth_mirror_conf *mirror_conf,
3125 uint8_t rule_id, uint8_t on)
3127 struct rte_eth_dev *dev;
3129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3130 if (mirror_conf->rule_type == 0) {
3131 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
3135 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
3136 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
3141 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
3142 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
3143 (mirror_conf->pool_mask == 0)) {
3144 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
3148 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
3149 mirror_conf->vlan.vlan_mask == 0) {
3150 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
3154 dev = &rte_eth_devices[port_id];
3155 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
3157 return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
3158 mirror_conf, rule_id, on));
3162 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
3164 struct rte_eth_dev *dev;
3166 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3168 dev = &rte_eth_devices[port_id];
3169 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
3171 return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
3175 RTE_INIT(eth_dev_init_cb_lists)
3179 for (i = 0; i < RTE_MAX_ETHPORTS; i++)
3180 TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
3184 rte_eth_dev_callback_register(uint16_t port_id,
3185 enum rte_eth_event_type event,
3186 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3188 struct rte_eth_dev *dev;
3189 struct rte_eth_dev_callback *user_cb;
3190 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3196 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3197 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3201 if (port_id == RTE_ETH_ALL) {
3203 last_port = RTE_MAX_ETHPORTS - 1;
3205 next_port = last_port = port_id;
3208 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3211 dev = &rte_eth_devices[next_port];
3213 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
3214 if (user_cb->cb_fn == cb_fn &&
3215 user_cb->cb_arg == cb_arg &&
3216 user_cb->event == event) {
3221 /* create a new callback. */
3222 if (user_cb == NULL) {
3223 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
3224 sizeof(struct rte_eth_dev_callback), 0);
3225 if (user_cb != NULL) {
3226 user_cb->cb_fn = cb_fn;
3227 user_cb->cb_arg = cb_arg;
3228 user_cb->event = event;
3229 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
3232 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3233 rte_eth_dev_callback_unregister(port_id, event,
3239 } while (++next_port <= last_port);
3241 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3246 rte_eth_dev_callback_unregister(uint16_t port_id,
3247 enum rte_eth_event_type event,
3248 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
3251 struct rte_eth_dev *dev;
3252 struct rte_eth_dev_callback *cb, *next;
3253 uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
3259 if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
3260 ethdev_log(ERR, "Invalid port_id=%d", port_id);
3264 if (port_id == RTE_ETH_ALL) {
3266 last_port = RTE_MAX_ETHPORTS - 1;
3268 next_port = last_port = port_id;
3271 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3274 dev = &rte_eth_devices[next_port];
3276 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
3279 next = TAILQ_NEXT(cb, next);
3281 if (cb->cb_fn != cb_fn || cb->event != event ||
3282 (cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
3286 * if this callback is not executing right now,
3289 if (cb->active == 0) {
3290 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
3296 } while (++next_port <= last_port);
3298 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3303 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
3304 enum rte_eth_event_type event, void *ret_param)
3306 struct rte_eth_dev_callback *cb_lst;
3307 struct rte_eth_dev_callback dev_cb;
3310 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3311 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
3312 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
3316 if (ret_param != NULL)
3317 dev_cb.ret_param = ret_param;
3319 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3320 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
3321 dev_cb.cb_arg, dev_cb.ret_param);
3322 rte_spinlock_lock(&rte_eth_dev_cb_lock);
3325 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
3330 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
3333 struct rte_eth_dev *dev;
3334 struct rte_intr_handle *intr_handle;
3338 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3340 dev = &rte_eth_devices[port_id];
3342 if (!dev->intr_handle) {
3343 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3347 intr_handle = dev->intr_handle;
3348 if (!intr_handle->intr_vec) {
3349 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3353 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
3354 vec = intr_handle->intr_vec[qid];
3355 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3356 if (rc && rc != -EEXIST) {
3357 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3358 " op %d epfd %d vec %u\n",
3359 port_id, qid, op, epfd, vec);
3366 const struct rte_memzone *
3367 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
3368 uint16_t queue_id, size_t size, unsigned align,
3371 char z_name[RTE_MEMZONE_NAMESIZE];
3372 const struct rte_memzone *mz;
3374 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3375 dev->device->driver->name, ring_name,
3376 dev->data->port_id, queue_id);
3378 mz = rte_memzone_lookup(z_name);
3382 return rte_memzone_reserve_aligned(z_name, size, socket_id,
3383 RTE_MEMZONE_IOVA_CONTIG, align);
3387 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3388 int epfd, int op, void *data)
3391 struct rte_eth_dev *dev;
3392 struct rte_intr_handle *intr_handle;
3395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3397 dev = &rte_eth_devices[port_id];
3398 if (queue_id >= dev->data->nb_rx_queues) {
3399 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3403 if (!dev->intr_handle) {
3404 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3408 intr_handle = dev->intr_handle;
3409 if (!intr_handle->intr_vec) {
3410 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3414 vec = intr_handle->intr_vec[queue_id];
3415 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3416 if (rc && rc != -EEXIST) {
3417 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3418 " op %d epfd %d vec %u\n",
3419 port_id, queue_id, op, epfd, vec);
3427 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3430 struct rte_eth_dev *dev;
3432 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3434 dev = &rte_eth_devices[port_id];
3436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3437 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
3442 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3445 struct rte_eth_dev *dev;
3447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3449 dev = &rte_eth_devices[port_id];
3451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3452 return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
3458 rte_eth_dev_filter_supported(uint16_t port_id,
3459 enum rte_filter_type filter_type)
3461 struct rte_eth_dev *dev;
3463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3465 dev = &rte_eth_devices[port_id];
3466 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3467 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3468 RTE_ETH_FILTER_NOP, NULL);
3472 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3473 enum rte_filter_op filter_op, void *arg)
3475 struct rte_eth_dev *dev;
3477 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3479 dev = &rte_eth_devices[port_id];
3480 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3481 return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3485 const struct rte_eth_rxtx_callback *
3486 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3487 rte_rx_callback_fn fn, void *user_param)
3489 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3490 rte_errno = ENOTSUP;
3493 /* check input parameters */
3494 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3495 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3499 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3507 cb->param = user_param;
3509 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3510 /* Add the callbacks in fifo order. */
3511 struct rte_eth_rxtx_callback *tail =
3512 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3515 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3522 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3527 const struct rte_eth_rxtx_callback *
3528 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3529 rte_rx_callback_fn fn, void *user_param)
3531 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3532 rte_errno = ENOTSUP;
3535 /* check input parameters */
3536 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3537 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3542 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3550 cb->param = user_param;
3552 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3553 /* Add the callbacks at fisrt position*/
3554 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3556 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3557 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3562 const struct rte_eth_rxtx_callback *
3563 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3564 rte_tx_callback_fn fn, void *user_param)
3566 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3567 rte_errno = ENOTSUP;
3570 /* check input parameters */
3571 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3572 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3577 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3585 cb->param = user_param;
3587 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3588 /* Add the callbacks in fifo order. */
3589 struct rte_eth_rxtx_callback *tail =
3590 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3593 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3600 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3606 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3607 const struct rte_eth_rxtx_callback *user_cb)
3609 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3612 /* Check input parameters. */
3613 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3614 if (user_cb == NULL ||
3615 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3618 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3619 struct rte_eth_rxtx_callback *cb;
3620 struct rte_eth_rxtx_callback **prev_cb;
3623 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3624 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3625 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3627 if (cb == user_cb) {
3628 /* Remove the user cb from the callback list. */
3629 *prev_cb = cb->next;
3634 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3640 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3641 const struct rte_eth_rxtx_callback *user_cb)
3643 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3646 /* Check input parameters. */
3647 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3648 if (user_cb == NULL ||
3649 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3652 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3654 struct rte_eth_rxtx_callback *cb;
3655 struct rte_eth_rxtx_callback **prev_cb;
3657 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3658 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3659 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3661 if (cb == user_cb) {
3662 /* Remove the user cb from the callback list. */
3663 *prev_cb = cb->next;
3668 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3674 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3675 struct rte_eth_rxq_info *qinfo)
3677 struct rte_eth_dev *dev;
3679 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3684 dev = &rte_eth_devices[port_id];
3685 if (queue_id >= dev->data->nb_rx_queues) {
3686 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3692 memset(qinfo, 0, sizeof(*qinfo));
3693 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3698 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3699 struct rte_eth_txq_info *qinfo)
3701 struct rte_eth_dev *dev;
3703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3708 dev = &rte_eth_devices[port_id];
3709 if (queue_id >= dev->data->nb_tx_queues) {
3710 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3714 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3716 memset(qinfo, 0, sizeof(*qinfo));
3717 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3722 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3723 struct ether_addr *mc_addr_set,
3724 uint32_t nb_mc_addr)
3726 struct rte_eth_dev *dev;
3728 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3730 dev = &rte_eth_devices[port_id];
3731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3732 return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
3733 mc_addr_set, nb_mc_addr));
3737 rte_eth_timesync_enable(uint16_t port_id)
3739 struct rte_eth_dev *dev;
3741 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3742 dev = &rte_eth_devices[port_id];
3744 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3745 return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
3749 rte_eth_timesync_disable(uint16_t port_id)
3751 struct rte_eth_dev *dev;
3753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3754 dev = &rte_eth_devices[port_id];
3756 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3757 return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
3761 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3764 struct rte_eth_dev *dev;
3766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3767 dev = &rte_eth_devices[port_id];
3769 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3770 return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
3771 (dev, timestamp, flags));
3775 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3776 struct timespec *timestamp)
3778 struct rte_eth_dev *dev;
3780 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3781 dev = &rte_eth_devices[port_id];
3783 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3784 return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
3789 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3791 struct rte_eth_dev *dev;
3793 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3794 dev = &rte_eth_devices[port_id];
3796 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3797 return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
3802 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3804 struct rte_eth_dev *dev;
3806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3807 dev = &rte_eth_devices[port_id];
3809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3810 return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
3815 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3817 struct rte_eth_dev *dev;
3819 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3820 dev = &rte_eth_devices[port_id];
3822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3823 return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
3828 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3830 struct rte_eth_dev *dev;
3832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3834 dev = &rte_eth_devices[port_id];
3835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3836 return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
3840 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3842 struct rte_eth_dev *dev;
3844 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3846 dev = &rte_eth_devices[port_id];
3847 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3848 return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
3852 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3854 struct rte_eth_dev *dev;
3856 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3858 dev = &rte_eth_devices[port_id];
3859 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3860 return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
3864 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3866 struct rte_eth_dev *dev;
3868 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3870 dev = &rte_eth_devices[port_id];
3871 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3872 return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
3876 rte_eth_dev_get_dcb_info(uint16_t port_id,
3877 struct rte_eth_dcb_info *dcb_info)
3879 struct rte_eth_dev *dev;
3881 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3883 dev = &rte_eth_devices[port_id];
3884 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3886 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3887 return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
3891 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3892 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3894 struct rte_eth_dev *dev;
3896 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3897 if (l2_tunnel == NULL) {
3898 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3902 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3903 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3907 dev = &rte_eth_devices[port_id];
3908 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3910 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
3915 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3916 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3920 struct rte_eth_dev *dev;
3922 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3924 if (l2_tunnel == NULL) {
3925 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3929 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3930 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3935 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3939 dev = &rte_eth_devices[port_id];
3940 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3942 return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
3943 l2_tunnel, mask, en));
3947 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3948 const struct rte_eth_desc_lim *desc_lim)
3950 if (desc_lim->nb_align != 0)
3951 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3953 if (desc_lim->nb_max != 0)
3954 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3956 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3960 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3961 uint16_t *nb_rx_desc,
3962 uint16_t *nb_tx_desc)
3964 struct rte_eth_dev *dev;
3965 struct rte_eth_dev_info dev_info;
3967 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3969 dev = &rte_eth_devices[port_id];
3970 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3972 rte_eth_dev_info_get(port_id, &dev_info);
3974 if (nb_rx_desc != NULL)
3975 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3977 if (nb_tx_desc != NULL)
3978 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3984 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3986 struct rte_eth_dev *dev;
3988 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3993 dev = &rte_eth_devices[port_id];
3995 if (*dev->dev_ops->pool_ops_supported == NULL)
3996 return 1; /* all pools are supported */
3998 return (*dev->dev_ops->pool_ops_supported)(dev, pool);
4001 RTE_INIT(ethdev_init_log);
4003 ethdev_init_log(void)
4005 ethdev_logtype = rte_log_register("lib.ethdev");
4006 if (ethdev_logtype >= 0)
4007 rte_log_set_level(ethdev_logtype, RTE_LOG_INFO);