4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
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14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
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18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
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22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 enum rte_eth_event_type event; /**< Interrupt event type */
133 uint32_t active; /**< Callback is executing */
147 rte_eth_dev_data_alloc(void)
149 const unsigned flags = 0;
150 const struct rte_memzone *mz;
152 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
153 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
154 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
155 rte_socket_id(), flags);
157 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
159 rte_panic("Cannot allocate memzone for ethernet port data\n");
161 rte_eth_dev_data = mz->addr;
162 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
163 memset(rte_eth_dev_data, 0,
164 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
168 rte_eth_dev_allocated(const char *name)
172 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
173 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
174 strcmp(rte_eth_devices[i].data->name, name) == 0)
175 return &rte_eth_devices[i];
181 rte_eth_dev_find_free_port(void)
185 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
186 if (rte_eth_devices[i].attached == DEV_DETACHED)
189 return RTE_MAX_ETHPORTS;
193 rte_eth_dev_allocate(const char *name)
196 struct rte_eth_dev *eth_dev;
198 port_id = rte_eth_dev_find_free_port();
199 if (port_id == RTE_MAX_ETHPORTS) {
200 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
204 if (rte_eth_dev_data == NULL)
205 rte_eth_dev_data_alloc();
207 if (rte_eth_dev_allocated(name) != NULL) {
208 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
213 eth_dev = &rte_eth_devices[port_id];
214 eth_dev->data = &rte_eth_dev_data[port_id];
215 memset(eth_dev->data, 0, sizeof(*eth_dev->data));
216 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
217 eth_dev->data->port_id = port_id;
218 eth_dev->data->mtu = ETHER_MTU;
219 TAILQ_INIT(&(eth_dev->link_intr_cbs));
221 eth_dev->attached = DEV_ATTACHED;
222 eth_dev_last_created_port = port_id;
228 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
233 eth_dev->attached = DEV_DETACHED;
239 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
240 struct rte_pci_device *pci_dev)
242 struct eth_driver *eth_drv;
243 struct rte_eth_dev *eth_dev;
244 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
248 eth_drv = (struct eth_driver *)pci_drv;
250 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
251 sizeof(ethdev_name));
253 eth_dev = rte_eth_dev_allocate(ethdev_name);
257 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
258 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
259 eth_drv->dev_private_size,
260 RTE_CACHE_LINE_SIZE);
261 if (eth_dev->data->dev_private == NULL)
262 rte_panic("Cannot allocate memzone for private port data\n");
264 eth_dev->pci_dev = pci_dev;
265 eth_dev->driver = eth_drv;
267 /* Invoke PMD device initialization function */
268 diag = (*eth_drv->eth_dev_init)(eth_dev);
272 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
273 pci_drv->driver.name,
274 (unsigned) pci_dev->id.vendor_id,
275 (unsigned) pci_dev->id.device_id);
276 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
277 rte_free(eth_dev->data->dev_private);
278 rte_eth_dev_release_port(eth_dev);
283 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
285 const struct eth_driver *eth_drv;
286 struct rte_eth_dev *eth_dev;
287 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
293 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
294 sizeof(ethdev_name));
296 eth_dev = rte_eth_dev_allocated(ethdev_name);
300 eth_drv = (const struct eth_driver *)pci_dev->driver;
302 /* Invoke PMD device uninit function */
303 if (*eth_drv->eth_dev_uninit) {
304 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
309 /* free ether device */
310 rte_eth_dev_release_port(eth_dev);
312 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
313 rte_free(eth_dev->data->dev_private);
315 eth_dev->pci_dev = NULL;
316 eth_dev->driver = NULL;
317 eth_dev->data = NULL;
323 rte_eth_dev_is_valid_port(uint8_t port_id)
325 if (port_id >= RTE_MAX_ETHPORTS ||
326 rte_eth_devices[port_id].attached != DEV_ATTACHED)
333 rte_eth_dev_socket_id(uint8_t port_id)
335 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
336 return rte_eth_devices[port_id].data->numa_node;
340 rte_eth_dev_count(void)
346 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
350 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
353 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
357 /* shouldn't check 'rte_eth_devices[i].data',
358 * because it might be overwritten by VDEV PMD */
359 tmp = rte_eth_dev_data[port_id].name;
365 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
370 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
377 *port_id = RTE_MAX_ETHPORTS;
379 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
382 rte_eth_dev_data[i].name, strlen(name))) {
393 rte_eth_dev_is_detachable(uint8_t port_id)
397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
399 switch (rte_eth_devices[port_id].data->kdrv) {
400 case RTE_KDRV_IGB_UIO:
401 case RTE_KDRV_UIO_GENERIC:
402 case RTE_KDRV_NIC_UIO:
409 dev_flags = rte_eth_devices[port_id].data->dev_flags;
410 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
411 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
417 /* attach the new device, then store port_id of the device */
419 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
422 int current = rte_eth_dev_count();
426 if ((devargs == NULL) || (port_id == NULL)) {
431 /* parse devargs, then retrieve device name and args */
432 if (rte_eal_parse_devargs_str(devargs, &name, &args))
435 ret = rte_eal_dev_attach(name, args);
439 /* no point looking at the port count if no port exists */
440 if (!rte_eth_dev_count()) {
441 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
446 /* if nothing happened, there is a bug here, since some driver told us
447 * it did attach a device, but did not create a port.
449 if (current == rte_eth_dev_count()) {
454 *port_id = eth_dev_last_created_port;
463 /* detach the device, then store the name of the device */
465 rte_eth_dev_detach(uint8_t port_id, char *name)
474 /* FIXME: move this to eal, once device flags are relocated there */
475 if (rte_eth_dev_is_detachable(port_id))
478 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
479 "%s", rte_eth_devices[port_id].data->name);
480 ret = rte_eal_dev_detach(name);
491 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
493 uint16_t old_nb_queues = dev->data->nb_rx_queues;
497 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
498 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
499 sizeof(dev->data->rx_queues[0]) * nb_queues,
500 RTE_CACHE_LINE_SIZE);
501 if (dev->data->rx_queues == NULL) {
502 dev->data->nb_rx_queues = 0;
505 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
506 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
508 rxq = dev->data->rx_queues;
510 for (i = nb_queues; i < old_nb_queues; i++)
511 (*dev->dev_ops->rx_queue_release)(rxq[i]);
512 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
513 RTE_CACHE_LINE_SIZE);
516 if (nb_queues > old_nb_queues) {
517 uint16_t new_qs = nb_queues - old_nb_queues;
519 memset(rxq + old_nb_queues, 0,
520 sizeof(rxq[0]) * new_qs);
523 dev->data->rx_queues = rxq;
525 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
526 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
528 rxq = dev->data->rx_queues;
530 for (i = nb_queues; i < old_nb_queues; i++)
531 (*dev->dev_ops->rx_queue_release)(rxq[i]);
533 dev->data->nb_rx_queues = nb_queues;
538 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
540 struct rte_eth_dev *dev;
542 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
544 dev = &rte_eth_devices[port_id];
545 if (rx_queue_id >= dev->data->nb_rx_queues) {
546 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
550 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
552 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
553 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
554 " already started\n",
555 rx_queue_id, port_id);
559 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
564 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
566 struct rte_eth_dev *dev;
568 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
570 dev = &rte_eth_devices[port_id];
571 if (rx_queue_id >= dev->data->nb_rx_queues) {
572 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
576 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
578 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
579 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
580 " already stopped\n",
581 rx_queue_id, port_id);
585 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
590 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
592 struct rte_eth_dev *dev;
594 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
596 dev = &rte_eth_devices[port_id];
597 if (tx_queue_id >= dev->data->nb_tx_queues) {
598 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
602 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
604 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
605 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
606 " already started\n",
607 tx_queue_id, port_id);
611 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
616 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
618 struct rte_eth_dev *dev;
620 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
622 dev = &rte_eth_devices[port_id];
623 if (tx_queue_id >= dev->data->nb_tx_queues) {
624 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
630 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
631 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
632 " already stopped\n",
633 tx_queue_id, port_id);
637 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
642 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
644 uint16_t old_nb_queues = dev->data->nb_tx_queues;
648 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
649 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
650 sizeof(dev->data->tx_queues[0]) * nb_queues,
651 RTE_CACHE_LINE_SIZE);
652 if (dev->data->tx_queues == NULL) {
653 dev->data->nb_tx_queues = 0;
656 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
657 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
659 txq = dev->data->tx_queues;
661 for (i = nb_queues; i < old_nb_queues; i++)
662 (*dev->dev_ops->tx_queue_release)(txq[i]);
663 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
664 RTE_CACHE_LINE_SIZE);
667 if (nb_queues > old_nb_queues) {
668 uint16_t new_qs = nb_queues - old_nb_queues;
670 memset(txq + old_nb_queues, 0,
671 sizeof(txq[0]) * new_qs);
674 dev->data->tx_queues = txq;
676 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
677 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
679 txq = dev->data->tx_queues;
681 for (i = nb_queues; i < old_nb_queues; i++)
682 (*dev->dev_ops->tx_queue_release)(txq[i]);
684 dev->data->nb_tx_queues = nb_queues;
689 rte_eth_speed_bitflag(uint32_t speed, int duplex)
692 case ETH_SPEED_NUM_10M:
693 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
694 case ETH_SPEED_NUM_100M:
695 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
696 case ETH_SPEED_NUM_1G:
697 return ETH_LINK_SPEED_1G;
698 case ETH_SPEED_NUM_2_5G:
699 return ETH_LINK_SPEED_2_5G;
700 case ETH_SPEED_NUM_5G:
701 return ETH_LINK_SPEED_5G;
702 case ETH_SPEED_NUM_10G:
703 return ETH_LINK_SPEED_10G;
704 case ETH_SPEED_NUM_20G:
705 return ETH_LINK_SPEED_20G;
706 case ETH_SPEED_NUM_25G:
707 return ETH_LINK_SPEED_25G;
708 case ETH_SPEED_NUM_40G:
709 return ETH_LINK_SPEED_40G;
710 case ETH_SPEED_NUM_50G:
711 return ETH_LINK_SPEED_50G;
712 case ETH_SPEED_NUM_56G:
713 return ETH_LINK_SPEED_56G;
714 case ETH_SPEED_NUM_100G:
715 return ETH_LINK_SPEED_100G;
722 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
723 const struct rte_eth_conf *dev_conf)
725 struct rte_eth_dev *dev;
726 struct rte_eth_dev_info dev_info;
729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
731 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
733 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
734 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
738 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
740 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
741 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
745 dev = &rte_eth_devices[port_id];
747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
750 if (dev->data->dev_started) {
752 "port %d must be stopped to allow configuration\n", port_id);
756 /* Copy the dev_conf parameter into the dev structure */
757 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
760 * Check that the numbers of RX and TX queues are not greater
761 * than the maximum number of RX and TX queues supported by the
764 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
766 if (nb_rx_q == 0 && nb_tx_q == 0) {
767 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
771 if (nb_rx_q > dev_info.max_rx_queues) {
772 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
773 port_id, nb_rx_q, dev_info.max_rx_queues);
777 if (nb_tx_q > dev_info.max_tx_queues) {
778 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
779 port_id, nb_tx_q, dev_info.max_tx_queues);
784 * If link state interrupt is enabled, check that the
785 * device supports it.
787 if ((dev_conf->intr_conf.lsc == 1) &&
788 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
789 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
790 dev->data->drv_name);
795 * If jumbo frames are enabled, check that the maximum RX packet
796 * length is supported by the configured device.
798 if (dev_conf->rxmode.jumbo_frame == 1) {
799 if (dev_conf->rxmode.max_rx_pkt_len >
800 dev_info.max_rx_pktlen) {
801 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
802 " > max valid value %u\n",
804 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
805 (unsigned)dev_info.max_rx_pktlen);
807 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
808 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
809 " < min valid value %u\n",
811 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
812 (unsigned)ETHER_MIN_LEN);
816 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
817 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
818 /* Use default value */
819 dev->data->dev_conf.rxmode.max_rx_pkt_len =
824 * Setup new number of RX/TX queues and reconfigure device.
826 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
828 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
833 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
835 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
837 rte_eth_dev_rx_queue_config(dev, 0);
841 diag = (*dev->dev_ops->dev_configure)(dev);
843 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
845 rte_eth_dev_rx_queue_config(dev, 0);
846 rte_eth_dev_tx_queue_config(dev, 0);
854 rte_eth_dev_config_restore(uint8_t port_id)
856 struct rte_eth_dev *dev;
857 struct rte_eth_dev_info dev_info;
858 struct ether_addr addr;
862 dev = &rte_eth_devices[port_id];
864 rte_eth_dev_info_get(port_id, &dev_info);
866 if (RTE_ETH_DEV_SRIOV(dev).active)
867 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
869 /* replay MAC address configuration */
870 for (i = 0; i < dev_info.max_mac_addrs; i++) {
871 addr = dev->data->mac_addrs[i];
873 /* skip zero address */
874 if (is_zero_ether_addr(&addr))
877 /* add address to the hardware */
878 if (*dev->dev_ops->mac_addr_add &&
879 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
880 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
882 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
884 /* exit the loop but not return an error */
889 /* replay promiscuous configuration */
890 if (rte_eth_promiscuous_get(port_id) == 1)
891 rte_eth_promiscuous_enable(port_id);
892 else if (rte_eth_promiscuous_get(port_id) == 0)
893 rte_eth_promiscuous_disable(port_id);
895 /* replay all multicast configuration */
896 if (rte_eth_allmulticast_get(port_id) == 1)
897 rte_eth_allmulticast_enable(port_id);
898 else if (rte_eth_allmulticast_get(port_id) == 0)
899 rte_eth_allmulticast_disable(port_id);
903 rte_eth_dev_start(uint8_t port_id)
905 struct rte_eth_dev *dev;
908 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
910 dev = &rte_eth_devices[port_id];
912 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
914 if (dev->data->dev_started != 0) {
915 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
916 " already started\n",
921 diag = (*dev->dev_ops->dev_start)(dev);
923 dev->data->dev_started = 1;
927 rte_eth_dev_config_restore(port_id);
929 if (dev->data->dev_conf.intr_conf.lsc == 0) {
930 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
931 (*dev->dev_ops->link_update)(dev, 0);
937 rte_eth_dev_stop(uint8_t port_id)
939 struct rte_eth_dev *dev;
941 RTE_ETH_VALID_PORTID_OR_RET(port_id);
942 dev = &rte_eth_devices[port_id];
944 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
946 if (dev->data->dev_started == 0) {
947 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
948 " already stopped\n",
953 dev->data->dev_started = 0;
954 (*dev->dev_ops->dev_stop)(dev);
958 rte_eth_dev_set_link_up(uint8_t port_id)
960 struct rte_eth_dev *dev;
962 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
964 dev = &rte_eth_devices[port_id];
966 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
967 return (*dev->dev_ops->dev_set_link_up)(dev);
971 rte_eth_dev_set_link_down(uint8_t port_id)
973 struct rte_eth_dev *dev;
975 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
977 dev = &rte_eth_devices[port_id];
979 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
980 return (*dev->dev_ops->dev_set_link_down)(dev);
984 rte_eth_dev_close(uint8_t port_id)
986 struct rte_eth_dev *dev;
988 RTE_ETH_VALID_PORTID_OR_RET(port_id);
989 dev = &rte_eth_devices[port_id];
991 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
992 dev->data->dev_started = 0;
993 (*dev->dev_ops->dev_close)(dev);
995 rte_free(dev->data->rx_queues);
996 dev->data->rx_queues = NULL;
997 rte_free(dev->data->tx_queues);
998 dev->data->tx_queues = NULL;
1002 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1003 uint16_t nb_rx_desc, unsigned int socket_id,
1004 const struct rte_eth_rxconf *rx_conf,
1005 struct rte_mempool *mp)
1008 uint32_t mbp_buf_size;
1009 struct rte_eth_dev *dev;
1010 struct rte_eth_dev_info dev_info;
1013 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1015 dev = &rte_eth_devices[port_id];
1016 if (rx_queue_id >= dev->data->nb_rx_queues) {
1017 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1021 if (dev->data->dev_started) {
1022 RTE_PMD_DEBUG_TRACE(
1023 "port %d must be stopped to allow configuration\n", port_id);
1027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1031 * Check the size of the mbuf data buffer.
1032 * This value must be provided in the private data of the memory pool.
1033 * First check that the memory pool has a valid private data.
1035 rte_eth_dev_info_get(port_id, &dev_info);
1036 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1037 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1038 mp->name, (int) mp->private_data_size,
1039 (int) sizeof(struct rte_pktmbuf_pool_private));
1042 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1044 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1045 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1046 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1050 (int)(RTE_PKTMBUF_HEADROOM +
1051 dev_info.min_rx_bufsize),
1052 (int)RTE_PKTMBUF_HEADROOM,
1053 (int)dev_info.min_rx_bufsize);
1057 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1058 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1059 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1061 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1062 "should be: <= %hu, = %hu, and a product of %hu\n",
1064 dev_info.rx_desc_lim.nb_max,
1065 dev_info.rx_desc_lim.nb_min,
1066 dev_info.rx_desc_lim.nb_align);
1070 rxq = dev->data->rx_queues;
1071 if (rxq[rx_queue_id]) {
1072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1074 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1075 rxq[rx_queue_id] = NULL;
1078 if (rx_conf == NULL)
1079 rx_conf = &dev_info.default_rxconf;
1081 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1082 socket_id, rx_conf, mp);
1084 if (!dev->data->min_rx_buf_size ||
1085 dev->data->min_rx_buf_size > mbp_buf_size)
1086 dev->data->min_rx_buf_size = mbp_buf_size;
1093 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1094 uint16_t nb_tx_desc, unsigned int socket_id,
1095 const struct rte_eth_txconf *tx_conf)
1097 struct rte_eth_dev *dev;
1098 struct rte_eth_dev_info dev_info;
1101 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1103 dev = &rte_eth_devices[port_id];
1104 if (tx_queue_id >= dev->data->nb_tx_queues) {
1105 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1109 if (dev->data->dev_started) {
1110 RTE_PMD_DEBUG_TRACE(
1111 "port %d must be stopped to allow configuration\n", port_id);
1115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1116 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1118 rte_eth_dev_info_get(port_id, &dev_info);
1120 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1121 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1122 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1123 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1124 "should be: <= %hu, = %hu, and a product of %hu\n",
1126 dev_info.tx_desc_lim.nb_max,
1127 dev_info.tx_desc_lim.nb_min,
1128 dev_info.tx_desc_lim.nb_align);
1132 txq = dev->data->tx_queues;
1133 if (txq[tx_queue_id]) {
1134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1136 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1137 txq[tx_queue_id] = NULL;
1140 if (tx_conf == NULL)
1141 tx_conf = &dev_info.default_txconf;
1143 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1144 socket_id, tx_conf);
1148 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1149 void *userdata __rte_unused)
1153 for (i = 0; i < unsent; i++)
1154 rte_pktmbuf_free(pkts[i]);
1158 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1161 uint64_t *count = userdata;
1164 for (i = 0; i < unsent; i++)
1165 rte_pktmbuf_free(pkts[i]);
1171 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1172 buffer_tx_error_fn cbfn, void *userdata)
1174 buffer->error_callback = cbfn;
1175 buffer->error_userdata = userdata;
1180 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1187 buffer->size = size;
1188 if (buffer->error_callback == NULL) {
1189 ret = rte_eth_tx_buffer_set_err_callback(
1190 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1197 rte_eth_promiscuous_enable(uint8_t port_id)
1199 struct rte_eth_dev *dev;
1201 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1202 dev = &rte_eth_devices[port_id];
1204 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1205 (*dev->dev_ops->promiscuous_enable)(dev);
1206 dev->data->promiscuous = 1;
1210 rte_eth_promiscuous_disable(uint8_t port_id)
1212 struct rte_eth_dev *dev;
1214 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1215 dev = &rte_eth_devices[port_id];
1217 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1218 dev->data->promiscuous = 0;
1219 (*dev->dev_ops->promiscuous_disable)(dev);
1223 rte_eth_promiscuous_get(uint8_t port_id)
1225 struct rte_eth_dev *dev;
1227 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1229 dev = &rte_eth_devices[port_id];
1230 return dev->data->promiscuous;
1234 rte_eth_allmulticast_enable(uint8_t port_id)
1236 struct rte_eth_dev *dev;
1238 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1239 dev = &rte_eth_devices[port_id];
1241 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1242 (*dev->dev_ops->allmulticast_enable)(dev);
1243 dev->data->all_multicast = 1;
1247 rte_eth_allmulticast_disable(uint8_t port_id)
1249 struct rte_eth_dev *dev;
1251 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1252 dev = &rte_eth_devices[port_id];
1254 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1255 dev->data->all_multicast = 0;
1256 (*dev->dev_ops->allmulticast_disable)(dev);
1260 rte_eth_allmulticast_get(uint8_t port_id)
1262 struct rte_eth_dev *dev;
1264 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1266 dev = &rte_eth_devices[port_id];
1267 return dev->data->all_multicast;
1271 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1272 struct rte_eth_link *link)
1274 struct rte_eth_link *dst = link;
1275 struct rte_eth_link *src = &(dev->data->dev_link);
1277 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1278 *(uint64_t *)src) == 0)
1285 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1287 struct rte_eth_dev *dev;
1289 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1290 dev = &rte_eth_devices[port_id];
1292 if (dev->data->dev_conf.intr_conf.lsc != 0)
1293 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1295 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1296 (*dev->dev_ops->link_update)(dev, 1);
1297 *eth_link = dev->data->dev_link;
1302 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1304 struct rte_eth_dev *dev;
1306 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1307 dev = &rte_eth_devices[port_id];
1309 if (dev->data->dev_conf.intr_conf.lsc != 0)
1310 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1312 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1313 (*dev->dev_ops->link_update)(dev, 0);
1314 *eth_link = dev->data->dev_link;
1319 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1321 struct rte_eth_dev *dev;
1323 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1325 dev = &rte_eth_devices[port_id];
1326 memset(stats, 0, sizeof(*stats));
1328 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1329 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1330 (*dev->dev_ops->stats_get)(dev, stats);
1335 rte_eth_stats_reset(uint8_t port_id)
1337 struct rte_eth_dev *dev;
1339 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1340 dev = &rte_eth_devices[port_id];
1342 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1343 (*dev->dev_ops->stats_reset)(dev);
1344 dev->data->rx_mbuf_alloc_failed = 0;
1348 get_xstats_count(uint8_t port_id)
1350 struct rte_eth_dev *dev;
1353 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1354 dev = &rte_eth_devices[port_id];
1355 if (dev->dev_ops->xstats_get_names != NULL) {
1356 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1361 count += RTE_NB_STATS;
1362 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1364 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1370 rte_eth_xstats_get_names(uint8_t port_id,
1371 struct rte_eth_xstat_name *xstats_names,
1374 struct rte_eth_dev *dev;
1375 int cnt_used_entries;
1376 int cnt_expected_entries;
1377 int cnt_driver_entries;
1378 uint32_t idx, id_queue;
1381 cnt_expected_entries = get_xstats_count(port_id);
1382 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1383 (int)size < cnt_expected_entries)
1384 return cnt_expected_entries;
1386 /* port_id checked in get_xstats_count() */
1387 dev = &rte_eth_devices[port_id];
1388 cnt_used_entries = 0;
1390 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1391 snprintf(xstats_names[cnt_used_entries].name,
1392 sizeof(xstats_names[0].name),
1393 "%s", rte_stats_strings[idx].name);
1396 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1397 for (id_queue = 0; id_queue < num_q; id_queue++) {
1398 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1399 snprintf(xstats_names[cnt_used_entries].name,
1400 sizeof(xstats_names[0].name),
1402 id_queue, rte_rxq_stats_strings[idx].name);
1407 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1408 for (id_queue = 0; id_queue < num_q; id_queue++) {
1409 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1410 snprintf(xstats_names[cnt_used_entries].name,
1411 sizeof(xstats_names[0].name),
1413 id_queue, rte_txq_stats_strings[idx].name);
1418 if (dev->dev_ops->xstats_get_names != NULL) {
1419 /* If there are any driver-specific xstats, append them
1422 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1424 xstats_names + cnt_used_entries,
1425 size - cnt_used_entries);
1426 if (cnt_driver_entries < 0)
1427 return cnt_driver_entries;
1428 cnt_used_entries += cnt_driver_entries;
1431 return cnt_used_entries;
1434 /* retrieve ethdev extended statistics */
1436 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1439 struct rte_eth_stats eth_stats;
1440 struct rte_eth_dev *dev;
1441 unsigned count = 0, i, q;
1443 uint64_t val, *stats_ptr;
1444 uint16_t nb_rxqs, nb_txqs;
1446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1448 dev = &rte_eth_devices[port_id];
1450 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1451 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1453 /* Return generic statistics */
1454 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1455 (nb_txqs * RTE_NB_TXQ_STATS);
1457 /* implemented by the driver */
1458 if (dev->dev_ops->xstats_get != NULL) {
1459 /* Retrieve the xstats from the driver at the end of the
1462 xcount = (*dev->dev_ops->xstats_get)(dev,
1463 xstats ? xstats + count : NULL,
1464 (n > count) ? n - count : 0);
1470 if (n < count + xcount || xstats == NULL)
1471 return count + xcount;
1473 /* now fill the xstats structure */
1475 rte_eth_stats_get(port_id, ð_stats);
1478 for (i = 0; i < RTE_NB_STATS; i++) {
1479 stats_ptr = RTE_PTR_ADD(ð_stats,
1480 rte_stats_strings[i].offset);
1482 xstats[count++].value = val;
1486 for (q = 0; q < nb_rxqs; q++) {
1487 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1488 stats_ptr = RTE_PTR_ADD(ð_stats,
1489 rte_rxq_stats_strings[i].offset +
1490 q * sizeof(uint64_t));
1492 xstats[count++].value = val;
1497 for (q = 0; q < nb_txqs; q++) {
1498 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1499 stats_ptr = RTE_PTR_ADD(ð_stats,
1500 rte_txq_stats_strings[i].offset +
1501 q * sizeof(uint64_t));
1503 xstats[count++].value = val;
1507 for (i = 0; i < count + xcount; i++)
1510 return count + xcount;
1513 /* reset ethdev extended statistics */
1515 rte_eth_xstats_reset(uint8_t port_id)
1517 struct rte_eth_dev *dev;
1519 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1520 dev = &rte_eth_devices[port_id];
1522 /* implemented by the driver */
1523 if (dev->dev_ops->xstats_reset != NULL) {
1524 (*dev->dev_ops->xstats_reset)(dev);
1528 /* fallback to default */
1529 rte_eth_stats_reset(port_id);
1533 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1536 struct rte_eth_dev *dev;
1538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1540 dev = &rte_eth_devices[port_id];
1542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1543 return (*dev->dev_ops->queue_stats_mapping_set)
1544 (dev, queue_id, stat_idx, is_rx);
1549 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1552 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1558 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1561 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1566 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1568 struct rte_eth_dev *dev;
1569 const struct rte_eth_desc_lim lim = {
1570 .nb_max = UINT16_MAX,
1575 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1576 dev = &rte_eth_devices[port_id];
1578 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1579 dev_info->rx_desc_lim = lim;
1580 dev_info->tx_desc_lim = lim;
1582 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1583 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1584 dev_info->pci_dev = dev->pci_dev;
1585 dev_info->driver_name = dev->data->drv_name;
1586 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1587 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1591 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1592 uint32_t *ptypes, int num)
1595 struct rte_eth_dev *dev;
1596 const uint32_t *all_ptypes;
1598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1599 dev = &rte_eth_devices[port_id];
1600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1601 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1606 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1607 if (all_ptypes[i] & ptype_mask) {
1609 ptypes[j] = all_ptypes[i];
1617 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1619 struct rte_eth_dev *dev;
1621 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1622 dev = &rte_eth_devices[port_id];
1623 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1628 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1630 struct rte_eth_dev *dev;
1632 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1634 dev = &rte_eth_devices[port_id];
1635 *mtu = dev->data->mtu;
1640 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1643 struct rte_eth_dev *dev;
1645 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1646 dev = &rte_eth_devices[port_id];
1647 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1649 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1651 dev->data->mtu = mtu;
1657 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1659 struct rte_eth_dev *dev;
1661 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1662 dev = &rte_eth_devices[port_id];
1663 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1664 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1668 if (vlan_id > 4095) {
1669 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1670 port_id, (unsigned) vlan_id);
1673 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1675 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1679 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1681 struct rte_eth_dev *dev;
1683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1684 dev = &rte_eth_devices[port_id];
1685 if (rx_queue_id >= dev->data->nb_rx_queues) {
1686 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1690 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1691 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1697 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1698 enum rte_vlan_type vlan_type,
1701 struct rte_eth_dev *dev;
1703 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1704 dev = &rte_eth_devices[port_id];
1705 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1707 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1711 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1713 struct rte_eth_dev *dev;
1718 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1719 dev = &rte_eth_devices[port_id];
1721 /*check which option changed by application*/
1722 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1723 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1725 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1726 mask |= ETH_VLAN_STRIP_MASK;
1729 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1730 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1732 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1733 mask |= ETH_VLAN_FILTER_MASK;
1736 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1737 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1739 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1740 mask |= ETH_VLAN_EXTEND_MASK;
1747 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1748 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1754 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1756 struct rte_eth_dev *dev;
1759 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1760 dev = &rte_eth_devices[port_id];
1762 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1763 ret |= ETH_VLAN_STRIP_OFFLOAD;
1765 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1766 ret |= ETH_VLAN_FILTER_OFFLOAD;
1768 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1769 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1775 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1777 struct rte_eth_dev *dev;
1779 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1780 dev = &rte_eth_devices[port_id];
1781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1782 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1788 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1790 struct rte_eth_dev *dev;
1792 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1793 dev = &rte_eth_devices[port_id];
1794 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1795 memset(fc_conf, 0, sizeof(*fc_conf));
1796 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1800 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1802 struct rte_eth_dev *dev;
1804 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1805 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1806 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1810 dev = &rte_eth_devices[port_id];
1811 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1812 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1816 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1818 struct rte_eth_dev *dev;
1820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1821 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1822 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1826 dev = &rte_eth_devices[port_id];
1827 /* High water, low water validation are device specific */
1828 if (*dev->dev_ops->priority_flow_ctrl_set)
1829 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1834 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1842 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1843 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1844 RTE_RETA_GROUP_SIZE);
1848 num = reta_size / RTE_RETA_GROUP_SIZE;
1849 for (i = 0; i < num; i++) {
1850 if (reta_conf[i].mask)
1858 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1862 uint16_t i, idx, shift;
1868 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1872 for (i = 0; i < reta_size; i++) {
1873 idx = i / RTE_RETA_GROUP_SIZE;
1874 shift = i % RTE_RETA_GROUP_SIZE;
1875 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1876 (reta_conf[idx].reta[shift] >= max_rxq)) {
1877 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1878 "the maximum rxq index: %u\n", idx, shift,
1879 reta_conf[idx].reta[shift], max_rxq);
1888 rte_eth_dev_rss_reta_update(uint8_t port_id,
1889 struct rte_eth_rss_reta_entry64 *reta_conf,
1892 struct rte_eth_dev *dev;
1895 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1896 /* Check mask bits */
1897 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1901 dev = &rte_eth_devices[port_id];
1903 /* Check entry value */
1904 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1905 dev->data->nb_rx_queues);
1909 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1910 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1914 rte_eth_dev_rss_reta_query(uint8_t port_id,
1915 struct rte_eth_rss_reta_entry64 *reta_conf,
1918 struct rte_eth_dev *dev;
1921 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1923 /* Check mask bits */
1924 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1928 dev = &rte_eth_devices[port_id];
1929 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1930 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
1934 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
1936 struct rte_eth_dev *dev;
1937 uint16_t rss_hash_protos;
1939 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1940 rss_hash_protos = rss_conf->rss_hf;
1941 if ((rss_hash_protos != 0) &&
1942 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
1943 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
1947 dev = &rte_eth_devices[port_id];
1948 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
1949 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
1953 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
1954 struct rte_eth_rss_conf *rss_conf)
1956 struct rte_eth_dev *dev;
1958 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1959 dev = &rte_eth_devices[port_id];
1960 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
1961 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
1965 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
1966 struct rte_eth_udp_tunnel *udp_tunnel)
1968 struct rte_eth_dev *dev;
1970 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1971 if (udp_tunnel == NULL) {
1972 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
1976 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
1977 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
1981 dev = &rte_eth_devices[port_id];
1982 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
1983 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
1987 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
1988 struct rte_eth_udp_tunnel *udp_tunnel)
1990 struct rte_eth_dev *dev;
1992 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1993 dev = &rte_eth_devices[port_id];
1995 if (udp_tunnel == NULL) {
1996 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2000 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2001 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2005 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2006 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2010 rte_eth_led_on(uint8_t port_id)
2012 struct rte_eth_dev *dev;
2014 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2015 dev = &rte_eth_devices[port_id];
2016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2017 return (*dev->dev_ops->dev_led_on)(dev);
2021 rte_eth_led_off(uint8_t port_id)
2023 struct rte_eth_dev *dev;
2025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2026 dev = &rte_eth_devices[port_id];
2027 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2028 return (*dev->dev_ops->dev_led_off)(dev);
2032 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2036 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2038 struct rte_eth_dev_info dev_info;
2039 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2042 rte_eth_dev_info_get(port_id, &dev_info);
2044 for (i = 0; i < dev_info.max_mac_addrs; i++)
2045 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2051 static const struct ether_addr null_mac_addr;
2054 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2057 struct rte_eth_dev *dev;
2061 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2062 dev = &rte_eth_devices[port_id];
2063 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2065 if (is_zero_ether_addr(addr)) {
2066 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2070 if (pool >= ETH_64_POOLS) {
2071 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2075 index = get_mac_addr_index(port_id, addr);
2077 index = get_mac_addr_index(port_id, &null_mac_addr);
2079 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2084 pool_mask = dev->data->mac_pool_sel[index];
2086 /* Check if both MAC address and pool is already there, and do nothing */
2087 if (pool_mask & (1ULL << pool))
2092 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2094 /* Update address in NIC data structure */
2095 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2097 /* Update pool bitmap in NIC data structure */
2098 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2104 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2106 struct rte_eth_dev *dev;
2109 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2110 dev = &rte_eth_devices[port_id];
2111 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2113 index = get_mac_addr_index(port_id, addr);
2115 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2117 } else if (index < 0)
2118 return 0; /* Do nothing if address wasn't found */
2121 (*dev->dev_ops->mac_addr_remove)(dev, index);
2123 /* Update address in NIC data structure */
2124 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2126 /* reset pool bitmap */
2127 dev->data->mac_pool_sel[index] = 0;
2133 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2135 struct rte_eth_dev *dev;
2137 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2139 if (!is_valid_assigned_ether_addr(addr))
2142 dev = &rte_eth_devices[port_id];
2143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2145 /* Update default address in NIC data structure */
2146 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2148 (*dev->dev_ops->mac_addr_set)(dev, addr);
2154 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2155 uint16_t rx_mode, uint8_t on)
2158 struct rte_eth_dev *dev;
2159 struct rte_eth_dev_info dev_info;
2161 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2163 dev = &rte_eth_devices[port_id];
2164 rte_eth_dev_info_get(port_id, &dev_info);
2166 num_vfs = dev_info.max_vfs;
2168 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2173 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2176 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2177 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2181 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2185 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2187 struct rte_eth_dev_info dev_info;
2188 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2191 rte_eth_dev_info_get(port_id, &dev_info);
2192 if (!dev->data->hash_mac_addrs)
2195 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2196 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2197 ETHER_ADDR_LEN) == 0)
2204 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2209 struct rte_eth_dev *dev;
2211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2213 dev = &rte_eth_devices[port_id];
2214 if (is_zero_ether_addr(addr)) {
2215 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2220 index = get_hash_mac_addr_index(port_id, addr);
2221 /* Check if it's already there, and do nothing */
2222 if ((index >= 0) && (on))
2227 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2228 "set in UTA\n", port_id);
2232 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2234 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2240 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2241 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2243 /* Update address in NIC data structure */
2245 ether_addr_copy(addr,
2246 &dev->data->hash_mac_addrs[index]);
2248 ether_addr_copy(&null_mac_addr,
2249 &dev->data->hash_mac_addrs[index]);
2256 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2258 struct rte_eth_dev *dev;
2260 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2262 dev = &rte_eth_devices[port_id];
2264 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2265 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2269 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2272 struct rte_eth_dev *dev;
2273 struct rte_eth_dev_info dev_info;
2275 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2277 dev = &rte_eth_devices[port_id];
2278 rte_eth_dev_info_get(port_id, &dev_info);
2280 num_vfs = dev_info.max_vfs;
2282 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2286 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2287 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2291 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2294 struct rte_eth_dev *dev;
2295 struct rte_eth_dev_info dev_info;
2297 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2299 dev = &rte_eth_devices[port_id];
2300 rte_eth_dev_info_get(port_id, &dev_info);
2302 num_vfs = dev_info.max_vfs;
2304 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2309 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2313 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2314 uint64_t vf_mask, uint8_t vlan_on)
2316 struct rte_eth_dev *dev;
2318 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2320 dev = &rte_eth_devices[port_id];
2322 if (vlan_id > ETHER_MAX_VLAN_ID) {
2323 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2329 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2334 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2338 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2341 struct rte_eth_dev *dev;
2342 struct rte_eth_dev_info dev_info;
2343 struct rte_eth_link link;
2345 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2347 dev = &rte_eth_devices[port_id];
2348 rte_eth_dev_info_get(port_id, &dev_info);
2349 link = dev->data->dev_link;
2351 if (queue_idx > dev_info.max_tx_queues) {
2352 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2353 "invalid queue id=%d\n", port_id, queue_idx);
2357 if (tx_rate > link.link_speed) {
2358 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2359 "bigger than link speed= %d\n",
2360 tx_rate, link.link_speed);
2364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2365 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2368 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2371 struct rte_eth_dev *dev;
2372 struct rte_eth_dev_info dev_info;
2373 struct rte_eth_link link;
2378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2380 dev = &rte_eth_devices[port_id];
2381 rte_eth_dev_info_get(port_id, &dev_info);
2382 link = dev->data->dev_link;
2384 if (vf > dev_info.max_vfs) {
2385 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2386 "invalid vf id=%d\n", port_id, vf);
2390 if (tx_rate > link.link_speed) {
2391 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2392 "bigger than link speed= %d\n",
2393 tx_rate, link.link_speed);
2397 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2398 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2402 rte_eth_mirror_rule_set(uint8_t port_id,
2403 struct rte_eth_mirror_conf *mirror_conf,
2404 uint8_t rule_id, uint8_t on)
2406 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2409 if (mirror_conf->rule_type == 0) {
2410 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2414 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2415 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2420 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2421 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2422 (mirror_conf->pool_mask == 0)) {
2423 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2427 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2428 mirror_conf->vlan.vlan_mask == 0) {
2429 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2433 dev = &rte_eth_devices[port_id];
2434 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2436 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2440 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2442 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2444 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2446 dev = &rte_eth_devices[port_id];
2447 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2449 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2453 rte_eth_dev_callback_register(uint8_t port_id,
2454 enum rte_eth_event_type event,
2455 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2457 struct rte_eth_dev *dev;
2458 struct rte_eth_dev_callback *user_cb;
2463 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2465 dev = &rte_eth_devices[port_id];
2466 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2468 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2469 if (user_cb->cb_fn == cb_fn &&
2470 user_cb->cb_arg == cb_arg &&
2471 user_cb->event == event) {
2476 /* create a new callback. */
2477 if (user_cb == NULL) {
2478 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2479 sizeof(struct rte_eth_dev_callback), 0);
2480 if (user_cb != NULL) {
2481 user_cb->cb_fn = cb_fn;
2482 user_cb->cb_arg = cb_arg;
2483 user_cb->event = event;
2484 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2488 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2489 return (user_cb == NULL) ? -ENOMEM : 0;
2493 rte_eth_dev_callback_unregister(uint8_t port_id,
2494 enum rte_eth_event_type event,
2495 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2498 struct rte_eth_dev *dev;
2499 struct rte_eth_dev_callback *cb, *next;
2504 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2506 dev = &rte_eth_devices[port_id];
2507 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2510 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2512 next = TAILQ_NEXT(cb, next);
2514 if (cb->cb_fn != cb_fn || cb->event != event ||
2515 (cb->cb_arg != (void *)-1 &&
2516 cb->cb_arg != cb_arg))
2520 * if this callback is not executing right now,
2523 if (cb->active == 0) {
2524 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2531 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2536 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2537 enum rte_eth_event_type event, void *cb_arg)
2539 struct rte_eth_dev_callback *cb_lst;
2540 struct rte_eth_dev_callback dev_cb;
2542 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2543 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2544 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2549 dev_cb.cb_arg = (void *) cb_arg;
2551 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2552 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2554 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2557 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2561 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2564 struct rte_eth_dev *dev;
2565 struct rte_intr_handle *intr_handle;
2569 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2571 dev = &rte_eth_devices[port_id];
2572 intr_handle = &dev->pci_dev->intr_handle;
2573 if (!intr_handle->intr_vec) {
2574 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2578 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2579 vec = intr_handle->intr_vec[qid];
2580 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2581 if (rc && rc != -EEXIST) {
2582 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2583 " op %d epfd %d vec %u\n",
2584 port_id, qid, op, epfd, vec);
2591 const struct rte_memzone *
2592 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2593 uint16_t queue_id, size_t size, unsigned align,
2596 char z_name[RTE_MEMZONE_NAMESIZE];
2597 const struct rte_memzone *mz;
2599 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2600 dev->driver->pci_drv.driver.name, ring_name,
2601 dev->data->port_id, queue_id);
2603 mz = rte_memzone_lookup(z_name);
2607 if (rte_xen_dom0_supported())
2608 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2609 0, align, RTE_PGSIZE_2M);
2611 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2616 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2617 int epfd, int op, void *data)
2620 struct rte_eth_dev *dev;
2621 struct rte_intr_handle *intr_handle;
2624 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2626 dev = &rte_eth_devices[port_id];
2627 if (queue_id >= dev->data->nb_rx_queues) {
2628 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2632 intr_handle = &dev->pci_dev->intr_handle;
2633 if (!intr_handle->intr_vec) {
2634 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2638 vec = intr_handle->intr_vec[queue_id];
2639 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2640 if (rc && rc != -EEXIST) {
2641 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2642 " op %d epfd %d vec %u\n",
2643 port_id, queue_id, op, epfd, vec);
2651 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2658 dev = &rte_eth_devices[port_id];
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2661 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2665 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2668 struct rte_eth_dev *dev;
2670 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2672 dev = &rte_eth_devices[port_id];
2674 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2675 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2678 #ifdef RTE_NIC_BYPASS
2679 int rte_eth_dev_bypass_init(uint8_t port_id)
2681 struct rte_eth_dev *dev;
2683 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2685 dev = &rte_eth_devices[port_id];
2686 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2687 (*dev->dev_ops->bypass_init)(dev);
2692 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2694 struct rte_eth_dev *dev;
2696 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2698 dev = &rte_eth_devices[port_id];
2699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2700 (*dev->dev_ops->bypass_state_show)(dev, state);
2705 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2707 struct rte_eth_dev *dev;
2709 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2711 dev = &rte_eth_devices[port_id];
2712 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2713 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2718 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2720 struct rte_eth_dev *dev;
2722 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2724 dev = &rte_eth_devices[port_id];
2725 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2726 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2731 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2733 struct rte_eth_dev *dev;
2735 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2737 dev = &rte_eth_devices[port_id];
2739 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2740 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2745 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2747 struct rte_eth_dev *dev;
2749 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2751 dev = &rte_eth_devices[port_id];
2753 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2754 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2759 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2761 struct rte_eth_dev *dev;
2763 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2765 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2768 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2773 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2775 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2779 dev = &rte_eth_devices[port_id];
2781 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2782 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2787 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2789 struct rte_eth_dev *dev;
2791 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2793 dev = &rte_eth_devices[port_id];
2795 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2796 (*dev->dev_ops->bypass_wd_reset)(dev);
2802 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2804 struct rte_eth_dev *dev;
2806 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2808 dev = &rte_eth_devices[port_id];
2809 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2810 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2811 RTE_ETH_FILTER_NOP, NULL);
2815 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2816 enum rte_filter_op filter_op, void *arg)
2818 struct rte_eth_dev *dev;
2820 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2822 dev = &rte_eth_devices[port_id];
2823 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2824 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2828 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2829 rte_rx_callback_fn fn, void *user_param)
2831 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2832 rte_errno = ENOTSUP;
2835 /* check input parameters */
2836 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2837 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2841 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2849 cb->param = user_param;
2851 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2852 /* Add the callbacks in fifo order. */
2853 struct rte_eth_rxtx_callback *tail =
2854 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2857 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2864 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2870 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2871 rte_rx_callback_fn fn, void *user_param)
2873 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2874 rte_errno = ENOTSUP;
2877 /* check input parameters */
2878 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2879 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2884 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2892 cb->param = user_param;
2894 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2895 /* Add the callbacks at fisrt position*/
2896 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2898 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2899 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2905 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2906 rte_tx_callback_fn fn, void *user_param)
2908 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2909 rte_errno = ENOTSUP;
2912 /* check input parameters */
2913 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2914 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2919 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2927 cb->param = user_param;
2929 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2930 /* Add the callbacks in fifo order. */
2931 struct rte_eth_rxtx_callback *tail =
2932 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
2935 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
2942 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
2948 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
2949 struct rte_eth_rxtx_callback *user_cb)
2951 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2954 /* Check input parameters. */
2955 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2956 if (user_cb == NULL ||
2957 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
2960 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2961 struct rte_eth_rxtx_callback *cb;
2962 struct rte_eth_rxtx_callback **prev_cb;
2965 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2966 prev_cb = &dev->post_rx_burst_cbs[queue_id];
2967 for (; *prev_cb != NULL; prev_cb = &cb->next) {
2969 if (cb == user_cb) {
2970 /* Remove the user cb from the callback list. */
2971 *prev_cb = cb->next;
2976 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2982 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
2983 struct rte_eth_rxtx_callback *user_cb)
2985 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2988 /* Check input parameters. */
2989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2990 if (user_cb == NULL ||
2991 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
2994 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2996 struct rte_eth_rxtx_callback *cb;
2997 struct rte_eth_rxtx_callback **prev_cb;
2999 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3000 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3001 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3003 if (cb == user_cb) {
3004 /* Remove the user cb from the callback list. */
3005 *prev_cb = cb->next;
3010 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3016 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3017 struct rte_eth_rxq_info *qinfo)
3019 struct rte_eth_dev *dev;
3021 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3026 dev = &rte_eth_devices[port_id];
3027 if (queue_id >= dev->data->nb_rx_queues) {
3028 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3034 memset(qinfo, 0, sizeof(*qinfo));
3035 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3040 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3041 struct rte_eth_txq_info *qinfo)
3043 struct rte_eth_dev *dev;
3045 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3050 dev = &rte_eth_devices[port_id];
3051 if (queue_id >= dev->data->nb_tx_queues) {
3052 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3056 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3058 memset(qinfo, 0, sizeof(*qinfo));
3059 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3064 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3065 struct ether_addr *mc_addr_set,
3066 uint32_t nb_mc_addr)
3068 struct rte_eth_dev *dev;
3070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3072 dev = &rte_eth_devices[port_id];
3073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3074 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3078 rte_eth_timesync_enable(uint8_t port_id)
3080 struct rte_eth_dev *dev;
3082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3083 dev = &rte_eth_devices[port_id];
3085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3086 return (*dev->dev_ops->timesync_enable)(dev);
3090 rte_eth_timesync_disable(uint8_t port_id)
3092 struct rte_eth_dev *dev;
3094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3095 dev = &rte_eth_devices[port_id];
3097 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3098 return (*dev->dev_ops->timesync_disable)(dev);
3102 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3105 struct rte_eth_dev *dev;
3107 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3108 dev = &rte_eth_devices[port_id];
3110 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3111 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3115 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3117 struct rte_eth_dev *dev;
3119 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3120 dev = &rte_eth_devices[port_id];
3122 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3123 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3127 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3129 struct rte_eth_dev *dev;
3131 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3132 dev = &rte_eth_devices[port_id];
3134 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3135 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3139 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3141 struct rte_eth_dev *dev;
3143 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3144 dev = &rte_eth_devices[port_id];
3146 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3147 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3151 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3153 struct rte_eth_dev *dev;
3155 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3156 dev = &rte_eth_devices[port_id];
3158 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3159 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3163 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3165 struct rte_eth_dev *dev;
3167 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3169 dev = &rte_eth_devices[port_id];
3170 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3171 return (*dev->dev_ops->get_reg)(dev, info);
3175 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3177 struct rte_eth_dev *dev;
3179 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3181 dev = &rte_eth_devices[port_id];
3182 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3183 return (*dev->dev_ops->get_eeprom_length)(dev);
3187 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3189 struct rte_eth_dev *dev;
3191 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3193 dev = &rte_eth_devices[port_id];
3194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3195 return (*dev->dev_ops->get_eeprom)(dev, info);
3199 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3201 struct rte_eth_dev *dev;
3203 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3205 dev = &rte_eth_devices[port_id];
3206 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3207 return (*dev->dev_ops->set_eeprom)(dev, info);
3211 rte_eth_dev_get_dcb_info(uint8_t port_id,
3212 struct rte_eth_dcb_info *dcb_info)
3214 struct rte_eth_dev *dev;
3216 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3218 dev = &rte_eth_devices[port_id];
3219 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3221 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3222 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3226 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3228 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3229 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3234 eth_dev->data->dev_flags = 0;
3235 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3236 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3237 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3238 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3240 eth_dev->data->kdrv = pci_dev->kdrv;
3241 eth_dev->data->numa_node = pci_dev->device.numa_node;
3242 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3246 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3247 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3249 struct rte_eth_dev *dev;
3251 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3252 if (l2_tunnel == NULL) {
3253 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3257 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3258 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3262 dev = &rte_eth_devices[port_id];
3263 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3265 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3269 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3270 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3274 struct rte_eth_dev *dev;
3276 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3278 if (l2_tunnel == NULL) {
3279 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3283 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3284 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3289 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3293 dev = &rte_eth_devices[port_id];
3294 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3296 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);