1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright(c) 2018 Intel Corporation
8 #include <rte_rwlock.h>
10 #define IPSEC_MAX_HDR_SIZE 64
11 #define IPSEC_MAX_IV_SIZE 16
12 #define IPSEC_MAX_IV_QWORD (IPSEC_MAX_IV_SIZE / sizeof(uint64_t))
14 /* padding alignment for different algorithms */
16 IPSEC_PAD_DEFAULT = 4,
17 IPSEC_PAD_AES_CBC = IPSEC_MAX_IV_SIZE,
18 IPSEC_PAD_AES_CTR = IPSEC_PAD_DEFAULT,
19 IPSEC_PAD_AES_GCM = IPSEC_PAD_DEFAULT,
20 IPSEC_PAD_NULL = IPSEC_PAD_DEFAULT,
23 /* iv sizes for different algorithms */
25 IPSEC_IV_SIZE_DEFAULT = IPSEC_MAX_IV_SIZE,
26 IPSEC_AES_CTR_IV_SIZE = sizeof(uint64_t),
29 /* these definitions probably has to be in rte_crypto_sym.h */
39 #ifdef __SIZEOF_INT128__
48 #define REPLAY_SQN_NUM 2
49 #define REPLAY_SQN_NEXT(n) ((n) ^ 1)
54 __extension__ uint64_t window[0];
57 /*IPSEC SA supported algorithms */
68 uint64_t type; /* type of given SA */
69 uint64_t udata; /* user defined */
70 uint32_t size; /* size of given sa object */
72 /* sqn calculations related */
77 uint16_t bucket_index_mask;
79 /* template for crypto op fields */
81 union sym_op_ofslen cipher;
82 union sym_op_ofslen auth;
86 uint8_t proto; /* next proto */
92 uint8_t iv_ofs; /* offset for algo-specific IV inside crypto op */
96 /* template for tunnel header */
97 uint8_t hdr[IPSEC_MAX_HDR_SIZE];
100 * sqn and replay window
101 * In case of SA handled by multiple threads *sqn* cacheline
102 * could be shared by multiple cores.
103 * To minimise perfomance impact, we try to locate in a separate
104 * place from other frequently accesed data.
112 uint32_t rdidx; /* read index */
113 uint32_t wridx; /* write index */
114 struct replay_sqn *rsn[REPLAY_SQN_NUM];
118 } __rte_cache_aligned;
121 ipsec_sa_pkt_func_select(const struct rte_ipsec_session *ss,
122 const struct rte_ipsec_sa *sa, struct rte_ipsec_sa_pkt_func *pf);