lib/librte_net/rte_net_crc.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017-2020 Intel Corporation
   3  */
   4
   5 #include <stddef.h>
   6 #include <string.h>
   7 #include <stdint.h>
   8
   9 #include <rte_cpuflags.h>
  10 #include <rte_common.h>
  11 #include <rte_net_crc.h>
  12
  13 #include "net_crc.h"
  14
  15 /** CRC polynomials */
  16 #define CRC32_ETH_POLYNOMIAL 0x04c11db7UL
  17 #define CRC16_CCITT_POLYNOMIAL 0x1021U
  18
  19 #define CRC_LUT_SIZE 256
  20
  21 /* crc tables */
  22 static uint32_t crc32_eth_lut[CRC_LUT_SIZE];
  23 static uint32_t crc16_ccitt_lut[CRC_LUT_SIZE];
  24
  25 static uint32_t
  26 rte_crc16_ccitt_handler(const uint8_t *data, uint32_t data_len);
  27
  28 static uint32_t
  29 rte_crc32_eth_handler(const uint8_t *data, uint32_t data_len);
  30
  31 typedef uint32_t
  32 (*rte_net_crc_handler)(const uint8_t *data, uint32_t data_len);
  33
  34 static const rte_net_crc_handler *handlers;
  35
  36 static const rte_net_crc_handler handlers_scalar[] = {
  37         [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_handler,
  38         [RTE_NET_CRC32_ETH] = rte_crc32_eth_handler,
  39 };
  40 #ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
  41 static const rte_net_crc_handler handlers_sse42[] = {
  42         [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_sse42_handler,
  43         [RTE_NET_CRC32_ETH] = rte_crc32_eth_sse42_handler,
  44 };
  45 #endif
  46 #ifdef CC_ARM64_NEON_PMULL_SUPPORT
  47 static const rte_net_crc_handler handlers_neon[] = {
  48         [RTE_NET_CRC16_CCITT] = rte_crc16_ccitt_neon_handler,
  49         [RTE_NET_CRC32_ETH] = rte_crc32_eth_neon_handler,
  50 };
  51 #endif
  52
  53 /* Scalar handling */
  54
  55 /**
  56  * Reflect the bits about the middle
  57  *
  58  * @param val
  59  *   value to be reflected
  60  *
  61  * @return
  62  *   reflected value
  63  */
  64 static uint32_t
  65 reflect_32bits(uint32_t val)
  66 {
  67         uint32_t i, res = 0;
  68
  69         for (i = 0; i < 32; i++)
  70                 if ((val & (1U << i)) != 0)
  71                         res |= (uint32_t)(1U << (31 - i));
  72
  73         return res;
  74 }
  75
  76 static void
  77 crc32_eth_init_lut(uint32_t poly,
  78         uint32_t *lut)
  79 {
  80         uint32_t i, j;
  81
  82         for (i = 0; i < CRC_LUT_SIZE; i++) {
  83                 uint32_t crc = reflect_32bits(i);
  84
  85                 for (j = 0; j < 8; j++) {
  86                         if (crc & 0x80000000L)
  87                                 crc = (crc << 1) ^ poly;
  88                         else
  89                                 crc <<= 1;
  90                 }
  91                 lut[i] = reflect_32bits(crc);
  92         }
  93 }
  94
  95 static __rte_always_inline uint32_t
  96 crc32_eth_calc_lut(const uint8_t *data,
  97         uint32_t data_len,
  98         uint32_t crc,
  99         const uint32_t *lut)
 100 {
 101         while (data_len--)
 102                 crc = lut[(crc ^ *data++) & 0xffL] ^ (crc >> 8);
 103
 104         return crc;
 105 }
 106
 107 static void
 108 rte_net_crc_scalar_init(void)
 109 {
 110         /* 32-bit crc init */
 111         crc32_eth_init_lut(CRC32_ETH_POLYNOMIAL, crc32_eth_lut);
 112
 113         /* 16-bit CRC init */
 114         crc32_eth_init_lut(CRC16_CCITT_POLYNOMIAL << 16, crc16_ccitt_lut);
 115 }
 116
 117 static inline uint32_t
 118 rte_crc16_ccitt_handler(const uint8_t *data, uint32_t data_len)
 119 {
 120         /* return 16-bit CRC value */
 121         return (uint16_t)~crc32_eth_calc_lut(data,
 122                 data_len,
 123                 0xffff,
 124                 crc16_ccitt_lut);
 125 }
 126
 127 static inline uint32_t
 128 rte_crc32_eth_handler(const uint8_t *data, uint32_t data_len)
 129 {
 130         /* return 32-bit CRC value */
 131         return ~crc32_eth_calc_lut(data,
 132                 data_len,
 133                 0xffffffffUL,
 134                 crc32_eth_lut);
 135 }
 136
 137 /* SSE4.2/PCLMULQDQ handling */
 138
 139 #define SSE42_PCLMULQDQ_CPU_SUPPORTED \
 140         rte_cpu_get_flag_enabled(RTE_CPUFLAG_PCLMULQDQ)
 141
 142 static const rte_net_crc_handler *
 143 sse42_pclmulqdq_get_handlers(void)
 144 {
 145 #ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
 146         if (SSE42_PCLMULQDQ_CPU_SUPPORTED)
 147                 return handlers_sse42;
 148 #endif
 149         return NULL;
 150 }
 151
 152 static uint8_t
 153 sse42_pclmulqdq_init(void)
 154 {
 155 #ifdef CC_X86_64_SSE42_PCLMULQDQ_SUPPORT
 156         if (SSE42_PCLMULQDQ_CPU_SUPPORTED) {
 157                 rte_net_crc_sse42_init();
 158                 return 1;
 159         }
 160 #endif
 161         return 0;
 162 }
 163
 164 /* NEON/PMULL handling */
 165
 166 #define NEON_PMULL_CPU_SUPPORTED \
 167         rte_cpu_get_flag_enabled(RTE_CPUFLAG_PMULL)
 168
 169 static const rte_net_crc_handler *
 170 neon_pmull_get_handlers(void)
 171 {
 172 #ifdef CC_ARM64_NEON_PMULL_SUPPORT
 173         if (NEON_PMULL_CPU_SUPPORTED)
 174                 return handlers_neon;
 175 #endif
 176         return NULL;
 177 }
 178
 179 static uint8_t
 180 neon_pmull_init(void)
 181 {
 182 #ifdef CC_ARM64_NEON_PMULL_SUPPORT
 183         if (NEON_PMULL_CPU_SUPPORTED) {
 184                 rte_net_crc_neon_init();
 185                 return 1;
 186         }
 187 #endif
 188         return 0;
 189 }
 190
 191 /* Public API */
 192
 193 void
 194 rte_net_crc_set_alg(enum rte_net_crc_alg alg)
 195 {
 196         handlers = NULL;
 197
 198         switch (alg) {
 199         case RTE_NET_CRC_SSE42:
 200                 handlers = sse42_pclmulqdq_get_handlers();
 201                 break; /* for x86, always break here */
 202         case RTE_NET_CRC_NEON:
 203                 handlers = neon_pmull_get_handlers();
 204                 /* fall-through */
 205         case RTE_NET_CRC_SCALAR:
 206                 /* fall-through */
 207         default:
 208                 break;
 209         }
 210
 211         if (handlers == NULL)
 212                 handlers = handlers_scalar;
 213 }
 214
 215 uint32_t
 216 rte_net_crc_calc(const void *data,
 217         uint32_t data_len,
 218         enum rte_net_crc_type type)
 219 {
 220         uint32_t ret;
 221         rte_net_crc_handler f_handle;
 222
 223         f_handle = handlers[type];
 224         ret = f_handle(data, data_len);
 225
 226         return ret;
 227 }
 228
 229 /* Select highest available crc algorithm as default one */
 230 RTE_INIT(rte_net_crc_init)
 231 {
 232         enum rte_net_crc_alg alg = RTE_NET_CRC_SCALAR;
 233
 234         rte_net_crc_scalar_init();
 235
 236         if (sse42_pclmulqdq_init())
 237                 alg = RTE_NET_CRC_SSE42;
 238         if (neon_pmull_init())
 239                 alg = RTE_NET_CRC_NEON;
 240
 241         rte_net_crc_set_alg(alg);
 242 }