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37 #include <rte_common.h>
39 #include <rte_memory.h>
40 #include <rte_malloc.h>
41 #include <rte_cycles.h>
42 #include <rte_prefetch.h>
43 #include <rte_branch_prediction.h>
46 #include "rte_sched.h"
47 #include "rte_bitmap.h"
48 #include "rte_sched_common.h"
49 #include "rte_approx.h"
51 #ifdef __INTEL_COMPILER
52 #pragma warning(disable:2259) /* conversion may lose significant bits */
55 #ifndef RTE_SCHED_DEBUG
56 #define RTE_SCHED_DEBUG 0
59 #ifndef RTE_SCHED_OPTIMIZATIONS
60 #define RTE_SCHED_OPTIMIZATIONS 0
63 #if RTE_SCHED_OPTIMIZATIONS
64 #include <immintrin.h>
67 #define RTE_SCHED_ENQUEUE 1
69 #define RTE_SCHED_TS 1
71 #if RTE_SCHED_TS == 0 /* Infinite credits. Traffic shaping disabled. */
72 #define RTE_SCHED_TS_CREDITS_UPDATE 0
73 #define RTE_SCHED_TS_CREDITS_CHECK 0
74 #else /* Real Credits. Full traffic shaping implemented. */
75 #define RTE_SCHED_TS_CREDITS_UPDATE 1
76 #define RTE_SCHED_TS_CREDITS_CHECK 1
79 #ifndef RTE_SCHED_TB_RATE_CONFIG_ERR
80 #define RTE_SCHED_TB_RATE_CONFIG_ERR (1e-7)
83 #define RTE_SCHED_WRR 1
85 #ifndef RTE_SCHED_WRR_SHIFT
86 #define RTE_SCHED_WRR_SHIFT 3
89 #ifndef RTE_SCHED_PORT_N_GRINDERS
90 #define RTE_SCHED_PORT_N_GRINDERS 8
92 #if (RTE_SCHED_PORT_N_GRINDERS == 0) || (RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1))
93 #error Number of grinders must be non-zero and a power of 2
95 #if (RTE_SCHED_OPTIMIZATIONS && (RTE_SCHED_PORT_N_GRINDERS != 8))
96 #error Number of grinders must be 8 when RTE_SCHED_OPTIMIZATIONS is set
99 #define RTE_SCHED_GRINDER_PCACHE_SIZE (64 / RTE_SCHED_QUEUES_PER_PIPE)
101 #define RTE_SCHED_PIPE_INVALID UINT32_MAX
103 #define RTE_SCHED_BMP_POS_INVALID UINT32_MAX
105 struct rte_sched_subport {
106 /* Token bucket (TB) */
107 uint64_t tb_time; /* time of last update */
109 uint32_t tb_credits_per_period;
113 /* Traffic classes (TCs) */
114 uint64_t tc_time; /* time of next update */
115 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
116 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
119 /* TC oversubscription */
121 uint32_t tc_ov_wm_min;
122 uint32_t tc_ov_wm_max;
123 uint8_t tc_ov_period_id;
129 struct rte_sched_subport_stats stats;
132 struct rte_sched_pipe_profile {
133 /* Token bucket (TB) */
135 uint32_t tb_credits_per_period;
138 /* Pipe traffic classes */
140 uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
141 uint8_t tc_ov_weight;
144 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
147 struct rte_sched_pipe {
148 /* Token bucket (TB) */
149 uint64_t tb_time; /* time of last update */
152 /* Pipe profile and flags */
155 /* Traffic classes (TCs) */
156 uint64_t tc_time; /* time of next update */
157 uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
159 /* Weighted Round Robin (WRR) */
160 uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
162 /* TC oversubscription */
163 uint32_t tc_ov_credits;
164 uint8_t tc_ov_period_id;
166 } __rte_cache_aligned;
168 struct rte_sched_queue {
173 struct rte_sched_queue_extra {
174 struct rte_sched_queue_stats stats;
181 e_GRINDER_PREFETCH_PIPE = 0,
182 e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
183 e_GRINDER_PREFETCH_MBUF,
187 struct rte_sched_grinder {
189 uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
190 uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
195 enum grinder_state state;
198 struct rte_sched_subport *subport;
199 struct rte_sched_pipe *pipe;
200 struct rte_sched_pipe_profile *pipe_params;
203 uint8_t tccache_qmask[4];
204 uint32_t tccache_qindex[4];
210 struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
211 struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
212 uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
216 struct rte_mbuf *pkt;
219 uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
220 uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
221 uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
224 struct rte_sched_port {
225 /* User parameters */
226 uint32_t n_subports_per_port;
227 uint32_t n_pipes_per_subport;
230 uint32_t frame_overhead;
231 uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
232 uint32_t n_pipe_profiles;
233 uint32_t pipe_tc3_rate_max;
235 struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
239 uint64_t time_cpu_cycles; /* Current CPU time measured in CPU cyles */
240 uint64_t time_cpu_bytes; /* Current CPU time measured in bytes */
241 uint64_t time; /* Current NIC TX time measured in bytes */
242 double cycles_per_byte; /* CPU cycles per byte */
244 /* Scheduling loop detection */
246 uint32_t pipe_exhaustion;
249 struct rte_bitmap *bmp;
250 uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
253 struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
254 uint32_t busy_grinders;
255 struct rte_mbuf **pkts_out;
258 /* Queue base calculation */
259 uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
262 /* Large data structures */
263 struct rte_sched_subport *subport;
264 struct rte_sched_pipe *pipe;
265 struct rte_sched_queue *queue;
266 struct rte_sched_queue_extra *queue_extra;
267 struct rte_sched_pipe_profile *pipe_profiles;
269 struct rte_mbuf **queue_array;
270 uint8_t memory[0] __rte_cache_aligned;
271 } __rte_cache_aligned;
273 enum rte_sched_port_array {
274 e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
275 e_RTE_SCHED_PORT_ARRAY_PIPE,
276 e_RTE_SCHED_PORT_ARRAY_QUEUE,
277 e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
278 e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
279 e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
280 e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
281 e_RTE_SCHED_PORT_ARRAY_TOTAL,
284 #ifdef RTE_SCHED_COLLECT_STATS
286 static inline uint32_t
287 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
289 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
294 static inline uint32_t
295 rte_sched_port_queues_per_port(struct rte_sched_port *port)
297 return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
301 rte_sched_port_check_params(struct rte_sched_port_params *params)
305 if (params == NULL) {
310 if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES)) {
315 if (params->rate == 0) {
320 if (params->mtu == 0) {
324 /* n_subports_per_port: non-zero, power of 2 */
325 if ((params->n_subports_per_port == 0) || (!rte_is_power_of_2(params->n_subports_per_port))) {
329 /* n_pipes_per_subport: non-zero, power of 2 */
330 if ((params->n_pipes_per_subport == 0) || (!rte_is_power_of_2(params->n_pipes_per_subport))) {
334 /* qsize: non-zero, power of 2, no bigger than 32K (due to 16-bit read/write pointers) */
335 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
336 uint16_t qsize = params->qsize[i];
338 if ((qsize == 0) || (!rte_is_power_of_2(qsize))) {
343 /* pipe_profiles and n_pipe_profiles */
344 if ((params->pipe_profiles == NULL) ||
345 (params->n_pipe_profiles == 0) ||
346 (params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)) {
350 for (i = 0; i < params->n_pipe_profiles; i ++) {
351 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
353 /* TB rate: non-zero, not greater than port rate */
354 if ((p->tb_rate == 0) || (p->tb_rate > params->rate)) {
358 /* TB size: non-zero */
359 if (p->tb_size == 0) {
363 /* TC rate: non-zero, less than pipe rate */
364 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
365 if ((p->tc_rate[j] == 0) || (p->tc_rate[j] > p->tb_rate)) {
370 /* TC period: non-zero */
371 if (p->tc_period == 0) {
375 #ifdef RTE_SCHED_SUBPORT_TC_OV
376 /* TC3 oversubscription weight: non-zero */
377 if (p->tc_ov_weight == 0) {
382 /* Queue WRR weights: non-zero */
383 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j ++) {
384 if (p->wrr_weights[j] == 0) {
394 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
396 uint32_t n_subports_per_port = params->n_subports_per_port;
397 uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
398 uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
399 uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
401 uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
402 uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
403 uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
404 uint32_t size_queue_extra = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
405 uint32_t size_pipe_profiles = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
406 uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
407 uint32_t size_per_pipe_queue_array, size_queue_array;
411 size_per_pipe_queue_array = 0;
412 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
413 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS * params->qsize[i] * sizeof(struct rte_mbuf *);
415 size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
419 if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT) return base;
420 base += RTE_CACHE_LINE_ROUNDUP(size_subport);
422 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE) return base;
423 base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
425 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE) return base;
426 base += RTE_CACHE_LINE_ROUNDUP(size_queue);
428 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA) return base;
429 base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
431 if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES) return base;
432 base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
434 if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY) return base;
435 base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
437 if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY) return base;
438 base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
444 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
446 uint32_t size0, size1;
449 status = rte_sched_port_check_params(params);
451 RTE_LOG(INFO, SCHED, "Port scheduler params check failed (%d)\n", status);
456 size0 = sizeof(struct rte_sched_port);
457 size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
459 return (size0 + size1);
463 rte_sched_port_config_qsize(struct rte_sched_port *port)
466 port->qsize_add[0] = 0;
467 port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
468 port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
469 port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
472 port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
473 port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
474 port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
475 port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
478 port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
479 port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
480 port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
481 port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
484 port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
485 port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
486 port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
487 port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
489 port->qsize_sum = port->qsize_add[15] + port->qsize[3];
493 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
495 struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
497 RTE_LOG(INFO, SCHED, "Low level config for pipe profile %u:\n"
498 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
499 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
500 "\tTraffic class 3 oversubscription: weight = %hhu\n"
501 "\tWRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
506 p->tb_credits_per_period,
509 /* Traffic classes */
511 p->tc_credits_per_period[0],
512 p->tc_credits_per_period[1],
513 p->tc_credits_per_period[2],
514 p->tc_credits_per_period[3],
516 /* Traffic class 3 oversubscription */
520 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
521 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
522 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
523 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
526 static inline uint64_t
527 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
529 uint64_t time = time_ms;
530 time = (time * rate) / 1000;
536 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
540 for (i = 0; i < port->n_pipe_profiles; i ++) {
541 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
542 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
545 if (src->tb_rate == params->rate) {
546 dst->tb_credits_per_period = 1;
549 double tb_rate = ((double) src->tb_rate) / ((double) params->rate);
550 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
552 rte_approx(tb_rate, d, &dst->tb_credits_per_period, &dst->tb_period);
554 dst->tb_size = src->tb_size;
556 /* Traffic Classes */
557 dst->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, params->rate);
558 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
559 dst->tc_credits_per_period[j] = (uint32_t) rte_sched_time_ms_to_bytes(src->tc_period, src->tc_rate[j]);
561 #ifdef RTE_SCHED_SUBPORT_TC_OV
562 dst->tc_ov_weight = src->tc_ov_weight;
566 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j ++) {
567 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
568 uint32_t lcd, lcd1, lcd2;
571 qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
573 wrr_cost[0] = src->wrr_weights[qindex];
574 wrr_cost[1] = src->wrr_weights[qindex + 1];
575 wrr_cost[2] = src->wrr_weights[qindex + 2];
576 wrr_cost[3] = src->wrr_weights[qindex + 3];
578 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
579 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
580 lcd = rte_get_lcd(lcd1, lcd2);
582 wrr_cost[0] = lcd / wrr_cost[0];
583 wrr_cost[1] = lcd / wrr_cost[1];
584 wrr_cost[2] = lcd / wrr_cost[2];
585 wrr_cost[3] = lcd / wrr_cost[3];
587 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
588 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
589 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
590 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
593 rte_sched_port_log_pipe_profile(port, i);
596 port->pipe_tc3_rate_max = 0;
597 for (i = 0; i < port->n_pipe_profiles; i ++) {
598 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
599 uint32_t pipe_tc3_rate = src->tc_rate[3];
601 if (port->pipe_tc3_rate_max < pipe_tc3_rate) {
602 port->pipe_tc3_rate_max = pipe_tc3_rate;
607 struct rte_sched_port *
608 rte_sched_port_config(struct rte_sched_port_params *params)
610 struct rte_sched_port *port = NULL;
611 uint32_t mem_size, bmp_mem_size, n_queues_per_port, i;
613 /* Check user parameters. Determine the amount of memory to allocate */
614 mem_size = rte_sched_port_get_memory_footprint(params);
619 /* Allocate memory to store the data structures */
620 port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
625 /* User parameters */
626 port->n_subports_per_port = params->n_subports_per_port;
627 port->n_pipes_per_subport = params->n_pipes_per_subport;
628 port->rate = params->rate;
629 port->mtu = params->mtu + params->frame_overhead;
630 port->frame_overhead = params->frame_overhead;
631 memcpy(port->qsize, params->qsize, sizeof(params->qsize));
632 port->n_pipe_profiles = params->n_pipe_profiles;
635 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
638 for (j = 0; j < e_RTE_METER_COLORS; j++) {
639 /* if min/max are both zero, then RED is disabled */
640 if ((params->red_params[i][j].min_th |
641 params->red_params[i][j].max_th) == 0) {
645 if (rte_red_config_init(&port->red_config[i][j],
646 params->red_params[i][j].wq_log2,
647 params->red_params[i][j].min_th,
648 params->red_params[i][j].max_th,
649 params->red_params[i][j].maxp_inv) != 0) {
657 port->time_cpu_cycles = rte_get_tsc_cycles();
658 port->time_cpu_bytes = 0;
660 port->cycles_per_byte = ((double) rte_get_tsc_hz()) / ((double) params->rate);
662 /* Scheduling loop detection */
663 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
664 port->pipe_exhaustion = 0;
667 port->busy_grinders = 0;
668 port->pkts_out = NULL;
669 port->n_pkts_out = 0;
671 /* Queue base calculation */
672 rte_sched_port_config_qsize(port);
674 /* Large data structures */
675 port->subport = (struct rte_sched_subport *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_SUBPORT));
676 port->pipe = (struct rte_sched_pipe *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE));
677 port->queue = (struct rte_sched_queue *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE));
678 port->queue_extra = (struct rte_sched_queue_extra *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
679 port->pipe_profiles = (struct rte_sched_pipe_profile *) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
680 port->bmp_array = port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
681 port->queue_array = (struct rte_mbuf **) (port->memory + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
683 /* Pipe profile table */
684 rte_sched_port_config_pipe_profile_table(port, params);
687 n_queues_per_port = rte_sched_port_queues_per_port(port);
688 bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
689 port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array, bmp_mem_size);
690 if (port->bmp == NULL) {
691 RTE_LOG(INFO, SCHED, "Bitmap init error\n");
694 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
695 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
702 rte_sched_port_free(struct rte_sched_port *port)
704 /* Check user parameters */
709 rte_bitmap_free(port->bmp);
714 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
716 struct rte_sched_subport *s = port->subport + i;
718 RTE_LOG(INFO, SCHED, "Low level config for subport %u:\n"
719 "\tToken bucket: period = %u, credits per period = %u, size = %u\n"
720 "\tTraffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
721 "\tTraffic class 3 oversubscription: wm min = %u, wm max = %u\n",
726 s->tb_credits_per_period,
729 /* Traffic classes */
731 s->tc_credits_per_period[0],
732 s->tc_credits_per_period[1],
733 s->tc_credits_per_period[2],
734 s->tc_credits_per_period[3],
736 /* Traffic class 3 oversubscription */
742 rte_sched_subport_config(struct rte_sched_port *port,
744 struct rte_sched_subport_params *params)
746 struct rte_sched_subport *s;
749 /* Check user parameters */
750 if ((port == NULL) ||
751 (subport_id >= port->n_subports_per_port) ||
756 if ((params->tb_rate == 0) || (params->tb_rate > port->rate)) {
760 if (params->tb_size == 0) {
764 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
765 if ((params->tc_rate[i] == 0) || (params->tc_rate[i] > params->tb_rate)) {
770 if (params->tc_period == 0) {
774 s = port->subport + subport_id;
776 /* Token Bucket (TB) */
777 if (params->tb_rate == port->rate) {
778 s->tb_credits_per_period = 1;
781 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
782 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
784 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
786 s->tb_size = params->tb_size;
787 s->tb_time = port->time;
788 s->tb_credits = s->tb_size / 2;
790 /* Traffic Classes (TCs) */
791 s->tc_period = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
792 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
793 s->tc_credits_per_period[i] = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, params->tc_rate[i]);
795 s->tc_time = port->time + s->tc_period;
796 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
797 s->tc_credits[i] = s->tc_credits_per_period[i];
800 #ifdef RTE_SCHED_SUBPORT_TC_OV
801 /* TC oversubscription */
802 s->tc_ov_wm_min = port->mtu;
803 s->tc_ov_wm_max = (uint32_t) rte_sched_time_ms_to_bytes(params->tc_period, port->pipe_tc3_rate_max);
804 s->tc_ov_wm = s->tc_ov_wm_max;
805 s->tc_ov_period_id = 0;
811 rte_sched_port_log_subport_config(port, subport_id);
817 rte_sched_pipe_config(struct rte_sched_port *port,
820 int32_t pipe_profile)
822 struct rte_sched_subport *s;
823 struct rte_sched_pipe *p;
824 struct rte_sched_pipe_profile *params;
825 uint32_t deactivate, profile, i;
827 /* Check user parameters */
828 profile = (uint32_t) pipe_profile;
829 deactivate = (pipe_profile < 0);
830 if ((port == NULL) ||
831 (subport_id >= port->n_subports_per_port) ||
832 (pipe_id >= port->n_pipes_per_subport) ||
833 ((!deactivate) && (profile >= port->n_pipe_profiles))) {
837 /* Check that subport configuration is valid */
838 s = port->subport + subport_id;
839 if (s->tb_period == 0) {
843 p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
845 /* Handle the case when pipe already has a valid configuration */
847 params = port->pipe_profiles + p->profile;
849 #ifdef RTE_SCHED_SUBPORT_TC_OV
850 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
851 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
852 uint32_t tc3_ov = s->tc_ov;
854 /* Unplug pipe from its subport */
855 s->tc_ov_n -= params->tc_ov_weight;
856 s->tc_ov_rate -= pipe_tc3_rate;
857 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
859 if (s->tc_ov != tc3_ov) {
860 RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
861 subport_id, subport_tc3_rate, s->tc_ov_rate);
866 memset(p, 0, sizeof(struct rte_sched_pipe));
873 /* Apply the new pipe configuration */
874 p->profile = profile;
875 params = port->pipe_profiles + p->profile;
877 /* Token Bucket (TB) */
878 p->tb_time = port->time;
879 p->tb_credits = params->tb_size / 2;
881 /* Traffic Classes (TCs) */
882 p->tc_time = port->time + params->tc_period;
883 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i ++) {
884 p->tc_credits[i] = params->tc_credits_per_period[i];
887 #ifdef RTE_SCHED_SUBPORT_TC_OV
889 /* Subport TC3 oversubscription */
890 double subport_tc3_rate = ((double) s->tc_credits_per_period[3]) / ((double) s->tc_period);
891 double pipe_tc3_rate = ((double) params->tc_credits_per_period[3]) / ((double) params->tc_period);
892 uint32_t tc3_ov = s->tc_ov;
894 s->tc_ov_n += params->tc_ov_weight;
895 s->tc_ov_rate += pipe_tc3_rate;
896 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
898 if (s->tc_ov != tc3_ov) {
899 RTE_LOG(INFO, SCHED, "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
900 subport_id, subport_tc3_rate, s->tc_ov_rate);
902 p->tc_ov_period_id = s->tc_ov_period_id;
903 p->tc_ov_credits = s->tc_ov_wm;
911 rte_sched_subport_read_stats(struct rte_sched_port *port,
913 struct rte_sched_subport_stats *stats,
916 struct rte_sched_subport *s;
918 /* Check user parameters */
919 if ((port == NULL) ||
920 (subport_id >= port->n_subports_per_port) ||
925 s = port->subport + subport_id;
927 /* Copy subport stats and clear */
928 memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
929 memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
931 /* Subport TC ovesubscription status */
938 rte_sched_queue_read_stats(struct rte_sched_port *port,
940 struct rte_sched_queue_stats *stats,
943 struct rte_sched_queue *q;
944 struct rte_sched_queue_extra *qe;
946 /* Check user parameters */
947 if ((port == NULL) ||
948 (queue_id >= rte_sched_port_queues_per_port(port)) ||
953 q = port->queue + queue_id;
954 qe = port->queue_extra + queue_id;
956 /* Copy queue stats and clear */
957 memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
958 memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
961 *qlen = q->qw - q->qr;
966 static inline uint32_t
967 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
971 result = subport * port->n_pipes_per_subport + pipe;
972 result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
973 result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
978 static inline struct rte_mbuf **
979 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
981 uint32_t pindex = qindex >> 4;
982 uint32_t qpos = qindex & 0xF;
984 return (port->queue_array + pindex * port->qsize_sum + port->qsize_add[qpos]);
987 static inline uint16_t
988 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
990 uint32_t tc = (qindex >> 2) & 0x3;
992 return port->qsize[tc];
998 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1000 struct rte_sched_queue *queue = port->queue + qindex;
1002 return (queue->qr == queue->qw);
1006 rte_sched_port_queue_is_full(struct rte_sched_port *port, uint32_t qindex)
1008 struct rte_sched_queue *queue = port->queue + qindex;
1009 uint16_t qsize = rte_sched_port_qsize(port, qindex);
1010 uint16_t qlen = queue->qw - queue->qr;
1012 return (qlen >= qsize);
1015 #endif /* RTE_SCHED_DEBUG */
1017 #ifdef RTE_SCHED_COLLECT_STATS
1020 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1022 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1023 uint32_t tc_index = (qindex >> 2) & 0x3;
1024 uint32_t pkt_len = pkt->pkt_len;
1026 s->stats.n_pkts_tc[tc_index] += 1;
1027 s->stats.n_bytes_tc[tc_index] += pkt_len;
1031 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1033 struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1034 uint32_t tc_index = (qindex >> 2) & 0x3;
1035 uint32_t pkt_len = pkt->pkt_len;
1037 s->stats.n_pkts_tc_dropped[tc_index] += 1;
1038 s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1042 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1044 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1045 uint32_t pkt_len = pkt->pkt_len;
1047 qe->stats.n_pkts += 1;
1048 qe->stats.n_bytes += pkt_len;
1052 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1054 struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1055 uint32_t pkt_len = pkt->pkt_len;
1057 qe->stats.n_pkts_dropped += 1;
1058 qe->stats.n_bytes_dropped += pkt_len;
1061 #endif /* RTE_SCHED_COLLECT_STATS */
1063 #ifdef RTE_SCHED_RED
1066 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1068 struct rte_sched_queue_extra *qe;
1069 struct rte_red_config *red_cfg;
1070 struct rte_red *red;
1072 enum rte_meter_color color;
1074 tc_index = (qindex >> 2) & 0x3;
1075 color = rte_sched_port_pkt_read_color(pkt);
1076 red_cfg = &port->red_config[tc_index][color];
1078 if ((red_cfg->min_th | red_cfg->max_th) == 0)
1081 qe = port->queue_extra + qindex;
1084 return rte_red_enqueue(red_cfg, red, qlen, port->time);
1088 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1090 struct rte_sched_queue_extra *qe;
1091 struct rte_red *red;
1093 qe = port->queue_extra + qindex;
1096 rte_red_mark_queue_empty(red, port->time);
1101 #define rte_sched_port_red_drop(port, pkt, qindex, qlen) 0
1103 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1105 #endif /* RTE_SCHED_RED */
1110 debug_pipe_is_empty(struct rte_sched_port *port, uint32_t pindex)
1114 qindex = pindex << 4;
1116 for (i = 0; i < 16; i ++){
1117 uint32_t queue_empty = rte_sched_port_queue_is_empty(port, qindex + i);
1118 uint32_t bmp_bit_clear = (rte_bitmap_get(port->bmp, qindex + i) == 0);
1120 if (queue_empty != bmp_bit_clear){
1121 rte_panic("Queue status mismatch for queue %u of pipe %u\n", i, pindex);
1133 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos, uint64_t bmp_slab)
1139 rte_panic("Empty slab at position %u\n", bmp_pos);
1143 for (i = 0, mask = 1; i < 64; i ++, mask <<= 1) {
1144 if (mask & bmp_slab){
1145 if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1146 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1153 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1158 #endif /* RTE_SCHED_DEBUG */
1160 static inline uint32_t
1161 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port, struct rte_mbuf *pkt)
1163 struct rte_sched_queue *q;
1164 #ifdef RTE_SCHED_COLLECT_STATS
1165 struct rte_sched_queue_extra *qe;
1167 uint32_t subport, pipe, traffic_class, queue, qindex;
1169 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1171 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1172 q = port->queue + qindex;
1174 #ifdef RTE_SCHED_COLLECT_STATS
1175 qe = port->queue_extra + qindex;
1183 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase)
1185 struct rte_sched_queue *q;
1186 struct rte_mbuf **q_qw;
1189 q = port->queue + qindex;
1190 qsize = rte_sched_port_qsize(port, qindex);
1191 q_qw = qbase + (q->qw & (qsize - 1));
1193 rte_prefetch0(q_qw);
1194 rte_bitmap_prefetch0(port->bmp, qindex);
1198 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1200 struct rte_sched_queue *q;
1204 q = port->queue + qindex;
1205 qsize = rte_sched_port_qsize(port, qindex);
1206 qlen = q->qw - q->qr;
1208 /* Drop the packet (and update drop stats) when queue is full */
1209 if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) || (qlen >= qsize))) {
1210 rte_pktmbuf_free(pkt);
1211 #ifdef RTE_SCHED_COLLECT_STATS
1212 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt);
1213 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt);
1218 /* Enqueue packet */
1219 qbase[q->qw & (qsize - 1)] = pkt;
1222 /* Activate queue in the port bitmap */
1223 rte_bitmap_set(port->bmp, qindex);
1226 #ifdef RTE_SCHED_COLLECT_STATS
1227 rte_sched_port_update_subport_stats(port, qindex, pkt);
1228 rte_sched_port_update_queue_stats(port, qindex, pkt);
1234 #if RTE_SCHED_ENQUEUE == 0
1237 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1243 for (i = 0; i < n_pkts; i ++) {
1244 struct rte_mbuf *pkt;
1245 struct rte_mbuf **q_base;
1246 uint32_t subport, pipe, traffic_class, queue, qindex;
1250 rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1252 qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1254 q_base = rte_sched_port_qbase(port, qindex);
1256 result += rte_sched_port_enqueue_qwa(port, qindex, q_base, pkt);
1264 /* The enqueue function implements a 4-level pipeline with each stage processing
1265 * two different packets. The purpose of using a pipeline is to hide the latency
1266 * of prefetching the data structures. The naming convention is presented in the
1269 * p00 _______ p10 _______ p20 _______ p30 _______
1270 * ----->| |----->| |----->| |----->| |----->
1271 * | 0 | | 1 | | 2 | | 3 |
1272 * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1277 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
1279 struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21, *pkt30, *pkt31, *pkt_last;
1280 struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base, **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1281 uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1282 uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1287 /* Less then 6 input packets available, which is not enough to feed the pipeline */
1288 if (unlikely(n_pkts < 6)) {
1289 struct rte_mbuf **q_base[5];
1292 /* Prefetch the mbuf structure of each packet */
1293 for (i = 0; i < n_pkts; i ++) {
1294 rte_prefetch0(pkts[i]);
1297 /* Prefetch the queue structure for each queue */
1298 for (i = 0; i < n_pkts; i ++) {
1299 q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port, pkts[i]);
1302 /* Prefetch the write pointer location of each queue */
1303 for (i = 0; i < n_pkts; i ++) {
1304 q_base[i] = rte_sched_port_qbase(port, q[i]);
1305 rte_sched_port_enqueue_qwa_prefetch0(port, q[i], q_base[i]);
1308 /* Write each packet to its queue */
1309 for (i = 0; i < n_pkts; i ++) {
1310 result += rte_sched_port_enqueue_qwa(port, q[i], q_base[i], pkts[i]);
1316 /* Feed the first 3 stages of the pipeline (6 packets needed) */
1319 rte_prefetch0(pkt20);
1320 rte_prefetch0(pkt21);
1324 rte_prefetch0(pkt10);
1325 rte_prefetch0(pkt11);
1327 q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1328 q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1332 rte_prefetch0(pkt00);
1333 rte_prefetch0(pkt01);
1335 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1336 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1338 q20_base = rte_sched_port_qbase(port, q20);
1339 q21_base = rte_sched_port_qbase(port, q21);
1340 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1341 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1343 /* Run the pipeline */
1344 for (i = 6; i < (n_pkts & (~1)); i += 2) {
1345 /* Propagate stage inputs */
1356 q30_base = q20_base;
1357 q31_base = q21_base;
1359 /* Stage 0: Get packets in */
1361 pkt01 = pkts[i + 1];
1362 rte_prefetch0(pkt00);
1363 rte_prefetch0(pkt01);
1365 /* Stage 1: Prefetch queue structure storing queue pointers */
1366 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1367 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1369 /* Stage 2: Prefetch queue write location */
1370 q20_base = rte_sched_port_qbase(port, q20);
1371 q21_base = rte_sched_port_qbase(port, q21);
1372 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1373 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1375 /* Stage 3: Write packet to queue and activate queue */
1376 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1377 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1378 result += r30 + r31;
1381 /* Drain the pipeline (exactly 6 packets). Handle the last packet in the case
1382 of an odd number of input packets. */
1383 pkt_last = pkts[n_pkts - 1];
1384 rte_prefetch0(pkt_last);
1386 q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1387 q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1389 q10_base = rte_sched_port_qbase(port, q10);
1390 q11_base = rte_sched_port_qbase(port, q11);
1391 rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1392 rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1394 r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1395 r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1396 result += r20 + r21;
1398 q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1400 q00_base = rte_sched_port_qbase(port, q00);
1401 q01_base = rte_sched_port_qbase(port, q01);
1402 rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1403 rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1405 r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1406 r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1407 result += r10 + r11;
1409 q_last_base = rte_sched_port_qbase(port, q_last);
1410 rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1412 r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1413 r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1414 result += r00 + r01;
1417 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1424 #endif /* RTE_SCHED_ENQUEUE */
1426 #if RTE_SCHED_TS_CREDITS_UPDATE == 0
1428 #define grinder_credits_update(port, pos)
1430 #elif !defined(RTE_SCHED_SUBPORT_TC_OV)
1433 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1435 struct rte_sched_grinder *grinder = port->grinder + pos;
1436 struct rte_sched_subport *subport = grinder->subport;
1437 struct rte_sched_pipe *pipe = grinder->pipe;
1438 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1442 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1443 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1444 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1445 subport->tb_time += n_periods * subport->tb_period;
1448 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1449 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1450 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1451 pipe->tb_time += n_periods * params->tb_period;
1454 if (unlikely(port->time >= subport->tc_time)) {
1455 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1456 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1457 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1458 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1459 subport->tc_time = port->time + subport->tc_period;
1463 if (unlikely(port->time >= pipe->tc_time)) {
1464 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1465 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1466 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1467 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1468 pipe->tc_time = port->time + params->tc_period;
1474 static inline uint32_t
1475 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1477 struct rte_sched_grinder *grinder = port->grinder + pos;
1478 struct rte_sched_subport *subport = grinder->subport;
1479 uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1480 uint32_t tc_ov_consumption_max;
1481 uint32_t tc_ov_wm = subport->tc_ov_wm;
1483 if (subport->tc_ov == 0) {
1484 return subport->tc_ov_wm_max;
1487 tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1488 tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1489 tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1490 tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1492 tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1493 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1495 if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1496 tc_ov_wm -= tc_ov_wm >> 7;
1497 if (tc_ov_wm < subport->tc_ov_wm_min) {
1498 tc_ov_wm = subport->tc_ov_wm_min;
1503 tc_ov_wm += (tc_ov_wm >> 7) + 1;
1504 if (tc_ov_wm > subport->tc_ov_wm_max) {
1505 tc_ov_wm = subport->tc_ov_wm_max;
1511 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1513 struct rte_sched_grinder *grinder = port->grinder + pos;
1514 struct rte_sched_subport *subport = grinder->subport;
1515 struct rte_sched_pipe *pipe = grinder->pipe;
1516 struct rte_sched_pipe_profile *params = grinder->pipe_params;
1520 n_periods = (port->time - subport->tb_time) / subport->tb_period;
1521 subport->tb_credits += n_periods * subport->tb_credits_per_period;
1522 subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1523 subport->tb_time += n_periods * subport->tb_period;
1526 n_periods = (port->time - pipe->tb_time) / params->tb_period;
1527 pipe->tb_credits += n_periods * params->tb_credits_per_period;
1528 pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1529 pipe->tb_time += n_periods * params->tb_period;
1532 if (unlikely(port->time >= subport->tc_time)) {
1533 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1535 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1536 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1537 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1538 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1540 subport->tc_time = port->time + subport->tc_period;
1541 subport->tc_ov_period_id ++;
1545 if (unlikely(port->time >= pipe->tc_time)) {
1546 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1547 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1548 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1549 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1550 pipe->tc_time = port->time + params->tc_period;
1553 /* Pipe TCs - Oversubscription */
1554 if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1555 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1557 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1561 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1563 #if RTE_SCHED_TS_CREDITS_CHECK
1565 #ifndef RTE_SCHED_SUBPORT_TC_OV
1568 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1570 struct rte_sched_grinder *grinder = port->grinder + pos;
1571 struct rte_sched_subport *subport = grinder->subport;
1572 struct rte_sched_pipe *pipe = grinder->pipe;
1573 struct rte_mbuf *pkt = grinder->pkt;
1574 uint32_t tc_index = grinder->tc_index;
1575 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1576 uint32_t subport_tb_credits = subport->tb_credits;
1577 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1578 uint32_t pipe_tb_credits = pipe->tb_credits;
1579 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1582 /* Check queue credits */
1583 enough_credits = (pkt_len <= subport_tb_credits) &&
1584 (pkt_len <= subport_tc_credits) &&
1585 (pkt_len <= pipe_tb_credits) &&
1586 (pkt_len <= pipe_tc_credits);
1588 if (!enough_credits) {
1592 /* Update port credits */
1593 subport->tb_credits -= pkt_len;
1594 subport->tc_credits[tc_index] -= pkt_len;
1595 pipe->tb_credits -= pkt_len;
1596 pipe->tc_credits[tc_index] -= pkt_len;
1604 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1606 struct rte_sched_grinder *grinder = port->grinder + pos;
1607 struct rte_sched_subport *subport = grinder->subport;
1608 struct rte_sched_pipe *pipe = grinder->pipe;
1609 struct rte_mbuf *pkt = grinder->pkt;
1610 uint32_t tc_index = grinder->tc_index;
1611 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1612 uint32_t subport_tb_credits = subport->tb_credits;
1613 uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1614 uint32_t pipe_tb_credits = pipe->tb_credits;
1615 uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1616 uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1617 uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1618 uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1621 /* Check pipe and subport credits */
1622 enough_credits = (pkt_len <= subport_tb_credits) &&
1623 (pkt_len <= subport_tc_credits) &&
1624 (pkt_len <= pipe_tb_credits) &&
1625 (pkt_len <= pipe_tc_credits) &&
1626 (pkt_len <= pipe_tc_ov_credits);
1628 if (!enough_credits) {
1632 /* Update pipe and subport credits */
1633 subport->tb_credits -= pkt_len;
1634 subport->tc_credits[tc_index] -= pkt_len;
1635 pipe->tb_credits -= pkt_len;
1636 pipe->tc_credits[tc_index] -= pkt_len;
1637 pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1642 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1644 #endif /* RTE_SCHED_TS_CREDITS_CHECK */
1647 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1649 struct rte_sched_grinder *grinder = port->grinder + pos;
1650 struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1651 struct rte_mbuf *pkt = grinder->pkt;
1652 uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1654 #if RTE_SCHED_TS_CREDITS_CHECK
1655 if (!grinder_credits_check(port, pos)) {
1660 /* Advance port time */
1661 port->time += pkt_len;
1664 port->pkts_out[port->n_pkts_out ++] = pkt;
1666 grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1667 if (queue->qr == queue->qw) {
1668 uint32_t qindex = grinder->qindex[grinder->qpos];
1670 rte_bitmap_clear(port->bmp, qindex);
1671 grinder->qmask &= ~(1 << grinder->qpos);
1672 grinder->wrr_mask[grinder->qpos] = 0;
1673 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1676 /* Reset pipe loop detection */
1677 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1678 grinder->productive = 1;
1683 #if RTE_SCHED_OPTIMIZATIONS
1686 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1688 __m128i index = _mm_set1_epi32 (base_pipe);
1689 __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1690 __m128i res = _mm_cmpeq_epi32(pipes, index);
1691 pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1692 pipes = _mm_cmpeq_epi32(pipes, index);
1693 res = _mm_or_si128(res, pipes);
1695 if (_mm_testz_si128(res, res))
1704 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1708 for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i ++) {
1709 if (port->grinder_base_bmp_pos[i] == base_pipe) {
1717 #endif /* RTE_SCHED_OPTIMIZATIONS */
1720 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1722 struct rte_sched_grinder *grinder = port->grinder + pos;
1725 grinder->pcache_w = 0;
1726 grinder->pcache_r = 0;
1728 w[0] = (uint16_t) bmp_slab;
1729 w[1] = (uint16_t) (bmp_slab >> 16);
1730 w[2] = (uint16_t) (bmp_slab >> 32);
1731 w[3] = (uint16_t) (bmp_slab >> 48);
1733 grinder->pcache_qmask[grinder->pcache_w] = w[0];
1734 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1735 grinder->pcache_w += (w[0] != 0);
1737 grinder->pcache_qmask[grinder->pcache_w] = w[1];
1738 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1739 grinder->pcache_w += (w[1] != 0);
1741 grinder->pcache_qmask[grinder->pcache_w] = w[2];
1742 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1743 grinder->pcache_w += (w[2] != 0);
1745 grinder->pcache_qmask[grinder->pcache_w] = w[3];
1746 grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1747 grinder->pcache_w += (w[3] != 0);
1751 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1753 struct rte_sched_grinder *grinder = port->grinder + pos;
1756 grinder->tccache_w = 0;
1757 grinder->tccache_r = 0;
1759 b[0] = (uint8_t) (qmask & 0xF);
1760 b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1761 b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1762 b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1764 grinder->tccache_qmask[grinder->tccache_w] = b[0];
1765 grinder->tccache_qindex[grinder->tccache_w] = qindex;
1766 grinder->tccache_w += (b[0] != 0);
1768 grinder->tccache_qmask[grinder->tccache_w] = b[1];
1769 grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1770 grinder->tccache_w += (b[1] != 0);
1772 grinder->tccache_qmask[grinder->tccache_w] = b[2];
1773 grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1774 grinder->tccache_w += (b[2] != 0);
1776 grinder->tccache_qmask[grinder->tccache_w] = b[3];
1777 grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1778 grinder->tccache_w += (b[3] != 0);
1782 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1784 struct rte_sched_grinder *grinder = port->grinder + pos;
1785 struct rte_mbuf **qbase;
1789 if (grinder->tccache_r == grinder->tccache_w) {
1793 qindex = grinder->tccache_qindex[grinder->tccache_r];
1794 qbase = rte_sched_port_qbase(port, qindex);
1795 qsize = rte_sched_port_qsize(port, qindex);
1797 grinder->tc_index = (qindex >> 2) & 0x3;
1798 grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1799 grinder->qsize = qsize;
1801 grinder->qindex[0] = qindex;
1802 grinder->qindex[1] = qindex + 1;
1803 grinder->qindex[2] = qindex + 2;
1804 grinder->qindex[3] = qindex + 3;
1806 grinder->queue[0] = port->queue + qindex;
1807 grinder->queue[1] = port->queue + qindex + 1;
1808 grinder->queue[2] = port->queue + qindex + 2;
1809 grinder->queue[3] = port->queue + qindex + 3;
1811 grinder->qbase[0] = qbase;
1812 grinder->qbase[1] = qbase + qsize;
1813 grinder->qbase[2] = qbase + 2 * qsize;
1814 grinder->qbase[3] = qbase + 3 * qsize;
1816 grinder->tccache_r ++;
1821 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1823 struct rte_sched_grinder *grinder = port->grinder + pos;
1824 uint32_t pipe_qindex;
1825 uint16_t pipe_qmask;
1827 if (grinder->pcache_r < grinder->pcache_w) {
1828 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1829 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1830 grinder->pcache_r ++;
1832 uint64_t bmp_slab = 0;
1833 uint32_t bmp_pos = 0;
1835 /* Get another non-empty pipe group */
1836 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0)) {
1841 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1844 /* Return if pipe group already in one of the other grinders */
1845 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1846 if (unlikely(grinder_pipe_exists(port, bmp_pos))) {
1849 port->grinder_base_bmp_pos[pos] = bmp_pos;
1851 /* Install new pipe group into grinder's pipe cache */
1852 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1854 pipe_qmask = grinder->pcache_qmask[0];
1855 pipe_qindex = grinder->pcache_qindex[0];
1856 grinder->pcache_r = 1;
1859 /* Install new pipe in the grinder */
1860 grinder->pindex = pipe_qindex >> 4;
1861 grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1862 grinder->pipe = port->pipe + grinder->pindex;
1863 grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1864 grinder->productive = 0;
1866 grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1867 grinder_next_tc(port, pos);
1869 /* Check for pipe exhaustion */
1870 if (grinder->pindex == port->pipe_loop) {
1871 port->pipe_exhaustion = 1;
1872 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1878 #if RTE_SCHED_WRR == 0
1880 #define grinder_wrr_load(a,b)
1882 #define grinder_wrr_store(a,b)
1885 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1887 struct rte_sched_grinder *grinder = port->grinder + pos;
1888 uint64_t slab = grinder->qmask;
1890 if (rte_bsf64(slab, &grinder->qpos) == 0) {
1891 rte_panic("grinder wrr\n");
1895 #elif RTE_SCHED_WRR == 1
1898 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1900 struct rte_sched_grinder *grinder = port->grinder + pos;
1901 struct rte_sched_pipe *pipe = grinder->pipe;
1902 struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1903 uint32_t tc_index = grinder->tc_index;
1904 uint32_t qmask = grinder->qmask;
1907 qindex = tc_index * 4;
1909 grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1910 grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1911 grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1912 grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1914 grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1915 grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1916 grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1917 grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1919 grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1920 grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1921 grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1922 grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1926 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1928 struct rte_sched_grinder *grinder = port->grinder + pos;
1929 struct rte_sched_pipe *pipe = grinder->pipe;
1930 uint32_t tc_index = grinder->tc_index;
1933 qindex = tc_index * 4;
1935 pipe->wrr_tokens[qindex] = (uint8_t) ((grinder->wrr_tokens[0] & grinder->wrr_mask[0]) >> RTE_SCHED_WRR_SHIFT);
1936 pipe->wrr_tokens[qindex + 1] = (uint8_t) ((grinder->wrr_tokens[1] & grinder->wrr_mask[1]) >> RTE_SCHED_WRR_SHIFT);
1937 pipe->wrr_tokens[qindex + 2] = (uint8_t) ((grinder->wrr_tokens[2] & grinder->wrr_mask[2]) >> RTE_SCHED_WRR_SHIFT);
1938 pipe->wrr_tokens[qindex + 3] = (uint8_t) ((grinder->wrr_tokens[3] & grinder->wrr_mask[3]) >> RTE_SCHED_WRR_SHIFT);
1942 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1944 struct rte_sched_grinder *grinder = port->grinder + pos;
1945 uint16_t wrr_tokens_min;
1947 grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1948 grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1949 grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1950 grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1952 grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1953 wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1955 grinder->wrr_tokens[0] -= wrr_tokens_min;
1956 grinder->wrr_tokens[1] -= wrr_tokens_min;
1957 grinder->wrr_tokens[2] -= wrr_tokens_min;
1958 grinder->wrr_tokens[3] -= wrr_tokens_min;
1963 #error Invalid value for RTE_SCHED_WRR
1965 #endif /* RTE_SCHED_WRR */
1967 #define grinder_evict(port, pos)
1970 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1972 struct rte_sched_grinder *grinder = port->grinder + pos;
1974 rte_prefetch0(grinder->pipe);
1975 rte_prefetch0(grinder->queue[0]);
1979 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1981 struct rte_sched_grinder *grinder = port->grinder + pos;
1982 uint16_t qsize, qr[4];
1984 qsize = grinder->qsize;
1985 qr[0] = grinder->queue[0]->qr & (qsize - 1);
1986 qr[1] = grinder->queue[1]->qr & (qsize - 1);
1987 qr[2] = grinder->queue[2]->qr & (qsize - 1);
1988 qr[3] = grinder->queue[3]->qr & (qsize - 1);
1990 rte_prefetch0(grinder->qbase[0] + qr[0]);
1991 rte_prefetch0(grinder->qbase[1] + qr[1]);
1993 grinder_wrr_load(port, pos);
1994 grinder_wrr(port, pos);
1996 rte_prefetch0(grinder->qbase[2] + qr[2]);
1997 rte_prefetch0(grinder->qbase[3] + qr[3]);
2001 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2003 struct rte_sched_grinder *grinder = port->grinder + pos;
2004 uint32_t qpos = grinder->qpos;
2005 struct rte_mbuf **qbase = grinder->qbase[qpos];
2006 uint16_t qsize = grinder->qsize;
2007 uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2009 grinder->pkt = qbase[qr];
2010 rte_prefetch0(grinder->pkt);
2012 if (unlikely((qr & 0x7) == 7)) {
2013 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2015 rte_prefetch0(qbase + qr_next);
2019 static inline uint32_t
2020 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2022 struct rte_sched_grinder *grinder = port->grinder + pos;
2024 switch (grinder->state) {
2025 case e_GRINDER_PREFETCH_PIPE:
2027 if (grinder_next_pipe(port, pos)) {
2028 grinder_prefetch_pipe(port, pos);
2029 port->busy_grinders ++;
2031 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2038 case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2040 struct rte_sched_pipe *pipe = grinder->pipe;
2042 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2043 grinder_prefetch_tc_queue_arrays(port, pos);
2044 grinder_credits_update(port, pos);
2046 grinder->state = e_GRINDER_PREFETCH_MBUF;
2050 case e_GRINDER_PREFETCH_MBUF:
2052 grinder_prefetch_mbuf(port, pos);
2054 grinder->state = e_GRINDER_READ_MBUF;
2058 case e_GRINDER_READ_MBUF:
2060 uint32_t result = 0;
2062 result = grinder_schedule(port, pos);
2064 /* Look for next packet within the same TC */
2065 if (result && grinder->qmask) {
2066 grinder_wrr(port, pos);
2067 grinder_prefetch_mbuf(port, pos);
2071 grinder_wrr_store(port, pos);
2073 /* Look for another active TC within same pipe */
2074 if (grinder_next_tc(port, pos)) {
2075 grinder_prefetch_tc_queue_arrays(port, pos);
2077 grinder->state = e_GRINDER_PREFETCH_MBUF;
2080 if ((grinder->productive == 0) && (port->pipe_loop == RTE_SCHED_PIPE_INVALID)) {
2081 port->pipe_loop = grinder->pindex;
2083 grinder_evict(port, pos);
2085 /* Look for another active pipe */
2086 if (grinder_next_pipe(port, pos)) {
2087 grinder_prefetch_pipe(port, pos);
2089 grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2093 /* No active pipe found */
2094 port->busy_grinders --;
2096 grinder->state = e_GRINDER_PREFETCH_PIPE;
2101 rte_panic("Algorithmic error (invalid state)\n");
2107 rte_sched_port_time_resync(struct rte_sched_port *port)
2109 uint64_t cycles = rte_get_tsc_cycles();
2110 uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2111 double bytes_diff = ((double) cycles_diff) / port->cycles_per_byte;
2113 /* Advance port time */
2114 port->time_cpu_cycles = cycles;
2115 port->time_cpu_bytes += (uint64_t) bytes_diff;
2116 if (port->time < port->time_cpu_bytes) {
2117 port->time = port->time_cpu_bytes;
2120 /* Reset pipe loop detection */
2121 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2125 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2129 /* Check if any exception flag is set */
2130 exceptions = (second_pass && port->busy_grinders == 0) ||
2131 (port->pipe_exhaustion == 1);
2133 /* Clear exception flags */
2134 port->pipe_exhaustion = 0;
2140 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2144 port->pkts_out = pkts;
2145 port->n_pkts_out = 0;
2147 rte_sched_port_time_resync(port);
2149 /* Take each queue in the grinder one step further */
2150 for (i = 0, count = 0; ; i ++) {
2151 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2152 if ((count == n_pkts) ||
2153 rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {