2 * Copyright Droids Corporation, Microb Technology, Eirbot (2005)
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 * Revision : $Id: timers_synch.c,v 1.4.4.2 2006-11-30 22:00:31 zer0 Exp $
23 /** \file timers_synch.c
24 * \brief this code synchronizes the timers in order to optain synchronous PWMs
26 * \todo Test this function on various uC
27 * \todo modify if there exists other prescaler configurations
29 * \test This feature is not 100% shure for the moment, but has been tested on M32 and M128
32 * this code synchronizes the timers in order to optain synchronous PWMs,
33 * such a feature can be used for driving 3-phase motors with PWMS from different timers
36 * to synch PWMs you need to enshure that the timers have same prescales,
37 * and the same PWM mode
39 * There is one little side effect : if there are common prescalers in your controller they will all be reset
45 #include <pwm.h> // for config
47 #include <timers_synch.h>
51 #if ( (defined TIMER0_SYNCH) || (defined TIMER1_SYNCH) || (defined TIMER2_SYNCH) || (defined TIMER3_SYNCH) )
58 // computations of prescale for sync
60 #undef PWM_SYNCH_PRESCALE
61 #define PWM_SYNCH_PRESCALE TIMER0_PRESCALE
64 #undef PWM_SYNCH_PRESCALE
65 #define PWM_SYNCH_PRESCALE TIMER1_PRESCALE
68 #undef PWM_SYNCH_PRESCALE
69 #define PWM_SYNCH_PRESCALE TIMER2_PRESCALE
72 #undef PWM_SYNCH_PRESCALE
73 #define PWM_SYNCH_PRESCALE TIMER3_PRESCALE
76 // verify that all the prescales are the same
79 #if (PWM_SYNCH_PRESCALE != TIMER0_PRESCALE)
80 #error TIMER0: not the same prescaler for synchronized PWMs, please verify your pwm_config.h
84 #if (PWM_SYNCH_PRESCALE != TIMER1_PRESCALE)
85 #error TIMER1: not the same prescaler for synchronized PWMs, please verify your pwm_config.h
89 #if (PWM_SYNCH_PRESCALE != TIMER2_PRESCALE)
90 #error TIMER2: not the same prescaler for synchronized PWMs, please verify your pwm_config.h
94 #if (PWM_SYNCH_PRESCALE != TIMER3_PRESCALE)
95 #error TIMER3: not the same prescaler for synchronized PWMs, please verify your pwm_config.h
101 // step between timer activations
103 #if (PWM_SYNCH_PRESCALE == TIMER_8_PRESCALE_1)
114 //***************************************************
115 // register declarations
116 //***************************************************
119 register uint8_t tccr0;
122 register uint8_t tccr1b;
125 register uint8_t tccr2;
128 register uint8_t tccr3b;
131 register uint8_t sfior;
133 //***************************************************
134 // save state and stop timers
135 //***************************************************
154 //***************************************************
155 // the timers are now stopped, we set the TCNT's to given values
156 // set timers to given values
157 // the timers would then be startes one after another,
158 // and synchronize themselves while starting with the right offset
159 //***************************************************
173 TCNT3L = 4l * STEP; // one more, cause TCCR acess takes one instruction more (see TCCR3B acess, down)
176 //***************************************************
177 // resetting prescalers (some could influence unwanted timers, enshure that there are no problems with that )
178 // this is done this manner to be absolutely synchronous
179 //***************************************************
184 #if (defined PSR321) && ( (defined TIMER3_SYNCH) || (defined TIMER2_SYNCH) || (defined TIMER1_SYNCH) )
185 sfior |= (1<<PSR321);
187 #if (defined PSR0) && (defined TIMER0_SYNCH)
191 #if (defined PSR10) && ( (defined TIMER1_SYNCH) || (defined TIMER0_SYNCH))
194 #if (defined PSR2) && (defined TIMER2_SYNCH)
198 //////////////////////////////////////////////////
199 // here begins the time critical section
200 // this all is done within less than 8 cycles, to assure function even with a prescaler set to 8
201 //////////////////////////////////////////////////
207 //***************************************************
209 //***************************************************
227 TCCR3B = tccr3b; // this instruction takes 2 cycles (on ATMEGA128)
229 /* nop(); // optimized, not necessary, coz nothing after
233 //////////////////////////////////////////////////
234 // here ends the time critical section
235 // this all is done within less than 8 cycles, to assure function even with a prescaler set to 8
236 //////////////////////////////////////////////////
247 #endif // ( (defined TIMER0_SYNCH) || (defined TIMER1_SYNCH) || (defined TIMER2_SYNCH) || (defined TIMER3_SYNCH) )