+ PCI_DEVICE_ID_MELLANOX_CONNECTX5BF = 0xa2d2,
+ PCI_DEVICE_ID_MELLANOX_CONNECTX5BFVF = 0xa2d3,
+ PCI_DEVICE_ID_MELLANOX_CONNECTX6 = 0x101b,
+ PCI_DEVICE_ID_MELLANOX_CONNECTX6VF = 0x101c,
+};
+
+/* Request types for IPC. */
+enum mlx5_mp_req_type {
+ MLX5_MP_REQ_VERBS_CMD_FD = 1,
+ MLX5_MP_REQ_CREATE_MR,
+ MLX5_MP_REQ_START_RXTX,
+ MLX5_MP_REQ_STOP_RXTX,
+};
+
+/* Pameters for IPC. */
+struct mlx5_mp_param {
+ enum mlx5_mp_req_type type;
+ int port_id;
+ int result;
+ RTE_STD_C11
+ union {
+ uintptr_t addr; /* MLX5_MP_REQ_CREATE_MR */
+ } args;
+};
+
+/** Request timeout for IPC. */
+#define MLX5_MP_REQ_TIMEOUT_SEC 5
+
+/** Key string for IPC. */
+#define MLX5_MP_NAME "net_mlx5_mp"
+
+/* Recognized Infiniband device physical port name types. */
+enum mlx5_phys_port_name_type {
+ MLX5_PHYS_PORT_NAME_TYPE_NOTSET = 0, /* Not set. */
+ MLX5_PHYS_PORT_NAME_TYPE_LEGACY, /* before kernel ver < 5.0 */
+ MLX5_PHYS_PORT_NAME_TYPE_UPLINK, /* p0, kernel ver >= 5.0 */
+ MLX5_PHYS_PORT_NAME_TYPE_PFVF, /* pf0vf0, kernel ver >= 5.0 */
+ MLX5_PHYS_PORT_NAME_TYPE_UNKNOWN, /* Unrecognized. */
+};
+
+/** Switch information returned by mlx5_nl_switch_info(). */
+struct mlx5_switch_info {
+ uint32_t master:1; /**< Master device. */
+ uint32_t representor:1; /**< Representor device. */
+ enum mlx5_phys_port_name_type name_type; /** < Port name type. */
+ int32_t pf_num; /**< PF number (valid for pfxvfx format only). */
+ int32_t port_name; /**< Representor port name. */
+ uint64_t switch_id; /**< Switch identifier. */
+};
+
+LIST_HEAD(mlx5_dev_list, mlx5_ibv_shared);
+
+/* Shared data between primary and secondary processes. */
+struct mlx5_shared_data {
+ rte_spinlock_t lock;
+ /* Global spinlock for primary and secondary processes. */
+ int init_done; /* Whether primary has done initialization. */
+ unsigned int secondary_cnt; /* Number of secondary processes init'd. */
+ struct mlx5_dev_list mem_event_cb_list;
+ rte_rwlock_t mem_event_rwlock;
+};
+
+/* Per-process data structure, not visible to other processes. */
+struct mlx5_local_data {
+ int init_done; /* Whether a secondary has done initialization. */
+};
+
+extern struct mlx5_shared_data *mlx5_shared_data;
+
+struct mlx5_counter_ctrl {
+ /* Name of the counter. */
+ char dpdk_name[RTE_ETH_XSTATS_NAME_SIZE];
+ /* Name of the counter on the device table. */
+ char ctr_name[RTE_ETH_XSTATS_NAME_SIZE];
+ uint32_t ib:1; /**< Nonzero for IB counters. */