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mbuf: remove rte_ctrlmbuf
[dpdk.git]
/
lib
/
librte_pmd_e1000
/
igb_rxtx.c
diff --git
a/lib/librte_pmd_e1000/igb_rxtx.c
b/lib/librte_pmd_e1000/igb_rxtx.c
index
74bfb1f
..
b0112be
100644
(file)
--- a/
lib/librte_pmd_e1000/igb_rxtx.c
+++ b/
lib/librte_pmd_e1000/igb_rxtx.c
@@
-73,13
+73,24
@@
#include "e1000/e1000_api.h"
#include "e1000_ethdev.h"
#include "e1000/e1000_api.h"
#include "e1000_ethdev.h"
+#define IGB_RSS_OFFLOAD_ALL ( \
+ ETH_RSS_IPV4 | \
+ ETH_RSS_IPV4_TCP | \
+ ETH_RSS_IPV6 | \
+ ETH_RSS_IPV6_EX | \
+ ETH_RSS_IPV6_TCP | \
+ ETH_RSS_IPV6_TCP_EX | \
+ ETH_RSS_IPV4_UDP | \
+ ETH_RSS_IPV6_UDP | \
+ ETH_RSS_IPV6_UDP_EX)
+
static inline struct rte_mbuf *
rte_rxmbuf_alloc(struct rte_mempool *mp)
{
struct rte_mbuf *m;
m = __rte_mbuf_raw_alloc(mp);
static inline struct rte_mbuf *
rte_rxmbuf_alloc(struct rte_mempool *mp)
{
struct rte_mbuf *m;
m = __rte_mbuf_raw_alloc(mp);
- __rte_mbuf_sanity_check_raw(m,
RTE_MBUF_PKT,
0);
+ __rte_mbuf_sanity_check_raw(m, 0);
return (m);
}
return (m);
}
@@
-1078,7
+1089,7
@@
ring_dma_zone_reserve(struct rte_eth_dev *dev, const char *ring_name,
char z_name[RTE_MEMZONE_NAMESIZE];
const struct rte_memzone *mz;
char z_name[RTE_MEMZONE_NAMESIZE];
const struct rte_memzone *mz;
-
rte_
snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
+ snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
dev->driver->pci_drv.name, ring_name,
dev->data->port_id, queue_id);
mz = rte_memzone_lookup(z_name);
dev->driver->pci_drv.name, ring_name,
dev->data->port_id, queue_id);
mz = rte_memzone_lookup(z_name);
@@
-1212,8
+1223,10
@@
eth_igb_tx_queue_setup(struct rte_eth_dev *dev,
"the TX WTHRESH value to 4, 8, or 16.\n");
/* Free memory prior to re-allocation if needed */
"the TX WTHRESH value to 4, 8, or 16.\n");
/* Free memory prior to re-allocation if needed */
- if (dev->data->tx_queues[queue_idx] != NULL)
+ if (dev->data->tx_queues[queue_idx] != NULL)
{
igb_tx_queue_release(dev->data->tx_queues[queue_idx]);
igb_tx_queue_release(dev->data->tx_queues[queue_idx]);
+ dev->data->tx_queues[queue_idx] = NULL;
+ }
/* First allocate the tx queue data structure */
txq = rte_zmalloc("ethdev TX queue", sizeof(struct igb_tx_queue),
/* First allocate the tx queue data structure */
txq = rte_zmalloc("ethdev TX queue", sizeof(struct igb_tx_queue),
@@
-1524,7
+1537,7
@@
igb_hw_rss_hash_set(struct e1000_hw *hw, struct rte_eth_rss_conf *rss_conf)
uint8_t *hash_key;
uint32_t rss_key;
uint32_t mrqc;
uint8_t *hash_key;
uint32_t rss_key;
uint32_t mrqc;
- uint
16
_t rss_hf;
+ uint
64
_t rss_hf;
uint16_t i;
hash_key = rss_conf->rss_key;
uint16_t i;
hash_key = rss_conf->rss_key;
@@
-1569,7
+1582,7
@@
eth_igb_rss_hash_update(struct rte_eth_dev *dev,
{
struct e1000_hw *hw;
uint32_t mrqc;
{
struct e1000_hw *hw;
uint32_t mrqc;
- uint
16
_t rss_hf;
+ uint
64
_t rss_hf;
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@
-1579,7
+1592,7
@@
eth_igb_rss_hash_update(struct rte_eth_dev *dev,
* initialization time, or does not attempt to enable RSS, if RSS was
* disabled at initialization time.
*/
* initialization time, or does not attempt to enable RSS, if RSS was
* disabled at initialization time.
*/
- rss_hf = rss_conf->rss_hf;
+ rss_hf = rss_conf->rss_hf
& IGB_RSS_OFFLOAD_ALL
;
mrqc = E1000_READ_REG(hw, E1000_MRQC);
if (!(mrqc & E1000_MRQC_ENABLE_MASK)) { /* RSS disabled */
if (rss_hf != 0) /* Enable RSS */
mrqc = E1000_READ_REG(hw, E1000_MRQC);
if (!(mrqc & E1000_MRQC_ENABLE_MASK)) { /* RSS disabled */
if (rss_hf != 0) /* Enable RSS */
@@
-1600,7
+1613,7
@@
int eth_igb_rss_hash_conf_get(struct rte_eth_dev *dev,
uint8_t *hash_key;
uint32_t rss_key;
uint32_t mrqc;
uint8_t *hash_key;
uint32_t rss_key;
uint32_t mrqc;
- uint
16
_t rss_hf;
+ uint
64
_t rss_hf;
uint16_t i;
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
uint16_t i;
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
@@
-1676,7
+1689,7
@@
igb_rss_configure(struct rte_eth_dev *dev)
* the RSS hash of input packets.
*/
rss_conf = dev->data->dev_conf.rx_adv_conf.rss_conf;
* the RSS hash of input packets.
*/
rss_conf = dev->data->dev_conf.rx_adv_conf.rss_conf;
- if (
rss_conf.rss_hf
== 0) {
+ if (
(rss_conf.rss_hf & IGB_RSS_OFFLOAD_ALL)
== 0) {
igb_rss_disable(dev);
return;
}
igb_rss_disable(dev);
return;
}
@@
-1995,6
+2008,11
@@
eth_igb_rx_init(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_RXDCTL(rxq->reg_idx), rxdctl);
}
E1000_WRITE_REG(hw, E1000_RXDCTL(rxq->reg_idx), rxdctl);
}
+ if (dev->data->dev_conf.rxmode.enable_scatter) {
+ dev->rx_pkt_burst = eth_igb_recv_scattered_pkts;
+ dev->data->scattered_rx = 1;
+ }
+
/*
* Setup BSIZE field of RCTL register, if needed.
* Buffer sizes >= 1024 are not [supposed to be] setup in the RCTL
/*
* Setup BSIZE field of RCTL register, if needed.
* Buffer sizes >= 1024 are not [supposed to be] setup in the RCTL
@@
-2264,6
+2282,11
@@
eth_igbvf_rx_init(struct rte_eth_dev *dev)
E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
}
E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
}
+ if (dev->data->dev_conf.rxmode.enable_scatter) {
+ dev->rx_pkt_burst = eth_igb_recv_scattered_pkts;
+ dev->data->scattered_rx = 1;
+ }
+
/*
* Setup the HW Rx Head and Tail Descriptor Pointers.
* This needs to be done after enable.
/*
* Setup the HW Rx Head and Tail Descriptor Pointers.
* This needs to be done after enable.