mk: change dpaa2 machine flag to cortex-a72

[dpdk.git] / config / defconfig_arm64-dpaa2-linuxapp-gcc

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 6e8f6fd..2304ab6 100644 (file)
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -34,13 +34,14 @@
 
 # NXP (Freescale) - Soc Architecture with WRIOP and QBMAN support
 CONFIG_RTE_MACHINE="dpaa2"
-CONFIG_RTE_ARCH_ARM_TUNE="cortex-a57+fp+simd"
+CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
 
 #
 # Compile Environment Abstraction Layer
 #
 CONFIG_RTE_MAX_LCORE=8
 CONFIG_RTE_MAX_NUMA_NODES=1
+CONFIG_RTE_CACHE_LINE_SIZE=64
 
 CONFIG_RTE_PKTMBUF_HEADROOM=256
 
@@ -49,6 +50,7 @@ CONFIG_RTE_PKTMBUF_HEADROOM=256
 #
 CONFIG_RTE_LIBRTE_DPAA2_MEMPOOL=y
 CONFIG_RTE_MBUF_DEFAULT_MEMPOOL_OPS="dpaa2"
+CONFIG_RTE_LIBRTE_DPAA2_USE_PHYS_IOVA=y
 
 #
 # Compile NXP DPAA2 FSL-MC Bus
@@ -64,3 +66,17 @@ CONFIG_RTE_LIBRTE_DPAA2_DEBUG_DRIVER=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_RX=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX=n
 CONFIG_RTE_LIBRTE_DPAA2_DEBUG_TX_FREE=n
+
+#
+# Compile NXP DPAA2 crypto sec driver for CAAM HW
+#
+CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC=y
+CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_INIT=n
+CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_DRIVER=n
+CONFIG_RTE_LIBRTE_DPAA2_SEC_DEBUG_RX=n
+
+#
+# Number of sessions to create in the session memory pool
+# on a single DPAA2 SEC device.
+#
+CONFIG_RTE_DPAA2_SEC_PMD_MAX_NB_SESSIONS=2048