crypto/qat: add SGL capability

[dpdk.git] / doc / guides / cryptodevs / qat.rst

diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst
index a8f9074..9ecd19b 100644 (file)
--- a/doc/guides/cryptodevs/qat.rst
+++ b/doc/guides/cryptodevs/qat.rst
@@ -42,6 +42,8 @@ The QAT PMD has support for:
 
 Cipher algorithms:
 
+* ``RTE_CRYPTO_CIPHER_3DES_CBC``
+* ``RTE_CRYPTO_CIPHER_3DES_CTR``
 * ``RTE_CRYPTO_CIPHER_AES128_CBC``
 * ``RTE_CRYPTO_CIPHER_AES192_CBC``
 * ``RTE_CRYPTO_CIPHER_AES256_CBC``
@@ -52,6 +54,7 @@ Cipher algorithms:
 * ``RTE_CRYPTO_CIPHER_AES_GCM``
 * ``RTE_CRYPTO_CIPHER_NULL``
 * ``RTE_CRYPTO_CIPHER_KASUMI_F8``
+* ``RTE_CRYPTO_CIPHER_DES_CBC``
 
 Hash algorithms:
 
@@ -71,13 +74,10 @@ Hash algorithms:
 Limitations
 -----------
 
-* Chained mbufs are not supported.
-* Hash only is not supported except Snow3G UIA2 and KASUMI F9.
-* Cipher only is not supported except Snow3G UEA2 and KASUMI F8.
+* Hash only is not supported except SNOW 3G UIA2 and KASUMI F9.
 * Only supports the session-oriented API implementation (session-less APIs are not supported).
-* Not performance tuned.
-* Snow3g(UEA2) and KASUMI(F8) supported only if cipher length, cipher offset fields are byte-aligned.
-* Snow3g(UIA2) and KASUMI(F9) supported only if hash length, hash offset fields are byte-aligned.
+* SNOW 3G (UEA2) and KASUMI (F8) supported only if cipher length, cipher offset fields are byte-aligned.
+* SNOW 3G (UIA2) and KASUMI (F9) supported only if hash length, hash offset fields are byte-aligned.
 * No BSD support as BSD QAT kernel driver not available.
 
 
@@ -199,7 +199,9 @@ The steps below assume you are:
 * Running DPDK on a platform with one ``DH895xCC`` device.
 * On a kernel at least version 4.4.
 
-In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+In BIOS ensure that SRIOV is enabled and either
+a) disable VT-d or
+b) enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
 
 Ensure the QAT driver is loaded on your system, by executing::
 
@@ -258,7 +260,9 @@ The steps below assume you are:
 * Running DPDK on a platform with one ``C62x`` device.
 * On a kernel at least version 4.5.
 
-In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+In BIOS ensure that SRIOV is enabled and either
+a) disable VT-d or
+b) enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
 
 Ensure the QAT driver is loaded on your system, by executing::
 
@@ -302,7 +306,9 @@ The steps below assume you are:
 * Running DPDK on a platform with one ``C3xxx`` device.
 * On a kernel at least version 4.5.
 
-In BIOS ensure that SRIOV is enabled and VT-d is disabled.
+In BIOS ensure that SRIOV is enabled and either
+a) disable VT-d or
+b) enable VT-d and set ``"intel_iommu=on iommu=pt"`` in the grub file.
 
 Ensure the QAT driver is loaded on your system, by executing::
 
@@ -399,3 +405,11 @@ if yours are different adjust the unbind command below::
    echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id
 
 You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver.
+
+
+The other way to bind the VFs to the DPDK UIO driver is by using the ``dpdk-devbind.py`` script:
+
+.. code-block:: console
+
+    cd $RTE_SDK
+    ./usertools/dpdk-devbind.py -b igb_uio 0000:03:01.1