doc: add raw encap/decap limitations in mlx5 guide

[dpdk.git] / doc / guides / nics / mlx5.rst

diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst
index 5ab7c07..7fac9d1 100644 (file)
--- a/doc/guides/nics/mlx5.rst
+++ b/doc/guides/nics/mlx5.rst
@@ -202,6 +202,16 @@ Limitations
   - can be applied to VF ports only.
   - must specify PF port action (packet redirection from VF to PF).
 
+- Raw encapsulation:
+
+  - The input buffer, used as outer header, is not validated.
+
+- Raw decapsulation:
+
+  - The decapsulation is always done up to the outermost tunnel detected by the HW.
+  - The input buffer, providing the removal size, is not validated.
+  - The buffer size must match the length of the headers to be removed.
+
 - ICMP/ICMP6 code/type matching, IP-in-IP and MPLS flow matching are all
   mutually exclusive features which cannot be supported together
   (see :ref:`mlx5_firmware_config`).
@@ -568,16 +578,17 @@ Run-time configuration
   The rdma core library can map doorbell register in two ways, depending on the
   environment variable "MLX5_SHUT_UP_BF":
 
-  - As regular cached memory, if the variable is either missing or set to zero.
+  - As regular cached memory (usually with write combining attribute), if the
+    variable is either missing or set to zero.
   - As non-cached memory, if the variable is present and set to not "0" value.
 
   The type of mapping may slightly affect the Tx performance, the optimal choice
   is strongly relied on the host architecture and should be deduced practically.
 
   If ``tx_db_nc`` is set to zero, the doorbell is forced to be mapped to regular
-  memory, the PMD will perform the extra write memory barrier after writing to
-  doorbell, it might increase the needed CPU clocks per packet to send, but
-  latency might be improved.
+  memory (with write combining), the PMD will perform the extra write memory barrier
+  after writing to doorbell, it might increase the needed CPU clocks per packet
+  to send, but latency might be improved.
 
   If ``tx_db_nc`` is set to one, the doorbell is forced to be mapped to non
   cached memory, the PMD will not perform the extra write memory barrier
@@ -1167,6 +1178,11 @@ Supported hardware offloads
    | | set_mac_src /       | |               | |               |
    | | set_mac_dst)        | |               | |               |
    +-----------------------+-----------------+-----------------+
+   | | Header rewrite      | | DPDK 20.02    | | DPDK 20.02    |
+   | | (set_dscp)          | | OFED 5.0      | | OFED 5.0      |
+   | |                     | | rdma-core 24  | | rdma-core 24  |
+   | |                     | | ConnectX-5    | | ConnectX-5    |
+   +-----------------------+-----------------+-----------------+
    | Jump                  | | DPDK 19.05    | | DPDK 19.02    |
    |                       | | OFED 4.7-1    | | OFED 4.7-1    |
    |                       | | rdma-core 24  | | N/A           |