net/mlx5: fix VLAN match for DV mode

[dpdk.git] / doc / guides / rel_notes / release_20_02.rst

diff --git a/doc/guides/rel_notes/release_20_02.rst b/doc/guides/rel_notes/release_20_02.rst
index ff309ac..3c7b5d7 100644 (file)
--- a/doc/guides/rel_notes/release_20_02.rst
+++ b/doc/guides/rel_notes/release_20_02.rst
@@ -70,6 +70,12 @@ New Features
   Added the new ``ionic`` net driver for Pensando Ethernet Network Adapters.
   See the :doc:`../nics/ionic` NIC guide for more details on this new driver.
 
+* **Updated Broadcom bnxt driver**
+
+  Updated Broadcom bnxt driver with new features and improvements, including:
+
+  * Added support for MARK action.
+
 * **Updated Hisilicon hns3 driver.**
 
   Updated Hisilicon hns3 driver with new features and improvements, including:
@@ -112,6 +118,7 @@ New Features
 
   * Added support for RSS using L3/L4 source/destination only.
   * Added support for matching on GTP tunnel header item.
+  * Removed limitation of matching on tagged/untagged packets (when using DV flow engine).
 
 * **Add new vDPA PMD based on Mellanox devices**
 
@@ -130,6 +137,14 @@ New Features
   * ECPM (Elliptic Curve Point Multiplication) is added to
     asymmetric crypto library specifications.
 
+* **Added synchronous Crypto burst API.**
+
+  A new API is introduced in crypto library to handle synchronous cryptographic
+  operations allowing to achieve performance gain for cryptodevs which use
+  CPU based acceleration, such as Intel AES-NI. An implementation for aesni_gcm
+  cryptodev is provided. The IPsec example application and ipsec library itself
+  were changed to allow utilization of this new feature.
+
 * **Added handling of mixed algorithms in encrypted digest requests in QAT PMD.**
 
   Added handling of mixed algorithms in encrypted digest hash-cipher
@@ -138,6 +153,13 @@ New Features
   Such algorithm combinations are not supported on GEN1/GEN2 hardware
   and executing the request returns RTE_CRYPTO_OP_STATUS_INVALID_SESSION.
 
+* **Queue-pairs are now thread-safe on Intel QuickAssist Technology (QAT) PMD.**
+
+  Queue-pairs are thread-safe on Intel CPUs but Queues are not (that is, within
+  a single queue-pair all enqueues to the TX queue must be done from one thread
+  and all dequeues from the RX queue must be done from one thread, but enqueues
+  and dequeues may be done in different threads.).
+
 * **Updated the ZUC PMD.**
 
   * Transistioned underlying library from libSSO ZUC to intel-ipsec-mb
@@ -145,6 +167,31 @@ New Features
   * Removed dynamic library limitation, so PMD can be built as a shared
     object now.
 
+* **Updated the KASUMI PMD.**
+
+  * Transistioned underlying library from libSSO KASUMI to intel-ipsec-mb
+    library (minimum version required 0.53).
+
+* **Updated the SNOW3G PMD.**
+
+  * Transistioned underlying library from libSSO SNOW3G to intel-ipsec-mb
+    library (minimum version required 0.53).
+
+* **Changed armv8 crypto PMD external dependency.**
+
+  armv8 crypto PMD now depends on Arm crypto library, and Marvell's
+  armv8 crypto library is not used anymore. Library name is changed
+  from armv8_crypto to AArch64crypto.
+
+* **Added inline IPsec support to Marvell OCTEON TX2 PMD.**
+
+  Added inline IPsec support to Marvell OCTEON TX2 PMD. With the feature,
+  applications would be able to offload entire IPsec offload to the hardware.
+  For the configured sessions, hardware will do the lookup and perform
+  decryption and IPsec transformation. For the outbound path, application
+  can submit a plain packet to the PMD, and it would be sent out on wire
+  after doing encryption and IPsec transformation of the packet.
+
 * **Added Marvell OCTEON TX2 End Point rawdev PMD.**
 
   Added a new OCTEON TX2 rawdev PMD for End Point mode of operation.
@@ -155,6 +202,11 @@ New Features
   Add event device support for ``l3fwd`` sample application. It demonstrates
   usage of poll and event mode IO mechanism under a single application.
 
+* **Added cycle-count mode to the compression performance tool.**
+
+  Enhanced the compression performance tool by adding a cycle-count mode
+  which can be used to help measure and tune hardware and software PMDs.
+
 
 Removed Items
 -------------
@@ -174,6 +226,15 @@ Removed Items
   the Technical Board decided to disable all the kernel modules
   by default from 20.02 version.
 
+* **Removed coalescing feature from Intel QuickAssist Technology (QAT) PMD.**
+
+  The internal tail write coalescing feature was removed as not compatible with
+  dual-thread feature. It was replaced with a threshold feature. At busy times
+  if only a small number of packets can be enqueued, each enqueue causes
+  an expensive MMIO write. These MMIO write occurrences can be optimised by using
+  the new threshold parameter on process start. Please see qat documentation for
+  more details.
+
 
 API Changes
 -----------