net/mlx5: create relaxed ordering memory regions

[dpdk.git] / doc / guides / rel_notes / release_20_05.rst

diff --git a/doc/guides/rel_notes/release_20_05.rst b/doc/guides/rel_notes/release_20_05.rst
index 7f2049a..8c39625 100644 (file)
--- a/doc/guides/rel_notes/release_20_05.rst
+++ b/doc/guides/rel_notes/release_20_05.rst
@@ -56,6 +56,16 @@ New Features
      Also, make sure to start the actual text at the margin.
      =========================================================
 
+* **Added Trace Library and Tracepoints**
+
+  A native implementation of ``common trace format(CTF)`` based trace library
+  has been added to provide the ability to add tracepoints in
+  application/library to get runtime trace/debug information for control and
+  fast APIs with minimum impact on fast path performance.
+  Typical trace overhead is ~20 cycles and instrumentation overhead is 1 cycle.
+  Added tracepoints in ``EAL``, ``ethdev``, ``cryptodev``, ``eventdev`` and
+  ``mempool`` libraries for important functions.
+
 * **Added new API for rte_ring.**
 
   * New synchronization modes for rte_ring.
@@ -72,11 +82,18 @@ New Features
   (enqueue/dequeue start; enqueue/dequeue finish). That allows user to inspect
   objects in the ring without removing them from it (aka MT safe peek).
 
+* **Updated the Intel ice driver.**
+
+  Updated the Intel ice driver with new features and improvements, including:
+
+  * Added support for DCF (Device Config Function) feature.
+
 * **Updated Mellanox mlx5 driver.**
 
   Updated Mellanox mlx5 driver with new features and improvements, including:
 
   * Added support for matching on IPv4 Time To Live and IPv6 Hop Limit.
+  * Added support for creating Relaxed Ordering Memory Regions.
 
 * **Updated the AESNI MB crypto PMD.**