#include <rte_eventdev.h>
#include <rte_byteorder.h>
+#include <dpaa_bits.h>
+
/* Compilation constants */
#define DQRR_MAXFILL 15
#define EQCR_ITHRESH 4 /* if EQCR congests, interrupt threshold */
* address (6 bits for address shift + 4 bits for the DQRR size).
*/
struct qm_dqrr_entry shadow_dqrr[QM_DQRR_SIZE]
- __attribute__((aligned(1024)));
+ __rte_aligned(1024);
#endif
};