*
* Copyright 2010-2012 Freescale Semiconductor, Inc.
* All rights reserved.
+ * Copyright 2019-2021 NXP
*
*/
#include <stdbool.h>
#include <net/if.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
#include <rte_ether.h>
#include <compat.h>
+#include <dpaa_list.h>
#ifndef FMAN_DEVICE_PATH
#define FMAN_DEVICE_PATH "/dev/mem"
fman_offline = 0,
fman_mac_1g,
fman_mac_10g,
+ fman_mac_2_5g,
};
struct mac_addr {
uint32_t thm; /**< 0x37C tx messages counter */
};
+#define BMI_PORT_CFG_FDOVR 0x02000000
+
struct rx_bmi_regs {
uint32_t fmbm_rcfg; /**< Rx Configuration */
uint32_t fmbm_rst; /**< Rx Status */
/* The index of this MAC (within the Fman it belongs to) */
uint8_t mac_idx;
/* The MAC address */
- struct ether_addr mac_addr;
+ struct rte_ether_addr mac_addr;
/* The Qman channel to schedule Tx FQs to */
u16 tx_channel_id;
+
+ uint8_t base_profile_id;
+ uint8_t num_profiles;
+
+ uint8_t is_shared_mac;
/* The hard-coded FQIDs for this interface. Note: this doesn't cover
* the PCD nor the "Rx default" FQIDs, which are configured via FMC
- * and its XML-based configuration.
+ * and its XML-based configuration. These values are being parsed from
+ * kernel device tree.
*/
+ uint32_t fqid_rx_pcd;
+ uint32_t fqid_rx_pcd_count;
uint32_t fqid_rx_def;
uint32_t fqid_rx_err;
uint32_t fqid_tx_err;
*/
struct __fman_if {
struct fman_if __if;
+ char node_name[IF_NAME_MAX_LEN];
char node_path[PATH_MAX];
uint64_t regs_size;
void *ccsr_map;