}
static __rte_always_inline void
-gen_key_snow3g(uint8_t *ck, uint32_t *keyx)
+gen_key_snow3g(const uint8_t *ck, uint32_t *keyx)
{
int i, base;
}
static __rte_always_inline int
-cpt_fc_ciph_validate_key(cipher_type_t type, struct cpt_ctx *cpt_ctx,
- uint16_t key_len)
+cpt_fc_ciph_set_type(cipher_type_t type, struct cpt_ctx *ctx, uint16_t key_len)
{
int fc_type = 0;
switch (type) {
if (unlikely(key_len != 16))
return -1;
/* No support for AEAD yet */
- if (unlikely(cpt_ctx->hash_type))
+ if (unlikely(ctx->hash_type))
return -1;
fc_type = ZUC_SNOW3G;
break;
if (unlikely(key_len != 16))
return -1;
/* No support for AEAD yet */
- if (unlikely(cpt_ctx->hash_type))
+ if (unlikely(ctx->hash_type))
return -1;
fc_type = KASUMI;
break;
default:
return -1;
}
- return fc_type;
+
+ ctx->fc_type = fc_type;
+ return 0;
}
static __rte_always_inline void
cpt_fc_ciph_set_key_passthrough(struct cpt_ctx *cpt_ctx, mc_fc_context_t *fctx)
{
cpt_ctx->enc_cipher = 0;
- CPT_P_ENC_CTRL(fctx).enc_cipher = 0;
+ fctx->enc.enc_cipher = 0;
}
static __rte_always_inline void
CPT_LOG_DP_ERR("Invalid AES key len");
return;
}
- CPT_P_ENC_CTRL(fctx).aes_key = aes_key_type;
+ fctx->enc.aes_key = aes_key_type;
}
static __rte_always_inline void
-cpt_fc_ciph_set_key_snow3g_uea2(struct cpt_ctx *cpt_ctx, uint8_t *key,
+cpt_fc_ciph_set_key_snow3g_uea2(struct cpt_ctx *cpt_ctx, const uint8_t *key,
uint16_t key_len)
{
uint32_t keyx[4];
cpt_ctx->snow3g = 1;
gen_key_snow3g(key, keyx);
memcpy(cpt_ctx->zs_ctx.ci_key, keyx, key_len);
- cpt_ctx->fc_type = ZUC_SNOW3G;
cpt_ctx->zsk_flags = 0;
}
static __rte_always_inline void
-cpt_fc_ciph_set_key_zuc_eea3(struct cpt_ctx *cpt_ctx, uint8_t *key,
+cpt_fc_ciph_set_key_zuc_eea3(struct cpt_ctx *cpt_ctx, const uint8_t *key,
uint16_t key_len)
{
cpt_ctx->snow3g = 0;
memcpy(cpt_ctx->zs_ctx.ci_key, key, key_len);
memcpy(cpt_ctx->zs_ctx.zuc_const, zuc_d, 32);
- cpt_ctx->fc_type = ZUC_SNOW3G;
cpt_ctx->zsk_flags = 0;
}
static __rte_always_inline void
-cpt_fc_ciph_set_key_kasumi_f8_ecb(struct cpt_ctx *cpt_ctx, uint8_t *key,
+cpt_fc_ciph_set_key_kasumi_f8_ecb(struct cpt_ctx *cpt_ctx, const uint8_t *key,
uint16_t key_len)
{
cpt_ctx->k_ecb = 1;
memcpy(cpt_ctx->k_ctx.ci_key, key, key_len);
cpt_ctx->zsk_flags = 0;
- cpt_ctx->fc_type = KASUMI;
}
static __rte_always_inline void
-cpt_fc_ciph_set_key_kasumi_f8_cbc(struct cpt_ctx *cpt_ctx, uint8_t *key,
+cpt_fc_ciph_set_key_kasumi_f8_cbc(struct cpt_ctx *cpt_ctx, const uint8_t *key,
uint16_t key_len)
{
memcpy(cpt_ctx->k_ctx.ci_key, key, key_len);
cpt_ctx->zsk_flags = 0;
- cpt_ctx->fc_type = KASUMI;
}
static __rte_always_inline int
-cpt_fc_ciph_set_key(void *ctx, cipher_type_t type, uint8_t *key,
+cpt_fc_ciph_set_key(void *ctx, cipher_type_t type, const uint8_t *key,
uint16_t key_len, uint8_t *salt)
{
struct cpt_ctx *cpt_ctx = ctx;
mc_fc_context_t *fctx = &cpt_ctx->fctx;
- uint64_t *ctrl_flags = NULL;
- int fc_type;
+ int ret;
- /* Validate key before proceeding */
- fc_type = cpt_fc_ciph_validate_key(type, cpt_ctx, key_len);
- if (unlikely(fc_type == -1))
+ ret = cpt_fc_ciph_set_type(type, cpt_ctx, key_len);
+ if (unlikely(ret))
return -1;
- if (fc_type == FC_GEN) {
- cpt_ctx->fc_type = FC_GEN;
- ctrl_flags = (uint64_t *)&(fctx->enc.enc_ctrl.flags);
- *ctrl_flags = rte_be_to_cpu_64(*ctrl_flags);
+ if (cpt_ctx->fc_type == FC_GEN) {
/*
* We need to always say IV is from DPTR as user can
* sometimes iverride IV per operation.
*/
- CPT_P_ENC_CTRL(fctx).iv_source = CPT_FROM_DPTR;
+ fctx->enc.iv_source = CPT_FROM_DPTR;
+
+ if (cpt_ctx->auth_key_len > 64)
+ return -1;
}
switch (type) {
case PASSTHROUGH:
cpt_fc_ciph_set_key_passthrough(cpt_ctx, fctx);
- goto fc_success;
+ goto success;
case DES3_CBC:
/* CPT performs DES using 3DES with the 8B DES-key
* replicated 2 more times to match the 24B 3DES-key.
break;
case DES3_ECB:
/* For DES3_ECB IV need to be from CTX. */
- CPT_P_ENC_CTRL(fctx).iv_source = CPT_FROM_CTX;
+ fctx->enc.iv_source = CPT_FROM_CTX;
break;
case AES_CBC:
case AES_ECB:
* and nothing else
*/
if (!key)
- goto fc_success;
+ goto success;
}
cpt_fc_ciph_set_key_set_aes_key_type(fctx, key_len);
break;
/* For GMAC auth, cipher must be NULL */
if (cpt_ctx->hash_type != GMAC_TYPE)
- CPT_P_ENC_CTRL(fctx).enc_cipher = type;
+ fctx->enc.enc_cipher = type;
memcpy(fctx->enc.encr_key, key, key_len);
-fc_success:
- *ctrl_flags = rte_cpu_to_be_64(*ctrl_flags);
-
success:
cpt_ctx->enc_cipher = type;
{
struct cpt_request_info *req;
uint32_t size, i;
- int32_t m_size;
uint16_t data_len, mac_len, key_len;
auth_type_t hash_type;
buf_ptr_t *meta_p;
m_vaddr = meta_p->vaddr;
m_dma = meta_p->dma_addr;
- m_size = meta_p->size;
/*
* Save initial space that followed app data for completion code &
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
req = m_vaddr;
size = sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
hash_type = ctx->hash_type;
mac_len = ctx->mac_len;
/*GP op header */
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(((uint16_t)hash_type << 8));
+ vq_cmd_w0.s.param2 = ((uint16_t)hash_type << 8);
if (ctx->hmac) {
opcode.s.major = CPT_MAJOR_OP_HMAC | CPT_DMA_MODE;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(key_len);
- vq_cmd_w0.s.dlen =
- rte_cpu_to_be_16((data_len + ROUNDUP8(key_len)));
+ vq_cmd_w0.s.param1 = key_len;
+ vq_cmd_w0.s.dlen = data_len + ROUNDUP8(key_len);
} else {
opcode.s.major = CPT_MAJOR_OP_HASH | CPT_DMA_MODE;
vq_cmd_w0.s.param1 = 0;
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(data_len);
+ vq_cmd_w0.s.dlen = data_len;
}
opcode.s.minor = 0;
/* Minor op is passthrough */
opcode.s.minor = 0x03;
/* Send out completion code only */
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(0x1);
+ vq_cmd_w0.s.param2 = 0x1;
}
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
/* DPTR has SG list */
in_buffer = m_vaddr;
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei1 = dptr_dma;
req->ist.ei2 = rptr_dma;
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
/* vq command w3 */
vq_cmd_w3.u64 = 0;
vq_cmd_word3_t vq_cmd_w3;
void *c_vaddr;
uint64_t c_dma;
- int32_t m_size;
opcode_info_t opcode;
meta_p = &fc_params->meta_buf;
m_vaddr = meta_p->vaddr;
m_dma = meta_p->dma_addr;
- m_size = meta_p->size;
encr_offset = ENCR_OFFSET(d_offs);
auth_offset = AUTH_OFFSET(d_offs);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* start cpt request info struct at 8 byte boundary */
size = (uint8_t *)RTE_PTR_ALIGN(m_vaddr, 8) -
size += sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
if (hash_type == GMAC_TYPE)
encr_data_len = 0;
/* GP op header */
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(auth_data_len);
+ vq_cmd_w0.s.param1 = encr_data_len;
+ vq_cmd_w0.s.param2 = auth_data_len;
/*
* In 83XX since we have a limitation of
* IV & Offset control word not part of instruction
req->alternate_caddr = (uint64_t *)((uint8_t *)dm_vaddr
+ outputlen - iv_len);
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(inputlen + OFF_CTRL_LEN);
+ vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major |= CPT_DMA_MODE;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei2 = rptr_dma;
}
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
ctx_dma = fc_params->ctx_buf.dma_addr +
offsetof(struct cpt_ctx, fctx);
/* vq command w3 */
uint32_t iv_offset = 0, size;
int32_t inputlen, outputlen, enc_dlen, auth_dlen;
struct cpt_ctx *cpt_ctx;
- int32_t hash_type, mac_len, m_size;
+ int32_t hash_type, mac_len;
uint8_t iv_len = 16;
struct cpt_request_info *req;
buf_ptr_t *meta_p, *aad_buf = NULL;
meta_p = &fc_params->meta_buf;
m_vaddr = meta_p->vaddr;
m_dma = meta_p->dma_addr;
- m_size = meta_p->size;
encr_offset = ENCR_OFFSET(d_offs);
auth_offset = AUTH_OFFSET(d_offs);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* start cpt request info structure at 8 byte alignment */
size = (uint8_t *)RTE_PTR_ALIGN(m_vaddr, 8) -
size += sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* Decryption */
opcode.s.major = CPT_MAJOR_OP_FC;
encr_offset = inputlen;
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(auth_data_len);
+ vq_cmd_w0.s.param1 = encr_data_len;
+ vq_cmd_w0.s.param2 = auth_data_len;
/*
* In 83XX since we have a limitation of
* hmac.
*/
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(inputlen + OFF_CTRL_LEN);
+ vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major |= CPT_DMA_MODE;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei2 = rptr_dma;
}
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
ctx_dma = fc_params->ctx_buf.dma_addr +
offsetof(struct cpt_ctx, fctx);
/* vq command w3 */
buf_ptr_t *buf_p;
uint32_t encr_offset = 0, auth_offset = 0;
uint32_t encr_data_len = 0, auth_data_len = 0;
- int flags, iv_len = 16, m_size;
+ int flags, iv_len = 16;
void *m_vaddr, *c_vaddr;
uint64_t m_dma, c_dma, offset_ctrl;
uint64_t *offset_vaddr, offset_dma;
buf_p = ¶ms->meta_buf;
m_vaddr = buf_p->vaddr;
m_dma = buf_p->dma_addr;
- m_size = buf_p->size;
cpt_ctx = params->ctx_buf.vaddr;
flags = cpt_ctx->zsk_flags;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* Reserve memory for cpt request info */
req = m_vaddr;
size = sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
- opcode.s.minor = ((1 << 6) | (snow3g << 5) | (0 << 4) |
+
+ opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
(0 << 3) | (flags & 0x7));
if (flags == 0x1) {
* GP op header, lengths are expected in bits.
*/
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(auth_data_len);
+ vq_cmd_w0.s.param1 = encr_data_len;
+ vq_cmd_w0.s.param2 = auth_data_len;
/*
* In 83XX since we have a limitation of
req->alternate_caddr = (uint64_t *)((uint8_t *)dm_vaddr
+ outputlen - iv_len);
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(inputlen + OFF_CTRL_LEN);
+ vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr
m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
m_dma += OFF_CTRL_LEN + iv_len;
- m_size -= OFF_CTRL_LEN + iv_len;
opcode.s.major |= CPT_DMA_MODE;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
/* DPTR has SG list */
in_buffer = m_vaddr;
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei2 = rptr_dma;
}
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
/* vq command w3 */
vq_cmd_w3.u64 = 0;
vq_cmd_w3.s.grp = 0;
buf_ptr_t *buf_p;
uint32_t encr_offset;
uint32_t encr_data_len;
- int flags, m_size;
+ int flags;
void *m_vaddr, *c_vaddr;
uint64_t m_dma, c_dma;
uint64_t *offset_vaddr, offset_dma;
buf_p = ¶ms->meta_buf;
m_vaddr = buf_p->vaddr;
m_dma = buf_p->dma_addr;
- m_size = buf_p->size;
/*
* Microcode expects offsets in bytes
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* Reserve memory for cpt request info */
req = m_vaddr;
size = sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
- opcode.s.minor = ((1 << 6) | (snow3g << 5) | (0 << 4) |
+
+ opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
(0 << 3) | (flags & 0x7));
/* consider iv len */
* GP op header, lengths are expected in bits.
*/
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
+ vq_cmd_w0.s.param1 = encr_data_len;
/*
* In 83XX since we have a limitation of
req->alternate_caddr = (uint64_t *)((uint8_t *)dm_vaddr
+ outputlen - iv_len);
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(inputlen + OFF_CTRL_LEN);
+ vq_cmd_w0.s.dlen = inputlen + OFF_CTRL_LEN;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
if (likely(iv_len)) {
uint32_t *iv_d = (uint32_t *)((uint8_t *)offset_vaddr
m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
m_dma += OFF_CTRL_LEN + iv_len;
- m_size -= OFF_CTRL_LEN + iv_len;
opcode.s.major |= CPT_DMA_MODE;
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.opcode = opcode.flags;
/* DPTR has SG list */
in_buffer = m_vaddr;
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei2 = rptr_dma;
}
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
/* vq command w3 */
vq_cmd_w3.u64 = 0;
vq_cmd_w3.s.grp = 0;
buf_ptr_t *buf_p;
uint32_t encr_offset, auth_offset;
uint32_t encr_data_len, auth_data_len;
- int flags, m_size;
+ int flags;
uint8_t *iv_s, *iv_d, iv_len = 8;
uint8_t dir = 0;
void *m_vaddr, *c_vaddr;
buf_p = ¶ms->meta_buf;
m_vaddr = buf_p->vaddr;
m_dma = buf_p->dma_addr;
- m_size = buf_p->size;
encr_offset = ENCR_OFFSET(d_offs) / 8;
auth_offset = AUTH_OFFSET(d_offs) / 8;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* Reserve memory for cpt request info */
req = m_vaddr;
size = sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
* GP op header, lengths are expected in bits.
*/
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
- vq_cmd_w0.s.param2 = rte_cpu_to_be_16(auth_data_len);
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.param1 = encr_data_len;
+ vq_cmd_w0.s.param2 = auth_data_len;
+ vq_cmd_w0.s.opcode = opcode.flags;
/* consider iv len */
if (flags == 0x0) {
m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
m_dma += OFF_CTRL_LEN + iv_len;
- m_size -= OFF_CTRL_LEN + iv_len;
/* DPTR has SG list */
in_buffer = m_vaddr;
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei1 = dptr_dma;
req->ist.ei2 = rptr_dma;
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
/* vq command w3 */
vq_cmd_w3.u64 = 0;
vq_cmd_w3.s.grp = 0;
buf_ptr_t *buf_p;
uint32_t encr_offset;
uint32_t encr_data_len;
- int flags, m_size;
+ int flags;
uint8_t dir = 0;
void *m_vaddr, *c_vaddr;
uint64_t m_dma, c_dma;
buf_p = ¶ms->meta_buf;
m_vaddr = buf_p->vaddr;
m_dma = buf_p->dma_addr;
- m_size = buf_p->size;
encr_offset = ENCR_OFFSET(d_offs) / 8;
encr_data_len = ENCR_DLEN(d_lens);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* Reserve memory for cpt request info */
req = m_vaddr;
size = sizeof(struct cpt_request_info);
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
opcode.s.major = CPT_MAJOR_OP_KASUMI | CPT_DMA_MODE;
* GP op header, lengths are expected in bits.
*/
vq_cmd_w0.u64 = 0;
- vq_cmd_w0.s.param1 = rte_cpu_to_be_16(encr_data_len);
- vq_cmd_w0.s.opcode = rte_cpu_to_be_16(opcode.flags);
+ vq_cmd_w0.s.param1 = encr_data_len;
+ vq_cmd_w0.s.opcode = opcode.flags;
/* consider iv len */
encr_offset += iv_len;
m_vaddr = (uint8_t *)m_vaddr + OFF_CTRL_LEN + iv_len;
m_dma += OFF_CTRL_LEN + iv_len;
- m_size -= OFF_CTRL_LEN + iv_len;
/* DPTR has SG list */
in_buffer = m_vaddr;
size = g_size_bytes + s_size_bytes + SG_LIST_HDR_SIZE;
/* This is DPTR len incase of SG mode */
- vq_cmd_w0.s.dlen = rte_cpu_to_be_16(size);
+ vq_cmd_w0.s.dlen = size;
m_vaddr = (uint8_t *)m_vaddr + size;
m_dma += size;
- m_size -= size;
/* cpt alternate completion address saved earlier */
req->alternate_caddr = (uint64_t *)((uint8_t *)c_vaddr - 8);
req->ist.ei1 = dptr_dma;
req->ist.ei2 = rptr_dma;
- /* First 16-bit swap then 64-bit swap */
- /* TODO: HACK: Reverse the vq_cmd and cpt_req bit field definitions
- * to eliminate all the swapping
- */
- vq_cmd_w0.u64 = rte_cpu_to_be_64(vq_cmd_w0.u64);
-
/* vq command w3 */
vq_cmd_w3.u64 = 0;
vq_cmd_w3.s.grp = 0;
}
static __rte_always_inline int
-cpt_fc_auth_set_key(void *ctx, auth_type_t type, uint8_t *key,
+cpt_fc_auth_set_key(void *ctx, auth_type_t type, const uint8_t *key,
uint16_t key_len, uint16_t mac_len)
{
struct cpt_ctx *cpt_ctx = ctx;
mc_fc_context_t *fctx = &cpt_ctx->fctx;
- uint64_t *ctrl_flags = NULL;
if ((type >= ZUC_EIA3) && (type <= KASUMI_F9_ECB)) {
uint32_t keyx[4];
cpt_ctx->fc_type = HASH_HMAC;
}
- ctrl_flags = (uint64_t *)&fctx->enc.enc_ctrl.flags;
- *ctrl_flags = rte_be_to_cpu_64(*ctrl_flags);
+ if (cpt_ctx->fc_type == FC_GEN && key_len > 64)
+ return -1;
/* For GMAC auth, cipher must be NULL */
if (type == GMAC_TYPE)
- CPT_P_ENC_CTRL(fctx).enc_cipher = 0;
+ fctx->enc.enc_cipher = 0;
- CPT_P_ENC_CTRL(fctx).hash_type = cpt_ctx->hash_type = type;
- CPT_P_ENC_CTRL(fctx).mac_len = cpt_ctx->mac_len = mac_len;
+ fctx->enc.hash_type = cpt_ctx->hash_type = type;
+ fctx->enc.mac_len = cpt_ctx->mac_len = mac_len;
if (key_len) {
cpt_ctx->hmac = 1;
cpt_ctx->auth_key_len = key_len;
memset(fctx->hmac.ipad, 0, sizeof(fctx->hmac.ipad));
memset(fctx->hmac.opad, 0, sizeof(fctx->hmac.opad));
- memcpy(fctx->hmac.opad, key, key_len);
- CPT_P_ENC_CTRL(fctx).auth_input_type = 1;
+
+ if (key_len <= 64)
+ memcpy(fctx->hmac.opad, key, key_len);
+ fctx->enc.auth_input_type = 1;
}
- *ctrl_flags = rte_cpu_to_be_64(*ctrl_flags);
return 0;
}
cipher_type_t enc_type = 0; /* NULL Cipher type */
auth_type_t auth_type = 0; /* NULL Auth type */
uint32_t cipher_key_len = 0;
- uint8_t zsk_flag = 0, aes_gcm = 0;
+ uint8_t aes_gcm = 0;
aead_form = &xform->aead;
- void *ctx;
+ void *ctx = SESS_PRIV(sess);
if (aead_form->op == RTE_CRYPTO_AEAD_OP_ENCRYPT &&
aead_form->algo == RTE_CRYPTO_AEAD_AES_GCM) {
(unsigned int long)aead_form->key.length);
return -1;
}
- sess->zsk_flag = zsk_flag;
+ sess->zsk_flag = 0;
sess->aes_gcm = aes_gcm;
sess->mac_len = aead_form->digest_length;
sess->iv_offset = aead_form->iv.offset;
sess->iv_length = aead_form->iv.length;
sess->aad_length = aead_form->aad_length;
- ctx = (void *)((uint8_t *)sess + sizeof(struct cpt_sess_misc)),
cpt_fc_ciph_set_key(ctx, enc_type, aead_form->key.data,
aead_form->key.length, NULL);
struct rte_crypto_cipher_xform *c_form;
cipher_type_t enc_type = 0; /* NULL Cipher type */
uint32_t cipher_key_len = 0;
- uint8_t zsk_flag = 0, aes_gcm = 0, aes_ctr = 0, is_null = 0;
-
- if (xform->type != RTE_CRYPTO_SYM_XFORM_CIPHER)
- return -1;
+ uint8_t zsk_flag = 0, aes_ctr = 0, is_null = 0;
c_form = &xform->cipher;
}
sess->zsk_flag = zsk_flag;
- sess->aes_gcm = aes_gcm;
+ sess->aes_gcm = 0;
sess->aes_ctr = aes_ctr;
sess->iv_offset = c_form->iv.offset;
sess->iv_length = c_form->iv.length;
auth_type_t auth_type = 0; /* NULL Auth type */
uint8_t zsk_flag = 0, aes_gcm = 0, is_null = 0;
- if (xform->type != RTE_CRYPTO_SYM_XFORM_AUTH)
- goto error_out;
-
a_form = &xform->auth;
if (a_form->op == RTE_CRYPTO_AUTH_OP_VERIFY)
return -1;
}
- if (a_form->key.length > 64) {
- CPT_LOG_DP_ERR("Auth key length is big");
- return -1;
- }
-
switch (a_form->algo) {
case RTE_CRYPTO_AUTH_SHA1_HMAC:
/* Fall through */
case RTE_CRYPTO_AUTH_AES_CBC_MAC:
CPT_LOG_DP_ERR("Crypto: Unsupported hash algo %u",
a_form->algo);
- goto error_out;
+ return -1;
default:
CPT_LOG_DP_ERR("Crypto: Undefined Hash algo %u specified",
a_form->algo);
- goto error_out;
+ return -1;
}
sess->zsk_flag = zsk_flag;
a_form->key.length, a_form->digest_length);
return 0;
-
-error_out:
- return -1;
}
static __rte_always_inline int
struct rte_crypto_auth_xform *a_form;
cipher_type_t enc_type = 0; /* NULL Cipher type */
auth_type_t auth_type = 0; /* NULL Auth type */
- uint8_t zsk_flag = 0, aes_gcm = 0;
- void *ctx;
-
- if (xform->type != RTE_CRYPTO_SYM_XFORM_AUTH)
- return -1;
+ void *ctx = SESS_PRIV(sess);
a_form = &xform->auth;
return -1;
}
- sess->zsk_flag = zsk_flag;
- sess->aes_gcm = aes_gcm;
+ sess->zsk_flag = 0;
+ sess->aes_gcm = 0;
sess->is_gmac = 1;
sess->iv_offset = a_form->iv.offset;
sess->iv_length = a_form->iv.length;
sess->mac_len = a_form->digest_length;
- ctx = (void *)((uint8_t *)sess + sizeof(struct cpt_sess_misc)),
cpt_fc_ciph_set_key(ctx, enc_type, a_form->key.data,
a_form->key.length, NULL);
uint64_t d_offs, d_lens;
struct rte_mbuf *m_src, *m_dst;
uint8_t cpt_op = sess_misc->cpt_op;
- uint8_t zsk_flag = sess_misc->zsk_flag;
- uint8_t aes_gcm = sess_misc->aes_gcm;
- uint16_t mac_len = sess_misc->mac_len;
#ifdef CPT_ALWAYS_USE_SG_MODE
uint8_t inplace = 0;
#else
}
}
- if (zsk_flag) {
+ if (sess_misc->zsk_flag) {
fc_params.auth_iv_buf = rte_crypto_op_ctod_offset(cop,
uint8_t *,
sess_misc->auth_iv_offset);
- if (zsk_flag == K_F9) {
- CPT_LOG_DP_ERR("Should not reach here for "
- "kasumi F9\n");
- }
- if (zsk_flag != ZS_EA)
+ if (sess_misc->zsk_flag != ZS_EA)
inplace = 0;
}
m_src = sym_op->m_src;
m_dst = sym_op->m_dst;
- if (aes_gcm) {
+ if (sess_misc->aes_gcm) {
uint8_t *salt;
uint8_t *aad_data;
uint16_t aad_len;
sess_misc->salt = *(uint32_t *)salt;
}
fc_params.iv_buf = salt + 4;
- if (likely(mac_len)) {
+ if (likely(sess_misc->mac_len)) {
struct rte_mbuf *m = (cpt_op & CPT_OP_ENCODE) ? m_dst :
m_src;
}
fc_params.iv_buf = salt + 4;
}
- if (likely(mac_len)) {
+ if (likely(sess_misc->mac_len)) {
struct rte_mbuf *m;
m = (cpt_op & CPT_OP_ENCODE) ? m_dst : m_src;
uint32_t pkt_len;
/* Try to make room as much as src has */
- m_dst = sym_op->m_dst;
pkt_len = rte_pktmbuf_pkt_len(m_dst);
if (unlikely(pkt_len < rte_pktmbuf_pkt_len(m_src))) {
uint64_t d_offs = 0, d_lens;
struct rte_mbuf *m_src, *m_dst;
uint16_t auth_op = sess->cpt_op & CPT_OP_AUTH_MASK;
- uint8_t zsk_flag = sess->zsk_flag;
uint16_t mac_len = sess->mac_len;
fc_params_t params;
char src[SRC_IOV_SIZE];
flags = VALID_MAC_BUF;
params.src_iov = (void *)src;
- if (unlikely(zsk_flag)) {
+ if (unlikely(sess->zsk_flag)) {
/*
* Since for Zuc, Kasumi, Snow3g offsets are in bits
* we will send pass through even for auth only case,
auth_range_off = 0;
params.auth_iv_buf = rte_crypto_op_ctod_offset(cop,
uint8_t *, sess->auth_iv_offset);
- if (zsk_flag == K_F9) {
+ if (sess->zsk_flag == K_F9) {
uint32_t length_in_bits, num_bytes;
uint8_t *src, direction = 0;
- uint32_t counter_num_bytes;
memcpy(iv_buf, rte_pktmbuf_mtod(cop->sym->m_src,
uint8_t *), 8);
*/
length_in_bits = cop->sym->auth.data.length;
num_bytes = (length_in_bits >> 3);
- counter_num_bytes = num_bytes;
src = rte_pktmbuf_mtod(cop->sym->m_src, uint8_t *);
find_kasumif9_direction_and_length(src,
- counter_num_bytes,
+ num_bytes,
&length_in_bits,
&direction);
length_in_bits -= 64;
git.droids-corp.org / dpdk.git / blobdiff