common/mlx5: fix name for ConnectX VF device ID

[dpdk.git] / drivers / common / mlx5 / mlx5_common.h

diff --git a/drivers/common/mlx5/mlx5_common.h b/drivers/common/mlx5/mlx5_common.h
index 2851507..a484b74 100644 (file)
--- a/drivers/common/mlx5/mlx5_common.h
+++ b/drivers/common/mlx5/mlx5_common.h
@@ -13,10 +13,13 @@
 #include <rte_log.h>
 #include <rte_kvargs.h>
 #include <rte_devargs.h>
+#include <rte_bitops.h>
 
 #include "mlx5_prm.h"
 #include "mlx5_devx_cmds.h"
 
+/* Reported driver name. */
+#define MLX5_DRIVER_NAME "mlx5_pci"
 
 /* Bit-field manipulation. */
 #define BITFIELD_DECLARE(bf, type, size) \
@@ -128,9 +131,11 @@ enum {
        PCI_DEVICE_ID_MELLANOX_CONNECTX6 = 0x101b,
        PCI_DEVICE_ID_MELLANOX_CONNECTX6VF = 0x101c,
        PCI_DEVICE_ID_MELLANOX_CONNECTX6DX = 0x101d,
-       PCI_DEVICE_ID_MELLANOX_CONNECTX6DXVF = 0x101e,
+       PCI_DEVICE_ID_MELLANOX_CONNECTXVF = 0x101e,
        PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF = 0xa2d6,
        PCI_DEVICE_ID_MELLANOX_CONNECTX6LX = 0x101f,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX7 = 0x1021,
+       PCI_DEVICE_ID_MELLANOX_CONNECTX7BF = 0Xa2dc,
 };
 
 /* Maximum number of simultaneous unicast MAC addresses. */
@@ -192,7 +197,7 @@ check_cqe(volatile struct mlx5_cqe *cqe, const uint16_t cqes_n,
 
        if (unlikely((op_owner != (!!(idx))) || (op_code == MLX5_CQE_INVALID)))
                return MLX5_CQE_STATUS_HW_OWN;
-       rte_cio_rmb();
+       rte_io_rmb();
        if (unlikely(op_code == MLX5_CQE_RESP_ERR ||
                     op_code == MLX5_CQE_REQ_ERR))
                return MLX5_CQE_STATUS_ERR;
@@ -208,15 +213,18 @@ int mlx5_get_ifname_sysfs(const char *ibdev_path, char *ifname);
 #define MLX5_CLASS_ARG_NAME "class"
 
 enum mlx5_class {
-       MLX5_CLASS_NET,
-       MLX5_CLASS_VDPA,
        MLX5_CLASS_INVALID,
+       MLX5_CLASS_NET = RTE_BIT64(0),
+       MLX5_CLASS_VDPA = RTE_BIT64(1),
+       MLX5_CLASS_REGEX = RTE_BIT64(2),
 };
 
-#define MLX5_DBR_PAGE_SIZE 4096 /* Must be >= 512. */
-#define MLX5_DBR_SIZE 8
-#define MLX5_DBR_PER_PAGE (MLX5_DBR_PAGE_SIZE / MLX5_DBR_SIZE)
-#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / 64)
+#define MLX5_DBR_SIZE RTE_CACHE_LINE_SIZE
+#define MLX5_DBR_PER_PAGE 64
+/* Must be >= CHAR_BIT * sizeof(uint64_t) */
+#define MLX5_DBR_PAGE_SIZE (MLX5_DBR_PER_PAGE * MLX5_DBR_SIZE)
+/* Page size must be >= 512. */
+#define MLX5_DBR_BITMAP_SIZE (MLX5_DBR_PER_PAGE / (CHAR_BIT * sizeof(uint64_t)))
 
 struct mlx5_devx_dbr_page {
        /* Door-bell records, must be first member in structure. */
@@ -243,8 +251,6 @@ struct mlx5_klm {
 
 LIST_HEAD(mlx5_dbr_page_list, mlx5_devx_dbr_page);
 
-__rte_internal
-enum mlx5_class mlx5_class_get(struct rte_devargs *devargs);
 __rte_internal
 void mlx5_translate_port_name(const char *port_name_in,
                              struct mlx5_switch_info *port_info_out);
@@ -255,6 +261,11 @@ int64_t mlx5_get_dbr(void *ctx,  struct mlx5_dbr_page_list *head,
 __rte_internal
 int32_t mlx5_release_dbr(struct mlx5_dbr_page_list *head, uint32_t umem_id,
                         uint64_t offset);
+__rte_internal
+void *mlx5_devx_alloc_uar(void *ctx, int mapping);
 extern uint8_t haswell_broadwell_cpu;
 
+__rte_internal
+void mlx5_common_init(void);
+
 #endif /* RTE_PMD_MLX5_COMMON_H_ */