event/octeontx: add enqueue new op variant

[dpdk.git] / drivers / event / octeontx / ssovf_evdev.h

diff --git a/drivers/event/octeontx/ssovf_evdev.h b/drivers/event/octeontx/ssovf_evdev.h
index 16bf3d5..47091a4 100644 (file)
--- a/drivers/event/octeontx/ssovf_evdev.h
+++ b/drivers/event/octeontx/ssovf_evdev.h
@@ -34,7 +34,7 @@
 #define __SSOVF_EVDEV_H__
 
 #include <rte_config.h>
-#include <rte_eventdev_pmd.h>
+#include <rte_eventdev_pmd_vdev.h>
 #include <rte_io.h>
 
 #include "rte_pmd_octeontx_ssovf.h"
@@ -129,6 +129,36 @@
 #define ssovf_read64 rte_read64_relaxed
 #define ssovf_write64 rte_write64_relaxed
 
+/* ARM64 specific functions */
+#if defined(RTE_ARCH_ARM64)
+#define ssovf_load_pair(val0, val1, addr) ({           \
+                       asm volatile(                   \
+                       "ldp %x[x0], %x[x1], [%x[p1]]"  \
+                       :[x0]"=r"(val0), [x1]"=r"(val1) \
+                       :[p1]"r"(addr)                  \
+                       ); })
+
+#define ssovf_store_pair(val0, val1, addr) ({          \
+                       asm volatile(                   \
+                       "stp %x[x0], %x[x1], [%x[p1]]"  \
+                       ::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \
+                       ); })
+#else /* Un optimized functions for building on non arm64 arch */
+
+#define ssovf_load_pair(val0, val1, addr)              \
+do {                                                   \
+       val0 = rte_read64(addr);                        \
+       val1 = rte_read64(((uint8_t *)addr) + 8);       \
+} while (0)
+
+#define ssovf_store_pair(val0, val1, addr)             \
+do {                                                   \
+       rte_write64(val0, addr);                        \
+       rte_write64(val1, (((uint8_t *)addr) + 8));     \
+} while (0)
+#endif
+
+
 struct ssovf_evdev {
        uint8_t max_event_queues;
        uint8_t max_event_ports;
@@ -157,4 +187,19 @@ ssovf_pmd_priv(const struct rte_eventdev *eventdev)
        return eventdev->data->dev_private;
 }
 
+uint16_t ssows_enq(void *port, const struct rte_event *ev);
+uint16_t ssows_enq_burst(void *port,
+               const struct rte_event ev[], uint16_t nb_events);
+uint16_t ssows_enq_new_burst(void *port,
+               const struct rte_event ev[], uint16_t nb_events);
+uint16_t ssows_deq(void *port, struct rte_event *ev, uint64_t timeout_ticks);
+uint16_t ssows_deq_burst(void *port, struct rte_event ev[],
+               uint16_t nb_events, uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout(void *port, struct rte_event *ev,
+               uint64_t timeout_ticks);
+uint16_t ssows_deq_timeout_burst(void *port, struct rte_event ev[],
+               uint16_t nb_events, uint64_t timeout_ticks);
+void ssows_flush_events(struct ssows *ws, uint8_t queue_id);
+void ssows_reset(struct ssows *ws);
+
 #endif /* __SSOVF_EVDEV_H__ */