net/axgbe: support setting MAC address

[dpdk.git] / drivers / net / axgbe / axgbe_dev.c

diff --git a/drivers/net/axgbe/axgbe_dev.c b/drivers/net/axgbe/axgbe_dev.c
index b1f0bbc..f830b72 100644 (file)
--- a/drivers/net/axgbe/axgbe_dev.c
+++ b/drivers/net/axgbe/axgbe_dev.c
@@ -260,6 +260,9 @@ static int axgbe_enable_tx_flow_control(struct axgbe_port *pdata)
                        ehfc = 1;
 
                AXGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_RQOMR, EHFC, ehfc);
+
+               PMD_DRV_LOG(DEBUG, "flow control %s for RXq%u\n",
+                           ehfc ? "enabled" : "disabled", i);
        }
 
        /* Set MAC flow control */
@@ -915,6 +918,9 @@ static void axgbe_config_rx_fifo_size(struct axgbe_port *pdata)
        /*Calculate and config Flow control threshold*/
        axgbe_calculate_flow_control_threshold(pdata);
        axgbe_config_flow_control_threshold(pdata);
+
+       PMD_DRV_LOG(DEBUG, "%d Rx hardware queues, %d byte fifo per queue\n",
+                   pdata->rx_q_count, q_fifo_size);
 }
 
 static void axgbe_config_tx_fifo_size(struct axgbe_port *pdata)
@@ -938,6 +944,9 @@ static void axgbe_config_tx_fifo_size(struct axgbe_port *pdata)
 
        for (i = 0; i < pdata->tx_q_count; i++)
                AXGMAC_MTL_IOWRITE_BITS(pdata, i, MTL_Q_TQOMR, TQS, p_fifo);
+
+       PMD_DRV_LOG(DEBUG, "%d Tx hardware queues, %d byte fifo per queue\n",
+                   pdata->tx_q_count, q_fifo_size);
 }
 
 static void axgbe_config_queue_mapping(struct axgbe_port *pdata)
@@ -952,12 +961,16 @@ static void axgbe_config_queue_mapping(struct axgbe_port *pdata)
        qptc_extra = pdata->tx_q_count % pdata->hw_feat.tc_cnt;
 
        for (i = 0, queue = 0; i < pdata->hw_feat.tc_cnt; i++) {
-               for (j = 0; j < qptc; j++)
+               for (j = 0; j < qptc; j++) {
+                       PMD_DRV_LOG(DEBUG, "TXq%u mapped to TC%u\n", queue, i);
                        AXGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
                                                Q2TCMAP, i);
-               if (i < qptc_extra)
+               }
+               if (i < qptc_extra) {
+                       PMD_DRV_LOG(DEBUG, "TXq%u mapped to TC%u\n", queue, i);
                        AXGMAC_MTL_IOWRITE_BITS(pdata, queue, MTL_Q_TQOMR,
                                                Q2TCMAP, i);
+               }
        }
 
        if (pdata->rss_enable) {
@@ -995,6 +1008,35 @@ static void axgbe_enable_mtl_interrupts(struct axgbe_port *pdata)
        }
 }
 
+void axgbe_set_mac_addn_addr(struct axgbe_port *pdata, u8 *addr, uint32_t index)
+{
+       unsigned int mac_addr_hi, mac_addr_lo;
+       u8 *mac_addr;
+
+       mac_addr_lo = 0;
+       mac_addr_hi = 0;
+
+       if (addr) {
+               mac_addr = (u8 *)&mac_addr_lo;
+               mac_addr[0] = addr[0];
+               mac_addr[1] = addr[1];
+               mac_addr[2] = addr[2];
+               mac_addr[3] = addr[3];
+               mac_addr = (u8 *)&mac_addr_hi;
+               mac_addr[0] = addr[4];
+               mac_addr[1] = addr[5];
+
+               /*Address Enable: Use this Addr for Perfect Filtering */
+               AXGMAC_SET_BITS(mac_addr_hi, MAC_MACA1HR, AE, 1);
+       }
+
+       PMD_DRV_LOG(DEBUG, "%s mac address at %#x\n",
+                   addr ? "set" : "clear", index);
+
+       AXGMAC_IOWRITE(pdata, MAC_MACAHR(index), mac_addr_hi);
+       AXGMAC_IOWRITE(pdata, MAC_MACALR(index), mac_addr_lo);
+}
+
 static int axgbe_set_mac_address(struct axgbe_port *pdata, u8 *addr)
 {
        unsigned int mac_addr_hi, mac_addr_lo;
@@ -1036,6 +1078,20 @@ static void axgbe_config_checksum_offload(struct axgbe_port *pdata)
                AXGMAC_IOWRITE_BITS(pdata, MAC_RCR, IPC, 0);
 }
 
+static void axgbe_config_mmc(struct axgbe_port *pdata)
+{
+       struct axgbe_mmc_stats *stats = &pdata->mmc_stats;
+
+       /* Reset stats */
+       memset(stats, 0, sizeof(*stats));
+
+       /* Set counters to reset on read */
+       AXGMAC_IOWRITE_BITS(pdata, MMC_CR, ROR, 1);
+
+       /* Reset the counters */
+       AXGMAC_IOWRITE_BITS(pdata, MMC_CR, CR, 1);
+}
+
 static int axgbe_init(struct axgbe_port *pdata)
 {
        int ret;
@@ -1078,6 +1134,7 @@ static int axgbe_init(struct axgbe_port *pdata)
        axgbe_config_flow_control(pdata);
        axgbe_config_mac_speed(pdata);
        axgbe_config_checksum_offload(pdata);
+       axgbe_config_mmc(pdata);
 
        return 0;
 }