#define BNXT_NUM_CMPL_DMA_AGGR_DURING_INT 12
struct bnxt_led_info {
+ uint8_t num_leds;
uint8_t led_id;
uint8_t led_type;
uint8_t led_group_id;
#define BNXT_MAX_TC 8
#define BNXT_MAX_QUEUE 8
#define BNXT_MAX_TC_Q (BNXT_MAX_TC + 1)
-#define BNXT_MAX_Q (bp->max_q + 1)
#define BNXT_PAGE_SHFT 12
#define BNXT_PAGE_SIZE (1 << BNXT_PAGE_SHFT)
#define MAX_CTX_PAGES (BNXT_PAGE_SIZE / 8)
uint16_t tim_entry_size;
uint32_t tim_max_entries;
uint8_t tqm_entries_multiple;
+ uint8_t tqm_fp_rings_count;
uint32_t flags;
#define BNXT_CTX_FLAG_INITED 0x01
#define BNXT_GRCP_WINDOW_2_BASE 0x2000
#define BNXT_GRCP_WINDOW_3_BASE 0x3000
+#define BNXT_GRCP_BASE_MASK 0xfffff000
+#define BNXT_GRCP_OFFSET_MASK 0x00000ffc
+
+#define BNXT_FW_STATUS_HEALTHY 0x8000
#define BNXT_FW_STATUS_SHUTDOWN 0x100000
#define BNXT_HWRM_SHORT_REQ_LEN sizeof(struct hwrm_short_input)
#define BNXT_FW_CAP_ERR_RECOVER_RELOAD BIT(3)
#define BNXT_FW_CAP_ADV_FLOW_MGMT BIT(5)
#define BNXT_FW_CAP_ADV_FLOW_COUNTERS BIT(6)
+#define BNXT_FW_CAP_HCOMM_FW_STATUS BIT(7)
uint32_t flow_flags;
#define BNXT_FLOW_FLAG_L2_HDR_SRC_FILTER_EN BIT(0)
#define MAX_STINGRAY_RINGS 128U
/* For sake of symmetry, max Tx rings == max Rx rings, one stat ctx for each */
#define BNXT_MAX_RX_RINGS(bp) \
- (BNXT_STINGRAY(bp) ? RTE_MIN(RTE_MIN(bp->max_rx_rings, \
+ (BNXT_STINGRAY(bp) ? RTE_MIN(RTE_MIN(bp->max_rx_rings / 2U, \
MAX_STINGRAY_RINGS), \
bp->max_stat_ctx / 2U) : \
- RTE_MIN(bp->max_rx_rings, \
+ RTE_MIN(bp->max_rx_rings / 2U, \
bp->max_stat_ctx / 2U))
#define BNXT_MAX_TX_RINGS(bp) \
(RTE_MIN((bp)->max_tx_rings, BNXT_MAX_RX_RINGS(bp)))
uint32_t fw_ver;
uint32_t hwrm_spec_code;
- struct bnxt_led_info leds[BNXT_MAX_LED];
- uint8_t num_leds;
+ struct bnxt_led_info *leds;
struct bnxt_ptp_cfg *ptp_cfg;
uint16_t vf_resv_strategy;
struct bnxt_ctx_mem_info *ctx;