rc = -EINVAL; \
else if (rc == HWRM_ERR_CODE_CMD_NOT_SUPPORTED) \
rc = -ENOTSUP; \
+ else if (rc == HWRM_ERR_CODE_HOT_RESET_PROGRESS) \
+ rc = -EAGAIN; \
else if (rc > 0) \
rc = -EIO; \
return rc; \
rc = -EINVAL; \
else if (rc == HWRM_ERR_CODE_CMD_NOT_SUPPORTED) \
rc = -ENOTSUP; \
+ else if (rc == HWRM_ERR_CODE_HOT_RESET_PROGRESS) \
+ rc = -EAGAIN; \
else if (rc > 0) \
rc = -EIO; \
return rc; \
} else {
bp->max_vnics = 1;
}
+ PMD_DRV_LOG(DEBUG, "Max l2_cntxts is %d vnics is %d\n",
+ bp->max_l2_ctx, bp->max_vnics);
bp->max_stat_ctx = rte_le_to_cpu_16(resp->max_stat_ctx);
if (BNXT_PF(bp)) {
bp->pf.total_vnics = rte_le_to_cpu_16(resp->max_vnics);
dev_caps_cfg = rte_le_to_cpu_32(resp->dev_caps_cfg);
if (bp->max_resp_len != max_resp_len) {
- sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x",
+ sprintf(type, "bnxt_hwrm_" PCI_PRI_FMT,
bp->pdev->addr.domain, bp->pdev->addr.bus,
bp->pdev->addr.devid, bp->pdev->addr.function);
(dev_caps_cfg &
HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_SHORT_CMD_REQUIRED)) ||
bp->hwrm_max_ext_req_len > HWRM_MAX_REQ_LEN) {
- sprintf(type, "bnxt_hwrm_short_%04x:%02x:%02x:%02x",
+ sprintf(type, "bnxt_hwrm_short_" PCI_PRI_FMT,
bp->pdev->addr.domain, bp->pdev->addr.bus,
bp->pdev->addr.devid, bp->pdev->addr.function);
PMD_DRV_LOG(DEBUG, "FW supports Trusted VFs\n");
if (dev_caps_cfg &
HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_CFA_ADV_FLOW_MGNT_SUPPORTED) {
- bp->flags |= BNXT_FLAG_ADV_FLOW_MGMT;
+ bp->fw_cap |= BNXT_FW_CAP_ADV_FLOW_MGMT;
PMD_DRV_LOG(DEBUG, "FW supports advanced flow management\n");
}
+ if (dev_caps_cfg &
+ HWRM_VER_GET_OUTPUT_DEV_CAPS_CFG_ADV_FLOW_COUNTERS_SUPPORTED) {
+ PMD_DRV_LOG(DEBUG, "FW supports advanced flow counters\n");
+ bp->fw_cap |= BNXT_FW_CAP_ADV_FLOW_COUNTERS;
+ }
+
+
error:
HWRM_UNLOCK();
return rc;
struct rte_pci_device *pdev = bp->pdev;
char type[RTE_MEMZONE_NAMESIZE];
- sprintf(type, "bnxt_hwrm_%04x:%02x:%02x:%02x", pdev->addr.domain,
+ sprintf(type, "bnxt_hwrm_" PCI_PRI_FMT, pdev->addr.domain,
pdev->addr.bus, pdev->addr.devid, pdev->addr.function);
bp->max_resp_len = HWRM_MAX_RESP_LEN;
bp->hwrm_cmd_resp_addr = rte_malloc(type, bp->max_resp_len, 0);
bp->port_svif = BNXT_SVIF_INVALID;
+ if (!BNXT_PF(bp))
+ return 0;
+
HWRM_PREP(&req, HWRM_PORT_MAC_QCFG, BNXT_USE_CHIMP_MB);
rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
if (!(bp->fw_cap & BNXT_FW_CAP_ERROR_RECOVERY))
return 0;
- if (!info) {
- info = rte_zmalloc("bnxt_hwrm_error_recovery_qcfg",
- sizeof(*info), 0);
- bp->recovery_info = info;
- if (info == NULL)
- return -ENOMEM;
- } else {
- memset(info, 0, sizeof(*info));
- }
-
HWRM_PREP(&req, HWRM_ERROR_RECOVERY_QCFG, BNXT_USE_CHIMP_MB);
rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_CHIMP_MB);
uint32_t flags = 0;
int rc = 0;
- if (!(bp->flags & BNXT_FLAG_ADV_FLOW_MGMT))
+ if (!(bp->fw_cap & BNXT_FW_CAP_ADV_FLOW_MGMT))
return rc;
if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
return rc;
}
+
+int bnxt_hwrm_cfa_counter_qcaps(struct bnxt *bp, uint16_t *max_fc)
+{
+ int rc = 0;
+
+ struct hwrm_cfa_counter_qcaps_input req = {0};
+ struct hwrm_cfa_counter_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
+
+ if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+ PMD_DRV_LOG(DEBUG,
+ "Not a PF or trusted VF. Command not supported\n");
+ return 0;
+ }
+
+ HWRM_PREP(&req, HWRM_CFA_COUNTER_QCAPS, BNXT_USE_KONG(bp));
+ req.target_id = rte_cpu_to_le_16(bp->fw_fid);
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));
+
+ HWRM_CHECK_RESULT();
+ if (max_fc)
+ *max_fc = rte_le_to_cpu_16(resp->max_rx_fc);
+ HWRM_UNLOCK();
+
+ PMD_DRV_LOG(DEBUG, "max_fc = %d\n", *max_fc);
+ return 0;
+}
+
+int bnxt_hwrm_ctx_rgtr(struct bnxt *bp, rte_iova_t dma_addr, uint16_t *ctx_id)
+{
+ int rc = 0;
+ struct hwrm_cfa_ctx_mem_rgtr_input req = {.req_type = 0 };
+ struct hwrm_cfa_ctx_mem_rgtr_output *resp = bp->hwrm_cmd_resp_addr;
+
+ if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+ PMD_DRV_LOG(DEBUG,
+ "Not a PF or trusted VF. Command not supported\n");
+ return 0;
+ }
+
+ HWRM_PREP(&req, HWRM_CFA_CTX_MEM_RGTR, BNXT_USE_KONG(bp));
+
+ req.page_level = HWRM_CFA_CTX_MEM_RGTR_INPUT_PAGE_LEVEL_LVL_0;
+ req.page_size = HWRM_CFA_CTX_MEM_RGTR_INPUT_PAGE_SIZE_2M;
+ req.page_dir = rte_cpu_to_le_64(dma_addr);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));
+
+ HWRM_CHECK_RESULT();
+ if (ctx_id) {
+ *ctx_id = rte_le_to_cpu_16(resp->ctx_id);
+ PMD_DRV_LOG(DEBUG, "ctx_id = %d\n", *ctx_id);
+ }
+ HWRM_UNLOCK();
+
+ return 0;
+}
+
+int bnxt_hwrm_ctx_unrgtr(struct bnxt *bp, uint16_t ctx_id)
+{
+ int rc = 0;
+ struct hwrm_cfa_ctx_mem_unrgtr_input req = {.req_type = 0 };
+ struct hwrm_cfa_ctx_mem_unrgtr_output *resp = bp->hwrm_cmd_resp_addr;
+
+ if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+ PMD_DRV_LOG(DEBUG,
+ "Not a PF or trusted VF. Command not supported\n");
+ return 0;
+ }
+
+ HWRM_PREP(&req, HWRM_CFA_CTX_MEM_UNRGTR, BNXT_USE_KONG(bp));
+
+ req.ctx_id = rte_cpu_to_le_16(ctx_id);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));
+
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return rc;
+}
+
+int bnxt_hwrm_cfa_counter_cfg(struct bnxt *bp, enum bnxt_flow_dir dir,
+ uint16_t cntr, uint16_t ctx_id,
+ uint32_t num_entries, bool enable)
+{
+ struct hwrm_cfa_counter_cfg_input req = {0};
+ struct hwrm_cfa_counter_cfg_output *resp = bp->hwrm_cmd_resp_addr;
+ uint16_t flags = 0;
+ int rc;
+
+ if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+ PMD_DRV_LOG(DEBUG,
+ "Not a PF or trusted VF. Command not supported\n");
+ return 0;
+ }
+
+ HWRM_PREP(&req, HWRM_CFA_COUNTER_CFG, BNXT_USE_KONG(bp));
+
+ req.target_id = rte_cpu_to_le_16(bp->fw_fid);
+ req.counter_type = rte_cpu_to_le_16(cntr);
+ flags = enable ? HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_CFG_MODE_ENABLE :
+ HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_CFG_MODE_DISABLE;
+ flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_DATA_TRANSFER_MODE_PULL;
+ if (dir == BNXT_DIR_RX)
+ flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_PATH_RX;
+ else if (dir == BNXT_DIR_TX)
+ flags |= HWRM_CFA_COUNTER_CFG_INPUT_FLAGS_PATH_TX;
+ req.flags = rte_cpu_to_le_16(flags);
+ req.ctx_id = rte_cpu_to_le_16(ctx_id);
+ req.num_entries = rte_cpu_to_le_32(num_entries);
+
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return 0;
+}
+
+int bnxt_hwrm_cfa_counter_qstats(struct bnxt *bp,
+ enum bnxt_flow_dir dir,
+ uint16_t cntr,
+ uint16_t num_entries)
+{
+ struct hwrm_cfa_counter_qstats_output *resp = bp->hwrm_cmd_resp_addr;
+ struct hwrm_cfa_counter_qstats_input req = {0};
+ uint16_t flow_ctx_id = 0;
+ uint16_t flags = 0;
+ int rc = 0;
+
+ if (!(BNXT_PF(bp) || BNXT_VF_IS_TRUSTED(bp))) {
+ PMD_DRV_LOG(DEBUG,
+ "Not a PF or trusted VF. Command not supported\n");
+ return 0;
+ }
+
+ if (dir == BNXT_DIR_RX) {
+ flow_ctx_id = bp->rx_fc_in_tbl.ctx_id;
+ flags = HWRM_CFA_COUNTER_QSTATS_INPUT_FLAGS_PATH_RX;
+ } else if (dir == BNXT_DIR_TX) {
+ flow_ctx_id = bp->tx_fc_in_tbl.ctx_id;
+ flags = HWRM_CFA_COUNTER_QSTATS_INPUT_FLAGS_PATH_TX;
+ }
+
+ HWRM_PREP(&req, HWRM_CFA_COUNTER_QSTATS, BNXT_USE_KONG(bp));
+ req.target_id = rte_cpu_to_le_16(bp->fw_fid);
+ req.counter_type = rte_cpu_to_le_16(cntr);
+ req.input_flow_ctx_id = rte_cpu_to_le_16(flow_ctx_id);
+ req.num_entries = rte_cpu_to_le_16(num_entries);
+ req.flags = rte_cpu_to_le_16(flags);
+ rc = bnxt_hwrm_send_message(bp, &req, sizeof(req), BNXT_USE_KONG(bp));
+
+ HWRM_CHECK_RESULT();
+ HWRM_UNLOCK();
+
+ return 0;
+}