u8 rss_mode; /* rss mode */
u16 rss_size; /* size of VI's RSS table slice */
u64 rss_hf; /* RSS Hash Function */
+
+ /* viid fields either returned by fw
+ * or decoded by parsing viid by driver.
+ */
+ u8 vin;
+ u8 vivld;
};
/* Enable or disable autonegotiation. If this is set to enable,
TAILQ_HEAD(mbox_list, mbox_entry);
+struct adapter_devargs {
+ bool keep_ovlan;
+ bool force_link_up;
+ bool tx_mode_latency;
+};
+
struct adapter {
struct rte_pci_device *pdev; /* associated rte pci device */
struct rte_eth_dev *eth_dev; /* first port's rte eth device */
int use_unpacked_mode; /* unpacked rx mode state */
rte_spinlock_t win0_lock;
+ rte_spinlock_t flow_lock; /* Serialize access for rte_flow ops */
+
unsigned int clipt_start; /* CLIP table start */
unsigned int clipt_end; /* CLIP table end */
unsigned int l2t_start; /* Layer 2 table start */
struct mpstcam_table *mpstcam;
struct tid_info tids; /* Info used to access TID related tables */
+
+ struct adapter_devargs devargs;
};
/**
*/
static inline struct port_info *ethdev2pinfo(const struct rte_eth_dev *dev)
{
- return (struct port_info *)dev->data->dev_private;
+ return dev->data->dev_private;
}
/**
*/
static inline u32 t4_read_reg(struct adapter *adapter, u32 reg_addr)
{
- u32 val = CXGBE_READ_REG(adapter, reg_addr);
-
- CXGBE_DEBUG_REG(adapter, "read register 0x%x value 0x%x\n", reg_addr,
- val);
- return val;
+ return CXGBE_READ_REG(adapter, reg_addr);
}
/**
*/
static inline void t4_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
{
- CXGBE_DEBUG_REG(adapter, "setting register 0x%x to 0x%x\n", reg_addr,
- val);
CXGBE_WRITE_REG(adapter, reg_addr, val);
}
static inline void t4_write_reg_relaxed(struct adapter *adapter, u32 reg_addr,
u32 val)
{
- CXGBE_DEBUG_REG(adapter, "setting register 0x%x to 0x%x\n", reg_addr,
- val);
CXGBE_WRITE_REG_RELAXED(adapter, reg_addr, val);
}
*/
static inline u64 t4_read_reg64(struct adapter *adapter, u32 reg_addr)
{
- u64 val = CXGBE_READ_REG64(adapter, reg_addr);
-
- CXGBE_DEBUG_REG(adapter, "64-bit read register %#x value %#llx\n",
- reg_addr, (unsigned long long)val);
- return val;
+ return CXGBE_READ_REG64(adapter, reg_addr);
}
/**
static inline void t4_write_reg64(struct adapter *adapter, u32 reg_addr,
u64 val)
{
- CXGBE_DEBUG_REG(adapter, "setting register %#x to %#llx\n", reg_addr,
- (unsigned long long)val);
-
CXGBE_WRITE_REG64(adapter, reg_addr, val);
}