cxgbe: get descriptor limits
[dpdk.git] / drivers / net / cxgbe / cxgbe_ethdev.c
index c0dd5f3..920e071 100644 (file)
@@ -141,8 +141,14 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
        struct adapter *adapter = pi->adapter;
        int max_queues = adapter->sge.max_ethqsets / adapter->params.nports;
 
-       device_info->min_rx_bufsize = 68; /* XXX: Smallest pkt size */
-       device_info->max_rx_pktlen = 1500; /* XXX: For now we support mtu */
+       static const struct rte_eth_desc_lim cxgbe_desc_lim = {
+               .nb_max = CXGBE_MAX_RING_DESC_SIZE,
+               .nb_min = CXGBE_MIN_RING_DESC_SIZE,
+               .nb_align = 1,
+       };
+
+       device_info->min_rx_bufsize = CXGBE_MIN_RX_BUFSIZE;
+       device_info->max_rx_pktlen = CXGBE_MAX_RX_PKTLEN;
        device_info->max_rx_queues = max_queues;
        device_info->max_tx_queues = max_queues;
        device_info->max_mac_addrs = 1;
@@ -162,6 +168,9 @@ static void cxgbe_dev_info_get(struct rte_eth_dev *eth_dev,
                                       DEV_TX_OFFLOAD_TCP_TSO;
 
        device_info->reta_size = pi->rss_size;
+
+       device_info->rx_desc_lim = cxgbe_desc_lim;
+       device_info->tx_desc_lim = cxgbe_desc_lim;
 }
 
 static void cxgbe_dev_promiscuous_enable(struct rte_eth_dev *eth_dev)
@@ -225,6 +234,34 @@ static int cxgbe_dev_link_update(struct rte_eth_dev *eth_dev,
        return 0;
 }
 
+static int cxgbe_dev_mtu_set(struct rte_eth_dev *eth_dev, uint16_t mtu)
+{
+       struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
+       struct adapter *adapter = pi->adapter;
+       struct rte_eth_dev_info dev_info;
+       int err;
+       uint16_t new_mtu = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN;
+
+       cxgbe_dev_info_get(eth_dev, &dev_info);
+
+       /* Must accommodate at least ETHER_MIN_MTU */
+       if ((new_mtu < ETHER_MIN_MTU) || (new_mtu > dev_info.max_rx_pktlen))
+               return -EINVAL;
+
+       /* set to jumbo mode if needed */
+       if (new_mtu > ETHER_MAX_LEN)
+               eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
+       else
+               eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
+
+       err = t4_set_rxmode(adapter, adapter->mbox, pi->viid, new_mtu, -1, -1,
+                           -1, -1, true);
+       if (!err)
+               eth_dev->data->dev_conf.rxmode.max_rx_pkt_len = new_mtu;
+
+       return err;
+}
+
 static int cxgbe_dev_tx_queue_start(struct rte_eth_dev *eth_dev,
                                    uint16_t tx_queue_id);
 static int cxgbe_dev_rx_queue_start(struct rte_eth_dev *eth_dev,
@@ -498,6 +535,8 @@ static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
        int err = 0;
        int msi_idx = 0;
        unsigned int temp_nb_desc;
+       struct rte_eth_dev_info dev_info;
+       unsigned int pkt_len = eth_dev->data->dev_conf.rxmode.max_rx_pkt_len;
 
        RTE_SET_USED(rx_conf);
 
@@ -505,6 +544,17 @@ static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
                  __func__, eth_dev->data->nb_rx_queues, queue_idx, nb_desc,
                  socket_id, mp);
 
+       cxgbe_dev_info_get(eth_dev, &dev_info);
+
+       /* Must accommodate at least ETHER_MIN_MTU */
+       if ((pkt_len < dev_info.min_rx_bufsize) ||
+           (pkt_len > dev_info.max_rx_pktlen)) {
+               dev_err(adap, "%s: max pkt len must be > %d and <= %d\n",
+                       __func__, dev_info.min_rx_bufsize,
+                       dev_info.max_rx_pktlen);
+               return -EINVAL;
+       }
+
        /*  Free up the existing queue  */
        if (eth_dev->data->rx_queues[queue_idx]) {
                cxgbe_dev_rx_queue_release(eth_dev->data->rx_queues[queue_idx]);
@@ -534,6 +584,12 @@ static int cxgbe_dev_rx_queue_setup(struct rte_eth_dev *eth_dev,
        if ((&rxq->fl) != NULL)
                rxq->fl.size = temp_nb_desc;
 
+       /* Set to jumbo mode if necessary */
+       if (pkt_len > ETHER_MAX_LEN)
+               eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
+       else
+               eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
+
        err = t4_sge_alloc_rxq(adapter, &rxq->rspq, false, eth_dev, msi_idx,
                               &rxq->fl, t4_ethrx_handler,
                               t4_get_mps_bg_map(adapter, pi->tx_chan), mp,
@@ -642,6 +698,58 @@ static void cxgbe_dev_stats_reset(struct rte_eth_dev *eth_dev)
        }
 }
 
+static int cxgbe_flow_ctrl_get(struct rte_eth_dev *eth_dev,
+                              struct rte_eth_fc_conf *fc_conf)
+{
+       struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
+       struct link_config *lc = &pi->link_cfg;
+       int rx_pause, tx_pause;
+
+       fc_conf->autoneg = lc->fc & PAUSE_AUTONEG;
+       rx_pause = lc->fc & PAUSE_RX;
+       tx_pause = lc->fc & PAUSE_TX;
+
+       if (rx_pause && tx_pause)
+               fc_conf->mode = RTE_FC_FULL;
+       else if (rx_pause)
+               fc_conf->mode = RTE_FC_RX_PAUSE;
+       else if (tx_pause)
+               fc_conf->mode = RTE_FC_TX_PAUSE;
+       else
+               fc_conf->mode = RTE_FC_NONE;
+       return 0;
+}
+
+static int cxgbe_flow_ctrl_set(struct rte_eth_dev *eth_dev,
+                              struct rte_eth_fc_conf *fc_conf)
+{
+       struct port_info *pi = (struct port_info *)(eth_dev->data->dev_private);
+       struct adapter *adapter = pi->adapter;
+       struct link_config *lc = &pi->link_cfg;
+
+       if (lc->supported & FW_PORT_CAP_ANEG) {
+               if (fc_conf->autoneg)
+                       lc->requested_fc |= PAUSE_AUTONEG;
+               else
+                       lc->requested_fc &= ~PAUSE_AUTONEG;
+       }
+
+       if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
+           (fc_conf->mode & RTE_FC_RX_PAUSE))
+               lc->requested_fc |= PAUSE_RX;
+       else
+               lc->requested_fc &= ~PAUSE_RX;
+
+       if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
+           (fc_conf->mode & RTE_FC_TX_PAUSE))
+               lc->requested_fc |= PAUSE_TX;
+       else
+               lc->requested_fc &= ~PAUSE_TX;
+
+       return t4_link_l1cfg(adapter, adapter->mbox, pi->tx_chan,
+                            &pi->link_cfg);
+}
+
 static struct eth_dev_ops cxgbe_eth_dev_ops = {
        .dev_start              = cxgbe_dev_start,
        .dev_stop               = cxgbe_dev_stop,
@@ -653,6 +761,7 @@ static struct eth_dev_ops cxgbe_eth_dev_ops = {
        .dev_configure          = cxgbe_dev_configure,
        .dev_infos_get          = cxgbe_dev_info_get,
        .link_update            = cxgbe_dev_link_update,
+       .mtu_set                = cxgbe_dev_mtu_set,
        .tx_queue_setup         = cxgbe_dev_tx_queue_setup,
        .tx_queue_start         = cxgbe_dev_tx_queue_start,
        .tx_queue_stop          = cxgbe_dev_tx_queue_stop,
@@ -663,6 +772,8 @@ static struct eth_dev_ops cxgbe_eth_dev_ops = {
        .rx_queue_release       = cxgbe_dev_rx_queue_release,
        .stats_get              = cxgbe_dev_stats_get,
        .stats_reset            = cxgbe_dev_stats_reset,
+       .flow_ctrl_get          = cxgbe_flow_ctrl_get,
+       .flow_ctrl_set          = cxgbe_flow_ctrl_set,
 };
 
 /*