net/dpaa2: add some parameter validations

[dpdk.git] / drivers / net / dpaa2 / dpaa2_ethdev.h

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index b49b88a..b9c729f 100644 (file)
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016-2019 NXP
+ *   Copyright 2016-2021 NXP
  *
  */
 
@@ -12,12 +12,14 @@
 #include <rte_pmd_dpaa2.h>
 
 #include <dpaa2_hw_pvt.h>
+#include "dpaa2_tm.h"
 
 #include <mc/fsl_dpni.h>
 #include <mc/fsl_mc_sys.h>
 
 #define DPAA2_MIN_RX_BUF_SIZE 512
 #define DPAA2_MAX_RX_PKT_LEN  10240 /*WRIOP support*/
+#define NET_DPAA2_PMD_DRIVER_NAME net_dpaa2
 
 #define MAX_TCS                        DPNI_MAX_TC
 #define MAX_RX_QUEUES          128
@@ -26,6 +28,10 @@
 
 #define DPAA2_RX_DEFAULT_NBDESC 512
 
+#define DPAA2_ETH_MAX_LEN (RTE_ETHER_MTU + \
+                          RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + \
+                          VLAN_TAG_SIZE)
+
 /*default tc to be used for ,congestion, distribution etc configuration. */
 #define DPAA2_DEF_TC           0
 
@@ -55,13 +61,16 @@
 
 /* Disable RX tail drop, default is enable */
 #define DPAA2_RX_TAILDROP_OFF  0x04
+/* Tx confirmation enabled */
+#define DPAA2_TX_CONF_ENABLE   0x08
 
 #define DPAA2_RSS_OFFLOAD_ALL ( \
        ETH_RSS_L2_PAYLOAD | \
        ETH_RSS_IP | \
        ETH_RSS_UDP | \
        ETH_RSS_TCP | \
-       ETH_RSS_SCTP)
+       ETH_RSS_SCTP | \
+       ETH_RSS_MPLS)
 
 /* LX2 FRC Parsed values (Little Endian) */
 #define DPAA2_PKT_TYPE_ETHER           0x0060
@@ -91,7 +100,9 @@
 #define DPAA2_PKT_TYPE_VLAN_2          0x0260
 
 /* enable timestamp in mbuf*/
-extern enum pmd_dpaa2_ts dpaa2_enable_ts;
+extern bool dpaa2_enable_ts[];
+extern uint64_t dpaa2_timestamp_rx_dynflag;
+extern int dpaa2_timestamp_dynfield_offset;
 
 #define DPAA2_QOS_TABLE_RECONFIGURE    1
 #define DPAA2_FS_TABLE_RECONFIGURE     2
@@ -99,10 +110,14 @@ extern enum pmd_dpaa2_ts dpaa2_enable_ts;
 #define DPAA2_QOS_TABLE_IPADDR_EXTRACT 4
 #define DPAA2_FS_TABLE_IPADDR_EXTRACT 8
 
+#define DPAA2_FLOW_MAX_KEY_SIZE                16
 
 /*Externaly defined*/
 extern const struct rte_flow_ops dpaa2_flow_ops;
-extern enum rte_filter_type dpaa2_filter_type;
+
+extern const struct rte_tm_ops dpaa2_tm_ops;
+
+extern bool dpaa2_enable_err_queue;
 
 #define IP_ADDRESS_OFFSET_INVALID (-1)
 
@@ -141,14 +156,14 @@ struct dpaa2_dev_priv {
        void *tx_vq[MAX_TX_QUEUES];
        struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
        void *tx_conf_vq[MAX_TX_QUEUES];
-       uint8_t tx_conf_en;
+       void *rx_err_vq;
+       uint8_t flags; /*dpaa2 config flags */
        uint8_t max_mac_filters;
        uint8_t max_vlan_filters;
        uint8_t num_rx_tc;
        uint16_t qos_entries;
        uint16_t fs_entries;
        uint8_t dist_queues;
-       uint8_t flags; /*dpaa2 config flags */
        uint8_t en_ordered;
        uint8_t en_loose_ordered;
        uint8_t max_cgs;
@@ -159,7 +174,6 @@ struct dpaa2_dev_priv {
        uint16_t ss_offset;
        uint64_t ss_iova;
        uint64_t ss_param_iova;
-#if defined(RTE_LIBRTE_IEEE1588)
        /*stores timestamp of last received packet on dev*/
        uint64_t rx_timestamp;
        /*stores timestamp of last received tx confirmation packet on dev*/
@@ -168,18 +182,19 @@ struct dpaa2_dev_priv {
         * it corresponds to last packet transmitted
         */
        struct dpaa2_queue *next_tx_conf_queue;
-#endif
 
        struct rte_eth_dev *eth_dev; /**< Pointer back to holding ethdev */
 
        LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
+       LIST_HEAD(nodes, dpaa2_tm_node) nodes;
+       LIST_HEAD(shaper_profiles, dpaa2_tm_shaper_profile) shaper_profiles;
 };
 
 int dpaa2_distset_to_dpkg_profile_cfg(uint64_t req_dist_set,
                                      struct dpkg_profile_cfg *kg_cfg);
 
 int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
-                         uint64_t req_dist_set);
+               uint64_t req_dist_set, int tc_index);
 
 int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev,
                           uint8_t tc_index);
@@ -226,7 +241,6 @@ void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
 uint16_t dpaa2_dev_tx_conf(void *queue)  __rte_unused;
 
-#if defined(RTE_LIBRTE_IEEE1588)
 int dpaa2_timesync_enable(struct rte_eth_dev *dev);
 int dpaa2_timesync_disable(struct rte_eth_dev *dev);
 int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
@@ -239,5 +253,4 @@ int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
                                                uint32_t flags __rte_unused);
 int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
                                          struct timespec *timestamp);
-#endif
 #endif /* _DPAA2_ETHDEV_H */