/* SPDX-License-Identifier: BSD-3-Clause
*
* Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- * Copyright 2016-2019 NXP
+ * Copyright 2016-2020 NXP
*
*/
} while (0)
static inline void __rte_hot
-dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd)
+dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd,
+ void *hw_annot_addr)
{
- struct dpaa2_annot_hdr *annotation;
uint16_t frc = DPAA2_GET_FD_FRC_PARSE_SUM(fd);
+ struct dpaa2_annot_hdr *annotation =
+ (struct dpaa2_annot_hdr *)hw_annot_addr;
m->packet_type = RTE_PTYPE_UNKNOWN;
switch (frc) {
RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP;
break;
default:
- m->packet_type = dpaa2_dev_rx_parse_slow(m,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ m->packet_type = dpaa2_dev_rx_parse_slow(m, annotation);
}
m->hash.rss = fd->simple.flc_hi;
m->ol_flags |= PKT_RX_RSS_HASH;
- if (dpaa2_enable_ts == PMD_DPAA2_ENABLE_TS) {
- annotation = (struct dpaa2_annot_hdr *)
- ((size_t)DPAA2_IOVA_TO_VADDR(
- DPAA2_GET_FD_ADDR(fd)) + DPAA2_FD_PTA_SIZE);
+ if (dpaa2_enable_ts[m->port]) {
m->timestamp = annotation->word2;
m->ol_flags |= PKT_RX_TIMESTAMP;
DPAA2_PMD_DP_DEBUG("pkt timestamp:0x%" PRIx64 "", m->timestamp);
struct qbman_sge *sgt, *sge;
size_t sg_addr, fd_addr;
int i = 0;
+ void *hw_annot_addr;
struct rte_mbuf *first_seg, *next_seg, *cur_seg, *temp;
fd_addr = (size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
+ hw_annot_addr = (void *)(fd_addr + DPAA2_FD_PTA_SIZE);
/* Get Scatter gather table address */
sgt = (struct qbman_sge *)(fd_addr + DPAA2_GET_FD_OFFSET(fd));
first_seg->next = NULL;
first_seg->port = port_id;
if (dpaa2_svr_family == SVR_LX2160A)
- dpaa2_dev_rx_parse_new(first_seg, fd);
+ dpaa2_dev_rx_parse_new(first_seg, fd, hw_annot_addr);
else
- first_seg->packet_type = dpaa2_dev_rx_parse(first_seg,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ first_seg->packet_type =
+ dpaa2_dev_rx_parse(first_seg, hw_annot_addr);
rte_mbuf_refcnt_set(first_seg, 1);
cur_seg = first_seg;
eth_fd_to_mbuf(const struct qbman_fd *fd,
int port_id)
{
- struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(
- DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)),
+ void *v_addr = DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd));
+ void *hw_annot_addr = (void *)((size_t)v_addr + DPAA2_FD_PTA_SIZE);
+ struct rte_mbuf *mbuf = DPAA2_INLINE_MBUF_FROM_BUF(v_addr,
rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size);
/* need to repopulated some of the fields,
*/
if (dpaa2_svr_family == SVR_LX2160A)
- dpaa2_dev_rx_parse_new(mbuf, fd);
+ dpaa2_dev_rx_parse_new(mbuf, fd, hw_annot_addr);
else
- mbuf->packet_type = dpaa2_dev_rx_parse(mbuf,
- (void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
- + DPAA2_FD_PTA_SIZE));
+ mbuf->packet_type = dpaa2_dev_rx_parse(mbuf, hw_annot_addr);
DPAA2_PMD_DP_DEBUG("to mbuf - mbuf =%p, mbuf->buf_addr =%p, off = %d,"
"fd_off=%d fd =%" PRIx64 ", meta = %d bpid =%d, len=%d\n",
int ret, num_rx = 0, pull_size;
uint8_t pending, status;
struct qbman_swp *swp;
- const struct qbman_fd *fd, *next_fd;
+ const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
}
fd = qbman_result_DQ_fd(dq_storage);
+#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
if (dpaa2_svr_family != SVR_LX2160A) {
- next_fd = qbman_result_DQ_fd(dq_storage + 1);
+ const struct qbman_fd *next_fd =
+ qbman_result_DQ_fd(dq_storage + 1);
/* Prefetch Annotation address for the parse results */
- rte_prefetch0((void *)(size_t)(DPAA2_GET_FD_ADDR(
- next_fd) + DPAA2_FD_PTA_SIZE + 16));
+ rte_prefetch0(DPAA2_IOVA_TO_VADDR((DPAA2_GET_FD_ADDR(
+ next_fd) + DPAA2_FD_PTA_SIZE + 16)));
}
+#endif
if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
bufs[num_rx] = eth_sg_fd_to_mbuf(fd, eth_data->port_id);
int ret, num_rx = 0, next_pull = nb_pkts, num_pulled;
uint8_t pending, status;
struct qbman_swp *swp;
- const struct qbman_fd *fd, *next_fd;
+ const struct qbman_fd *fd;
struct qbman_pull_desc pulldesc;
struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal\n");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
}
fd = qbman_result_DQ_fd(dq_storage);
- next_fd = qbman_result_DQ_fd(dq_storage + 1);
- /* Prefetch Annotation address for the parse results */
- rte_prefetch0(
- (void *)(size_t)(DPAA2_GET_FD_ADDR(next_fd)
- + DPAA2_FD_PTA_SIZE + 16));
+#ifndef RTE_LIBRTE_DPAA2_USE_PHYS_IOVA
+ if (dpaa2_svr_family != SVR_LX2160A) {
+ const struct qbman_fd *next_fd =
+ qbman_result_DQ_fd(dq_storage + 1);
+
+ /* Prefetch Annotation address for the parse
+ * results.
+ */
+ rte_prefetch0((DPAA2_IOVA_TO_VADDR(
+ DPAA2_GET_FD_ADDR(next_fd) +
+ DPAA2_FD_PTA_SIZE + 16)));
+ }
+#endif
if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
bufs[num_rx] = eth_sg_fd_to_mbuf(fd,
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal\n");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}
if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
ret = dpaa2_affine_qbman_swp();
if (ret) {
- DPAA2_PMD_ERR("Failure in affining portal");
+ DPAA2_PMD_ERR(
+ "Failed to allocate IO portal, tid: %d\n",
+ rte_gettid());
return 0;
}
}