/* Mezz card for Blade Server */
#define HINIC_DEV_ID_MEZZ_25GE 0x0210
-#define HINIC_DEV_ID_MEZZ_40GE 0x020D
#define HINIC_DEV_ID_MEZZ_100GE 0x0205
/* 2*25G and 2*100G card */
err = hinic_vlan_offload_set(dev,
ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
if (err) {
- PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed\n");
+ PMD_DRV_LOG(ERR, "Initialize vlan filter and strip failed");
(void)hinic_config_mq_mode(dev, FALSE);
return err;
}
info->max_mac_addrs = HINIC_MAX_UC_MAC_ADDRS;
info->min_mtu = HINIC_MIN_MTU_SIZE;
info->max_mtu = HINIC_MAX_MTU_SIZE;
+ info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
hinic_get_speed_capa(dev, &info->speed_capa);
info->rx_queue_offload_capa = 0;
err = hinic_get_mgmt_version(nic_dev->hwdev, fw_ver);
if (err) {
- PMD_DRV_LOG(ERR, "Failed to get fw version\n");
+ PMD_DRV_LOG(ERR, "Failed to get fw version");
return -EINVAL;
}
return 0;
}
-
static int hinic_rxtx_configure(struct rte_eth_dev *dev)
{
- int err;
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- bool lro_en;
+ int err;
/* rx configure, if rss enable, need to init default configuration */
err = hinic_rx_configure(dev);
goto set_rx_mode_fail;
}
- /* config lro */
- lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
- true : false;
-
- err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
- HINIC_LRO_WQE_NUM_DEFAULT);
- if (err) {
- PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
- lro_en ? "Enable" : "Disable", err);
- goto set_rx_mode_fail;
- }
-
return HINIC_OK;
set_rx_mode_fail:
/* just stop phy port and vport */
rc = hinic_set_port_enable(nic_dev->hwdev, false);
if (rc)
- PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name:%s, port_id:%d",
+ PMD_DRV_LOG(WARNING, "Disable phy port failed, error: %d, dev_name: %s, port_id: %d",
rc, name, port_id);
rc = hinic_set_vport_enable(nic_dev->hwdev, false);
/* clean root context */
hinic_free_qp_ctxts(nic_dev->hwdev);
- hinic_free_fdir_filter(nic_dev);
+ hinic_destroy_fdir_filter(dev);
/* free mbuf */
hinic_free_all_rx_mbuf(dev);
return rc;
}
+static int hinic_flow_ctrl_get(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct nic_pause_config nic_pause;
+ int err;
+
+ memset(&nic_pause, 0, sizeof(nic_pause));
+
+ err = hinic_get_pause_info(nic_dev->hwdev, &nic_pause);
+ if (err)
+ return err;
+
+ if (nic_dev->pause_set || !nic_pause.auto_neg) {
+ nic_pause.rx_pause = nic_dev->nic_pause.rx_pause;
+ nic_pause.tx_pause = nic_dev->nic_pause.tx_pause;
+ }
+
+ fc_conf->autoneg = nic_pause.auto_neg;
+
+ if (nic_pause.tx_pause && nic_pause.rx_pause)
+ fc_conf->mode = RTE_FC_FULL;
+ else if (nic_pause.tx_pause)
+ fc_conf->mode = RTE_FC_TX_PAUSE;
+ else if (nic_pause.rx_pause)
+ fc_conf->mode = RTE_FC_RX_PAUSE;
+ else
+ fc_conf->mode = RTE_FC_NONE;
+
+ return 0;
+}
+
+static int hinic_flow_ctrl_set(struct rte_eth_dev *dev,
+ struct rte_eth_fc_conf *fc_conf)
+{
+ struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
+ struct nic_pause_config nic_pause;
+ int err;
+
+ nic_pause.auto_neg = fc_conf->autoneg;
+
+ if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
+ (fc_conf->mode & RTE_FC_TX_PAUSE))
+ nic_pause.tx_pause = true;
+ else
+ nic_pause.tx_pause = false;
+
+ if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
+ (fc_conf->mode & RTE_FC_RX_PAUSE))
+ nic_pause.rx_pause = true;
+ else
+ nic_pause.rx_pause = false;
+
+ err = hinic_set_pause_config(nic_dev->hwdev, nic_pause);
+ if (err)
+ return err;
+
+ nic_dev->pause_set = true;
+ nic_dev->nic_pause.auto_neg = nic_pause.auto_neg;
+ nic_dev->nic_pause.rx_pause = nic_pause.rx_pause;
+ nic_dev->nic_pause.tx_pause = nic_pause.tx_pause;
+
+ PMD_DRV_LOG(INFO, "Set pause options, tx: %s, rx: %s, auto: %s\n",
+ nic_pause.tx_pause ? "on" : "off",
+ nic_pause.rx_pause ? "on" : "off",
+ nic_pause.auto_neg ? "on" : "off");
+
+ return 0;
+}
+
/**
* DPDK callback to update the RSS hash key and RSS hash type.
*
}
if (rss_conf->rss_key_len > HINIC_RSS_KEY_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len:%d",
+ PMD_DRV_LOG(ERR, "Invalid rss key, rss_key_len: %d",
rss_conf->rss_key_len);
return HINIC_ERROR;
}
return HINIC_OK;
if (reta_size != NIC_RSS_INDIR_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
+ PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
return HINIC_ERROR;
}
for (i = 0 ; i < reta_size; i++) {
if (indirtbl[i] >= nic_dev->num_rq) {
- PMD_DRV_LOG(ERR, "Invalid reta entry, index:%d, num_rq:%d",
+ PMD_DRV_LOG(ERR, "Invalid reta entry, index: %d, num_rq: %d",
i, nic_dev->num_rq);
goto disable_rss;
}
u16 i = 0;
if (reta_size != NIC_RSS_INDIR_SIZE) {
- PMD_DRV_LOG(ERR, "Invalid reta size, reta_size:%d", reta_size);
+ PMD_DRV_LOG(ERR, "Invalid reta size, reta_size: %d", reta_size);
return HINIC_ERROR;
}
err = hinic_rss_get_indir_tbl(nic_dev->hwdev, tmpl_idx, indirtbl);
if (err) {
- PMD_DRV_LOG(ERR, "Get rss indirect table failed, error:%d",
+ PMD_DRV_LOG(ERR, "Get rss indirect table failed, error: %d",
err);
return err;
}
rte_ether_addr_copy(addr, &nic_dev->default_addr);
- PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x\n",
+ PMD_DRV_LOG(INFO, "Set new mac address %02x:%02x:%02x:%02x:%02x:%02x",
addr->addr_bytes[0], addr->addr_bytes[1],
addr->addr_bytes[2], addr->addr_bytes[3],
addr->addr_bytes[4], addr->addr_bytes[5]);
* @param dev
* Pointer to Ethernet device structure.
* @param index
- * MAC address index.
+ * MAC address index, should less than 128.
*/
static void hinic_mac_addr_remove(struct rte_eth_dev *dev, uint32_t index)
{
* @param dev
* Pointer to Ethernet device structure.
* @param mac_addr
- * MAC address to register.
+ * Pointer to MAC address
* @param index
- * MAC address index.
+ * MAC address index, should less than 128.
* @param vmdq
- * VMDq pool index to associate address with (ignored).
+ * VMDq pool index(not used).
*
* @return
- * 0 on success, a negative errno value otherwise and rte_errno is set.
+ * 0 on success, negative error value otherwise.
*/
-
static int hinic_mac_addr_add(struct rte_eth_dev *dev,
struct rte_ether_addr *mac_addr, uint32_t index,
__rte_unused uint32_t vmdq)
int ret;
if (index >= HINIC_MAX_UC_MAC_ADDRS) {
- PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range,", index);
+ PMD_DRV_LOG(INFO, "Add mac index(%u) is out of range", index);
return -EINVAL;
}
static int hinic_set_default_pause_feature(struct hinic_nic_dev *nic_dev)
{
struct nic_pause_config pause_config = {0};
+ int err;
pause_config.auto_neg = 0;
pause_config.rx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
pause_config.tx_pause = HINIC_DEFAUT_PAUSE_CONFIG;
- return hinic_set_pause_config(nic_dev->hwdev, pause_config);
+ err = hinic_set_pause_config(nic_dev->hwdev, pause_config);
+ if (err)
+ return err;
+
+ nic_dev->pause_set = true;
+ nic_dev->nic_pause.auto_neg = pause_config.auto_neg;
+ nic_dev->nic_pause.rx_pause = pause_config.rx_pause;
+ nic_dev->nic_pause.tx_pause = pause_config.tx_pause;
+
+ return 0;
}
static int hinic_set_default_dcb_feature(struct hinic_nic_dev *nic_dev)
.allmulticast_disable = hinic_dev_allmulticast_disable,
.promiscuous_enable = hinic_dev_promiscuous_enable,
.promiscuous_disable = hinic_dev_promiscuous_disable,
+ .flow_ctrl_get = hinic_flow_ctrl_get,
+ .flow_ctrl_set = hinic_flow_ctrl_set,
.rss_hash_update = hinic_rss_hash_update,
.rss_hash_conf_get = hinic_rss_conf_get,
.reta_update = hinic_rss_indirtbl_update,
struct rte_ether_addr *eth_addr;
struct hinic_nic_dev *nic_dev;
struct hinic_filter_info *filter_info;
+ struct hinic_tcam_info *tcam_info;
u32 mac_size;
int rc;
/* initialize filter info */
filter_info = &nic_dev->filter;
+ tcam_info = &nic_dev->tcam;
memset(filter_info, 0, sizeof(struct hinic_filter_info));
+ memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
/* initialize 5tuple filter list */
TAILQ_INIT(&filter_info->fivetuple_list);
+ TAILQ_INIT(&tcam_info->tcam_list);
TAILQ_INIT(&nic_dev->filter_ntuple_list);
TAILQ_INIT(&nic_dev->filter_ethertype_list);
TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
static struct rte_pci_id pci_id_hinic_map[] = {
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
- { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
{ RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },