net/hinic: add flow director filter

[dpdk.git] / drivers / net / hinic / hinic_pmd_ethdev.c

diff --git a/drivers/net/hinic/hinic_pmd_ethdev.c b/drivers/net/hinic/hinic_pmd_ethdev.c
index 9f37a40..9e90056 100644 (file)
--- a/drivers/net/hinic/hinic_pmd_ethdev.c
+++ b/drivers/net/hinic/hinic_pmd_ethdev.c
@@ -36,7 +36,6 @@
 
 /* Mezz card for Blade Server */
 #define HINIC_DEV_ID_MEZZ_25GE         0x0210
-#define HINIC_DEV_ID_MEZZ_40GE         0x020D
 #define HINIC_DEV_ID_MEZZ_100GE                0x0205
 
 /* 2*25G and 2*100G card */
@@ -57,6 +56,7 @@
 #define HINIC_DEFAULT_BURST_SIZE       32
 #define HINIC_DEFAULT_NB_QUEUES                1
 #define HINIC_DEFAULT_RING_SIZE                1024
+#define HINIC_MAX_LRO_SIZE             65536
 
 /*
  * vlan_id is a 12 bit number.
@@ -318,6 +318,9 @@ static int hinic_dev_configure(struct rte_eth_dev *dev)
                return -EINVAL;
        }
 
+       if (dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG)
+               dev->data->dev_conf.rxmode.offloads |= DEV_RX_OFFLOAD_RSS_HASH;
+
        /* mtu size is 256~9600 */
        if (dev->data->dev_conf.rxmode.max_rx_pkt_len < HINIC_MIN_FRAME_SIZE ||
            dev->data->dev_conf.rxmode.max_rx_pkt_len >
@@ -436,7 +439,7 @@ static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
        nic_dev->rxqs[queue_idx] = rxq;
 
        /* alloc rx sq hw wqepage*/
-       rc = hinic_create_rq(hwdev, queue_idx, rq_depth);
+       rc = hinic_create_rq(hwdev, queue_idx, rq_depth, socket_id);
        if (rc) {
                PMD_DRV_LOG(ERR, "Create rxq[%d] failed, dev_name: %s, rq_depth: %d",
                            queue_idx, dev->data->name, rq_depth);
@@ -463,6 +466,7 @@ static int hinic_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
        rxq->q_depth = rq_depth;
        rxq->buf_len = (u16)buf_size;
        rxq->rx_free_thresh = rx_free_thresh;
+       rxq->socket_id = socket_id;
 
        /* the last point cant do mbuf rearm in bulk */
        rxq->rxinfo_align_end = rxq->q_depth - rxq->rx_free_thresh;
@@ -590,7 +594,7 @@ static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
        nic_dev->txqs[queue_idx] = txq;
 
        /* alloc tx sq hw wqepage */
-       rc = hinic_create_sq(hwdev, queue_idx, sq_depth);
+       rc = hinic_create_sq(hwdev, queue_idx, sq_depth, socket_id);
        if (rc) {
                PMD_DRV_LOG(ERR, "Create txq[%d] failed, dev_name: %s, sq_depth: %d",
                            queue_idx, dev->data->name, sq_depth);
@@ -609,6 +613,7 @@ static int hinic_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
        txq->sq_bot_sge_addr = HINIC_GET_WQ_TAIL(txq) -
                                        sizeof(struct hinic_sq_bufdesc);
        txq->cos = nic_dev->default_cos;
+       txq->socket_id = socket_id;
 
        /* alloc software txinfo */
        rc = hinic_setup_tx_resources(txq);
@@ -730,6 +735,7 @@ hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
        info->max_mac_addrs  = HINIC_MAX_UC_MAC_ADDRS;
        info->min_mtu = HINIC_MIN_MTU_SIZE;
        info->max_mtu = HINIC_MAX_MTU_SIZE;
+       info->max_lro_pkt_size = HINIC_MAX_LRO_SIZE;
 
        hinic_get_speed_capa(dev, &info->speed_capa);
        info->rx_queue_offload_capa = 0;
@@ -740,7 +746,8 @@ hinic_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
                                DEV_RX_OFFLOAD_VLAN_FILTER |
                                DEV_RX_OFFLOAD_SCATTER |
                                DEV_RX_OFFLOAD_JUMBO_FRAME |
-                               DEV_RX_OFFLOAD_TCP_LRO;
+                               DEV_RX_OFFLOAD_TCP_LRO |
+                               DEV_RX_OFFLOAD_RSS_HASH;
 
        info->tx_queue_offload_capa = 0;
        info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
@@ -804,12 +811,10 @@ static int hinic_config_rx_mode(struct hinic_nic_dev *nic_dev, u32 rx_mode_ctrl)
        return 0;
 }
 
-
 static int hinic_rxtx_configure(struct rte_eth_dev *dev)
 {
-       int err;
        struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
-       bool lro_en;
+       int err;
 
        /* rx configure, if rss enable, need to init default configuration */
        err = hinic_rx_configure(dev);
@@ -826,18 +831,6 @@ static int hinic_rxtx_configure(struct rte_eth_dev *dev)
                goto set_rx_mode_fail;
        }
 
-       /* config lro */
-       lro_en = dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_TCP_LRO ?
-                       true : false;
-
-       err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en,
-                               HINIC_LRO_WQE_NUM_DEFAULT);
-       if (err) {
-               PMD_DRV_LOG(ERR, "%s lro failed, err: %d",
-                       lro_en ? "Enable" : "Disable", err);
-               goto set_rx_mode_fail;
-       }
-
        return HINIC_OK;
 
 set_rx_mode_fail:
@@ -1229,7 +1222,7 @@ static void hinic_dev_stop(struct rte_eth_dev *dev)
        /* clean root context */
        hinic_free_qp_ctxts(nic_dev->hwdev);
 
-       hinic_free_fdir_filter(nic_dev);
+       hinic_destroy_fdir_filter(dev);
 
        /* free mbuf */
        hinic_free_all_rx_mbuf(dev);
@@ -2953,6 +2946,7 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
        struct rte_ether_addr *eth_addr;
        struct hinic_nic_dev *nic_dev;
        struct hinic_filter_info *filter_info;
+       struct hinic_tcam_info *tcam_info;
        u32 mac_size;
        int rc;
 
@@ -2960,14 +2954,10 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
 
        /* EAL is SECONDARY and eth_dev is already created */
        if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
-               rc = rte_intr_callback_register(&pci_dev->intr_handle,
-                                               hinic_dev_interrupt_handler,
-                                               (void *)eth_dev);
-               if (rc)
-                       PMD_DRV_LOG(ERR, "Initialize %s failed in secondary process",
-                                   eth_dev->data->name);
+               PMD_DRV_LOG(INFO, "Initialize %s in secondary process",
+                           eth_dev->data->name);
 
-               return rc;
+               return 0;
        }
 
        nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
@@ -3046,9 +3036,12 @@ static int hinic_func_init(struct rte_eth_dev *eth_dev)
 
        /* initialize filter info */
        filter_info = &nic_dev->filter;
+       tcam_info = &nic_dev->tcam;
        memset(filter_info, 0, sizeof(struct hinic_filter_info));
+       memset(tcam_info, 0, sizeof(struct hinic_tcam_info));
        /* initialize 5tuple filter list */
        TAILQ_INIT(&filter_info->fivetuple_list);
+       TAILQ_INIT(&tcam_info->tcam_list);
        TAILQ_INIT(&nic_dev->filter_ntuple_list);
        TAILQ_INIT(&nic_dev->filter_ethertype_list);
        TAILQ_INIT(&nic_dev->filter_fdir_rule_list);
@@ -3132,7 +3125,6 @@ static int hinic_dev_uninit(struct rte_eth_dev *dev)
 static struct rte_pci_id pci_id_hinic_map[] = {
        { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_PRD) },
        { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_25GE) },
-       { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_40GE) },
        { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_MEZZ_100GE) },
        { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF) },
        { RTE_PCI_DEVICE(HINIC_HUAWEI_VENDOR_ID, HINIC_DEV_ID_VF_HV) },