#include <rte_ether.h>
#include <rte_mbuf.h>
-#ifdef __ARM64_NEON__
+#ifdef RTE_ARCH_ARM64
#include <arm_neon.h>
#endif
nic_dev->hwdev->nic_io->rq_buf_size = buf_size;
}
-int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id, u16 rq_depth)
+int hinic_create_rq(struct hinic_hwdev *hwdev, u16 q_id,
+ u16 rq_depth, unsigned int socket_id)
{
int err;
struct hinic_nic_io *nic_io = hwdev->nic_io;
nic_io->rq_depth = rq_depth;
err = hinic_wq_allocate(hwdev, &nic_io->rq_wq[q_id],
- HINIC_RQ_WQEBB_SHIFT, nic_io->rq_depth);
+ HINIC_RQ_WQEBB_SHIFT, nic_io->rq_depth, socket_id);
if (err) {
PMD_DRV_LOG(ERR, "Failed to allocate WQ for RQ");
return err;
}
rq->wq = &nic_io->rq_wq[q_id];
- rq->pi_virt_addr =
- (volatile u16 *)dma_zalloc_coherent(hwdev, HINIC_PAGE_SIZE,
- &rq->pi_dma_addr,
- GFP_KERNEL);
+ rq->pi_virt_addr = (volatile u16 *)dma_zalloc_coherent(hwdev,
+ HINIC_PAGE_SIZE, &rq->pi_dma_addr, socket_id);
if (!rq->pi_virt_addr) {
PMD_DRV_LOG(ERR, "Failed to allocate rq pi virt addr");
err = -ENOMEM;
memset(rxq_stats, 0, sizeof(*rxq_stats));
}
-static int hinic_rx_alloc_cqe(struct hinic_rxq *rxq)
+static int hinic_rx_alloc_cqe(struct hinic_rxq *rxq, unsigned int socket_id)
{
size_t cqe_mem_size;
cqe_mem_size = sizeof(struct hinic_rq_cqe) * rxq->q_depth;
- rxq->cqe_start_vaddr =
- dma_zalloc_coherent(rxq->nic_dev->hwdev,
- cqe_mem_size, &rxq->cqe_start_paddr,
- GFP_KERNEL);
+ rxq->cqe_start_vaddr = dma_zalloc_coherent(rxq->nic_dev->hwdev,
+ cqe_mem_size, &rxq->cqe_start_paddr, socket_id);
if (!rxq->cqe_start_vaddr) {
PMD_DRV_LOG(ERR, "Allocate cqe dma memory failed");
return -ENOMEM;
int err, pkts;
rx_info_sz = rxq->q_depth * sizeof(*rxq->rx_info);
- rxq->rx_info = kzalloc_aligned(rx_info_sz, GFP_KERNEL);
+ rxq->rx_info = rte_zmalloc_socket("rx_info", rx_info_sz,
+ RTE_CACHE_LINE_SIZE, rxq->socket_id);
if (!rxq->rx_info)
return -ENOMEM;
- err = hinic_rx_alloc_cqe(rxq);
+ err = hinic_rx_alloc_cqe(rxq, rxq->socket_id);
if (err) {
PMD_DRV_LOG(ERR, "Allocate rx cqe failed");
goto rx_cqe_err;
hinic_rx_free_cqe(rxq);
rx_cqe_err:
- kfree(rxq->rx_info);
+ rte_free(rxq->rx_info);
rxq->rx_info = NULL;
return err;
return;
hinic_rx_free_cqe(rxq);
- kfree(rxq->rx_info);
+ rte_free(rxq->rx_info);
rxq->rx_info = NULL;
}
HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(eth_dev);
for (q_id = 0; q_id < nic_dev->num_rq; q_id++) {
- eth_dev->data->rx_queues[q_id] = NULL;
+ if (eth_dev->data->rx_queues != NULL)
+ eth_dev->data->rx_queues[q_id] = NULL;
if (nic_dev->rxqs[q_id] == NULL)
continue;
{
u64 rss_hf = rss_conf->rss_hf;
- rss_type->ipv4 = (rss_hf & (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4)) ? 1 : 0;
- rss_type->tcp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
- rss_type->ipv6 = (rss_hf & (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6)) ? 1 : 0;
- rss_type->ipv6_ext = (rss_hf & ETH_RSS_IPV6_EX) ? 1 : 0;
- rss_type->tcp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
- rss_type->tcp_ipv6_ext = (rss_hf & ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
- rss_type->udp_ipv4 = (rss_hf & ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
- rss_type->udp_ipv6 = (rss_hf & ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
+ rss_type->ipv4 = (rss_hf & (RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4)) ? 1 : 0;
+ rss_type->tcp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_TCP) ? 1 : 0;
+ rss_type->ipv6 = (rss_hf & (RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6)) ? 1 : 0;
+ rss_type->ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_EX) ? 1 : 0;
+ rss_type->tcp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_TCP) ? 1 : 0;
+ rss_type->tcp_ipv6_ext = (rss_hf & RTE_ETH_RSS_IPV6_TCP_EX) ? 1 : 0;
+ rss_type->udp_ipv4 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV4_UDP) ? 1 : 0;
+ rss_type->udp_ipv6 = (rss_hf & RTE_ETH_RSS_NONFRAG_IPV6_UDP) ? 1 : 0;
}
static void hinic_fillout_indir_tbl(struct hinic_nic_dev *nic_dev, u32 *indir)
}
static int hinic_rss_init(struct hinic_nic_dev *nic_dev,
- __attribute__((unused)) u8 *rq2iq_map,
+ __rte_unused u8 *rq2iq_map,
struct rte_eth_rss_conf *rss_conf)
{
u32 indir_tbl[HINIC_RSS_INDIR_SIZE] = {0};
{
int err, i;
- if (!(nic_dev->flags & ETH_MQ_RX_RSS_FLAG)) {
- nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG;
+ if (!(nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG)) {
+ nic_dev->flags &= ~RTE_ETH_MQ_RX_RSS_FLAG;
nic_dev->num_rss = 0;
if (nic_dev->num_rq > 1) {
/* get rss template id */
PMD_DRV_LOG(WARNING, "Alloc rss template failed");
return err;
}
- nic_dev->flags |= ETH_MQ_RX_RSS_FLAG;
+ nic_dev->flags |= RTE_ETH_MQ_RX_RSS_FLAG;
for (i = 0; i < nic_dev->num_rq; i++)
hinic_add_rq_to_rx_queue_list(nic_dev, i);
}
static void hinic_destroy_num_qps(struct hinic_nic_dev *nic_dev)
{
- if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) {
+ if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) {
if (hinic_rss_template_free(nic_dev->hwdev,
nic_dev->rss_tmpl_idx))
PMD_DRV_LOG(WARNING, "Free rss template failed");
- nic_dev->flags &= ~ETH_MQ_RX_RSS_FLAG;
+ nic_dev->flags &= ~RTE_ETH_MQ_RX_RSS_FLAG;
}
}
int ret = 0;
switch (dev_conf->rxmode.mq_mode) {
- case ETH_MQ_RX_RSS:
+ case RTE_ETH_MQ_RX_RSS:
ret = hinic_config_mq_rx_rss(nic_dev, on);
break;
default:
struct rte_eth_rss_conf rss_conf =
dev->data->dev_conf.rx_adv_conf.rss_conf;
int err;
+ bool lro_en;
+ int max_lro_size;
+ int lro_wqe_num;
+ int buf_size;
- if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) {
+ if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) {
if (rss_conf.rss_hf == 0) {
rss_conf.rss_hf = HINIC_RSS_OFFLOAD_ALL;
} else if ((rss_conf.rss_hf & HINIC_RSS_OFFLOAD_ALL) == 0) {
}
/* Enable both L3/L4 rx checksum offload */
- if (dev->data->dev_conf.rxmode.offloads & DEV_RX_OFFLOAD_CHECKSUM)
+ if (dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_CHECKSUM)
nic_dev->rx_csum_en = HINIC_RX_CSUM_OFFLOAD_EN;
err = hinic_set_rx_csum_offload(nic_dev->hwdev,
if (err)
goto rx_csum_ofl_err;
+ /* config lro */
+ lro_en = dev->data->dev_conf.rxmode.offloads & RTE_ETH_RX_OFFLOAD_TCP_LRO ?
+ true : false;
+ max_lro_size = dev->data->dev_conf.rxmode.max_lro_pkt_size;
+ buf_size = nic_dev->hwdev->nic_io->rq_buf_size;
+ lro_wqe_num = max_lro_size / buf_size ? (max_lro_size / buf_size) : 1;
+
+ err = hinic_set_rx_lro(nic_dev->hwdev, lro_en, lro_en, lro_wqe_num);
+ if (err) {
+ PMD_DRV_LOG(ERR, "%s %s lro failed, err: %d, max_lro_size: %d",
+ dev->data->name, lro_en ? "Enable" : "Disable",
+ err, max_lro_size);
+ goto set_rx_lro_err;
+ }
+
return 0;
+set_rx_lro_err:
rx_csum_ofl_err:
rss_config_err:
+
hinic_destroy_num_qps(nic_dev);
return HINIC_ERROR;
}
+static void hinic_rx_remove_lro(struct hinic_nic_dev *nic_dev)
+{
+ int err;
+
+ err = hinic_set_rx_lro(nic_dev->hwdev, false, false, 0);
+ if (err)
+ PMD_DRV_LOG(ERR, "%s disable LRO failed",
+ nic_dev->proc_dev_name);
+}
+
void hinic_rx_remove_configure(struct rte_eth_dev *dev)
{
struct hinic_nic_dev *nic_dev = HINIC_ETH_DEV_TO_PRIVATE_NIC_DEV(dev);
- if (nic_dev->flags & ETH_MQ_RX_RSS_FLAG) {
+ if (nic_dev->flags & RTE_ETH_MQ_RX_RSS_FLAG) {
hinic_rss_deinit(nic_dev);
hinic_destroy_num_qps(nic_dev);
}
+
+ hinic_rx_remove_lro(nic_dev);
}
void hinic_free_all_rx_mbufs(struct hinic_rxq *rxq)
static inline void hinic_rq_cqe_be_to_cpu32(void *dst_le32,
volatile void *src_be32)
{
-#if defined(__X86_64_SSE__)
+#if defined(RTE_ARCH_X86_64)
volatile __m128i *wqe_be = (volatile __m128i *)src_be32;
__m128i *wqe_le = (__m128i *)dst_le32;
__m128i shuf_mask = _mm_set_epi8(12, 13, 14, 15, 8, 9, 10,
/* l2nic just use first 128 bits */
wqe_le[0] = _mm_shuffle_epi8(wqe_be[0], shuf_mask);
-#elif defined(__ARM64_NEON__)
+#elif defined(RTE_ARCH_ARM64)
volatile uint8x16_t *wqe_be = (volatile uint8x16_t *)src_be32;
uint8x16_t *wqe_le = (uint8x16_t *)dst_le32;
const uint8x16_t shuf_mask = {3, 2, 1, 0, 7, 6, 5, 4, 11, 10,
static struct rte_mbuf *hinic_rx_alloc_mbuf(struct hinic_rxq *rxq,
dma_addr_t *dma_addr)
{
- struct rte_mbuf *mbuf;
+ struct rte_mbuf *mbuf = NULL;
+ int rc;
- mbuf = rte_mbuf_raw_alloc(rxq->mb_pool);
- if (unlikely(!mbuf))
+ rc = rte_pktmbuf_alloc_bulk(rxq->mb_pool, &mbuf, 1);
+ if (unlikely(rc != HINIC_OK))
return NULL;
*dma_addr = rte_mbuf_data_iova_default(mbuf);
volatile struct hinic_rq_cqe *rx_cqe;
u16 rx_buf_len, pkts = 0;
u16 sw_ci, ci_mask, wqebb_cnt = 0;
- u32 pkt_len, status, vlan_len;
+ u32 pkt_len, status, vlan_len, lro_num;
u64 rx_bytes = 0;
struct hinic_rq_cqe cqe;
u32 offload_type, rss_hash;
while (pkts < nb_pkts) {
/* 2. current ci is done */
rx_cqe = &rxq->rx_cqe[sw_ci];
- status = rx_cqe->status;
+ status = __atomic_load_n(&rx_cqe->status, __ATOMIC_ACQUIRE);
if (!HINIC_GET_RX_DONE_BE(status))
break;
- /* read other cqe member after status */
- rte_rmb();
-
/* convert cqe and get packet length */
hinic_rq_cqe_be_to_cpu32(&cqe, (volatile void *)rx_cqe);
vlan_len = cqe.vlan_len;
rxm->ol_flags |= hinic_rx_rss_hash(offload_type, rss_hash,
&rxm->hash.rss);
+ /* lro offload */
+ lro_num = HINIC_GET_RX_NUM_LRO(cqe.status);
+ if (unlikely(lro_num != 0)) {
+ rxm->ol_flags |= PKT_RX_LRO;
+ rxm->tso_segsz = pkt_len / lro_num;
+ }
+
/* 6. clear done bit */
rx_cqe->status = 0;
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