net/hns3: fix flow director lock
[dpdk.git] / drivers / net / hns3 / hns3_ethdev.c
index cbcc4f4..95be141 100644 (file)
@@ -2222,24 +2222,17 @@ hns3_check_mq_mode(struct rte_eth_dev *dev)
        int max_tc = 0;
        int i;
 
-       dcb_rx_conf = &dev->data->dev_conf.rx_adv_conf.dcb_rx_conf;
-       dcb_tx_conf = &dev->data->dev_conf.tx_adv_conf.dcb_tx_conf;
-
-       if (rx_mq_mode == ETH_MQ_RX_VMDQ_DCB_RSS) {
-               hns3_err(hw, "ETH_MQ_RX_VMDQ_DCB_RSS is not supported. "
-                        "rx_mq_mode = %d", rx_mq_mode);
-               return -EINVAL;
-       }
-
-       if (rx_mq_mode == ETH_MQ_RX_VMDQ_DCB ||
-           tx_mq_mode == ETH_MQ_TX_VMDQ_DCB) {
-               hns3_err(hw, "ETH_MQ_RX_VMDQ_DCB and ETH_MQ_TX_VMDQ_DCB "
-                        "is not supported. rx_mq_mode = %d, tx_mq_mode = %d",
+       if ((rx_mq_mode & ETH_MQ_RX_VMDQ_FLAG) ||
+           (tx_mq_mode == ETH_MQ_TX_VMDQ_DCB ||
+            tx_mq_mode == ETH_MQ_TX_VMDQ_ONLY)) {
+               hns3_err(hw, "VMDQ is not supported, rx_mq_mode = %d, tx_mq_mode = %d.",
                         rx_mq_mode, tx_mq_mode);
-               return -EINVAL;
+               return -EOPNOTSUPP;
        }
 
-       if (rx_mq_mode == ETH_MQ_RX_DCB_RSS) {
+       dcb_rx_conf = &dev->data->dev_conf.rx_adv_conf.dcb_rx_conf;
+       dcb_tx_conf = &dev->data->dev_conf.tx_adv_conf.dcb_tx_conf;
+       if (rx_mq_mode & ETH_MQ_RX_DCB_FLAG) {
                if (dcb_rx_conf->nb_tcs > pf->tc_max) {
                        hns3_err(hw, "nb_tcs(%u) > max_tc(%u) driver supported.",
                                 dcb_rx_conf->nb_tcs, pf->tc_max);
@@ -2297,8 +2290,7 @@ hns3_check_dcb_cfg(struct rte_eth_dev *dev)
                return -EOPNOTSUPP;
        }
 
-       /* Check multiple queue mode */
-       return hns3_check_mq_mode(dev);
+       return 0;
 }
 
 static int
@@ -2471,6 +2463,10 @@ hns3_dev_configure(struct rte_eth_dev *dev)
        }
 
        hw->adapter_state = HNS3_NIC_CONFIGURING;
+       ret = hns3_check_mq_mode(dev);
+       if (ret)
+               goto cfg_err;
+
        if ((uint32_t)mq_mode & ETH_MQ_RX_DCB_FLAG) {
                ret = hns3_check_dcb_cfg(dev);
                if (ret)
@@ -7209,6 +7205,19 @@ hns3_get_io_hint_func_name(uint32_t hint)
        }
 }
 
+static int
+hns3_parse_dev_caps_mask(const char *key, const char *value, void *extra_args)
+{
+       uint64_t val;
+
+       RTE_SET_USED(key);
+
+       val = strtoull(value, NULL, 16);
+       *(uint64_t *)extra_args = val;
+
+       return 0;
+}
+
 void
 hns3_parse_devargs(struct rte_eth_dev *dev)
 {
@@ -7216,6 +7225,7 @@ hns3_parse_devargs(struct rte_eth_dev *dev)
        uint32_t rx_func_hint = HNS3_IO_FUNC_HINT_NONE;
        uint32_t tx_func_hint = HNS3_IO_FUNC_HINT_NONE;
        struct hns3_hw *hw = &hns->hw;
+       uint64_t dev_caps_mask = 0;
        struct rte_kvargs *kvlist;
 
        if (dev->device->devargs == NULL)
@@ -7229,6 +7239,8 @@ hns3_parse_devargs(struct rte_eth_dev *dev)
                           &hns3_parse_io_hint_func, &rx_func_hint);
        rte_kvargs_process(kvlist, HNS3_DEVARG_TX_FUNC_HINT,
                           &hns3_parse_io_hint_func, &tx_func_hint);
+       rte_kvargs_process(kvlist, HNS3_DEVARG_DEV_CAPS_MASK,
+                          &hns3_parse_dev_caps_mask, &dev_caps_mask);
        rte_kvargs_free(kvlist);
 
        if (rx_func_hint != HNS3_IO_FUNC_HINT_NONE)
@@ -7239,6 +7251,11 @@ hns3_parse_devargs(struct rte_eth_dev *dev)
                hns3_warn(hw, "parsed %s = %s.", HNS3_DEVARG_TX_FUNC_HINT,
                          hns3_get_io_hint_func_name(tx_func_hint));
        hns->tx_func_hint = tx_func_hint;
+
+       if (dev_caps_mask != 0)
+               hns3_warn(hw, "parsed %s = 0x%" PRIx64 ".",
+                         HNS3_DEVARG_DEV_CAPS_MASK, dev_caps_mask);
+       hns->dev_caps_mask = dev_caps_mask;
 }
 
 static const struct eth_dev_ops hns3_eth_dev_ops = {
@@ -7339,8 +7356,8 @@ hns3_dev_init(struct rte_eth_dev *eth_dev)
                PMD_INIT_LOG(ERR, "Failed to alloc memory for process private");
                return -ENOMEM;
        }
-       /* initialize flow filter lists */
-       hns3_filterlist_init(eth_dev);
+
+       hns3_flow_init(eth_dev);
 
        hns3_set_rxtx_function(eth_dev);
        eth_dev->dev_ops = &hns3_eth_dev_ops;
@@ -7506,6 +7523,7 @@ RTE_PMD_REGISTER_PCI_TABLE(net_hns3, pci_id_hns3_map);
 RTE_PMD_REGISTER_KMOD_DEP(net_hns3, "* igb_uio | vfio-pci");
 RTE_PMD_REGISTER_PARAM_STRING(net_hns3,
                HNS3_DEVARG_RX_FUNC_HINT "=vec|sve|simple|common "
-               HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common ");
+               HNS3_DEVARG_TX_FUNC_HINT "=vec|sve|simple|common "
+               HNS3_DEVARG_DEV_CAPS_MASK "=<1-65535> ");
 RTE_LOG_REGISTER(hns3_logtype_init, pmd.net.hns3.init, NOTICE);
 RTE_LOG_REGISTER(hns3_logtype_driver, pmd.net.hns3.driver, NOTICE);