net/hns3: add compile-time verification on Rx vector

[dpdk.git] / drivers / net / hns3 / hns3_rxtx_vec_sve.c

diff --git a/drivers/net/hns3/hns3_rxtx_vec_sve.c b/drivers/net/hns3/hns3_rxtx_vec_sve.c
index 8c2c8f6..ef6c875 100644 (file)
--- a/drivers/net/hns3/hns3_rxtx_vec_sve.c
+++ b/drivers/net/hns3/hns3_rxtx_vec_sve.c
@@ -1,10 +1,10 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright(c) 2020 Hisilicon Limited.
+ * Copyright(c) 2020-2021 HiSilicon Limited.
  */
 
 #include <arm_sve.h>
 #include <rte_io.h>
-#include <rte_ethdev_driver.h>
+#include <ethdev_driver.h>
 
 #include "hns3_ethdev.h"
 #include "hns3_rxtx.h"
@@ -39,7 +39,6 @@ hns3_desc_parse_field_sve(struct hns3_rx_queue *rxq,
                          uint32_t   bd_vld_num)
 {
        uint32_t retcode = 0;
-       uint32_t cksum_err;
        int ret, i;
 
        for (i = 0; i < (int)bd_vld_num; i++) {
@@ -47,7 +46,7 @@ hns3_desc_parse_field_sve(struct hns3_rx_queue *rxq,
                rx_pkts[i]->ol_flags = PKT_RX_RSS_HASH;
 
                ret = hns3_handle_bdinfo(rxq, rx_pkts[i], key->bd_base_info[i],
-                                        key->l234_info[i], &cksum_err);
+                                        key->l234_info[i]);
                if (unlikely(ret)) {
                        retcode |= 1u << i;
                        continue;
@@ -55,9 +54,9 @@ hns3_desc_parse_field_sve(struct hns3_rx_queue *rxq,
 
                rx_pkts[i]->packet_type = hns3_rx_calc_ptype(rxq,
                                        key->l234_info[i], key->ol_info[i]);
-               if (likely(key->bd_base_info[i] & BIT(HNS3_RXD_L3L4P_B)))
-                       hns3_rx_set_cksum_flag(rx_pkts[i],
-                                       rx_pkts[i]->packet_type, cksum_err);
+
+               /* Increment bytes counter */
+               rxq->basic_stats.bytes += rx_pkts[i]->pkt_len;
        }
 
        return retcode;
@@ -119,6 +118,12 @@ hns3_recv_burst_vec_sve(struct hns3_rx_queue *__restrict rxq,
        svuint32_t rss_tbl1 = svld1_u32(PG32_256BIT, rss_adjust);
        svuint32_t rss_tbl2 = svld1_u32(PG32_256BIT, &rss_adjust[8]);
 
+       /* compile-time verifies the xlen_adjust mask */
+       RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, data_len) !=
+                        offsetof(struct rte_mbuf, pkt_len) + 4);
+       RTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, vlan_tci) !=
+                        offsetof(struct rte_mbuf, data_len) + 2);
+
        for (pos = 0; pos < nb_pkts; pos += HNS3_SVE_DEFAULT_DESCS_PER_LOOP,
                                     rxdp += HNS3_SVE_DEFAULT_DESCS_PER_LOOP) {
                svuint64_t vld_clz, mbp1st, mbp2st, mbuf_init;
@@ -405,8 +410,14 @@ hns3_tx_fill_hw_ring_sve(struct hns3_tx_queue *txq,
                                (uint64_t *)&txdp->tx.outer_vlan_tag,
                                offsets, svdup_n_u64(0));
                /* save offset 24~31byte of every BD */
-               svst1_scatter_u64offset_u64(pg, (uint64_t *)&txdp->tx.paylen,
-                                           offsets, svdup_n_u64(valid_bit));
+               svst1_scatter_u64offset_u64(pg,
+                               (uint64_t *)&txdp->tx.paylen_fd_dop_ol4cs,
+                               offsets, svdup_n_u64(valid_bit));
+
+               /* Increment bytes counter */
+               uint32_t idx;
+               for (idx = 0; idx < svcntd(); idx++)
+                       txq->basic_stats.bytes += pkts[idx]->pkt_len;
 
                /* update index for next loop */
                i += svcntd();
@@ -430,7 +441,7 @@ hns3_xmit_fixed_burst_vec_sve(void *__restrict tx_queue,
 
        nb_pkts = RTE_MIN(txq->tx_bd_ready, nb_pkts);
        if (unlikely(nb_pkts == 0)) {
-               txq->queue_full_cnt++;
+               txq->dfx_stats.queue_full_cnt++;
                return 0;
        }