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net/i40e: workaround performance degradation
[dpdk.git] / drivers / net / i40e / i40e_ethdev.c
diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c
index 1c8dfca..e06e0a2 100644 (file)
--- a/drivers/net/i40e/i40e_ethdev.c
+++ b/drivers/net/i40e/i40e_ethdev.c
@@ -734,7 +734,6 @@ static inline void i40e_GLQF_reg_init(struct i40e_hw *hw)
         */
        I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(40), 0x00000029);
        I40E_WRITE_GLB_REG(hw, I40E_GLQF_PIT(9), 0x00009420);
-       i40e_global_cfg_warning(I40E_WARNING_QINQ_PARSER);
 }
 
 static inline void i40e_config_automask(struct i40e_pf *pf)
@@ -1306,7 +1305,6 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)
                PMD_INIT_LOG(DEBUG,
                             "Global register 0x%08x is changed with 0x28",
                             I40E_GLQF_L3_MAP(40));
-               i40e_global_cfg_warning(I40E_WARNING_QINQ_CLOUD_FILTER);
        }
 
        /* Need the special FW version to support floating VEB */
@@ -1593,7 +1591,6 @@ void i40e_flex_payload_reg_set_default(struct i40e_hw *hw)
        I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(33), 0x00000000);
        I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(34), 0x00000000);
        I40E_WRITE_GLB_REG(hw, I40E_GLQF_ORT(35), 0x00000000);
-       i40e_global_cfg_warning(I40E_WARNING_DIS_FLX_PLD);
 }
 
 static int
@@ -3508,8 +3505,6 @@ i40e_vlan_tpid_set_by_registers(struct rte_eth_dev *dev,
                    "Global register 0x%08x is changed with value 0x%08x",
                    I40E_GL_SWT_L2TAGCTRL(reg_id), (uint32_t)reg_w);
 
-       i40e_global_cfg_warning(I40E_WARNING_TPID);
-
        return 0;
 }
 
@@ -3804,7 +3799,6 @@ i40e_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
                I40E_WRITE_GLB_REG(hw, I40E_GLRPB_GLW,
                                   pf->fc_conf.low_water[I40E_MAX_TRAFFIC_CLASS]
                                   << I40E_KILOSHIFT);
-               i40e_global_cfg_warning(I40E_WARNING_FLOW_CTL);
        } else {
                PMD_DRV_LOG(ERR,
                            "Water marker configuration is not supported.");
@@ -7617,14 +7611,13 @@ i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf)
        status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
                                               &filter_replace_buf);
        if (!status && (filter_replace.old_filter_type !=
-                       filter_replace.new_filter_type)) {
-               i40e_global_cfg_warning(I40E_WARNING_RPL_CLD_FILTER);
+                       filter_replace.new_filter_type))
                PMD_DRV_LOG(WARNING, "i40e device %s changed cloud l1 type."
                            " original: 0x%x, new: 0x%x",
                            dev->device->name,
                            filter_replace.old_filter_type,
                            filter_replace.new_filter_type);
-       }
+
        return status;
 }
 
@@ -7693,14 +7686,13 @@ i40e_status_code i40e_replace_mpls_cloud_filter(struct i40e_pf *pf)
        status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
                                               &filter_replace_buf);
        if (!status && (filter_replace.old_filter_type !=
-                       filter_replace.new_filter_type)) {
-               i40e_global_cfg_warning(I40E_WARNING_RPL_CLD_FILTER);
+                       filter_replace.new_filter_type))
                PMD_DRV_LOG(WARNING, "i40e device %s changed cloud filter type."
                            " original: 0x%x, new: 0x%x",
                            dev->device->name,
                            filter_replace.old_filter_type,
                            filter_replace.new_filter_type);
-       }
+
        return status;
 }
 
@@ -7782,14 +7774,13 @@ i40e_replace_gtp_l1_filter(struct i40e_pf *pf)
        status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
                                               &filter_replace_buf);
        if (!status && (filter_replace.old_filter_type !=
-                       filter_replace.new_filter_type)) {
-               i40e_global_cfg_warning(I40E_WARNING_RPL_CLD_FILTER);
+                       filter_replace.new_filter_type))
                PMD_DRV_LOG(WARNING, "i40e device %s changed cloud l1 type."
                            " original: 0x%x, new: 0x%x",
                            dev->device->name,
                            filter_replace.old_filter_type,
                            filter_replace.new_filter_type);
-       }
+
        return status;
 }
 
@@ -7856,14 +7847,13 @@ i40e_status_code i40e_replace_gtp_cloud_filter(struct i40e_pf *pf)
        status = i40e_aq_replace_cloud_filters(hw, &filter_replace,
                                               &filter_replace_buf);
        if (!status && (filter_replace.old_filter_type !=
-                       filter_replace.new_filter_type)) {
-               i40e_global_cfg_warning(I40E_WARNING_RPL_CLD_FILTER);
+                       filter_replace.new_filter_type))
                PMD_DRV_LOG(WARNING, "i40e device %s changed cloud filter type."
                            " original: 0x%x, new: 0x%x",
                            dev->device->name,
                            filter_replace.old_filter_type,
                            filter_replace.new_filter_type);
-       }
+
        return status;
 }
 
@@ -8423,7 +8413,6 @@ i40e_dev_set_gre_key_len(struct i40e_hw *hw, uint8_t len)
                PMD_DRV_LOG(DEBUG, "Global register 0x%08x is changed "
                            "with value 0x%08x",
                            I40E_GL_PRS_FVBM(2), reg);
-               i40e_global_cfg_warning(I40E_WARNING_GRE_KEY_LEN);
        } else {
                ret = 0;
        }
@@ -8689,7 +8678,6 @@ i40e_set_hash_filter_global_config(struct i40e_hw *hw,
                                                          I40E_GLQF_HSYM(j),
                                                          reg);
                        }
-                       i40e_global_cfg_warning(I40E_WARNING_HSYM);
                }
        }
 
@@ -8715,7 +8703,6 @@ i40e_set_hash_filter_global_config(struct i40e_hw *hw,
                goto out;
 
        i40e_write_global_rx_ctl(hw, I40E_GLQF_CTL, reg);
-       i40e_global_cfg_warning(I40E_WARNING_QF_CTL);
 
 out:
        I40E_WRITE_FLUSH(hw);
@@ -9392,12 +9379,6 @@ i40e_filter_input_set_init(struct i40e_pf *pf)
                        pf->hash_input_set[pctype] = input_set;
                pf->fdir.input_set[pctype] = input_set;
        }
-
-       if (!pf->support_multi_driver) {
-               i40e_global_cfg_warning(I40E_WARNING_HASH_INSET);
-               i40e_global_cfg_warning(I40E_WARNING_FD_MSK);
-               i40e_global_cfg_warning(I40E_WARNING_HASH_MSK);
-       }
 }
 
 int
@@ -9463,7 +9444,6 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
        i40e_check_write_global_reg(hw, I40E_GLQF_HASH_INSET(1, pctype),
                                    (uint32_t)((inset_reg >>
                                    I40E_32_BIT_WIDTH) & UINT32_MAX));
-       i40e_global_cfg_warning(I40E_WARNING_HASH_INSET);
 
        for (i = 0; i < num; i++)
                i40e_check_write_global_reg(hw, I40E_GLQF_HASH_MSK(i, pctype),
@@ -9472,7 +9452,6 @@ i40e_hash_filter_inset_select(struct i40e_hw *hw,
        for (i = num; i < I40E_INSET_MASK_NUM_REG; i++)
                i40e_check_write_global_reg(hw, I40E_GLQF_HASH_MSK(i, pctype),
                                            0);
-       i40e_global_cfg_warning(I40E_WARNING_HASH_MSK);
        I40E_WRITE_FLUSH(hw);
 
        pf->hash_input_set[pctype] = input_set;
@@ -9553,7 +9532,6 @@ i40e_fdir_filter_inset_select(struct i40e_pf *pf,
                        i40e_check_write_global_reg(hw,
                                                    I40E_GLQF_FD_MSK(i, pctype),
                                                    0);
-               i40e_global_cfg_warning(I40E_WARNING_FD_MSK);
        } else {
                PMD_DRV_LOG(ERR, "FDIR bit mask is not supported.");
        }
@@ -10036,6 +10014,60 @@ i40e_pctype_to_flowtype(const struct i40e_adapter *adapter,
 #define I40E_GL_SWR_PM_UP_THR_SF_VALUE   0x06060606
 #define I40E_GL_SWR_PM_UP_THR            0x269FBC
 
+/*
+ * GL_SWR_PM_UP_THR:
+ * The value is not impacted from the link speed, its value is set according
+ * to the total number of ports for a better pipe-monitor configuration.
+ */
+static bool
+i40e_get_swr_pm_cfg(struct i40e_hw *hw, uint32_t *value)
+{
+#define I40E_GL_SWR_PM_EF_DEVICE(dev) \
+               .device_id = (dev),   \
+               .val = I40E_GL_SWR_PM_UP_THR_EF_VALUE
+
+#define I40E_GL_SWR_PM_SF_DEVICE(dev) \
+               .device_id = (dev),   \
+               .val = I40E_GL_SWR_PM_UP_THR_SF_VALUE
+
+       static const struct {
+               uint16_t device_id;
+               uint32_t val;
+       } swr_pm_table[] = {
+               { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_SFP_XL710) },
+               { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_KX_C) },
+               { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T) },
+               { I40E_GL_SWR_PM_EF_DEVICE(I40E_DEV_ID_10G_BASE_T4) },
+
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_KX_B) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_A) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_QSFP_B) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_20G_KR2_A) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_B) },
+               { I40E_GL_SWR_PM_SF_DEVICE(I40E_DEV_ID_25G_SFP28) },
+       };
+       uint32_t i;
+
+       if (value == NULL) {
+               PMD_DRV_LOG(ERR, "value is NULL");
+               return false;
+       }
+
+       for (i = 0; i < RTE_DIM(swr_pm_table); i++) {
+               if (hw->device_id == swr_pm_table[i].device_id) {
+                       *value = swr_pm_table[i].val;
+
+                       PMD_DRV_LOG(DEBUG, "Device 0x%x with GL_SWR_PM_UP_THR "
+                                   "value - 0x%08x",
+                                   hw->device_id, *value);
+                       return true;
+               }
+       }
+
+       return false;
+}
+
 static int
 i40e_dev_sync_phy_type(struct i40e_hw *hw)
 {
@@ -10100,13 +10132,16 @@ i40e_configure_registers(struct i40e_hw *hw)
                }
 
                if (reg_table[i].addr == I40E_GL_SWR_PM_UP_THR) {
-                       if (I40E_PHY_TYPE_SUPPORT_40G(hw->phy.phy_types) || /* For XL710 */
-                           I40E_PHY_TYPE_SUPPORT_25G(hw->phy.phy_types)) /* For XXV710 */
-                               reg_table[i].val =
-                                       I40E_GL_SWR_PM_UP_THR_SF_VALUE;
-                       else /* For X710 */
-                               reg_table[i].val =
-                                       I40E_GL_SWR_PM_UP_THR_EF_VALUE;
+                       uint32_t cfg_val;
+
+                       if (!i40e_get_swr_pm_cfg(hw, &cfg_val)) {
+                               PMD_DRV_LOG(DEBUG, "Device 0x%x skips "
+                                           "GL_SWR_PM_UP_THR value fixup",
+                                           hw->device_id);
+                               continue;
+                       }
+
+                       reg_table[i].val = cfg_val;
                }
 
                ret = i40e_aq_debug_read_register(hw, reg_table[i].addr,
@@ -12314,14 +12349,13 @@ i40e_cloud_filter_qinq_create(struct i40e_pf *pf)
        ret = i40e_aq_replace_cloud_filters(hw, &filter_replace,
                        &filter_replace_buf);
        if (!ret && (filter_replace.old_filter_type !=
-                    filter_replace.new_filter_type)) {
-               i40e_global_cfg_warning(I40E_WARNING_RPL_CLD_FILTER);
+                    filter_replace.new_filter_type))
                PMD_DRV_LOG(WARNING, "i40e device %s changed cloud filter type."
                            " original: 0x%x, new: 0x%x",
                            dev->device->name,
                            filter_replace.old_filter_type,
                            filter_replace.new_filter_type);
-       }
+
        return ret;
 }
 
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