#define I40E_FLAG_FDIR (1ULL << 6)
#define I40E_FLAG_VXLAN (1ULL << 7)
#define I40E_FLAG_RSS_AQ_CAPABLE (1ULL << 8)
-#define I40E_FLAG_VF_MAC_BY_PF (1ULL << 9)
#define I40E_FLAG_ALL (I40E_FLAG_RSS | \
I40E_FLAG_DCB | \
I40E_FLAG_VMDQ | \
I40E_FLAG_HEADER_SPLIT_ENABLED | \
I40E_FLAG_FDIR | \
I40E_FLAG_VXLAN | \
- I40E_FLAG_RSS_AQ_CAPABLE | \
- I40E_FLAG_VF_MAC_BY_PF)
+ I40E_FLAG_RSS_AQ_CAPABLE)
#define I40E_RSS_OFFLOAD_ALL ( \
ETH_RSS_FRAG_IPV4 | \
#define I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_MASK \
I40E_MASK(0xFFFF, I40E_GL_SWT_L2TAGCTRL_ETHERTYPE_SHIFT)
+#define I40E_RSS_TYPE_NONE 0ULL
+#define I40E_RSS_TYPE_INVALID 1ULL
+
#define I40E_INSET_NONE 0x00000000000000000ULL
/* bit0 ~ bit 7 */
(RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN + I40E_VLAN_TAG_SIZE * 2)
struct i40e_adapter;
+struct rte_pci_driver;
/**
* MAC filter structure
/* version of the virtchnl from VF */
struct virtchnl_version_info version;
uint32_t request_caps; /* offload caps requested from VF */
+ uint64_t num_mdd_events; /* num of mdd events detected */
+
+ /*
+ * Variables for store the arrival timestamp of VF messages.
+ * If the timestamp of latest message stored at
+ * `msg_timestamps[index % max]` then the timestamp of
+ * earliest message stored at `msg_time[(index + 1) % max]`.
+ * When a new message come, the timestamp of this message
+ * will be stored at `msg_timestamps[(index + 1) % max]` and the
+ * earliest message timestamp is at
+ * `msg_timestamps[(index + 2) % max]` now...
+ */
+ uint32_t msg_index;
+ uint64_t *msg_timestamps;
+
+ /* cycle of stop ignoring VF message */
+ uint64_t ignore_end_cycle;
};
/*
struct rte_eth_ipv6_flow ip6;
};
+/* A structure used to define the input for ESP IPV4 flow */
+struct i40e_esp_ipv4_flow {
+ struct rte_eth_ipv4_flow ipv4;
+ uint32_t spi; /* SPI in big endian. */
+};
+
+/* A structure used to define the input for ESP IPV6 flow */
+struct i40e_esp_ipv6_flow {
+ struct rte_eth_ipv6_flow ipv6;
+ uint32_t spi; /* SPI in big endian. */
+};
+/* A structure used to define the input for ESP IPV4 UDP flow */
+struct i40e_esp_ipv4_udp_flow {
+ struct rte_eth_udpv4_flow udp;
+ uint32_t spi; /* SPI in big endian. */
+};
+
+/* A structure used to define the input for ESP IPV6 UDP flow */
+struct i40e_esp_ipv6_udp_flow {
+ struct rte_eth_udpv6_flow udp;
+ uint32_t spi; /* SPI in big endian. */
+};
+
/* A structure used to define the input for raw type flow */
struct i40e_raw_flow {
uint16_t pctype;
uint32_t length;
};
+/* A structure used to define the input for L2TPv3 over IPv4 flow */
+struct i40e_ipv4_l2tpv3oip_flow {
+ struct rte_eth_ipv4_flow ip4;
+ uint32_t session_id; /* Session ID in big endian. */
+};
+
+/* A structure used to define the input for L2TPv3 over IPv6 flow */
+struct i40e_ipv6_l2tpv3oip_flow {
+ struct rte_eth_ipv6_flow ip6;
+ uint32_t session_id; /* Session ID in big endian. */
+};
+
+/* A structure used to define the input for l2 dst type flow */
+struct i40e_l2_flow {
+ struct rte_ether_addr dst;
+ struct rte_ether_addr src;
+ uint16_t ether_type; /**< Ether type in big endian */
+};
+
/*
* A union contains the inputs for all types of flow
* items in flows need to be in big endian
*/
union i40e_fdir_flow {
- struct rte_eth_l2_flow l2_flow;
- struct rte_eth_udpv4_flow udp4_flow;
- struct rte_eth_tcpv4_flow tcp4_flow;
- struct rte_eth_sctpv4_flow sctp4_flow;
- struct rte_eth_ipv4_flow ip4_flow;
- struct rte_eth_udpv6_flow udp6_flow;
- struct rte_eth_tcpv6_flow tcp6_flow;
- struct rte_eth_sctpv6_flow sctp6_flow;
- struct rte_eth_ipv6_flow ipv6_flow;
- struct i40e_gtp_flow gtp_flow;
- struct i40e_gtp_ipv4_flow gtp_ipv4_flow;
- struct i40e_gtp_ipv6_flow gtp_ipv6_flow;
- struct i40e_raw_flow raw_flow;
+ struct i40e_l2_flow l2_flow;
+ struct rte_eth_udpv4_flow udp4_flow;
+ struct rte_eth_tcpv4_flow tcp4_flow;
+ struct rte_eth_sctpv4_flow sctp4_flow;
+ struct rte_eth_ipv4_flow ip4_flow;
+ struct rte_eth_udpv6_flow udp6_flow;
+ struct rte_eth_tcpv6_flow tcp6_flow;
+ struct rte_eth_sctpv6_flow sctp6_flow;
+ struct rte_eth_ipv6_flow ipv6_flow;
+ struct i40e_gtp_flow gtp_flow;
+ struct i40e_gtp_ipv4_flow gtp_ipv4_flow;
+ struct i40e_gtp_ipv6_flow gtp_ipv6_flow;
+ struct i40e_raw_flow raw_flow;
+ struct i40e_ipv4_l2tpv3oip_flow ip4_l2tpv3oip_flow;
+ struct i40e_ipv6_l2tpv3oip_flow ip6_l2tpv3oip_flow;
+ struct i40e_esp_ipv4_flow esp_ipv4_flow;
+ struct i40e_esp_ipv6_flow esp_ipv6_flow;
+ struct i40e_esp_ipv4_udp_flow esp_ipv4_udp_flow;
+ struct i40e_esp_ipv6_udp_flow esp_ipv6_udp_flow;
};
enum i40e_fdir_ip_type {
uint16_t dst_id; /* VF ID, available when is_vf is 1*/
bool inner_ip; /* If there is inner ip */
enum i40e_fdir_ip_type iip_type; /* ip type for inner ip */
+ enum i40e_fdir_ip_type oip_type; /* ip type for outer ip */
bool customized_pctype; /* If customized pctype is used */
bool pkt_template; /* If raw packet template is used */
+ bool is_udp; /* ipv4|ipv6 udp flow */
};
/* A structure used to define the input for a flow director filter entry */
struct i40e_queue_region_info region[I40E_REGION_MAX_INDEX + 1];
};
+struct i40e_rss_pattern_info {
+ uint8_t action_flag;
+ uint64_t types;
+};
+
/* Tunnel filter number HW supports */
#define I40E_MAX_TUNNEL_FILTER_NUM 400
I40E_TUNNEL_TYPE_QINQ,
I40E_TUNNEL_TYPE_GTPC,
I40E_TUNNEL_TYPE_GTPU,
+ I40E_TUNNEL_TYPE_ESPoUDP,
+ I40E_TUNNEL_TYPE_ESPoIP,
I40E_TUNNEL_TYPE_MAX,
};
I40E_CUSTOMIZED_GTPU_IPV4,
I40E_CUSTOMIZED_GTPU_IPV6,
I40E_CUSTOMIZED_GTPU,
+ I40E_CUSTOMIZED_IPV4_L2TPV3,
+ I40E_CUSTOMIZED_IPV6_L2TPV3,
+ I40E_CUSTOMIZED_ESP_IPV4,
+ I40E_CUSTOMIZED_ESP_IPV6,
+ I40E_CUSTOMIZED_ESP_IPV4_UDP,
+ I40E_CUSTOMIZED_ESP_IPV6_UDP,
+ I40E_CUSTOMIZED_AH_IPV4,
+ I40E_CUSTOMIZED_AH_IPV6,
I40E_CUSTOMIZED_MAX,
};
I40E_VFQF_HKEY_MAX_INDEX : I40E_PFQF_HKEY_MAX_INDEX + 1) *
sizeof(uint32_t)]; /* Hash key. */
uint16_t queue[I40E_MAX_Q_PER_TC]; /**< Queues indices to use. */
+ bool valid; /* Check if it's valid */
+};
+
+TAILQ_HEAD(i40e_rss_conf_list, i40e_rss_filter);
+
+/* RSS filter list structure */
+struct i40e_rss_filter {
+ TAILQ_ENTRY(i40e_rss_filter) next;
+ struct i40e_rte_flow_rss_conf rss_filter_info;
+};
+
+struct i40e_vf_msg_cfg {
+ /* maximal VF message during a statistic period */
+ uint32_t max_msg;
+
+ /* statistic period, in second */
+ uint32_t period;
+ /*
+ * If message statistics from a VF exceed the maximal limitation,
+ * the PF will ignore any new message from that VF for
+ * 'ignor_second' time.
+ */
+ uint32_t ignore_second;
};
/*
struct i40e_fdir_info fdir; /* flow director info */
struct i40e_ethertype_rule ethertype; /* Ethertype filter rule */
struct i40e_tunnel_rule tunnel; /* Tunnel filter rule */
- struct i40e_rte_flow_rss_conf rss_info; /* rss info */
+ struct i40e_rte_flow_rss_conf rss_info; /* RSS info */
+ struct i40e_rss_conf_list rss_config_list; /* RSS rule list */
struct i40e_queue_regions queue_region; /* queue region info */
struct i40e_fc_conf fc_conf; /* Flow control conf */
struct i40e_mirror_rule_list mirror_list;
/* Dynamic Device Personalization */
bool gtp_support; /* 1 - support GTP-C and GTP-U */
+ bool esp_support; /* 1 - support ESP SPI */
/* customer customized pctype */
struct i40e_customized_pctype customized_pctype[I40E_CUSTOMIZED_MAX];
/* Switch Domain Id */
uint16_t switch_domain_id;
+
+ struct i40e_vf_msg_cfg vf_msg_cfg;
};
enum pending_msg {
uint32_t len,
int socket_id);
int i40e_fdir_configure(struct rte_eth_dev *dev);
+void i40e_fdir_rx_proc_enable(struct rte_eth_dev *dev, bool on);
void i40e_fdir_teardown(struct i40e_pf *pf);
enum i40e_filter_pctype
i40e_flowtype_to_pctype(const struct i40e_adapter *adapter,
struct rte_eth_rxq_info *qinfo);
void i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,
struct rte_eth_txq_info *qinfo);
+int i40e_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
+int i40e_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,
+ struct rte_eth_burst_mode *mode);
struct i40e_ethertype_filter *
i40e_sw_ethertype_filter_lookup(struct i40e_ethertype_rule *ethertype_rule,
const struct i40e_ethertype_filter_input *input);
int i40e_add_macvlan_filters(struct i40e_vsi *vsi,
struct i40e_macvlan_filter *filter,
int total);
+bool is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv);
bool is_i40e_supported(struct rte_eth_dev *dev);
+bool is_i40evf_supported(struct rte_eth_dev *dev);
int i40e_validate_input_set(enum i40e_filter_pctype pctype,
enum rte_filter_type filter, uint64_t inset);
int i40e_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size);
int i40e_rss_conf_init(struct i40e_rte_flow_rss_conf *out,
const struct rte_flow_action_rss *in);
-int i40e_action_rss_same(const struct rte_flow_action_rss *comp,
- const struct rte_flow_action_rss *with);
int i40e_config_rss_filter(struct i40e_pf *pf,
struct i40e_rte_flow_rss_conf *conf, bool add);
int i40e_vf_representor_init(struct rte_eth_dev *ethdev, void *init_params);
git.droids-corp.org / dpdk.git / blobdiff